JPH01311289A - Lsi test system - Google Patents

Abstract

PURPOSE:To generate a program automatically by providing a module selecting means, a switching command statement writing means, an output signal mode and measurement mode command statement writing means, and an inspection object LSI(DUT) quality decision command statement writing means. CONSTITUTION:The module selecting means 5 reads electric conditions and measurement conditions of respective pins out of a memory 1 and selects and stores a module corresponding to the conditions. When modules as to last and current test items of each pin are different, the module switching commands statement writing means 6 writes a command statement which turns off a signal applied from the last module to the DUT and turns on a signal applied from the current module to the DUT in a Job source file 1a. The module output signal mode and measurement mode command statement writing means 7 reads electric conditions or measurement conditions out of the memory 1 and writes a command statement indicating the output signal mode or measurement mode of each module in the file 1a. The DUT quality command decision statement writing means 9 reads a prescribed value out of the memory 1 and writes a command statement for deciding whether or not the DUT is normal in the file 1a.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an LSI test system that can automatically create test programs.

[Conventional technology]

The LSI test system according to the present invention mainly uses analog L
It is used for SI (IC) testing, and is described below.
This will be explained using an analog LSI as an example.

Generally, in an IC manufacturer, a design engineer designs an SI and also creates test standards to check the quality of this LSI. Test standards include various measurement conditions (for example, the measurement format of the module that performs the measurement; for example, when measuring pulse width, conditions such as start trigger level and stop trigger level) and bin conditions (for example, DO
This standard defines the voltage and current values to be applied to each bin of T) and the standard & (standard value and maximum/minimum value range) that defines the permissible range of measured values.

On the other hand, when commercializing and selling this LSI,
A test system must be used to distinguish between good and defective products. Therefore, a test engineer manually creates a test program for inspecting the quality of LSI as a product using an LSI test system in accordance with the above-mentioned test standards.

After that, the LSI test system is operated using the completed test program, and the LS that satisfies the test standard values is tested.
We select and sell I.

[Problem to be solved by the invention]

In conventional LSI test systems such as those described above, test engineers manually create test programs according to test standards, but this work requires extremely advanced knowledge and requires a long production time. .

In recent years, there has been a strong trend toward diversification and higher functionality of analog LSIs, and test program development costs have also increased.
IThe proportion of sales prices is increasing. Therefore, conventional LSI test systems have the problem of efficiently creating test programs.

An object of the present invention is to provide an LSI test system that can automatically create a test program from test standard data.

[Means to solve the problem]

In order to solve the above problems, the present invention provides electrical conditions (hereinafter referred to as PIN conditions) to be applied to each bin of an LSI to be tested (hereinafter referred to as DUT), and a condition 1+( (hereinafter referred to as measurement conditions) and standard values that define the allowable range of this measurement value for each test item, and the PTN conditions or measurement conditions for each bin are read from the memory and connected to the bin. means for selecting a module (means having the function of applying a signal or measuring a signal) and storing the selected module;
If the module for the previous test item in each bin (hereinafter referred to as the previous module) is different from the module for the current test item (hereinafter referred to as the current module), the signal applied to the DOT from the previous module is turned off and the current module is turned on. means for writing a command statement representing the output signal form or measurement form of each module into the job source file; A means for reading out from the memory and writing a command statement for determining the quality of the DUT into a job source file.

[Effect]

The present invention includes module selection means, module switching command writing means, module output signal form/measurement form command writing means, and DUT quality judgment command writing means, and each module is selected based on test standard data. It is possible to automatically create programs that operate appropriately.

〔Example〕

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a diagram showing an example of the main part configuration of an LSI test system according to the present invention, FIG. 2 is a diagram showing an example of the overall configuration of an LSI test system using the present invention, and FIG.
FIG. 4 is a diagram showing an example of a test program created by the LSI test system according to the present invention. FIG.
A diagram showing an example of a test specification table created by the test system, FIG. 6 is a diagram showing the module and the vicinity of 007.

First, the overall configuration of the LSI test system will be explained using FIG. The figure shows the LSI tester main body, subsystems, and a floppy disk that intervenes in data transfer between them.

The subsystem is an LSI/IC (hereinafter referred to as DuT) that is the object to be inspected.
) has the function of creating a test program that automatically determines the quality of the product. More specifically, test standard data D1 for determining the quality of the DUT is input, and a test program is automatically created based on this test standard data D1.

This subsystem is the computer 10 (hereinafter referred to as CPU).
10), memory 1, CRT 13, and CR
It is composed of a T interface 11, a keyboard 14, a printer 15, a keyboard/printer interface 16, and an FDD/HDD interface 17.

As the CPU 10, for example, a personal computer or the like can be used. The memory 1 is composed of, for example, a disk, in which a test program is created as a job source file, and this is loaded onto a floppy disk (hereinafter referred to as FD) 20, which will be described later.

The LSI tester itself has 3 CPUs, 31 memory chips,
FDD/HDD interface 32 and CRT 35
, a CRT interface 34, a lower module controller 37, and a plurality of measurement module hardware (hereinafter simply referred to as modules) 38, and a DOT 40 is connected to the module 38 via various signal lines.

The CPt 130 controls the main body of the LSI tester, and is usually composed of a CPU IO subsystem and separate hardware. However, the present invention can be achieved even if the same CPt1 is used for both purposes.The memory 31 stores in advance a program for executing the test program created by the above subsystem, and the CPU 30 uses the memory 31
The test program execution program stored in
The test program is executed, the module 38 is activated, various signals are applied to the D(IT) 40, and the measurement data is collected.A publicly known test program execution program can be used, and it is a common program for the apparatus shown in FIG. That is, the test program created in the subsystem can then be easily executed on the LSI tester itself using common sense.

The lower module controller 37 appropriately operates the plurality of modules 38 based on control signals from the CPU 30.

The module 38 has a function of applying a signal or measuring a signal, and the LSI test system is equipped with a plurality of types of modules for each function. The relationship between the module 38 and the DUT 40 will be briefly explained with reference to FIG. In FIG. 6, modules a and b
The output can be switched between constant voltage and constant current. Module a is capable of outputting a small current from a large number of channels, and module b is capable of outputting a large current although it has only two channels, for example. 6th
Although not shown in the figure, modules a and b are not only capable of outputting constant voltage and constant current, but also have a function of measuring voltage and current. There are also modules that can output sine waves.

The operation of the apparatus shown in FIG. 2 constructed as above will be explained.

An operator (for example, a designer of the LSI or IC to be tested) stores test standard data 01 in the memory 1 via the keyboard 14, interface 16, CRT 13, and CPU 10 in the subsystem. In this subsystem, for example, a table like the one shown in Fig. 5 is displayed on a CRT.
13, and the operator inputs the test standard data into a predetermined blank field in the table in an interactive manner, so that the test standard data D1 is written to a predetermined address in the memory 1. That is, although the memory 1 is equipped with a test standard conversation manual program, the operation in this respect is not an essential part of the present invention, so a description thereof will be omitted.

After that, the subsystem reads this test standard data and stores the data of the test program source in memory 1.
b Create in source file 1a. This point will be explained in detail later.

The test program source data stored in the memory 1 is loaded onto, for example, a floppy disk FD 20 via the CPU IO and the interface 17.

The LSI tester main body reads test program source data via the interface 32, stores it in the memory 31, converts it into data for the lower module controller 37, and stores it in the memory on the lower module controller 37. This test program source is converted into executable data and executed by a test program execution program also stored in the memory 31.

When executed, the CPU 30 sends an execution command signal to the lower module controller 37 in units of statements of the test program, accesses each module 38 according to the stored data contents, and programs various signals in the DUT 40. Input and output in order.

Then, the test result data is read again by the module controller 37 and the CPU 30, and Go/NoGo is determined for each test item by the test program execution program stored in the memory 31.

In the LSI test system shown in FIG. 2, the test standard data D1 can be debugged based on the test result data. That is, the initial test standard data is created at the stage of designing the LSI (designer's expected value data, target data, or estimated data) and is not based on data actually measured for mass-produced IsI. , there is a possibility that data that does not match the actual situation is included, or data that has been inputted incorrectly, so it is necessary to debug this and convert it into appropriate test standard data.

The debugging operation of the device shown in FIG. 2 will be explained with reference to FIGS. 4 and 5. FIG. 5 shows an example of testing IsI over 10 items. Test number 2: To explain the debugging operation using test item 2 as an example, check whether the measured value is between A: minimum limit and B: maximum limit. The test program upper and lower limit values of B1135) for A-(105) B are stored in a separate area, and the measured value C in Fig. 5 and the actual measured value fIiC in Fig. 4 are stored in a separate area.
(TESI2) is similarly stored for comparison (7th
(see figure).

During debugging, information A-, B-, and C- are referred to by test numbers, a partial test standard is displayed on the CRT, and changes are input using an image of the test standard.

For example, if A and B are corrected to -5 and +5, respectively, the sentence JUDGE TEST 2,105,135 in Figure 4 is changed to JUDGE TESI 2,100,140.
The upper limit value and lower limit value are changed by 5 in the child direction.

Feedback of debug information is performed by sending debug data to a floppy disk F via a floppy interface 36.
This is achieved by returning the data from the LSI tester main body to the subsystem via D21. That is, the subsystem is CP
This debugging information is read in U 10 and displayed on the CRT 13 in the form of a test standard as shown in FIG. 5, and the portions changed by debugging are displayed.

In this way, in the device shown in Figure 2, before operation, a test is executed using, for example, a prototype IsI, debugging equivalent to parameter tuning is performed here, an appropriate test program is created, and then an IC test for the mass production line is performed. can be operated.

Next, the operation of automatically creating test program source data in the subsystem section will be explained. FIG. 1 shows the CPU 10 of the subsystem section as a combination of function implementation means. That is, in FIG. 1, component numbers 2 to 9 are functional means included in the CPII 10. 1 is a memory 1 shown in FIG.

The operation shown in FIG. 1 will be explained. FIG. 1 shows a configuration in which the CPU 10 reads test standard data (not shown in FIG. 5) from the memory 1 and automatically creates test program source data shown in FIG. 4 from this data.

First, the contents of the test standard garment shown in FIG. 5 will be explained. This test standard clothing is tested for items 1 to 10. Each test number corresponds to a test item. The contents consist of standard values, measurement conditions, and PIN conditions.

The standard value consists of a standard value, a minimum value, and a maximum value.

In the minimum: maximum bear shown in ■～■, ■ is, for example, L
This is the range for inspecting the quality of the SI at the time it is formed on the wafer, (2) is the range for the packaged state, and (2) is the range for inspection at the shipping stage.

"Measurement mode" in the measurement conditions section refers to the object to be measured; for example, I indicates current measurement, T indicates time measurement (pulse width measurement), ■ indicates voltage measurement, etc. In test item 2, 'r: means time measurement, and here "
Measurement system settings: rIV, PO3, 0, 9V, NEG
The description in 5 J specifies the trigger level and the number of measurement averages; the start trigger is 1V at the rising edge, and the stop trigger is 0.9V at the falling edge.
This means that the average number of measurements should be 5. Also, “DELAY Tl)l Bi’s 0”
11s is the delay time 018' from the start? ``It means something that should be measured.

In the PIN conditions section, the "M" mark on each pin means that a measurement module is connected, and a blank pin means that the module connected to this pin is connected to the old G
This means that the H impedance and applied voltage limit are set to 32V.

Also, CC (100 μA, IV) C, module output constant current (CC; Con5tant current
) This means that the voltage limit should be 1v at 100μ8.

Also, the ↓ mark means the same setting as described above.

To explain in test item 2, pin 1 has CV (5
V, 200+mA), and Conopin 1
For this, constant voltage (CV: consta) is applied from the module.
This means that 5V (nt voltage) should be applied and the current limit at that time should be 200nA. pin
3 “H3TART” connects the measurement module,
This means that the rising edge of pin 3 (see the measurement system above) is taken as the start of the measurement. pin 5
'HEND' means to connect the measurement module and take the falling edge of this pin 5 as the end of the measurement. pin 7 'AU (IKHz, 0.5V, 3
1N) ” This means that a sine wave of H2, O, bV should be added to analog frequency 1 to Lt, Konohin 7.

In the apparatus shown in FIG. 1, the content of such test number 2 is converted into the part enclosed by the line in FIG. 4 as follows.

The test number writing means 2 reads the test number shown in FIG. 5 (here, test number 2) stored in the memory 1, and writes this data into the job source file 1a without processing it. , TEST NO.2. In Figure 1, the job source file 1a is drawn independently, but this is done to make the signal flow easier to understand.
a is stored in the area on the memory 1.

The test item writing means 3 reads the test item shown in FIG. 5 (here, test item 2) stored in the memory 1, and writes this data into the job source file 1a without processing it. , is described in the sentence of test item 2.

The setting calculation formula writing means 4 reads the setting calculation formula from the memory 1, if any, and writes it to the job source file 1a without processing this data, test number 2.
does not have this setting calculation formula, but test number 4 does. This is shown in Figure 4 (J.

b It is written in the source file 1a. The setting calculation formula is used, for example, when calculating and using the results of a previous test to set the PIN conditions.

The module selection means 5 reads out the PIN conditions and measurement conditions for each pin from the memory 1, selects a module that meets these conditions, and stores it. That is, the functions of each module included in the L and Sl test systems are known, and by providing this in the module selection means 5, for example, as a table, it is possible to immediately determine the module that meets the read PIN conditions and measurement conditions.

Then, the determined module name is stored in the memory means 5a provided in the means 5. The module is determined for all pins.

When the module at the time of the previous test item (previous module) and the module at the time of the current test item (current module) for each pin are different, the writing means 6 of the module switching command statement is used to write the module switching command statement from the previous module, 1-ru to the DUT. A command statement that turns off the applied signal and turns on the signal applied from the module to the DOT this time is written into the job source file 1a, that is, the module switching command text writing means 6 introduces the signal from the module selection means 5. If the signal indicating the previous module selected here is different from the signal indicating the current module, a command statement (I SET statement) as shown in FIG. 4(a), for example, is written to the job source file 1a.

That is, the test must be performed at test number 11H, or if the module giving the set electric signal is different, a command must be given to disconnect the previous module and connect a new module.

For example, to explain pin 2, test number 1
In the side chamber of , only the signal of the old G11 impedance (blank means IIIGH impedance) is given, so the module is not shown in Figure 6a and is a PPV.
T''' (this module has multiple channel outputs but can only output a small amount of current) is selected.Then, the measurement temperature of pin 2 of test number 2, Cν
(OV, 200IIA), i.e. the current limit is 20
Since the current is specified as 01A, it is necessary to connect a module "HVI" that can output a large current.

Figure 6 shows this module “PPVT” and “HVI”
and DOT 40, and a switch (PIN
1.

PIN 2,..., 11.12. ).

To explain with reference to FIG. 6, FIG. 4, and FIG. 5, in test number 2, pin 1 is “PPVI
"→"HVI 1". In other words, the "M II" of pin 1 in test number 1 shown in FIG. 5 is 0.3V, 2+gA under the measurement conditions,
I"" is selected. As described above, the module "PPVI" not only functions as a signal generator, but also has an R function capable of measuring voltage and current (the same applies to the module "MVI°'").

However, in test number 2, pin 1 is
is CV (5V, 200111A) note, module”
HVll”.

Pin 2 is also nimoju-/l/"PPVI"-
Switch to “HVI 1”. That is, as shown in FIG.
V, 200 nA).

Pin 3 has 2 CV (OV, 10
nA) to 14sT^IIT, it is necessary to switch from module "PPv1pa" to module "7M".

In addition, the module “PPVI” can output up to 311A.
It is something that can be measured. Furthermore, the module “old” is a module that has a function of measuring time.

Pin 4 is not shown in Figure 5 L: CV (OV,
1h+A) to blank, the module remains "PPVI".

Hereafter, the presence or absence of module switching is determined for each pin, and as shown in Figure 4 (a), * SET PPVI
PIN (1) 0UT=OFF L1=ONP
IN(2) 0UT=OFF L2=ONPIN(
3, 5, 7) Change the command statement 0UT=OFF to Job
Write to source file.

The writing means 7 for command statements for output signal forms and measurement forms of modules reads the PIN conditions or measurement conditions from the memory 1, and writes commands as shown in FIG. 4 (b) representing the output signal forms or measurement forms of each module. Write the statement to the Job source file.

The output signal format indicates the input/output operating conditions of each module, such as output current value, output voltage value, limit current value, limit voltage value, constant current mode, constant voltage mode, frequency value, and waveform type. be.

Taking the module "TH" as an example, the measurement form indicates the conditions for measurement, such as the selected measurement range, counter function, A channel trigger force level, B channel trigger level, etc. .

Each * symbol shown in Figure 4 (B) written after SET (HVI, PPVI, AUS, TH) C. Indicates the module name.The contents of the command statement described in Figure 4 (B) are briefly explained. As shown, module HVI 1 has output terminal 1 in current mode, output voltage is 5V, and current limit is 200HA6.
:, t(MODI=l VOLT1=5ν CUR1
=200HA 011T1・ON). Also, set output terminal 2 to current mode, output voltage to Qv, and current limit to 200H^ (HOD2=I VOLT2=
OV C0)12=200HA 0UT2=ON
) 'e command is being issued.

Module PPVI, PIN 4.6.8.9C: Connect the channel output to the old GH impedance, and set the voltage limit to 32V.
4,6,8:9) MODE-Old Z VOl, T=32
V).

Module All5 has multiple output terminals, but here MAIN is used, and a sine wave (SIN), l at frequency 1 is used.
lz (F1=0)2=Or3=1 means IKHz), and commands to output a signal with an output voltage of 500 llV.

Module E has multiple input terminals, but here the input selection (measurement range condition) is set to MAIN, and the counter function is set to time interval.
), A channel no 1-! , J Ga Level (TLVLA
) is 1v, and the B channel tri-power level (TLVL8
) is set to 0.9v, the A channel is applied with a rising slope (＾5IOPE=PO3), and the B channel is applied with a falling slope and multiplied by 1 to 1 (BSLOP).
E=NEG).

The writing means 8 of the measurement command statement is the test item and DEL^Y
TIHE is read from the memory 1 and a measurement command statement (measure statement) as shown in FIG. 4(c) is written to the job source file 1a. The content of is the data of test 2 (T
FST2・REG 1) Immediately captures the established data when the signal is applied (0[[^”f=5H8).

The DuT quality judgment command statement writing means 9 reads the standard value from the memory 1 and writes a command statement (judgment statement) for determining the quality of the OT as shown in FIG. 4(d).

b Write to the source file.

If the LSI test system does not contain data stored in register 2 (in Figure 4 (c), data for tests 1 and 2 are stored in register 1) within the range indicated by this judgment statement, , it is determined as NoGo.

Although not shown in FIG. 1, if the presence or absence of a judgment calculation formula is determined and this calculation formula is written on the test standard clothes shown in FIG. 5, this judgment calculation formula is stored in the memory 1. There are only a few means for reading from the job source file 1a and writing it to the job source file 1a. The reason for the existence of this judgment a1 formula is that, for example, there are cases where it is necessary to convert the measured value into decibels and make a judgment, rather than judging the measured value as it is.

As described above, by each means shown in FIG. 1, the test standard data on the memory as shown in FIG. 5 is automatically converted into a test program as shown in FIG. 4 in the order of each test number.

This test program is the C code of the LSI tester itself.
At PU 30, by a publicly known test program execution program (of course, it does not have to be a publicly known program)
, executed.

Although the invention has been explained using a very specific example in order to explain the invention in an easy-to-understand manner, it is clear that the invention is not limited to the module functions and numerical values described in the specification.

Moreover, although the CPU 30 of the LSI tester main body and the CPU IO of the subsystem have been described as separate hardware, the present invention can be realized even if one CPU is used in common. However, when one CPU is used, during the creation of a test program, an ignition interruption occurs in the DOT test execution work. This is because the CPU cannot simultaneously create a test program and execute the test program.

Also, in the above example, a floppy disk was used to exchange data between the LSI tester main body and the subsystem, but
For example, the LSI tester main body side and the subsystem side may each be provided with a LAN interface, and data may be exchanged via the LAN.

In this way, the data transfer rate can be increased and the present invention can be implemented on a large scale.

[Effects of the present invention]

As described above, according to the present invention, the following effects can be obtained.

■ Test programs that were previously created manually can now be created automatically based on test standard data. Therefore, by inputting appropriate data as test standard data, a test program can be created quickly and without errors.

- Even if there is an error in the test standard data, if this (test standard data) is corrected, the test program can be immediately corrected.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of the main part configuration of an LSI test system according to the present invention, FIG. 2 is a diagram showing an example of the overall configuration of an LSI test system using the present invention, and FIG.
FIG. 4 is a diagram showing an example of a death program created by the LSI test system according to the present invention. FIG.
FIG. 6 is a diagram showing an example of a test standard cloth created by the test system, and FIG. 6 is a diagram showing the module and the DOT surroundings. 1...Memory, 5...Module selection means, 6...
・Writing means for module switching command text, 7...Writing means for module output signal form/measurement form command text, 9
・・・Dυ■Method for writing the pass/fail judgment command statement. Figure 6

Claims (1)

[Claims] Electrical conditions (hereinafter referred to as PIN conditions) given to each pin of an LSI to be inspected (hereinafter referred to as DUT) and conditions for measuring signals of specified pins (hereinafter referred to as measurement conditions) and,
A memory that stores standard values that define the allowable range of this measurement value for each test item, and a module that reads the PIN conditions or measurement conditions for each pin from the memory and connects to the pin (applies signals or A means for selecting a module with the function of measuring signals) and a means for storing it, and a module for the previous test item for each pin (hereinafter referred to as the previous module) and a module for the current test item (hereinafter referred to as the current module). ) is different, means to write a command statement that turns off the signal applied from the previous module to the DUT and turns on the module this time into the job source file, and reads the PIN conditions or measurement conditions from the memory and changes the output signal form or The command statement expressing the measurement form is J.
A means for writing into the ob source file and a command statement for reading the standard values from the memory and determining the quality of the DUT.
An LSI test system comprising: means for writing to an ob source file;