JPH0129802Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Technical field of the invention The present invention relates to a semiconductor device suitable for high-density packaging.

(b) Background of the technology In order to package semiconductor devices with high density and miniaturize electronic equipment, electronic components such as multiple semiconductor integrated circuit chips and capacitors are mounted on a ceramic substrate with multilayer wiring. Modularization is underway.

(c) Prior Art and Problems Such a modular semiconductor device conventionally has a structure as shown in the plan view and side view of FIGS. 1a and 1b.

In FIGS. 1a and 1b, 1 is a multilayer ceramic substrate, 2 is a lead pin led out in one direction, and 3 is a multilayer ceramic substrate.
is a leadless chip carrier (hereinafter referred to as LCC), and 4 is a chip capacitor.

Note that the chip capacitor is a bypass capacitor to prevent malfunction due to power supply noise.

In FIGS. 1a and 1b, a multilayer ceramic substrate 1 has conductive circuits printed on a plurality of green sheets and has a plurality of lead pins 2 led out in one direction. On the upper surface of the multilayer ceramic substrate 1, there are a plurality of solder pads for mounting (Fig. As shown in the figure, LCCs 3 and chip capacitors 4 having a plurality of connection pads on their outer surfaces are alternately connected in series by soldering or the like.

In such a structure, a space is required to mount the LCC 3 and the chip capacitor 4 in series on the same plane, making it difficult to mount them at a higher density.

As an improvement, a predetermined recess 13 is provided in advance on the upper surface of the multilayer ceramic substrate 11 directly below the LCC 12, as shown in the sectional view of the main part of FIG.
A structure in which 4 is mounted is conceivable.

However, in such a structure, the dimensions of the recess 13 to be formed are defined by the dimensions of the LCC 12,
Therefore, the chip capacitor 14 to be mounted within the recess 13 is also defined. Therefore, there were problems such as not being able to use a desired chip capacitor due to device characteristics.

(d) Purpose of the invention The purpose of the invention is to solve the above problems and provide a semiconductor device which is suitable for high-density packaging and whose characteristics can be improved.

(e) Structure of the invention In order to achieve the object, the invention comprises a multilayer ceramic substrate on which a plurality of pads for attaching leadless chip carriers are formed on the surface thereof, and a wiring layer inside, and a semiconductor element. a plurality of leadless chip carriers having connection pads on their outer surfaces, each of the leadless chip carriers being soldered to the multilayer ceramic substrate, and a plurality of lead pins extending from one end of the multilayer ceramic substrate; It is characterized in that a chip capacitor is mounted in a recess formed at the other end.

(f) Embodiments of the invention Examples of the invention will be described below with reference to the drawings.

Figure 3 is a side view showing one embodiment of the present invention;
The figure is also a perspective view of the main parts, and the same reference numerals are given to the same parts as in the previous figure.

In FIGS. 3 and 4, 21 is a multilayer ceramic board having a wiring layer inside, 21' is an LCC mounting pad provided on the multilayer ceramic board, and 22 is a recess provided on the side surface of the multilayer ceramic board. , 23 is an LCC having a plurality of connection pads on its outer surface, 24 is a chip capacitor, 24' is an electrode of the chip capacitor, and 25 is a lead pin led out in one direction.

As is clear from the figure, the present invention is different from the conventional one in that a desired recess 22 is provided on the side surface opposite to the side surface having the lead pins 25 led out in one direction of the multilayer ceramic substrate 21, and a chip capacitor 24 is provided in the recess 22. It is in the point where it is stored.

The recess 22 is created by forming a desired recess in which the chip capacitor 24 can be accommodated in a predetermined green sheet during the production of the multilayer ceramic substrate, and laminating and sintering it. A soldering pad that is connected by soldering or the like is provided, and the electrode 24' of the connected capacitor is connected to the lead pin 25 by a plurality of internal wirings in the multilayer ceramic board.
It is connected to the.

According to this structure, only the LCC 23 is connected to the LCC mounting pad 21' on the top surface of the multilayer ceramic substrate 21 by soldering or the like, and the chip capacitor 2
4 is no longer required, and the shape of the recess 22 on the side surface can be made into a desired shape at the time of making the multilayer ceramic substrate 21 regardless of the LCC 23. Therefore, it is possible to use a desired chip capacitor 24, and the device It is possible to improve the characteristics of

(g) Effects of the invention As explained above, according to the invention, a semiconductor device that can effectively utilize the limited mounting space and has improved characteristics is provided. It goes without saying that other electronic components such as resistors may be housed in addition to the capacitors in the above embodiments.

[Brief explanation of the drawing]

1 and 2 are views showing the structure of a conventional semiconductor device, FIG. 3 is a side view showing an embodiment of the present invention, and FIG. 4 is a perspective view of the main parts thereof. In the figure, 21 is a multilayer ceramic substrate, 22
2 shows a recess provided on the side surface of the multilayer ceramic substrate, 23 a leadless chip carrier, 24 a chip capacitor, and 25 a lead pin.

Claims (1)

[Scope of utility model registration request] A multilayer ceramic substrate having a plurality of leadless chip carrier mounting pads formed on its surface and a wiring layer inside, and a plurality of leadless chip carriers accommodating semiconductor elements and having connection pads on its outer surface. , each of the leadless chip carriers is soldered onto the multilayer ceramic substrate, a plurality of lead pins are led out from one end of the multilayer ceramic substrate, and a chip capacitor is placed in a recess formed at the other end. A semiconductor device characterized by being equipped with.