JPH01289322A - Code error corrector - Google Patents

Abstract

PURPOSE:To decrease number of stored error patterns, to make the memory capacity small and to reduce the processing time by providing a means using a generation polynomial as to a syndrome obtained through the calculation of a reception code as a modulus, multiplying the result by (x) and obtaining a code series and storing only one of error patterns made equal to each other while being shifted sequentially. CONSTITUTION:A syndrome calculation circuit 2 uses a generation polynomial G(X) to calculate a syndrome S(X) from a received code R(X) and multiplies the obtained syndrome S(X) by a factor of (x) by taking the generation polynomial G(X) as a modulus. A specific error pattern is stored by a conversion table 6 and a shift circuit 8 and an error pattern corresponding to a syndrome or a series being a multiple of (x) of it is detected. A means replacing the detected error pattern cyclicly and a means 9 executing error correction are provided. As to each error pattern made equal while being shifted sequentially in this way, only one of them is stored. Thus, the capacity of conversion table is decreased considerably and the processing time is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Use) This invention relates to an improvement in a code error correction device that corrects code errors when receiving a coded signal.

(Conventional technology) Traditionally, various communication transmission systems and AV equipment.

Alternatively, in devices that transmit digital data or store the transmitted information, such as computer auxiliary storage devices, code error correction devices are used to obtain or restore the reliability of the received coded information. .

In general, code error correction devices have a structure that corrects code errors because a code word is generated by giving redundancy to information in advance on the transmitting side or writing side, and the code word is decoded into correct information on the receiving side. Adopted. Therefore, the configuration of the code error correction device can be roughly divided into: (1) a syndrome calculation unit that calculates the syndrome S (X) from the received code R (X) using the generator polynomial 〇 (X); (2) a syndrome calculation unit that calculates the syndrome S (X) from the received code R (X) using and a derivation unit that derives an error pattern based on the received error pattern.
It consists of a correction execution unit that corrects the error pattern obtained by the derivation unit.

Among the above configurations, the configuration of the deriving unit is the most complex and requires the most data processing, so there is a need to simplify the configuration and shorten the processing time.

Generally, the method of deriving an error pattern from the syndrome S (X) is to use the calculated syndrome S (X)
There is a method using a conversion table that stores error patterns corresponding to the error patterns. In this method, all correctable error patterns are stored in a ROM or the like in advance, and a corresponding error pattern is searched and extracted from the obtained syndrome S (X).

Now, when the code length is n, the number of error-correctable symbols is t, and the element of the Galois field G F (2'') is a symbol, the number of error patterns to be stored in the conversion table is expressed by the following equation.

Σnci・(2”-1)' ■■san1 (However, t represents the number of bits that can be corrected, and 1m is a positive integer.) Now, as an example, the received word R(X) is expressed as a binary (15 ,7)B
CH (Boss Chaudori lockken)
gan) code.

The generator polynomial G(X) of this code is given by the following equation.

G(X)=X'+X'+X2+X'+ 1 ■Therefore, in the case of the above received code, the number of error-correctable bits t=2
However, according to the above formula 0, the total number of error patterns stored in the conversion table is as large as 120 as shown in FIG.

For this reason, the memory capacity required for the conversion table becomes extremely large, and when the code length of the information becomes longer or the error correction capability is expanded, the memory capacity increases further in terms of a combinatorial function.

(Problems to be Solved by the Invention) Conventional code error correction devices had to store all correctable error patterns in a conversion table, which increased memory capacity and significantly increased the time required for correction processing. There were problems such as

Therefore, an object of the code error correction device according to the present invention is to reduce the number of error patterns to be stored, thereby reducing the memory capacity and processing time.

[Structure of the invention]

(Means for Solving the Problem) The first feature of the code error correction device according to the present invention is a means for calculating a syndrome S (X) from a received code R (X) using a generating polynomial G (X), and a means for calculating a syndrome S (X) from a received code R (X) using a generating polynomial G (X). means for multiplying the syndrome S (X) obtained by
It is characterized by comprising means for detecting an error pattern corresponding to the syndrome or a sequence obtained by multiplying the syndrome by X, means for cyclically converting the error pattern detected by the means, and means for performing error correction. do.

A second code error correction device of the present invention is characterized in that the error pattern detecting means detects an error pattern corresponding to a syndrome or a sequence obtained by multiplying the syndrome by X, except for one symbol. .

(Function) The device of the present invention calculates the syndrome S (X) obtained by calculating from the received code R (X) using the generating polynomial 〇
By having means for obtaining a code sequence by multiplying (X) by X modulo, the code sequence becomes equal to the syndrome S (X) calculated from the sequence obtained by shifting the original received code, For each error pattern that becomes equal after being sequentially shifted (circulated), it is possible to correct it by storing only one of them.

Therefore, the number of error patterns stored in the conversion table becomes extremely small. For example, if the received code length is a code of n, the number is reduced to l/n compared to the conventional method.

(Example) Hereinafter, an example of the code error correction device according to the present invention will be described with reference to the drawings.

[Example 1] FIG. 1 is a block diagram showing an embodiment of the apparatus of this invention.

In FIG. 1, the quantized reception code R(X) (=r'141 rx3+ ''·ro), which is the reception signal, is as follows.

Each syndrome calculation circuit sequentially starts from the sign input terminal ω.■
and the delay circuit ■. Syndrome calculation circuit ■
is the received code R(
This circuit calculates the syndrome S (X) from X), and is composed of a feedback shift register circuit as shown in FIG.

Alternatively, the generating polynomials of the received code R(X) and the syndrome S(X) are expressed as follows.

R(X)= r,, x”+ r, x”+・=−+
re ■5(X)=s, x'+s, x'+--+s
m @) Also, 5(X) is R(X) as a
It is the remainder polynomial divided by (X).

S (X)ER(X) sod G (X)
It is expressed as ■. Here 4 '8ffw 8@e...
・t go is called a syndrome.

(In general, G(X)(7) root(x 1(Co t
The value obtained by substituting 1 @...p 2t-1) into R(X) is sometimes called a syndrome, but stt sap・
..., s, are equivalent. ) The feedback shift register circuit shown in FIG.
A sign input terminal (20) with a countersunk (21 to 24) interposed therebetween.
The syndrome S (X) is maintained by sequentially supplying the received code R(X) from the shift register to the shift register.

The outputs of the syndrome calculation circuit (2), that is, the outputs of each of the shift registers (SO to S7), are supplied in parallel to the all-zero test circuit. This means that if the syndromes are all zeros (all zeros), no error correction is performed, and only if they are not all zeros (non-zero), they are supplied in parallel to the primary comparison circuit ■, and the following error corrections are performed. is configured to take place.

On the other hand, in this code error correction device, a conversion table (2) is provided in advance so that an error pattern can be detected from the syndrome S (X), as in the conventional case.

Now, assuming that the condition of the received code R(X) is a binary (15,7) BCH code as in the conventional example described above, the conversion table (■) composed of ROM is 01 as shown in FIG.
It is stored as a combination of several error patterns consisting of 15 digits from 4 to e1 and the corresponding syndromes consisting of 8 digits from 97 to s.

Therefore, the syndromes and the corresponding error patterns are sequentially read out from the conversion table ■ to the reading circuit ■,
The read syndrome is supplied to the comparison circuit (3) and compared with the signal from the all-zero test circuit (2), and for matched syndromes, the corresponding error pattern is supplied to the error pattern shift circuit (3).

If there is no match in the comparison circuit (2), then in the syndrome calculation circuit (2).

The syndrome S (X) is multiplied by 1 modulo the generator polynomial G (X). The process of multiplying this syndrome S (X) by 1 is to input O to the input terminal (20
) and out of each shift register. For this new syndrome multiplied by 1, the conversion table 0 is searched again as described above, and the process of multiplying by 1 is repeated until a matching syndrome is obtained.

h=1.2. Suppose that no matching syndrome is obtained in the table for ... times.

S (X)E x −S (X) sod
The table will be searched using the coefficient of G (X) 9 as a syndrome.

by the way.

S(X)=x−R(X) sod
Since G(X) ■ holds true, a(
The coefficient of S (X), which is obtained by multiplying S (X) by xh modulo X), is equal to the syndrome of a sequence obtained by shifting the received code six times.

If an error pattern with S (X) as a syndrome polynomial is derived from the conversion table (to).

Since the error pattern with S (X) as a syndrome is obtained by shifting this in the opposite direction h times, the error pattern of the received code can be obtained from this.

That is, if a matching syndrome is obtained after multiplying by 1 h times, shift circuit 0 shifts the error pattern corresponding to that syndrome in the opposite direction h times to obtain the true error pattern. It will be done.

As an example, on the transmitting side, the code string (1oootot) is converted to (10
00101: 11000000) and is transmitted as (100110111000010) on the receiving side. As a result of calculation, this syndrome becomes (10111010) and does not exist in conversion table 0.

Therefore, when O is sequentially supplied to the input terminal (20) of the shift register in the syndrome calculation circuit ■ and shifted by inputting it exactly four times, that is, when S (X) is multiplied by x4, the syndrome becomes ( 00100001).

The corresponding error pattern in translation table 0 (oooo.

0000100001). Therefore, it was shifted in the opposite direction four times (0001000000
0010) is the true error pattern, and by supplying this to the error correction execution circuit ■, the received code R(X)
error is corrected and the original transmitted codeword (1000101
, 1100oooo) and transmission information (10001001
) can be obtained.

The error correction execution circuit (■) is the time F from the delay circuit (■).
11v! In response to the introduction of the received signal, error correction is performed by calculating exclusive OR for each bit.

In this way, according to the device of this invention, two elements (15°7)
The total number of error patterns stored in the BCH code conversion table 0 is 8 as shown in Figure 3, and the table size of the conversion table is reduced to 1/15 compared to the conventional one shown in Figure 8. Ru. Furthermore, since the number of error-correctable bits t=2, all errors can be corrected and recovered if there are two or less errors.

[Embodiment 2] A second embodiment of the code error correction device according to the present invention will be described below.

That is, this inventive device has two elements (
It is not applicable only to binary (binary) codes, but also to multi-dimensional (multi-value) codes, such as Reed-Solomon (Ree
It can also be applied to d-5olomon) codes.

Let the element of Galois field GF (2”) be the symbol (7°3)
Conventionally, there are 1078 correctable patterns in a 2-symbol correction Reed-Solomon code, as shown in FIG. 9, but with this invention, the number of error patterns to be stored in the conversion table ■ is reduced to only 154. can.

That is, the number of error patterns to be stored in the Galois field GF (2''), where n is the code length and the number of information points, is expressed by the following equation.

That is, the number is the number excluding the pattern which becomes equal to 1 by shifting out of the conventional number of correctable error patterns shown by the above formula.

As is clear from equation (2), the value is 1/n compared to the value obtained from the conventional equation 0, indicating that the capacity of the conversion table is extremely small.

Note that a simpler way to select an error pattern is to select an error pattern in which the symbol at a certain specific position always has a non-zero value.The number of syndromes to be stored in conversion table 0 in this case is calculated using the following formula. shown.

, -1CL-t・(2"-1)' ■
i-ruled 1 [Example 3] Next, taking as an example the case where the number of error-correctable bits t=2,
As six examples for explaining the third embodiment of the invention shown in claim 2, the received code R(X) is binary (15°7) B C
Consider the H code.

The generating polynomial 〇 (X) of this code is expressed by the above equation 0. As shown in Fig. 4, it is sufficient to provide a conversion table 0 with 5c1=15 combinations.As a result, the size of the table is reduced to 1/8 compared to the conventional one shown in Fig. 8. be able to.

Now, in the embodiment of the device of the present invention shown in FIG. 5, the same components as those shown in FIG. 10) through the error pattern shift circuit 0
The comparator circuit (10) is supplied with the output of the comparator circuit (2).

Therefore, in the correction circuit (10), the 1
The true error pattern is determined from the bit position information with different bits and the error pattern from the readout circuit.
Below, in the shift circuit (c) and error correction execution circuit 0,
Corrective recovery is performed.

Now, on the transmitting side, the information (1000101) is systematically encoded into a code word (1000101: 11000000).
Suppose that you send

Therefore, in the communication path, if (a) a 1-bit error occurs, (b) a 2-bit error occurs.

In addition, when at least one symbol occurs on a test point, and (c) when a two-bit error occurs and both occur on an information point, these cases will be explained separately.

In the case of (a).

Assume that the received code is (100110111000000).

R(X) (= x14+ x11+ x”+ x”+
When we calculate the remainder S (X) by dividing x'+ x') by a (X), we get 5(X)=x'+x'+x'+x3, and the syndrome at that time is (10111000)
is obtained.

Now, according to the conversion table 0 in Fig. 5, the error pattern corresponding to this syndrome is (000100000oo
oooo), and the received code (100010
1110ooooo) and information (1000101) are obtained.

In the case of (b).

Assume that the received code is (100000111000100).

At this time, from 5(X)=x'+x'+x', the syndrome becomes (01011000). A code sequence (01011100) that differs by only one symbol exists in conversion table 0, and its error pattern is (0000100000
0000)■ From this, the received code error (000010
0Φ 0000100).

■ In the case of (c), assume that the received code is (100111111000000).

At this time, from 5(X)=x'+x'+x''+x, the syndrome becomes (10010110), but there is no code sequence in conversion table 0 that matches this in 7 bits or more.

Therefore, from equation (11) described below.

S (1'(X)= x S (X) sod G (
X) Search conversion table 0 in the same way. Therefore, if no matching code sequence of 7 bits or more is found, then S (h'(X)Ex x-5(h-1)(X) txo
d G (X), h = 2.3°... In this case, at h = 4, the syndrome is (110011
11), it can be seen that there is a code sequence (11001110) in conversion table 0 that differs by only one bit.

That is, this error pattern is (010000000000
00G)■, the error pattern (010■ 000000000001) before shifting h=4 times is obtained, and this is converted to h=4.
By shifting the bits in the opposite direction, the received code can be modified.

Also, if there is no sequence that is equal to the calculated syndrome or differs by only one bit.

If the input is O and the syndrome calculation circuit (2) in which the syndrome (St to Sa) is latched is shifted by one bit, the syndrome corresponding to 5(X) is obtained.

Therefore, this process is repeated until a syndrome code sequence in which 7 or more bits are equal is obtained in the conversion table (2).

If the error pattern is obtained after six shifts, the error pattern at that time is corrected by the correction circuit (lO), and then the shift circuit (c)
is shifted in the opposite direction h times to obtain an error pattern.

When comparing the syndromes, the correction circuit calculates the error pattern 81490 read from the conversion table (0
139 ``'l!!(Invert ad from 1 to 0 and from 0 to 1 for 1.

In addition, in the error pattern shift circuit (c), 1, for example, e1
It is configured with an EX-OR circuit or a shift register circuit so that when 49 et3t ``'ell'' and h=1 are given, eat eL49 exit ''·el is output.

[Embodiment 4] Furthermore, in the third embodiment, the apparatus according to the invention of claim 2 is capable of processing not only binary codes but also Reed-Solomon codes as in the second embodiment. It can also be used for multidimensional codes.

Now, consider a (7,3) 2-symbol error-correcting Reed-Solomon code on a Galois field GF(23) as an example.

The generator polynomial is G(X)=n (x-a)=x'+a3x3+x"
+ax+a''(10)] first. However, α is m(X)=x'+
It is the primitive light of 0F(2') where 'x+1 is the minimum polynomial.

The configuration of the error correction device for this code is shown in FIG. 5, similar to the fourth embodiment. However, the syndrome calculation circuit (2) is constructed as shown in FIG.

At this time, the number of syndromes and error patterns stored in the conversion table 1 is as shown in Figure 9 in the conventional device, and the number is tct・(23-1)'=10786 However, this In the example, the number is as shown in FIG. 7, and the number is C.
1(23-1)1=49, which is extremely small.

[Embodiment 5] Next, still another fifth embodiment of the invention device according to claim 2 will be described.

Now, as an error correction code, the code length n, the number t of error-correctable symbols, the number of information points, and the code (
m = 1, 2, ...). At this time, it was necessary to store the number of syndromes shown in the ω formula in the conventional conversion table, but according to the inventive device, (t
It is only necessary to store syndromes of patterns in which -1) or less errors have occurred.

The number of syndromes is obtained by the following formula.

Σ　nCt　・(2”-1)Lol) ill.

Furthermore, if it is desired to further reduce the number of syndromes to be stored, it is sufficient to store only syndromes that satisfy the following conditions.

(a) In the case of t+1od3=o, only the syndromes corresponding to patterns in which i errors have occurred such that 2≦i≦(1-1) and imod3=2 and iha-turns in which no errors have occurred are stored.

The number of syndromes is obtained by the following formula.

Σ nCt '(2"()'-(12) Only the syndromes corresponding to the given pattern are stored.The number of syndromes is obtained by the following equation.

Σ ,,CL・(2”-1)” (13)
0 to 3 1π-odyπ6 (c) When tmod3=2, i such that 0≦i≦(t-tL and imod3=1
Only the syndromes corresponding to the patterns in which errors occurred are stored. The number of syndromes is obtained by the following formula.

Σ. OL・(2′″−1)′ (14)
1πI L eaod3π1 As described above, the number of syndromes stored in the conversion table 0 can be reduced. When t is large, the table can be made the smallest by selecting syndromes to be stored using the above method.

It is proved as follows that decoding can be performed correctly in the same manner as before using a conversion table that stores only syndromes for some error patterns.

First, from the received signal rn-11rn-zl...r, to syndrome 8 n- -x + 8 n-k -i
*...Sa is determined as follows.

G(X)=gn-kx"-'+gn-to-1x'""'
−”+”−+g6 (15) R(X)=rn-1x
'-1+rn, x1'+r, (16)
S (X) "S n-1-1'X'-" + 5n
−k −2X, “k 1+, , + s, < is the force, then the above equation 0 holds true.

Next, an error pattern is determined from the syndrome using conversion table (2).

(2) If a syndrome corresponding to the occurring error pattern exists in the conversion table, the error pattern can be identified with one access.

■There is no syndrome corresponding to the error pattern occurring in the exchange table, and at least one error exists in r n-1-1* r n--* e ”'
* If f' @ is somewhere, the corresponding syndrome is not stored in the table, but
There is always a syndrome in the table that is equal to the syndrome calculated from the received signal except for one symbol. Position and size of different symbols.

The true error pattern can be determined from the error pattern corresponding to this syndrome.

■There is no syndrome corresponding to the occurring error pattern in conversion table 0, and all errors are r n-
If it is in t er n-t o...el'n-*.

Are they all equal to the syndrome calculated from the received signal?
Or, there are no syndromes in the table that are equal except for one symbol, but.

By shifting the received signal several times, it becomes equal to the case (2), so there is a syndrome in the table that is equal to the syndrome calculated from the shifted received signal except for one symbol. The true error pattern is obtained from the patterns corresponding to the positions and sizes of different symbols, the number of shifts, and syndromes.

Here, the syndrome polynomial S'' when shifted h times
'(X) is the syndrome polynomial calculated from the original received signal S (X) to 5(h'(X)=X'R(X)=S(h-1)(X)7
G(X) (1g)S(0'(X)=S(X)w
h=l@2. −, n 1. That is, S(
h'(X) is 5(h-t), modulo G(X)
(x) is multiplied by
k) When using a feedback shift register of stages, when generating a new syndrome, the feedback shift register in which the current syndrome is latched is
It can be a new syndrome with 0 entered in the shift register.

〔Effect of the invention〕

As explained above, the device of the present invention stores only one of the error patterns that are sequentially shifted and become equal, so the capacity of the conversion table is significantly reduced, which is highly effective in practice.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the code error correction device according to the present invention, FIG. 2 is a block diagram showing the syndrome calculation circuit shown in FIG. 1, and FIGS. 3 and 4 are shown in FIG. 1. A pattern configuration diagram showing patterns stored in a conversion table of the device; FIG. 5 is a configuration diagram showing an embodiment of the inventive device according to claim 2; FIG. 6 is a configuration diagram showing the syndrome calculation circuit in FIG. 5; FIG. 7 is a block diagram showing the patterns stored in the conversion table of the device shown in FIG. 5, and FIGS. 8 and 9 are block diagrams showing the storage patterns of the conversion table in the conventional code error correction device, respectively. . ■ Syndrome calculation circuit (a) Total zero check circuit 0 Comparison circuit ■ Conversion table ■ Readout circuit (to) Shift circuit (9) Error correction execution circuit Agent Patent attorney Norio Ogo Figure 1 Figure 3 Figure WJ6 Figure 7 Figure 8 (ZJ>z"yn, tcIL/FJ rashwsi'
Figure 9

Claims (2)

[Claims] (1) Means for calculating syndrome S(X) from received code R(X) using generator polynomial G(X), and syndrome S(X) obtained by this means using generator polynomial G
means for multiplying by x with (X) modulo, means for storing a specific error pattern and detecting an error pattern corresponding to the above syndrome or a sequence obtained by multiplying it by x, and cycling through the error patterns detected by this means. A code error correction device comprising means for replacing and means for performing error correction. (2) The code error correction according to claim 1, wherein the error pattern detecting means detects an error pattern corresponding to a syndrome or a syndrome that is equal to a sequence obtained by multiplying the syndrome by x except for one symbol. Device.