JPH01279612A - High frequency amplification circuit - Google Patents

High frequency amplification circuit

Info

Publication number
JPH01279612A
JPH01279612A JP10899488A JP10899488A JPH01279612A JP H01279612 A JPH01279612 A JP H01279612A JP 10899488 A JP10899488 A JP 10899488A JP 10899488 A JP10899488 A JP 10899488A JP H01279612 A JPH01279612 A JP H01279612A
Authority
JP
Japan
Prior art keywords
capacitor
output
high frequency
line
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10899488A
Other languages
Japanese (ja)
Other versions
JP2738701B2 (en
Inventor
Kenji Sekine
健治 関根
Kunihiro Hamada
濱田 国広
Mineo Katsueda
勝枝 嶺雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63108994A priority Critical patent/JP2738701B2/en
Publication of JPH01279612A publication Critical patent/JPH01279612A/en
Application granted granted Critical
Publication of JP2738701B2 publication Critical patent/JP2738701B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Amplifiers (AREA)
  • Microwave Amplifiers (AREA)

Abstract

PURPOSE:To miniaturize a whole device and to attain high performance by providing the serial circuit of an inductance and a capacitance in the output terminal of an element in parallel with an output fetching line and setting the value to that which makes serial resonance by means of a frequency twice as much as an action frequency. CONSTITUTION:The inductance L2 and the capacitance C2 are connected in serial. When the values of L2 and C2 satisfy L2.C2=(1/2pif2)<2> (f2 is the frequency which is twice as much as the action frequency), serial oscillation occurs and it becomes short with respect to a second higher harmonic. In the action frequency on the other hand, it comes to a certain impedance, and it comes to that the impedance and the impedance of FET are connected in parallel. With adequately setting the value of L1, L1' and C1 with respect to the total impedance, matching is taken with respect to the action frequency and connection is attained to an output strip line. As a result, a circuit which comes short with respect to the second higher harmonic components in the transistor output terminal that is effective for improving the efficiency of the amplifier can be realized in a considerably small area.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、昼周波増幅回路、更に詳しく言えば高周波領
域における半導体素子を用いた増幅器に係り、特に高効
率化に好適な回路構成に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a daytime frequency amplifier circuit, more specifically to an amplifier using semiconductor elements in a high frequency region, and particularly to a circuit configuration suitable for increasing efficiency.

〔従来の技術〕[Conventional technology]

従来、高周波増幅器の高効率化手段として出力側に、高
調波インピーダンスを考慮した回路を設けることが知ら
れている。たとえば、マイクロ波研究会資料(MW83
−24)において出力側インピーダンスを偶数次高調波
に対して零、奇数次高調波に対して無限大にすれば理論
的には100%近い効率が得られると述べている。また
具体的回路構成として分布定数線路を使った例が記載さ
れている。
Conventionally, it has been known to provide a circuit that takes into account harmonic impedance on the output side as a means for increasing the efficiency of a high frequency amplifier. For example, Microwave Research Group materials (MW83
-24) states that if the output side impedance is made zero for even harmonics and infinite for odd harmonics, an efficiency close to 100% can be theoretically obtained. Furthermore, an example using a distributed constant line is described as a specific circuit configuration.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記従来技術は、上記出力側インピーダンスを分布定数
線路である、ストリップ線路や同軸線路を用いて構成し
ているため、周波数が比較的低い場合大形となる(たと
えばI G Hzで一波長7.5cm)こと、素子の出
力端までのボンディング線路などにより素子の出力端で
零にならないこと、素子の出力端で零にしようとする素
子から比較的離れた位置に回路を構成する必要が有り、
その間の損失により効率が下る。
In the above conventional technology, the output side impedance is constructed using a distributed constant line, such as a strip line or a coaxial line, and therefore becomes large when the frequency is relatively low (for example, at I GHz, one wavelength is 7.5 GHz). 5cm), it is necessary to make sure that the voltage does not become zero at the output end of the element due to bonding lines, etc. to the output end of the element, and it is necessary to configure the circuit at a position relatively far from the element to make it zero at the output end of the element.
Efficiency decreases due to losses during that time.

本発明の目的は、小形でかつ素子出力端で正確に2倍の
高調波に対するインピーダンスを零にし、高効率の高周
波増幅回路を実現することである。
An object of the present invention is to realize a high-frequency amplifier circuit that is compact and has high efficiency by accurately reducing the impedance to double harmonics to zero at the element output end.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的は、素子の出力端に出力取り出し用線路と並列
に集中定数によるインダクタンスとキャパシタンスの直
列回路を設け、前記直列回路の一端を接地するとともに
、インダクタンスとキャパシタンスの値が動作周波数の
2倍の周波数で直列共振を起こす値とすることにより達
成される。たとえば集中定数によるインダクタンスとし
て素子の出力端からのボンディング線路を使いキャパシ
タンスとしてチップコンデンサを利用し、動作周波数I
 G Hzの場合を考えると25μmφ長さ2ml11
で約2mHとなり、t=100.厚さ0.5mm。
The above purpose is to provide a series circuit of inductance and capacitance using lumped constants at the output end of the element in parallel with the output line, ground one end of the series circuit, and set the values of the inductance and capacitance to twice the operating frequency. This is achieved by setting the frequency to a value that causes series resonance. For example, a bonding line from the output end of the element can be used as the inductance due to a lumped constant, a chip capacitor can be used as the capacitance, and the operating frequency I
Considering the case of GHz, 25μmφ length 2ml11
It becomes about 2mH, and t=100. Thickness: 0.5mm.

/面積1 、5 mm2.で約3 p Fとなり、この
直列回路は2倍の周波数である2 G Hzで短絡とな
る。
/ area 1,5 mm2. It becomes about 3 pF, and this series circuit becomes a short circuit at 2 GHz, which is twice the frequency.

すなわち素子周波数ll1mという極めて小面積で上記
目的の回路が実現出来る。一方これを分布定数回路で構
成すると、2GHzの1/4波長スタブの長さは、通常
良く使用されるアルミナ基板で約15+nmと大きくな
るとともにボンディング線路の影響により素子出力端で
短絡の条件を満たすには複雑な回路が必要となる。
That is, the circuit for the above purpose can be realized in an extremely small area with an element frequency of 11 m. On the other hand, if this is configured with a distributed constant circuit, the length of the 2 GHz 1/4 wavelength stub will be approximately 15+ nm on a commonly used alumina substrate, and the condition for shorting at the element output end will be satisfied due to the effect of the bonding line. requires a complex circuit.

〔作用〕[Effect]

本発明の動作を第1図により説明する。1は電界効果ト
ランジスタ(FET)でありソース接地として動作して
いる。このFETの出方端となるドレイン端子とアース
との間にインダクタンスL2とキャパシタンスc2が直
列に接続されている。コ(7) L xとCx(D値が
L! ・cx= (1/2πfx)”、ここでf2は動
作周波数の2倍の周波数、を満たせば直列共振を起こし
、第2高調波に対して短絡となる。一方動作周波数では
、あるインピーダンスとなり、このインピーダンスとF
ETのインピーダンスとが並列に接続された形となる。
The operation of the present invention will be explained with reference to FIG. Reference numeral 1 denotes a field effect transistor (FET), which operates as a source grounded. An inductance L2 and a capacitance c2 are connected in series between the drain terminal, which is the output end of this FET, and the ground. (7) If L x and Cx (D value is L! ・cx = (1/2πfx)", where f2 is twice the operating frequency, series resonance occurs and On the other hand, at the operating frequency, there is a certain impedance, and this impedance and F
The impedance of ET is connected in parallel.

このトータルのインピーダンスに対して集中定数回路は
、必らずしも設ける必要はなく、基本波に対してはスト
リップ線路で整合を取っても良い。
It is not necessary to provide a lumped constant circuit for this total impedance, and a strip line may be used for matching the fundamental wave.

〔実施例〕〔Example〕

以下、実施例により詳述する。 Hereinafter, it will be explained in detail using examples.

第2図は本発明による高周波増幅器の一実施例であり、
トランジスタチップ1の出力用ボンディングパッド2に
金属線4,5がボンディングされ、誘電体チップ8の上
にパッドで形成されたキャパシタ6.7に接続される。
FIG. 2 shows an embodiment of the high frequency amplifier according to the present invention,
Metal lines 4 and 5 are bonded to output bonding pads 2 of transistor chip 1 and connected to capacitors 6 and 7 formed by pads on dielectric chip 8.

チップキャパシタ7がら出力用ストリップ線路10には
金属m9で接続される。なお図において3は入力用ボン
ディングパッド、12は入力側金属線、11は出方側の
ストリップ線路を形成する誘電体基板である。このよう
な構造において金属線4のインダクタンスとキャパシタ
6のキャパシタンスとが図のL2. C2に相当し、金
属線4の長さと本数及びキャパシタ6のパット面積を調
整し、動作周波数の2倍の周波数で直列共振を起こすよ
うに設定する。
The chip capacitor 7 is connected to the output strip line 10 by a metal m9. In the figure, 3 is an input bonding pad, 12 is an input side metal line, and 11 is a dielectric substrate forming a strip line on the output side. In such a structure, the inductance of the metal wire 4 and the capacitance of the capacitor 6 are L2. Corresponding to C2, the length and number of metal wires 4 and the pad area of capacitor 6 are adjusted so that series resonance occurs at a frequency twice the operating frequency.

第3図は本発明の他の実施例の構成図であり、トランジ
スタチップ1と出力用ストリップ線路10の間に誘電体
チップ8を設け、その上にキャパシタを形成するパッド
6.7を2列に並ぶように配した場合である。
FIG. 3 is a block diagram of another embodiment of the present invention, in which a dielectric chip 8 is provided between the transistor chip 1 and the output strip line 10, and two rows of pads 6 and 7 forming capacitors are provided on the dielectric chip 8. This is the case when they are arranged so that they are lined up.

上記第2図および第3図は1つの誘電体チップ」二に2
ケのキャパシタを形成するパッドを設けているが、必ず
しも1つの誘電体チップとする必要はなく2つの誘電体
チップを使用してもよい。
The above figures 2 and 3 show one dielectric chip "2 to 2".
Although pads forming two capacitors are provided, it is not necessary to use one dielectric chip, and two dielectric chips may be used.

第4図は他の実施例であり、第1図の動作周波数に対す
る整合回路L s + L t ’ r Csを使用し
ない場合を示す。すなわちトランジスタチップ1と出力
用ストリップ線路10の間に設けた誘電体チップ8の上
にキャパシタを形成するパッド6が1ケ設けられ金属線
4のインダクタンスと前記パッド6のキャパシタンスの
値を2倍の周波数に対して直列共振が起るように設定す
る。
FIG. 4 shows another embodiment, in which the matching circuit L s + L t 'r Cs for the operating frequency shown in FIG. 1 is not used. That is, one pad 6 forming a capacitor is provided on the dielectric chip 8 provided between the transistor chip 1 and the output strip line 10, and the inductance of the metal wire 4 and the capacitance of the pad 6 are doubled. Set so that series resonance occurs with respect to the frequency.

第5図は他の実施例であり、キャパシタンスC2を形成
するキャパシタを出力用ストリップ線路を構成する誘電
体基板上に設けた場合である。
FIG. 5 shows another embodiment in which a capacitor forming capacitance C2 is provided on a dielectric substrate forming an output strip line.

第6図は更に本発明の他の実施例の構成図であり、トラ
ンジスタと回路とを同一基板上に構成した、いわゆるM
MIC形の増幅回路においてトランジスタの出力端(F
ETではトレイン電極)にスパイラル状のインダクタン
スとキャパシタンスを出力用ストリップ線路10に並列
に接続した場合であり、スパイラル線路4Aと金属線4
Bのインダクタンスの和とキャパシタ6′のキャパシタ
ンスで直列共振を起すように設定する。なお13はゲー
ト側の入力線路、14はソース電極である。
FIG. 6 is a block diagram of another embodiment of the present invention, in which a transistor and a circuit are formed on the same substrate.
In the MIC type amplifier circuit, the output terminal of the transistor (F
In ET, this is a case where spiral inductance and capacitance are connected in parallel to the output strip line 10 (train electrode), and the spiral line 4A and metal wire 4 are connected in parallel to the output strip line 10.
The sum of the inductances of B and the capacitance of capacitor 6' is set to cause series resonance. Note that 13 is an input line on the gate side, and 14 is a source electrode.

図においては出力用ストップ線路の両側に同じ回路を設
けたが、片側だけでも有効である。
In the figure, the same circuit is provided on both sides of the output stop line, but it is also effective to use only one side.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、増幅器の効率向上に有効なトランジス
タ出力端で第2高調波成分に対して短絡となる回路が数
mm2という極めて小面積で実現できるとともに、この
ことにより上記回路がパッケージ内で構成可能となりト
ランジスタの高効率化に適したパッケージが実現でき、
ひいては、増幅器を用いて送受信装置の効率向上につな
がり、装置全体の小形、高性能化が図れる。
According to the present invention, a circuit that is short-circuited to the second harmonic component at the transistor output terminal, which is effective for improving the efficiency of an amplifier, can be realized in an extremely small area of several mm2, and as a result, the circuit can be installed within a package. It is possible to create a package that is suitable for increasing the efficiency of transistors.
In turn, the efficiency of the transmitting/receiving device can be improved by using the amplifier, and the overall device can be made smaller and have higher performance.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の等価回路を示す回、第2図〜第6図
は本発明による高周波増幅器の実施例の上面図である。 ]・・・1〜ランジスタチツプ、2・・・出力用ボンデ
ィングパッド、3・・・入力用ボンディングパッド、4
゜5・・・金属線、6,7・・・キャパシタ、8・・・
誘電体チップ、9・・・金属線、10・・・出力用スト
リップ線路、]1・・誘電体基板、12・・・入力端金
属線、13・・・入力用線路、14・・・ソース電極。
FIG. 1 shows an equivalent circuit of the present invention, and FIGS. 2 to 6 are top views of embodiments of a high-frequency amplifier according to the present invention. ]... 1 ~ transistor chip, 2... bonding pad for output, 3... bonding pad for input, 4
゜5...Metal wire, 6,7...Capacitor, 8...
Dielectric chip, 9... Metal wire, 10... Output strip line, ] 1... Dielectric substrate, 12... Input end metal wire, 13... Input line, 14... Source electrode.

Claims (1)

【特許請求の範囲】 1、半導体素子を用いた高周波増幅回路において出力取
り出し用線路と並列にインダクタとキャパシタの直列回
路を上記半導体素子の出力端に設け、上記直列回路の一
端を接地するとともに、上記インダクタのインダクタン
スと上記キャパシタのキャパシタンスの値が動作周波数
の2倍の周波数で直列共振を起こす値に設定して構成し
たことを特徴とする高周波増幅回路。 2、請求項第1項記載において上記キャパシタとして誘
電体を用いたチップキャパシタとし、上記チップキャパ
シタと上記半導体素子のボンディングパッドとを接続す
る金属線を上記インダクタとしたことを特徴とする高周
波増幅回路。 3、請求項第2項記載において、上記チップキャパシタ
を上記半導体素子と出力用ストリップ線路との中間に設
け、上記半導体素子のボンディングパッドから上記キャ
パシタと出力用線路の両方に各々の線路が接触しないよ
うに接続したことを特徴とする高周波増幅回路。 4、請求項第2項記載において、上記チップキャパシタ
を出力用ストリップ線路を構成する誘電体基板と同一基
板上に設けたことを特徴とする高周波増幅回路。 5、請求項第2項記載において、上記チップキャパシタ
と同一誘電体上に第2のキャパシタを設け、上記半導体
素子のボンディングパッドと上記第2のキャパシタと出
力用線路を各々リード線により接続したことを特徴とす
る高周波増幅回路。 6、請求項第5項記載において2種類のキャパシタを有
する誘電体チップを上記半導体素子と出力用ストリップ
線路の間に設けたことを特徴とする高周波増幅回路。
[Claims] 1. In a high frequency amplifier circuit using a semiconductor element, a series circuit of an inductor and a capacitor is provided at the output end of the semiconductor element in parallel with an output line, and one end of the series circuit is grounded, A high frequency amplifier circuit characterized in that the inductance of the inductor and the capacitance of the capacitor are set to values that cause series resonance at a frequency twice the operating frequency. 2. The high frequency amplifier circuit according to claim 1, wherein the capacitor is a chip capacitor using a dielectric, and the inductor is a metal wire connecting the chip capacitor and a bonding pad of the semiconductor element. . 3. In claim 2, the chip capacitor is provided between the semiconductor element and the output strip line, and each line does not come into contact with both the capacitor and the output line from the bonding pad of the semiconductor element. A high frequency amplifier circuit characterized by being connected as follows. 4. The high frequency amplifier circuit according to claim 2, wherein the chip capacitor is provided on the same substrate as a dielectric substrate constituting the output strip line. 5. In claim 2, a second capacitor is provided on the same dielectric material as the chip capacitor, and the bonding pad of the semiconductor element, the second capacitor, and the output line are connected by lead wires. A high frequency amplification circuit featuring: 6. The high frequency amplifier circuit according to claim 5, wherein a dielectric chip having two types of capacitors is provided between the semiconductor element and the output strip line.
JP63108994A 1988-05-06 1988-05-06 High frequency amplifier circuit Expired - Fee Related JP2738701B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63108994A JP2738701B2 (en) 1988-05-06 1988-05-06 High frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63108994A JP2738701B2 (en) 1988-05-06 1988-05-06 High frequency amplifier circuit

Publications (2)

Publication Number Publication Date
JPH01279612A true JPH01279612A (en) 1989-11-09
JP2738701B2 JP2738701B2 (en) 1998-04-08

Family

ID=14498890

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63108994A Expired - Fee Related JP2738701B2 (en) 1988-05-06 1988-05-06 High frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JP2738701B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04249905A (en) * 1991-01-07 1992-09-04 Mitsubishi Electric Corp Semiconductor amplifier
EP2162914A2 (en) * 2007-06-22 2010-03-17 Cree, Inc. Rf power transistor packages with internal harmonic frequency reduction and methods of forming rf power transistor packages with internal harmonic frequency reduction
US8525594B2 (en) 2010-06-21 2013-09-03 Panasonic Corporation Radio frequency amplifier circuit
US8558622B2 (en) 2009-07-14 2013-10-15 Panasonic Corporation Radio frequency power amplifier
JP2016063360A (en) * 2014-09-17 2016-04-25 三菱電機株式会社 High frequency amplifier
US9490208B2 (en) 2012-11-09 2016-11-08 Panasonic Intellectual Property Management Co., Ltd. Semiconductor device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5572324U (en) * 1978-11-13 1980-05-19
JPS573636U (en) * 1980-06-05 1982-01-09
JPS59104244A (en) * 1982-12-06 1984-06-16 For Bureen:Kk Runner and well for detarding solidification for dental casting
JPS59120343A (en) * 1982-12-27 1984-07-11 Futaba Pureko Kk Forming pattern of casting mold for precision casting
JPS6187406A (en) * 1984-10-03 1986-05-02 Matsushita Electric Ind Co Ltd High frequency amplifier device
JPS62111A (en) * 1985-06-26 1987-01-06 Fujitsu Ltd Microwave power amplifier

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5572324U (en) * 1978-11-13 1980-05-19
JPS573636U (en) * 1980-06-05 1982-01-09
JPS59104244A (en) * 1982-12-06 1984-06-16 For Bureen:Kk Runner and well for detarding solidification for dental casting
JPS59120343A (en) * 1982-12-27 1984-07-11 Futaba Pureko Kk Forming pattern of casting mold for precision casting
JPS6187406A (en) * 1984-10-03 1986-05-02 Matsushita Electric Ind Co Ltd High frequency amplifier device
JPS62111A (en) * 1985-06-26 1987-01-06 Fujitsu Ltd Microwave power amplifier

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04249905A (en) * 1991-01-07 1992-09-04 Mitsubishi Electric Corp Semiconductor amplifier
EP2162914A2 (en) * 2007-06-22 2010-03-17 Cree, Inc. Rf power transistor packages with internal harmonic frequency reduction and methods of forming rf power transistor packages with internal harmonic frequency reduction
US8558622B2 (en) 2009-07-14 2013-10-15 Panasonic Corporation Radio frequency power amplifier
US8525594B2 (en) 2010-06-21 2013-09-03 Panasonic Corporation Radio frequency amplifier circuit
US9490208B2 (en) 2012-11-09 2016-11-08 Panasonic Intellectual Property Management Co., Ltd. Semiconductor device
JP2016063360A (en) * 2014-09-17 2016-04-25 三菱電機株式会社 High frequency amplifier

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