JPH01270466A - Picture memory device - Google Patents

Abstract

PURPOSE:To cope with display of many pictures with a small-capacity memory by performing band compression and decoding of respective signals corresponding to reduction pictures in a band compressing means and a decoding means independently of one another. CONSTITUTION:A signal corresponding to a small picture is preliminarily generated by a small picture generating circuit 15. The output of an A/D converter 13 is inputted to the small picture generating circuit 15 through a switch 14 switched to the side of a terminal (b). Horizontal scanning lines of the input signal are thinned in n:(n-1) and a CCD delay line or the like is used to compress the signal (the read speed of the CCD delay line is set to n-fold write speed). Thus, the signal corresponding to the small picture whose area is 1/n<2> of the normal picture is inputted to a band compressing circuit 16. The read video signal is decoded by a band compression decoding circuit 18 and is inputted to a D/A converter 20 through a switch 19 and is converted to an analog signal and this signal is outputted to a terminal 21.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to an image memory device used in a video recorder or the like.

(Prior art) Conventionally, field memory has been used to perform still playback, slow playback, and picture-in-picture playback, which embeds one screen within another.
Video recorder (hereinafter referred to as VTR) that records pictures, etc.
) has been developed. In this case, the storage capacity for one screen's worth of signals is as follows. i.e. 1 for example NT
If the SC signal is sampled at 4 fsccfSc (color subcarrier frequency) and quantized at 8 bits, the memory capacity required to store one field's worth of video signal is 4X3.58X106X8X-! -! :, 1.9X10
It becomes 6 (bits). Therefore, even 1 megabit memory requires 21 hard disks. Therefore, we perform band compression of the video signal.

Various proposals have been made to reduce memory capacity. This is an effective product cost reduction trap.

By the way, VTII'(.

Some devices have the ability to divide a normal screen into multiple small screens (for example, 4-split, 9-split, or 16-split) and display screens with different contents on each small screen, reduced in size and displayed in parallel. have appeared (see Figure 5).

In this case, data corresponding to a plurality of small screens (reduced screens) is stored in the field memory in a thinned out form compared to data when 9-split display is not performed. here,
If a band compression method such as differential quantization that approximates the next sample value from the previous sample value is introduced, the previous value will change if any of the plurality of small screens is rewritten, etc. However, there is a problem in that it becomes impossible to decode signals that have been band-compressed.

(Problems to be Solved by the Invention) As described above, in conventional image memory devices, there is a problem in that it is difficult to support two-screen split display when attempting to reduce storage capacity by band compression.

The present invention has been made in view of the above point K, and an object of the present invention is to provide an image memory device that can support split-screen display even with a small memory capacity.

[Structure of the invention]

(Means for Solving the Problem) The present invention includes means for band-compressing an input digital video signal, an image memory in which the output of the band-compressing means is written, and a signal read out from the image memory for decoding. In the image memory device, the input digital video signals for multiple sides are converted into signals corresponding to each reduced screen by screen split display during sequential playback, and the converted signals are supplied to the band compression means. and means for writing the band compression output corresponding to each reduced screen from the band compression unit into the address position of the image memory corresponding to the display position in the screen split display.

The image memory device is configured so that band compression and decoding operations in the band compression means and the decoding means are performed independently for each signal corresponding to each reduced screen.

(Function) With the above configuration, even if a plurality of divided small screens are written and rewritten independently, they can be decoded, and even when displaying one screen divided, it can be handled with a small memory capacity.

(Embodiment) Hereinafter, two embodiments of the image memory device according to the present invention will be described based on the drawings.

FIG. 1 is a block diagram showing one embodiment of the invention.

Here, (1) is a magnetic tape, (2) and (3) are rotating magnetic heads disposed on a rotating disk (4), and (
5) is a control signal recording/reproducing head. Also(
6) is a capstan motor that moves the capstan (7), (8) is a pinch roller, further (9) is an amplifier that amplifies the playback control signal from the head (5), and (10) is the capstan motor. (6) This is a capstan servo circuit that controls. Furthermore, (11) is the head (
2), a head selector switch that alternately takes out the outputs of (3), and (12) a reproduced video signal processing circuit.

(13) is an A/D converter, (14) is a switch, (
15) is a small screen creation circuit, (16) is a band compression circuit,
(17) is a memo IJ, and (18) is a band compression decoding circuit. Further, (19) is a switch, (20) is a D/A converter, (21) is a video signal output terminal, (22) is a memory control circuit, and (23) is a delay circuit. In addition, a band compression circuit (16), a band compression decoding circuit (18) K
The detailed configuration will be described later.

Next, the overall operation of the above device will be explained. Memo + J (1
7) for special playback such as still playback, first, the signals played from the tape (1) by the heads (2) and (3) are switched alternately by the switch (11) and sent to the playback video signal processing circuit. (12) is input.

This circuit (12) performs reproduction processing such as FM demodulation for the luminance signal and frequency inverse conversion for the color signal.

The reproduced video signal is then A/D converted by an A/D converter (13), and is input to band compression circuits M and (16) K via a parallel switch (14), where band compression is performed. After that, it is written into the memory (17).

This writing is performed by a write control signal from the memory control circuit (22), and address designation is also performed by a write-through address signal from the memory control circuit (22).

Memo! The video signal stored in J (17) is read out by the read control signal from the memory control circuit (22), and the read address is also set by this circuit (22) in the same way as when writing.
22). The read video signal is decoded by a band compression decoding circuit (18), inputted to a D/A converter (20) via a switch (19), converted into an analog signal, and outputted to a terminal (21). . In addition.

Switching of the switch (19) is performed by a write/read control signal from the memory control circuit (22).

When data is being written to the memory (17), it is connected to the terminal side (in this case, the reproduced video signal is output without going through the memory (17));
) is connected to the terminal a@ (at this time, the read output from the memory (17) is output as described above).

For example, during still playback, when a still playback button is pressed, a write control signal is output from the memory control circuit (22) at a predetermined timing, and one field worth of noise-free screen is written. after that.

By stopping the tape (1) and continuously reading out the written screen, a noise-free still playback screen can be obtained.

Also, when displaying a two-screen split screen, - the writing speed to the memo IJ (17) in the film is faster than normal (for four-screen display, the writing speed is twice the normal speed).

Then, the horizontal scanning lines are thinned out appropriately (for four-screen display, the scanning line is thinned out one by one) and the signal is written into the memory (17). This allows, for example, 4
This means that signals for the screen are written. As for reading, if normal reading is performed, a split screen display in which a plurality of small screens are displayed on one normal screen can be performed. However, since band compression is performed in this case, if the above operation is performed on the signal after band compression, the decoding operation will not be performed correctly.

Therefore, in this embodiment, a signal corresponding to the small screen is created in advance in the small screen creation circuit (15). That is, A
The output of the /D converter (13) is input to the small screen creation circuit (15) via a switch (14) switched to the terminal side. Here, the horizontal scanning lines of the input signal are thinned out at a ratio of n-1) to one horizontal scanning line.

Then, the signal is compressed using a CCD delay line, etc. 5 (C
The read speed of the CD delay line is n times the write speed). As a result, a signal corresponding to a small screen having an area of 1/n2 of a normal screen is inputted to the band compression circuit (16) K.

Next, the band compression circuit (16) and the band compression decoding circuit (18)
)'s detailed configuration and operation will be explained.

First, as a band compression method, a differential quantization method is effective. This is because it is desirable that the processing is not complicated due to high-speed operation, and also because the hardware configuration is simple. In this differential quantization, the difference between the decoded value xi of the i-th sample and the ++1st sample value xi+l (usually this value is small due to the correlation of video signals) is bit-compressed (this value is (indicated by operator [])
, the output Δxi-1-1,i is stored as the i+1th data.

Δx i -1,i=(x 1-1-1-x i )
(1) When decoding, the i-th decoded value i is Δ
xi+1. ! bit-extended (this is the operator []
-1) addition.

The i+1st decoded value xi-)-1 is obtained.

x 1-)-1=(Δx i+1.i)-1-)-
x i (2) In this case, the initial value must be a constant value (for example - the true value xo is stored during the blanking period at the beginning of the horizontal scan line.
a) is a diagram showing this storage timing. When performing multi-screen display as in this embodiment, initial value memories are stored in both the small screen and the small screen. FIGS. 2(b) and 2(c) show the storage timing for 4-split screen display and 9-split screen display, respectively.

Note that these timing pulses can be generated from information on the number of divisions and screen synchronization signals.

FIG. 3 is a diagram showing the detailed configuration of the band compression circuit (16), and shows the digital video signal input from the input terminal (31) (in this case, the output of the small screen creation circuit (15) in FIG. 1). is input to a subtraction circuit (32), from which a local decoded output from a register (33), which will be described later, is subtracted. The output of the subtraction circuit (32) is coarsely compressed (bits are compressed to a low level) in a bit compression circuit (34) within a range that does not significantly affect the screen.The output terminal (36) is then output via a switch (35). The output of the bit compression circuit (34) is also input to the bit expansion circuit (37). is returned to a numerical value of approximately equal magnitude,
This output is input to the X adder (38). Adder (38
), the above output and the output of the register (33) are added, and this output is sent to the register (33) via the switch (39).
) is entered. When setting the initial value to the register (33), the initial value setting pulse shown in Fig. 2 is sent to the terminal (40).
The switch (39) is turned to the terminal side,
The initial value is set to the register (33). Note that if 8 bits are required for the initial value, in this case, the top 4 bits of the initial value
Bit.

The lower 4 bits are sequentially outputted via the switch (35). Note that the register (41) is for delaying the initial value setting pulse, and is for adjusting the time by adding a time delay to the switching of the switch (35).

With the above configuration, a total of 1γ of the above-mentioned equation (1) is executed, and the output is sent to the memory (17) (
(Fig. 1). Note that the write address in this case is given from the memory control circuit (22) according to the display position on the small screen.

Figure 4 is a diagram showing the configuration of the band compression decoding circuit (engine 8), and shows the local decoding operation of the band compression circuit (16) in Figure 3).
1 has the same configuration and operation. That is, the differential output Δxi+1. from the terminal (51). ! (That is, memory (1
The output from 7) is returned to a numerical value of approximately the same size, although it is rougher than before, in the bit expansion circuit (52), and is added to the output of the register (54) in the adder (53). That is, equation (2) is executed here.

Therefore, the decoded signal is output to the terminal (56) via the switch (55). In addition, when setting the initial value of the register (54) K, an initial value setting pulse similar to that shown in FIG. 2 is inputted from the terminal (57), and the switch (58) is turned to the terminal side. As a result, data from the terminal (51) is input to the register (54) K.

The switch (55) is used to create a border frame for divided small screens, and at the border between small screens, the switch (55) is switched to the terminal side, and the data for creating the frame is transferred to the terminal (
59). In addition.

Here, (60) is a register for input cabling delay.

The reason for forming a frame at the border of the small screen is as follows.

As mentioned above, the input difference value data to (17) is 4 bits, and the initial value data is 8 bits, so the memo of the initial value data! Write to j(17).

The reading rate is twice the normal rate (of differential value data). Therefore, if you operate it with a constant clock.

It would take twice as long (-into the membrane).

(Many systems do not have enough time to write and read memory, and this is often the case.) Therefore, at the seams between small screens in multi-screen display.

As a result, the decoding operation cannot be completed in time.

To solve this problem, just set a frame (in an appropriate color) on the small screen. In other words, there is no problem even if the decoding operation is disrupted at the seam.

In the embodiments described above, composite signals were targeted, but it goes without saying that the present invention is also applicable to composite signals. In addition, as a method of band compression, the difference M
The method is not limited to the t-child conversion method, and there is also a method of compressing the band in units of block-shaped areas, for example, and in this case, it is sufficient to divide the blocks into small screen sections so that the boundaries coincide with each other.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to support multi-screen display with a small memory capacity.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an image memory device according to the present invention, FIG. 2 is a timing chart for explaining the operation of the device shown in FIG. 1, and FIG. 4 is a block diagram showing the detailed configuration of the main parts of the apparatus shown in FIG. 1, and FIG. 5 is a diagram showing a screen split display. 13...A/D converter, 15...Small screen creation circuit. 16...band compression circuit, 17...image memory. 18...Band compression decoding circuit. 20...D/A converter, 22...memory control circuit. Representative Patent Attorney Yudo Chika Norihiro Uji Figure 1 Figure 3

Claims (1)

[Claims] Means for band-compressing an input digital video signal, an image memory into which the output of the band-compressing means is written, and means for decoding the signal read from the image memory to obtain a digital video signal. In an image memory device, the image memory device includes a means for sequentially converting an input digital video signal for a plurality of screens into a signal corresponding to each reduced screen in a screen split display during playback and supplying the signal to a band compression means; means for writing a band compression output corresponding to each reduced screen into an address position of the image memory corresponding to a display position in the screen split display, and the band compression and decoding operations in the band compression means and the decoding means are performed on each reduced screen. An image memory device characterized in that the image memory device is configured to perform processing independently for each corresponding signal.