JPH01253069A - Mix level logical simulator - Google Patents

Abstract

PURPOSE:To enable mix level simulation including a real board level by providing the logical simulator which performs simulation and a read board simulator which is connected to a real board. CONSTITUTION:The logical simulator 14 sends an input pattern to the real board simulator 11 when a constituent element to be supplied with the input pattern is the real board 13. The real board simulator 11 inputs the input pattern to the real board 13, and sends the output pattern of the real board 13 responding to the input pattern to the logical simulator 14. The logical simulator 14 determines input patterns for other constituent elements according to the sent-back output pattern of the real board 13 and carries on the simulation. Consequently, the mix level simulation including at least the real board level is carried out.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention provides a mix level system that allows logical simulation of a target system to be performed by combining different signals for each component of the system. Regarding logic simulators.

(Prior Art) At the design and development stage of a system, a logic simulation of the system is performed for the purpose of checking whether the system is correct or not. In that case, the internal operations of each component of the target system, such as gates, IC5LSI, etc., are programmed and described in a file called a device library. However, some of the components have already been made into actual models, and in that case, if the actual model can be used as is for simulation, the effort of writing a device library can be saved accordingly.

Therefore, for elements that have already been made into actual chips, such as gate arrays and ICs, mix-level logic simulators have been known that can perform simulations using the actual chips.

This conventional device will be explained with reference to FIG.

This device includes a processor called a real chip simulator 1, to which a real chip 3 is connected via a hardware interface 2. The real chip simulator 1 has a function of receiving an input pattern for the real chip from the logic simulator 4, inputting it to the real chip 3, and returning the corresponding output pattern of the real chip 3 to the logic simulator 4.

The operation of this conventional device will now be described. The logic simulator 4 executes a simulation according to the test pattern 5. This test pattern 5 describes an input pattern sequence for the target system. In the process of simulation, the logic simulator 4 determines which components to use at this time, based on the input pattern for the target system, the interconnection relationships of the components described in the netlist 6, and the previous output pattern of each component. It then determines whether the component is a programmed device or a real chip.

For programmed devices, device library 7
Based on the internal working information of its components described in
Compute the output pattern for the input pattern of the component. On the other hand, in the case of a real chip, the input pattern is sent to the real chip communication software 8.

The real chip communication software 8 converts the pin names of the components into the bin positions of the real chip 3 based on the input pins of the real chip 3 and their characteristics described in the real chip person output definition file 9, and sends them along with that information. Send the input pattern to the real chip simulator 1. Real chip simulator 1 is
The input pattern is applied to the corresponding bin of the real chip 3, and the corresponding output pattern of the real chip 3 is sent back to the logic simulator 4 via the real chip communication software 8.

The logic simulator 4 calculates input patterns to other components as described above based on the output patterns of the components returned from the actual chip simulator 1, and performs simulation. Continue.

(Problems to be Solved by the Invention) As described above, the conventional mixed-level logic simulator is capable of actual model simulation up to the actual chip level. However, as the scale of the system increases, a more advanced level of actual model simulation is required.For example, in a system consisting of multiple boards, some boards may be , you may want to use it as an actual model to simulate the entire system together with an unfinished board.Simulations that include the actual board level are
This is not possible with conventional mix-level logic simulators.

Therefore, it was not possible to simulate the entire system until all the boards had been manufactured, and the only option was to check the operation on the actual machine after all the boards were completed.

An object of the present invention is to provide a mixed-level logic simulator that can perform simulations including at least the actual board level.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides a device library in which elements of a target system that have not been made into actual models are programmed, and a A real board simulator connected to the element, and a logic simulator that executes a logic simulation of the target system by determining the output pattern when a predetermined input pattern is given to each of the components according to a predetermined test pattern. , the logic simulator includes means for determining whether a component to which an input pattern is applied is a programmed element or an actual board, and when this means determines that it is a programmed element, the input pattern of the element is determined to be a programmed element. means for calculating an output pattern for a pattern based on a program in the device library; means for transmitting the input pattern for the real board to the real board simulator when the determining means determines that the board is a real board; and the real board simulator and means for determining input patterns for other components based on the output pattern of the component obtained by the receiving means or the calculation means,
The real board simulator includes means for inputting an input pattern for the real board transmitted from the logic simulator into the real board, and means for transmitting an output pattern for the input pattern from the real board to the logic simulator. The present invention provides a mixed-level logic simulator with

(Operation) In the above configuration, if the component to which an input pattern is to be given is a real board, the logic simulator sends the input pattern to the real board simulator. The real board simulator inputs the input pattern to the real board, and sends the corresponding output pattern of the real board back to the logic simulator. The logic simulator determines input patterns for other components based on the returned output pattern of the actual board, and continues the simulation. thus,
A mixed level simulation including at least the actual board level is performed.

(Example) Examples will be explained below.

FIG. 1 shows a block configuration of an embodiment of a mixed-level logic simulator according to the present invention. Incidentally, the same parts as those in the conventional configuration shown in FIG. 2 are given the same numbers and the explanation will be omitted.

This device includes a processor called a real board simulator 11. This real board simulator 11 includes:
A real board 13 is connected via a hardware interface 12 for hardware matching. This real board simulator 11 is a logic simulator 14
An input pattern for the actual board 13 is input from the actual board 13 and is input to the actual board 13, and an output pattern corresponding to the input pattern is input from the actual board 13 and sent back to the logic simulator 14.

The above communication between the real board simulator 11 and the logic simulator 14 is performed through the intervention of the real board communication software 15. The actual board communication software 15 is described in the actual board input/output definition file 16.

Based on the actual board 13 human output pins and their characteristics,
Converts the bin name of the component to the bin position of the actual board, transfers the input pattern from the logic simulator 14 along with that information to the actual board simulator 11, and also converts the bin position of the actual board to the bin name of the component Then, the output pattern from the actual board simulator 11 is transferred to the logic simulator 14 together with that information.

The logic simulator 14 executes a simulation of the target system according to the test pattern 5. In the process, the type of each component is determined and information of the device library 7, the actual chip simulator 1, or the actual board simulator 11 is updated accordingly. to understand the operation of each component.

Next, the operation of this embodiment will be explained.

While executing the simulation according to the test pattern 5, the logic simulator 14 performs simulation based on the input pattern for the target system given from the test pattern 5, the interconnection relationship of the components described in the netlist 6, and the previous output pattern of each component. , determine what input pattern to give to which component this time. Then,
Based on this determination, it is determined whether the component to which the input pattern is to be given this time is the actual board 13, the actual chip 3, or an element programmed in the device library 7. As a result, when the component is a real chip 3 or a programmed element, the information of the real chip simulator 1 or the device library 7 is referred to, as in the case of the conventional device described above. Understand the output pattern for the input pattern. On the other hand, if it is a real board 13, the input pattern for the real board 13 is sent to the real board communication software 15.

The real board communication software 15 converts the bin names of the components into pin positions of the real board 13 based on the real board person output definition file 16, and transfers the input pattern together with the information to the real board simulator 11.

The real board simulator 11 combines all the input patterns from the start of the simulation and the current input pattern, and inputs them to the real board 13 via the hardware interface 12 at a timing according to the test pattern 5. Then, the output pattern of the actual board 13 corresponding to this is held, and the output pattern corresponding to the input pattern up to the previous time is excluded, the output pattern corresponding to the current input pattern is extracted, and this is sent to the logic via the actual board communication software 15. Simulator] Return to 4. The reason for inputting all the input patterns from the start of the simulation to the current time to the actual board 13 every time an input pattern is output from the logic simulator 14 is that the logic simulator 14 performs the simulation using software. Because the output timing of the input pattern is delayed from the output timing of the actual system,
This is because it is necessary to input it to the actual board 13 using the actual board simulator 11 in accordance with the actual timing.

The logic simulator 14 determines input patterns for other components based on the output pattern of the component that is returned from the actual board simulator 11 or the actual chip simulator 1 or calculated based on the device library 7 in this way. , continue the simulation.

In this manner, in the above embodiment, a mixed level simulation including an actual board and an actual chip can be performed. Therefore, in the design and development of large-scale systems, there is no need to describe the internal operations of conventional boards and chips, and once some boards have been manufactured,
You can simulate the entire system without waiting for other boards to be completed.

Although the above example describes simulation up to the actual board level, a more advanced complex system can be created by providing an actual model simulator equipped with an input/output definition file at the chassis level and an appropriate hardware interface. Mix level simulations can also be performed.

〔Effect of the invention〕

As explained above, according to the present invention, a logic simulator that executes simulation and a real board simulator connected to a real board are provided. is sent to the real board simulator, the real board simulator inputs the input pattern to the real board, sends the output pattern from the real board back to the logic simulator, and the logic simulator continues the simulation based on that output pattern. With this configuration, mixed level simulation including at least the actual board level is possible, which saves the effort of writing the components that have already been made into the actual board into the device library, and also saves some time during system design and development. This provides the advantage of being able to check the operation of the entire system, including unfinished boards, at the board completion stage.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a mixed level logic simulator according to the present invention, and FIG. 2 is a block diagram showing a conventional mixed level logic simulator. 5...Test pattern, 6...Ne sotorist, 7
...Device library, 11... Actual board simulator, 12... Hardware interface, 13
...Actual board, 14...Logic simulator, 15.
... Actual board communication software, 16... Actual board person output definition file. Applicant's agent Mr. Sato Figure 1 Figure 26

Claims (1)

[Claims] A device library in which elements of the target system that have not been made into actual models are programmed, an actual board simulator connected to the actual board elements among the components, and a predetermined input according to a predetermined test pattern. a logic simulator that executes a logic simulation of the target system by grasping the output pattern when a pattern is given to each of the components; means for determining whether the element is a programmed element or a real board; and when the means determines that the element is a programmed element, means for calculating an output pattern for the input pattern of the element based on the program of the device library; means for transmitting the input pattern for the real board to the real board simulator when the determining means judges it to be a real board; means for receiving the output pattern of the real board from the real board simulator; and means for determining input patterns for other components based on the output pattern of the component obtained by the calculation means, and the real board simulator determines the input pattern for the real board transmitted from the logic simulator. A mixed-level logic simulator comprising: means for inputting a signal into the real board; and means for transmitting an output pattern corresponding to the input pattern from the real board to the logic simulator.