JPH01164150A - Data transmission equipment - Google Patents

Abstract

PURPOSE:To continue data transmission as unbalanced data transmission by earthing the middle point of the resistance circuit of the receiving side of a balanced data transmission device, and detecting trouble by using a circuit to compare the voltages of both transmission lines, and informing a transmitting side of it. CONSTITUTION:When it is assumed that the transmission line 13 between the transmission lines 12, 13 is disconnected, because the minus side terminal of a differential amplifier 11 is earthed through a resistor 15, transmission is automatically switched from balanced transmission to the unbalanced transmission, the voltage of the transmission line 13 comes to be (0, 0) against the voltage (+V, O) of the transmission line 12. A voltage comparison coincidence detection circuit 16 detects that the voltages of both the transmission lines come to 0 volt, and outputs a defect detection flag 160. At that time, the device A informs the device B of the occurrence of defect through a transmission path 171. The device A detects that the transmission line turned into the unbalance transmission and its quality fell, and continues the data transmission as lowering transmission speed.

Description

[Detailed Description of the Invention] [Summary] In a transmission system that transmits logical signals from a transmitting side to a receiving side, the present invention detects failures caused by cable breaks, especially regarding data transmission devices on transmission lines that require reliability. , the purpose of this is to provide a data transmission device that does not interrupt data transmission even in the event of a failure, in which one end receives the voltage level signal on the first transmission path corresponding to each logical signal to be transmitted, and the other end receives the voltage level signal on the first transmission path corresponding to each logical signal to be transmitted. a first impedance element fixed at a constant voltage;
a second impedance element whose one end receives a voltage level signal on a second transmission path corresponding to an inverted logic signal of the logic signal and whose other end is fixed at a constant voltage; a receiver circuit that generates a received signal from a differential signal of each voltage level signal;
detection means for detecting that one end of one of the first and second impedance elements has degenerated to the constant voltage from the logical state corresponding to each voltage level signal on the transmission path of the receiving side; and is configured such that a failure on the transmission path due to the degeneracy is detected on the receiving side.

[Industrial application field]

The present invention relates to a transmission system that transmits logical signals from a transmitting side to a receiving side, and particularly to a data transmission device for a transmission line that requires reliability.

When transmitting digital logic signals between devices in a computer system or communication system, there is a method in which each logic signal and its inverted logic signal are transmitted bare on the transmitting side, and a differential voltage is generated between them on the receiving side.

This method is called a balanced data transmission method, and is used as a highly reliable transmission method because noise signals on each paired transmission path can be canceled by a differential amplifier on the receiving side. Furthermore, there is a need for a method that can detect failures when cables are cut and that will not interrupt data transmission until the failure is restored. It has become extremely important to construct data transmission equipment at low cost.

[Conventional technology]

FIG. 2 shows a conventional balanced data transmission device.

20 is a driver for the device on the transmitting side, 21 is a receiver of device B on the receiving side, and 22 and 23 are transmission lines.

The driver 20 on the transmission side generates voltage level signals of both voltage (+V, 0) and its inverted voltage (0°+y) for the input logic signal 20O, and drives them onto transmission lines 22 and 23, respectively. do. The receiver 2I on the receiving side is a receiving circuit having a differential amplifier, and receives a differential voltage between a voltage level signal of (+V, 0) on the transmission line 21 and a voltage level signal of (Q, +V) on the transmission line 23. is generated as an output signal 210.

In such a conventional balanced data transmission device, for example, if the cable of the transmission line 23 is disconnected, the voltage level of the negative terminal of the receiver 21 on the receiving side becomes unstable, and the terminal becomes floating. For this reason, conventional data transmission systems have a backup transmission line, and when the normally used transmission line is disconnected, the backup transmission line is used as a means of recovery. Alternatively, if a backup transmission line does not exist, data transmission must be interrupted in the event of a failure, and cables must be replaced manually.

[Problems that the invention cannot solve]

Therefore, in the conventional method, a problem arises in that the cost increases due to the provision of a network transmission line. Additionally, there was a problem in that data transmission was interrupted for a long time until the failure was recovered, resulting in poor service quality.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data transmission device that detects a failure caused by a cable being cut and that does not interrupt data transmission even when the failure occurs.

[Means for solving problems]

FIG. 1 (at is a basic configuration diagram of the present invention.

10 is a driver of device A on the transmitting side, 11 is a differential amplifier of device B on the receiving side, 12 and 13 are balanced transmission lines, and in the present invention, there are also resistors 14 and 15 whose midpoint 140 is grounded (
- Impedance for boat fishing) and a voltage comparison coincidence detection circuit 16 that detects switching from balanced transmission to unbalanced transmission when the cable is cut. The driver 10 on the transmission side outputs (+V, O> and (O1
+V) voltage level signals and send them to transmission line 1.
2 and 13, and the differential amplifier 11 on the receiving side compares the (+V, O) voltage level signals on the transmission lines 12 and 13 with the (0, +
This receiving circuit has a differential amplifier that generates a differential voltage (+V, -V) of voltage level signals of V) as an output signal 110.

In normal data transmission, voltage level signals of (+V, O) and (0, +V) are sent to the pair of transmission lines 12 and 13, respectively, and the resistors 14 and 15 are grounded at the midpoint 140. However, the differential amplifier 11 generates voltages (+V, -V) corresponding to the logic (1, 0) of the input signal, and balance is maintained. If the transmission line 13 of the transmission lines 12 and 13 is disconnected, the negative terminal of the differential amplifier 11 is grounded via the resistor 15, so the balanced transmission is automatically switched to unbalanced transmission, and the transmission is interrupted. The voltage on the transmission line 13 is (0,0) with respect to the voltage on the line 12 (+V, O).

The voltage comparison and coincidence detection circuit 16 detects that both transfer paths have become O volts, and outputs a failure detection flag 160. At this time, device B informs device A that a failure has occurred on transmission path 1.
Notification will be made through 71. Device A detects that the transmission path has become unbalanced and the quality has deteriorated, and continues data transmission by lowering the transfer rate.

[For production]

In the present invention, the midpoint of the resistor circuit on the receiving side of the balanced data transmission device is grounded, and a circuit that compares the voltages of both transfer paths is used to detect a failure due to a cable cut based on the comparison results. ing. Furthermore, by notifying the transmitting side of the detection, the transmitting side reduces the communication speed so that data transmission can be continued as unbalanced data transmission.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1(b) is a timing chart of the data transmission device of FIG.
The waveform changes with +V, O). b) is a voltage level signal on the transmission line 13, which corresponds to the logic (1) of the input signal 100.
, 0), the waveform changes at (0°+V) at time t.

The cable breaks at t≧to and degenerates to an “O” bolt at t≧to. That is, at t<to, voltage level signals of (+V, O) and (0°+V) are sent to the pair of transmission lines 12 and 13, respectively, in normal balanced data transmission. At this time, the resistors 14 and 15 are grounded at the midpoint 140, but the differential amplifier 11 has voltages (+V, -V) corresponding to the logic (1°0) of the input signal 100.
generates a voltage of Therefore, by formatting this, output data corresponding to logic (1, 0) can be obtained as shown in C). However, at time to, the cable of the transmission line 13 is cut at point P, so one end 150 of the resistor 15 becomes 0 volts, and the negative terminal of the differential amplifier 11 also becomes 0 volts.

Therefore, the waveform b) is
Since the voltage is , when t≧to, it degenerates to 0 volts,
After t-t o, where the voltage on the transmission line 12 is O volts, both waveforms a) and b) become O volts. If there is no disconnection at point P and the transmission is normal,
As shown in the time domain t<t o, the waveform a
) and b) cannot both be 0. Therefore, waveform a
If the moment when both ) and b) become 0 volts is detected, this detection means that a fault has occurred due to a cable break.

The voltage comparison/number output circuit 16 is a circuit that detects that both the image transmission lines 12 and 13 have become O volts, and the output fault detection flag 160 is as shown in the waveform of d).
At the instant of time to when both waveforms a) and b) become 0, they change from 0 to 1.

When the failure detection flag 160 becomes 1, device B notifies device A of the occurrence of a failure through the transmission path 171. At t≧to, even if the negative terminal of the differential amplifier 11 becomes O volts due to the cable being disconnected, the waveform a) is transferred to the positive terminal via the normal transmission path 12.
As shown in , a voltage level signal of (+V, O) is input.

Therefore, the output of the differential amplifier 11 is (+V, 0), and the logic (1, O) corresponding to these voltages is
It is output normally as shown in waveform C). This method uses one transmission line 12 for the logic (1°0) of the input signal 100 to generate a voltage level signal (+
This is equivalent to transmitting V, 0), which is a so-called unbalanced transmission state. That is, in the present invention, even if the transmission line 13 is disconnected at point P at time to, the transmission is simply automatically switched from balanced transmission to unbalanced transmission, and the transmission does not fall into an abnormal state. That is, by cutting
It means switching from high quality balanced transmission with low data error rate to low quality unbalanced transmission with high data error rate,
Normal data transmission continues. Since unbalanced transmission of low quality has a high error rate when the transfer rate is high, the present invention lowers the transfer rate and normally transmits correct logic using unbalanced transmission before further errors occur. for that,
When the failure detection flag 160 changes to 1 and unbalanced transmission is detected, device B (1) notifies the transmitting device A through the transmission path 171, the clock is transferred from the lock generator within device A. It becomes possible to lower the frequency.

In this way, in the present invention, even if the transmission line 13 is disconnected, data transmission can be continued at a lower transfer rate.

Next, the configuration of the present invention will be explained in more detail using the circuit shown in FIG. 1(C). Components that are the same as those shown in FIG. 1(a) are designated by the same reference numerals.

FIG. 1(C) shows a device that performs balanced data transfer from device A to device B via a transmission path 12.13. Normally, the input signal 10 for transmission output from the data processing device 19 is
0 is adopted as data by the driver 10. Balanced type driver circuit The driver of device A on the sending side outputs a balanced voltage level signal (+V
, 0) and (0°-V). These voltages are converted into logic signals by the differential amplifier 11 and transmitted to the data processing device 18 via transmission lines 12 and 13. If a failure occurs due to a cable disconnection at point P of the transmission line 13 at time to, then during normal data transfer when t<to,
This is balanced transmission. In balanced transmission, the logic of each of the transmission lines in 12.13 is reversed, and the voltage comparison-number construction circuit 16
is input. The voltage comparison-number output circuit 16 compares the level and
The voltage on the transmission line 12.13 is converted to a logical voltage through converters 161 and 162, and is input to the -number configuration circuit 163, and the output signal is O at the time of equilibrium. However, if point P is cut at t=t o, level convert 1
Since the input of 61 becomes 0 volts through resistor 15,
When t≧to, the output of level converter 161 is fixed at logic zero. Other level converter 162 with t≧to
When 0 volt is input to the input circuit 163, the output of the minus number output circuit 163 becomes logic 1, and it is detected that a fault has occurred on the transmission path. The failure detection flag 160 is output as a failure detection interrupt signal 1700 through the filter 17 and interrupts the data processing device 18. At the same time, the fault writing detection interrupt signal 1700 is converted to a balanced voltage level by the driver 170, and is input to the receiver circuit 173 of the device A via the balanced control signal lines 171a and 171b. The output of the receiver circuit 173 is a fault detection interrupt signal 1730 that notifies the data processing device 19 of the fault as an interrupt.

When the occurrence of a failure is detected in the data processing devices 18 and 19,
The data processing device 19 on the transmitting side lowers the oscillation frequency of the clock generator 191 through the signal line 190, thereby controlling the transfer rate to be low. Furthermore, the data processing device 18 on the receiving side controls the receiver 11 so that it can receive data at a lower transfer rate.

Note that the filter 17 is a circuit for removing noise on the fault detection flag 160 due to the characteristics of the transmission circuit, and also for launching the fault detection flag 160.

In this embodiment, a failure in the data transmission path has been explained, but if a similar circuit 16 is used for the control lines 171a and 171b, reliability will be further increased. Further, if the control signal transfer on the control line does not operate at high speed, an application may be considered in which the level converters 161 and 162 in the voltage comparison/number construction circuit 16 added to the control line side are omitted.

〔Effect of the invention〕

According to the present invention, a transmission line that can cope with failures due to disconnection without requiring a standby transmission line can be realized with extremely high functionality and low cost by adding a simple circuit, and furthermore, data transmission from failure detection to recovery can be realized. Since control can be executed automatically in a short period of time without interruption, an extremely highly reliable transmission system can be created.

[Brief explanation of the drawing]

FIG. 1(a) is a basic configuration diagram according to the present invention, FIG. 1(b)
1(C) is a timing chart of the data transmission device of the present invention, FIG. 1(C) is a circuit diagram of the data transmission device of the present invention, and FIG.
The figure is a circuit diagram of a conventional data transmission device. DESCRIPTION OF SYMBOLS 10... Driver, 11... Receiver, 12.13... Transmission line, 14.15... Resistor, 16... Voltage comparison-number structure circuit, 17... Filter, 100... ...Input signal, 110...Output signal. Patent Applicant: Pfn Co., Ltd. Taira Inori

Claims (1)

[Claims] 1) In a transmission system that transmits logical signals from a transmitting side to a receiving side, a first transmission line (12) corresponding to each logical signal to be transmitted.
a first impedance element (14) which receives the above voltage level signal at one end and whose other end (140) is fixed at a constant voltage; and a second transmission line (corresponding to the inverted logic signal of the logic signal).
13) Receive the above voltage level signal at one end and the other end (140)
A second impedance element (1
5), a receiver circuit (11) that generates at least a received signal from a differential signal of each of the voltage level signals on the first and second transmission paths (12, 13); Transmission line (
The first and second impedance elements (
14, 15) on the receiving side for detecting that one end of either one of them has degenerated to the constant voltage; A data transmission device characterized by side detection. 2) connected to the detection means (16) and connected to the transmission line (1);
notification means (17, 170, 171), and a fault detection interrupt signal (
1730) and controls data on one of the transmission paths (12, 13) that is operating normally without degenerating to the constant voltage to be transferred at a low speed. control means (19, 191); and second control means (18) on the receiving side that controls the receiver circuit 11 so that the data transferred at the low speed can be received. A data transmission device according to claim 1. 3) The data transmission device according to claim 1, wherein the impedance elements (14, 15) are resistors. 4) The data transmission device according to claim 1, wherein the constant voltage at the other end of the impedance element (14, 15) is 0 volts due to grounding.