JPH01128164A - Compression ratio changing circuit - Google Patents

Compression ratio changing circuit

Info

Publication number
JPH01128164A
JPH01128164A JP62286209A JP28620987A JPH01128164A JP H01128164 A JPH01128164 A JP H01128164A JP 62286209 A JP62286209 A JP 62286209A JP 28620987 A JP28620987 A JP 28620987A JP H01128164 A JPH01128164 A JP H01128164A
Authority
JP
Japan
Prior art keywords
compression ratio
video
circuit
still image
reproduced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62286209A
Other languages
Japanese (ja)
Inventor
Yoji Sugiura
杉浦 洋治
Yoichi Morimoto
森本 庸一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP62286209A priority Critical patent/JPH01128164A/en
Publication of JPH01128164A publication Critical patent/JPH01128164A/en
Pending legal-status Critical Current

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  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

PURPOSE:To automatically set a compression ratio in accordance with the number of pieces of still pictures and to effectively monitor the compression ratio by using a circuit which counts the number of reproduced addresses to be stored and a means which prescribes the compression rate of a reproduced still picture in response to the count value of said counter circuit. CONSTITUTION:In a control circuit 4 a memory control means 8 stores the reproduced addresses into an address memory 10 via the input of a key word 6 and a floppy disk 2 and with the coincidence output obtained during retrieval of a key word. Then a counter circuit 9 counts the coincidence output number (x). A compression ratio deciding circuit 12 decides the value (n) that satisfies (n-1)<2x<=n. The reproduced still picture video signals are supplied to a video processing circuit 3 from a video disk player 1 to undergo the YC separation and the A/D conversion. In this case, a write control circuit 13 sets the conversion clock cycle at 1/n and stores it into a picture memory 17. Then X pieces of still pictures are read out by a read control circuit 19 and displayed with compression in (n<2>) pieces of sections of a monitor TV 5 via a video signal production circuit 20. These still pictures are stored in and read out of the memory 17 with no compression in case a specific code is selected by a picture selecting means 14.

Description

【発明の詳細な説明】 C(イ)産業上の利用分野 不発明は、複数の静止画像を圧縮記憶して分割表示する
画像ファイルシステムに中いる圧縮比変更回路に関する
DETAILED DESCRIPTION OF THE INVENTION C(a) Industrial Application Field The invention relates to a compression ratio changing circuit included in an image file system for compressing and storing a plurality of still images and displaying them separately.

(q 従来の技術 複数の静止画を再生する画像ファイルシステムに付いて
は、例えば特開昭61−264448号公報CG06F
  12100)に開示されている。
(q Conventional technology Regarding an image file system for reproducing a plurality of still images, for example, Japanese Patent Application Laid-Open No. 61-264448 CG06F
12100).

この技術は、画像ファイル装置中に静止画映像記憶エリ
アの他に圧縮映像記憶エリア全般け、静止画の記憶に際
して圧縮映像全形成し、両エリアにそれぞれ静止画映像
と圧縮映像全記憶し、検索に際して複数の圧縮映像を同
一モニタ画面に表示することにエリ検索を容易にするも
のである。
This technology has an entire compressed video storage area in addition to the still image storage area in the image file device. When storing still images, the entire compressed video is formed, the still image video and compressed video are stored in both areas, respectively, and searched. The purpose is to display multiple compressed videos on the same monitor screen to facilitate search.

G−1発明が解決し工つとする問題点 しかし、上述する従来技術は圧縮映像形成し記録する手
段が必要となり構成が複雑となる0寸た、再生される圧
縮映像信号は圧縮比全変更出来ず表示する静止画像の数
に二ってその表示の大きさ全変更することが出来ない。
G-1 Problems to be Solved by the Invention However, the above-mentioned prior art requires means for forming and recording compressed video, resulting in a complicated configuration, and the compression ratio of the compressed video signal to be played back cannot be completely changed. Due to the number of still images to be displayed, it is not possible to change the entire size of the display.

そこで、本発明は、表示に際して再生静止画映像全圧縮
し、表示する静止画の数に応じてその圧縮比全変更する
ものである0 (4問題点全解決するための手段 そこで本発明は、静止画に対応するキーワードとアドレ
ス?再生し指定キーワードに一致する再生キーワードを
有する再生アドレス全記憶し、記憶した再生アドレスに
対応して再生子べき静止画全同一モニタ画面に圧縮して
分割表示する画像ファイルシステムに於て、記憶される
再生アドレスの数音計数する計数回路と、この計数値に
応じて再生静止画映像信号の圧縮比?規定する圧縮比規
定手段と?、配すること?特徴とする0(ホ作 用 工って、本発明に工れば、表示すべき静止画の数に応じ
て再生静止画映像信号の圧縮比が変更される。
Therefore, the present invention completely compresses the reproduced still images when displaying them, and changes the compression ratio in accordance with the number of still images to be displayed. Keywords and addresses corresponding to still images?Replay and store all playback addresses with playback keywords that match the specified keyword, and compress and split display all still images to be played back on the same monitor screen according to the stored playback addresses. In an image file system, a counting circuit for counting the number of stored playback addresses, and a compression ratio specifying means for specifying a compression ratio of a playback still image video signal according to this count value, are provided.Characteristics According to the present invention, the compression ratio of the reproduced still image video signal is changed according to the number of still images to be displayed.

(へ)実施例 以下、本発明全図示せる実施例に従い説明する。(f) Example DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be explained according to fully illustrated embodiments.

第1図は不発明の一実施例?示す回路ブロック図に従い
説明する。
Is Figure 1 an example of non-invention? The explanation will be given according to the circuit block diagram shown.

本実施例に於て再生されるビデオディスクレコードは、
多数の静止画映像信号全アドレスコードと共にスパイフ
ル状記録トラックに記録しており。
The video disc record played in this embodiment is
A large number of still image video signals and all address codes are recorded on spyful-shaped recording tracks.

このビデオディスクレコード全光学再生するビデオディ
スクプレーヤは、入力される指定アドレスデータと再生
アドレスコードとを比較し、指定アドレスに対応する再
生アドレス全サーチし、コノ再生アドレスに対応する再
生静止画映像全選択導出するものである。、 また、フロッピディスクは、各静止画映像信号に対応す
るアドレスデータとキーワードとを予め記録しており、
このフロッピディスクを再生するフロッピディスクレコ
ーダ12+からは、アドレスデータと対応するキーワー
ドが順次再生される□以下、本実施例の動作に付いて、
第1図に従い説明する。まずキーワード発生手段(61
のキーボード全操作してキーワード全指定する。指定キ
ーワードはマイクロコンビューダを可とする制御回路(
41に入力される、一方キーワード検索時プロッピディ
スクレコーダ12〕J:り再生される再生キーワード及
び再生アドレスデータは順次制御回路14+に入力され
る。前記制御回路+41内では、キーワード比較手段f
7+が指定キーワードと順次入力される再生キ〒ワード
とを比較する。比較の結果再生キーワードが指定キーワ
ードに一致すると、一致出力がメモリ制御手段(8)と
計数手段(91に入力される。前記メモリ制御、!f:
段(81は5キ一ワード検索期間中−致出力発生の度に
再生キーワードに対応する再生アドレスデータ全、アド
レスメモリfIO+に記憶せしめる。また前記計数回路
(91は、キーワード検索期間中一致出力全計数する。
This video disc player, which plays all optical video disc records, compares the input specified address data with the playback address code, searches all the playback addresses corresponding to the specified address, and searches all the playback still images corresponding to the playback address. It is for selective derivation. In addition, the floppy disk has address data and keywords corresponding to each still image video signal recorded in advance.
The floppy disk recorder 12+ that plays back this floppy disk sequentially plays back address data and corresponding keywords □The operation of this embodiment will be explained below.
This will be explained according to FIG. First, keyword generation means (61
Use all keyboard operations to specify all keywords. The specified keyword is the control circuit (
On the other hand, the reproduction keyword and reproduction address data which are input to the floppy disk recorder 12]J: during the keyword search are input to the control circuit 14+ in sequence. In the control circuit +41, a keyword comparison means f
7+ compares the specified keyword with the sequentially input reproduction keywords. If the playback keyword matches the specified keyword as a result of the comparison, the matching output is input to the memory control means (8) and the counting means (91).The memory control, !f:
The counting circuit (81 stores all the playback address data corresponding to the playback keyword in the address memory fIO+ every time a match output occurs during the keyword search period.The counting circuit 91 stores all the playback address data corresponding to the playback keyword in the address memory fIO+ every time a match output occurs during the keyword search period. Count.

キーワード検索が終了すると、指定アドレスデータに対
応する再生アドレスデータがアドレスメモリflO+に
記憶され、そのデータ数は計数手段(9)にて計数され
る。
When the keyword search is completed, the reproduced address data corresponding to the specified address data is stored in the address memory flO+, and the number of data is counted by the counting means (9).

この計数手段19)の計数値は、圧縮比決定手段a21
に入力される、圧縮比決定手段121は、その計数値x
が(n−1)2くX≦n2 (但しnは1〜8迄の整数
)全満足する様なデータn2求める□このデータnは書
込制御回路りに入力される□この書込制御@J賂[13
1け、データnに基づいてAD変換クりウクの周期’2
n倍に、書込アドレス変更周期?n倍に規定する□ 一方、指定アドレスデータ発生手段σBは、アトL/X
メモリ内の再生アドレスデータ全指定アドレスデータと
してビデオディスクプレーヤ11+に入力する□ビデオ
ディスクプレーヤ(11は、この指定アドレスデータに
対応するアドレスコード全サーチし、対応する再生静止
画映像信号全映像処理回路131F!:入力する。、1
画面分の再生静止画映像6号が導出されると、再生終了
出力が指定アドレスデータ発生手段(111に入力され
、指定アドレスデータ発生手段αBは次の再生アドレス
データ全アドレスメモリ1ltlエリ読出し、指定アド
レスデータ全更新する。斯るサーチ動作はアドレスメモ
リon内の再生アドレスデータが全て読出される迄で繰
返し為される。
The count value of this counting means 19) is calculated by the compression ratio determining means a21
The compression ratio determining means 121 inputs the counted value x
(n-1)2 x X≦n2 (where n is an integer from 1 to 8) Find data n2 that fully satisfies □ This data n is input to the write control circuit □ This write control @ J bribe [13
1, AD conversion cycle '2 based on data n
Write address change cycle n times? Specify n times □ On the other hand, the specified address data generation means σB is at L/X
All playback address data in the memory is input to the video disc player 11+ as designated address data. □Video disc player (11 searches all the address codes corresponding to this designated address data, and processes the corresponding playback still image video signal for all video processing circuits. 131F!: Enter., 1
When the reproduced still image video No. 6 for the screen is derived, the reproduction end output is input to the specified address data generation means (111), and the specified address data generation means αB reads out the next reproduction address data from the entire address memory 1ltl area and specifies the All address data is updated.Such search operation is repeated until all reproduced address data in the address memory ON is read out.

順次読出される再生静止m映像信号は、YC分離回路(
151に入力されるnこのYC分離回路05)は、変調
色信号全復調して色差信号全形成しており、Y信号、(
R−Y)信号、(8−YJ信号の3信号2AD変換回路
口θに入力しているり書込制御回路Q3は、このAD変
換回路σeにAD変換クロ、ツク全入力しており、Y、
(R−Y)、Y、(8−Y)、Y、(R−Y)、・・・
の順でAD変換を為している。
The reproduced still m video signals that are sequentially read out are passed through a YC separation circuit (
This YC separation circuit 05) which is input to 151 demodulates all the modulated color signals to form all the color difference signals, and the Y signal, (
RY) signal, (8-YJ signal 3 signals are input to the 2AD conversion circuit port θ, and the write control circuit Q3 inputs all AD conversion clocks and signals to this AD conversion circuit σe, Y,
(RY), Y, (8-Y), Y, (RY),...
AD conversion is performed in this order.

このAD変換クロックはその周期’k 1/nとし、n
ラインに1回の割合で再生静止画映像信号ヲAD変換す
る□このAD変換データは画像メそり開に記憶されるが
、その書込アドレスはその圧縮映像が表示されるべきア
ドレスに対応して指定される。読出制御回路a9は%画
像メモリanの読出アドレス全指定しフィールド周期で
全てのADI換データを全て読出す。読出されたAD変
換データはDA変換回路(t81に於て情報毎に振り分
けられてアナログ化される。DA変換されたY信号、(
R−Y)信号、CB−Y)信号は映像信号形成回路(2
01に於て同期信号及び画面毎の識別番号パターン信号
?多重付加し色差信号音で調してNTSCカラ第2図は
このモニタT V 15+の画面に16個の静止画映像
がa−p葛の識別前号パターンと共に表示された場合全
模式的に示している。
This AD conversion clock has a period 'k 1/n, and n
AD converts the reproduced still image video signal once per line □ This AD conversion data is stored in the image memory, but its write address corresponds to the address where the compressed video is to be displayed. It is specified. The read control circuit a9 specifies all the read addresses of the image memory an and reads out all the ADI conversion data in the field period. The read AD conversion data is sorted by information and converted into analog data in the DA conversion circuit (t81).The DA converted Y signal, (
The R-Y) signal and the CB-Y) signal are sent to the video signal forming circuit (2).
Synchronization signal and identification number pattern signal for each screen in 01? Figure 2 schematically shows the entire case when 16 still images are displayed on the screen of this monitor TV 15+ together with the ap katsu identification pattern. ing.

斯る状櫂で操作者が特定の識別前号を画像選択手段(1
41t−用いて指定すると、メモリ制御手段(81が識
別符号に対応する再生アドレスデータ全指定アドレスデ
ータ発生手段に入力し、この指定アドレスデータ発生手
段(IIJ読出された再生アドレスを指定アドレスとす
る。その結果ビデオディスクプレーヤ中からは選択した
再生静止画映像信号が形成導出される□この再生静止画
映像信号は、画像メモリαBに圧縮されることなく記憶
されて読出される。その結果モニタ画面には選択した静
止画像のみがモニタ画面にそのまま表示される。
With such a status paddle, the operator selects a specific identification number by the image selection means (1
41t-, the memory control means (81) inputs all the reproduction address data corresponding to the identification code to the specified address data generation means, and the reproduction address read out by the specified address data generation means (IIJ) becomes the specified address. As a result, the selected reproduced still image video signal is formed and derived from the video disc player. This reproduced still image video signal is stored and read out without being compressed in the image memory αB. As a result, the reproduced still image video signal is displayed on the monitor screen. , only the selected still image will be displayed as is on the monitor screen.

(ト) 発明の効果 よって、本発明によれば、表示すべき静止画の個数に応
じて、静止画の圧縮比が自動設定され効率の良いモニタ
が可能になる。
(G) According to the present invention, the compression ratio of still images is automatically set according to the number of still images to be displayed, and efficient monitoring becomes possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例金示す回路ブロック図、第2
図はモニタ画面の模式説明図ケそれぞれ示す。 (9)・・・計数手段、02・・・圧縮比決定手段。
Fig. 1 is a circuit block diagram showing one embodiment of the present invention;
Each figure shows a schematic explanatory diagram of a monitor screen. (9)... Counting means, 02... Compression ratio determining means.

Claims (1)

【特許請求の範囲】[Claims] (1)指定アドレスデータに基づいて静止画映像を記録
して成る映像記録媒体をサーチし前記指定アドレスに対
応する静止画映像を再生して再生静止画映像信号を導出
する映像再生装置と、前記静止画映像に対応するアドレ
スデータとキーワードとを記録する情報記録媒体を再生
する情報再生装置と、キーワード発生手段が発する指定
キーワードと前記情報再生装置が発する再生キーワード
とを比較する比較手段と、該比較手段が一致出力を発す
るタイミングで対応する再生アドレスデータを記憶する
アドレスメモリと、該アドレスメモリの読出出力を入力
して前記指定アドレスデータを前記映像再生装置に入力
する指定アドレスデータ発生手段と、複数の再生静止画
映像信号を所定の圧縮比で記憶し読出に際し複数の静止
画映像を分割表示する映像記憶読出手段とを、それぞれ
配して成る画像ファイルシステムに於て、 前記一致出力を計数するカウンタと、 前記カウンタの計数値を入力して前記圧縮比を規定する
圧縮比規定手段とを、 それぞれ配して成る圧縮比変更回路。
(1) a video reproducing device that searches a video recording medium on which still image video is recorded based on specified address data and reproduces the still image video corresponding to the specified address to derive a reproduced still image video signal; an information reproducing device for reproducing an information recording medium recording address data and keywords corresponding to a still image video; a comparing means for comparing a designated keyword issued by a keyword generating means with a reproduction keyword issued by the information reproducing device; an address memory for storing corresponding reproduction address data at a timing when the comparison means issues a coincidence output; and designated address data generating means for inputting the readout output of the address memory and inputting the designated address data to the video reproduction device; In an image file system comprising video storage and reading means for storing a plurality of reproduced still image video signals at a predetermined compression ratio and displaying the plurality of still image video signals in a divided manner when read out, the coincidence output is counted. A compression ratio changing circuit comprising: a counter for determining the compression ratio; and a compression ratio defining means for inputting the counted value of the counter to define the compression ratio.
JP62286209A 1987-11-12 1987-11-12 Compression ratio changing circuit Pending JPH01128164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62286209A JPH01128164A (en) 1987-11-12 1987-11-12 Compression ratio changing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62286209A JPH01128164A (en) 1987-11-12 1987-11-12 Compression ratio changing circuit

Publications (1)

Publication Number Publication Date
JPH01128164A true JPH01128164A (en) 1989-05-19

Family

ID=17701381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62286209A Pending JPH01128164A (en) 1987-11-12 1987-11-12 Compression ratio changing circuit

Country Status (1)

Country Link
JP (1) JPH01128164A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5662867A (en) * 1991-12-09 1997-09-02 Bayer Corporation System for creatinine determination

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6384259A (en) * 1986-09-26 1988-04-14 Canon Inc Picture retrieving device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6384259A (en) * 1986-09-26 1988-04-14 Canon Inc Picture retrieving device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5662867A (en) * 1991-12-09 1997-09-02 Bayer Corporation System for creatinine determination

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