JPH01126883A - Predictive coder - Google Patents

Abstract

PURPOSE:To realize a predictive coding even with a low speed logical element without lowering a predictive efficiency by distributing a television signal into (n), extending a time base to (n) times and multiplying a predictive processing time by (n). CONSTITUTION:The television signal inputted by an input terminal 301 is distributed to (n) (n=2, 3,...) for a horizontal scanning line unit in a picture signal distributing circuit 302 and respectively supplied to (n) time base extending circuits 303-306. The television signals having the time base extended to (n) times in the time base extending circuits 303-306 are respectively predictively coded in predictive coding circuits 307-310, supplied to a multiplex circuit 311, (n) predictive coding signals are multiplexed in the multiplexing circuit 311 and outputted from an output terminal 312. Accordingly, the predictive processing time can be (n) times as long as a sampling cycle. Thereby, the predictive coding can be executed without lowering the predictive efficiency even with an inexpensive logical element.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a predictive encoding device for television signals, and more particularly to a predictive encoding device for encoding and transmitting wideband, high-speed signals such as high-definition television signals. It is something.

2. Description of the Related Art When predictively encoding a conventional NTSC television signal, a sampling frequency of 10-odd MHz is sufficient. Therefore, the sampling period is from 50 nS to 10
Since it is about 0 nS, transistor transistor logic
Logic: It was possible to realize the device by using logic elements with a speed on the order of 'TTL). However, in the case of high-definition television signals, the sampling frequency is 50 MHz or more, and recent international standardization trends are moving towards adopting 74.25 MHz. At this time, the sampling period is 1
3.5nsec, which is faster than current TTL and emitter coupled logic.
It is difficult to realize a predictive encoding device using logic elements such as GIC (ECL). Therefore, when predictively encoding a high-definition television signal, a parallel processing method is used to realize a device.

(For example, Intra-frame/inter-frame adaptive extrapolation-interpolation predictive coding of rHDTV signals,” IEICE Transactions, '8
7/I VOl, J 70-B No, 196-104
Hage).

An example of the above-mentioned conventional predictive encoding device will be described below with reference to the drawings.

FIG. 4 shows the configuration of a conventional two-dimensional predictive encoding device. In FIG. 4, 401 is a television signal input terminal, 402 is a subtracter, 403 is a quantization circuit, and 4
04 is an adder, 405 is a one-sample delay circuit, 406 is a line delay circuit, 407 is a prediction circuit, 408 is a plane prediction circuit, and 409 is an output terminal for a predictively encoded signal.

The two-dimensional predictive encoding device configured as described above will be explained using FIGS. 4 and 5.

First, the first plate shows the two-dimensional pixel arrangement of the television signal input to the two-dimensional predictive coding apparatus shown in FIG. By the two-dimensional predictive encoding device shown in FIG.
When pixel X in the figure is plane-predicted using pixels A, C, and D, the predicted value intersection is expressed as: X=A-D+C (1). A television signal input from an input terminal 401 is calculated by a subtracter 402 and a local decoder consisting of an adder 404 and a plane prediction circuit 408 (1).
The difference from the predicted value of the equation is taken, quantized by a quantization circuit 403, and outputted from an output terminal 409 of a predictive encoded signal. The decoding device has the same configuration as the local decoder described above.

In the two-dimensional predictive encoding device configured as described above, when predicting pixels A to X in FIG. 5, the prediction circuit 407, the subtracter 402 , quantization circuit 403, adder 404, and loop processing up to sample delay circuit 407 must be performed at one sample interval time Ts. The input television signal is NTSCI Gabi■! In the case of a slope, the sampling period Ts is sufficiently long and this is possible, but in the case of a high-definition television signal, the sampling period Ts is as short as 13.5 nSeC, as described above, and the currently popular high-speed logic This is not possible at the speed of the device (such as ECL).

Therefore, in order to predict pixel X in FIG. 5, there is a method of predicting using '' to the pixel before the previous pixel instead of the immediately preceding pixel A. The "intra-frame/inter-frame adaptive extrapolation-interpolation predictive coding" will be explained based on the above-mentioned reference literature.

FIG. 6 is a configuration diagram of a three-dimensional (intraframe interframe adaptive extrapolation and interpolation) predictive encoding device. In the same figure, 60
1 is a high-definition television signal input terminal, 602 is a pixel separation circuit, 603 is a delay circuit, 604.605 is a subtracter, 606.607 is a quantization circuit, 608.609 is an adder, and 610 is a frame before interpolation. 611 is an intra-frame interpolation prediction circuit, 612 is an inter-frame extrapolation prediction circuit, 613 is an inter-frame extrapolation prediction circuit, 614.61
5 is a switch, 616 is a delay circuit, 617 is a switching control circuit, 618 is a multiplexing circuit, and 619 is an output terminal for a predictively encoded signal. Here, the frame interpolation previous value prediction circuit 610 is the plane prediction circuit 40 of the two-dimensional prediction device in FIG.
8, and the one-sample delay circuit 405 is replaced by a two-sample delay circuit.

The operation of the intra-frame/inter-frame adaptive extrapolation/interpolation predictive coding apparatus configured as described above will be briefly described below with reference to FIGS. 6 and 7. FIG. 7 is a sample arrangement diagram of a television signal. In FIG. 6, a high-definition television signal inputted from an input terminal 601 is passed through a pixel separation circuit 602 to a G signal as shown in FIG.
The signal is separated into 1 pixel and G2 pixel, and supplied to a subtracter 604 and a delay circuit 603, respectively. In the subtracter 604, the pixel
The difference between the value intersection adaptively predicted from one pixel A', B, D, and Fx is taken and supplied to the quantization circuit 606. The quantization circuit 606 quantizes the difference and supplies it to the multiplexing circuit 618 as a predictive code for the G1 pixel group.

The G2 pixel delayed in the delay circuit 603 is processed in the subtracter 605 by a local decoding circuit consisting of an adder 609, an intraframe interpolation prediction circuit 611, an interframe extrapolation prediction circuit 613, a switching control circuit 617, and a delay circuit 616. , the already decoded G1 pixels around pixel Y, KS
The difference between L, M and the value 9 adaptively predicted from the previous frame pixel FV is taken and supplied to the quantization circuit 607. In the quantization circuit 607, the difference is quantized and G
It is supplied to the multiplexing circuit 618 as a two-pixel predictive code. In the multiplexing circuit 618, the predicted codes of the G1 pixel and the G2 pixel are multiplexed and output to an output terminal 619. The decoding device can be realized with the same configuration as the local decoding circuit described above.

As described above, in this conventional example, the time required for the above-mentioned prediction processing is reduced to 2 times the sampling period Ts by performing predictive encoding using the pixel before the preceding pixel instead of the immediately preceding pixel.
For high-definition television signals, it is 27nS.
It is possible to realize the circuit by using logic elements such as ECL.

Problems to be Solved by the Invention However, with the above configuration, there is a high possibility that the prediction efficiency will decrease because the pixel A' before the previous one is used instead of the immediately preceding pixel A to predict the pixel X in FIG. In particular, when predictively encoding an image containing a large amount of high-definition image information, there has been a problem in that prediction efficiency is significantly reduced, leading to deterioration of image quality.

In addition, by dividing pixels into two layers and processing them, the processing time could be doubled, but it is also possible to realize the circuit with TTL, which is a logic element that is currently available and inexpensive, or with IC. It is insufficient to convert into LSI, and furthermore,
The time required for processing must be extended. but,
If the number of processing layers is further increased, the circuit configuration becomes complicated, and prediction must be made using the pixel before the previous pixel, resulting in a further decrease in prediction efficiency.

In view of the above-mentioned problems, the present invention enables multi-layer processing without reducing prediction efficiency, extends the time required for prediction processing, makes predictive encoding processing possible even with low-speed logic elements, and further enables multi-layer processing. The present invention also provides a predictive encoding device that can be configured without complicating the circuit.

Means for Solving the Problems In order to solve the above-mentioned problems, the predictive encoding device of the present invention has a television signal input terminal connected to an input of a picture signal distribution circuit, and a plurality of n video signal distribution circuits. The output of (
n = 2, 3, 4, ...), respectively, are connected to the inputs of n time axis expansion circuits, and the outputs of the n time axis expansion circuits are connected to the inputs of n predictive coding circuits, respectively. and the outputs of the n predictive encoding circuits are connected to the inputs of the other n predictive encoding circuits.

According to the above-described configuration, the present invention distributes a television signal into n trees in units of, for example, I horizontal scanning lines, and expands the time axis of each line by n times in a time axis expansion circuit, thereby increasing the sample interval by n times. The present invention enables predictive coding using the immediately preceding pixel, and realizes a circuit that can operate at low speed without reducing prediction efficiency.

Moreover, two-dimensional predictive encoding is also possible by inputting the output of the predictive encoding circuit of the line one above as the input of the predictive encoding circuit.

Embodiment Hereinafter, a predictive coding apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of a predictive coding device in a first embodiment of the zero invention. 1st
In the figure, 101 is a television signal input terminal;
02 is a switch, 103.104 is a time axis expansion circuit, 1
05.106 is a subtracter, 107.108 is a quantization circuit,
109.110 is an adder, 111.112 is an intra-frame pre-prediction circuit, 113.114 is an inter-frame extrapolation prediction circuit, 115.116 is a switch, 117.11B is a switching control circuit, and 119.120 is a predictive coding circuit. ,1
21 is a multiplexing circuit, and 122 is an output terminal for a predicted code signal. Here, frame interpolation pre-value prediction circuit 111.11
Reference numeral 2 has a configuration similar to the plane prediction circuit 408 in FIG. 4, and has a previous value prediction type configuration in which pixel X in FIG. 5 is predicted by the immediately preceding pixel A.

The operation of the predictive encoding device configured as described above will be described below with reference to FIGS. 1 and 2. First, FIG. 2 shows the configuration of horizontal scanning lines of a television signal. 1A shows the structure of the television signal input to the input terminal 101 in FIG. Scan lines a and C shown in the figure are distributed to a time axis expansion circuit 103, and scan lines b and d are distributed to a time axis expansion circuit 104. In the time axis expansion circuit 103 and the time axis expansion circuit 104, the image is expanded twice as shown in FIG.
Subtractor 1 of predictive encoding circuits 119 and 120, respectively
05 and 106. In the subtracter 105, an adder 109, a frame interpolation pre-value prediction circuit 111
, the difference between the predicted value decoded by the local decoding circuit consisting of the interframe extrapolation prediction circuit 113, the switch 115, and the switching control circuit 117 and the input signal is calculated and the quantization circuit 1
07. In the quantization circuit 107, the difference value is quantized and then supplied to the multiplexing circuit 121.

Similarly, in the predictive encoding circuit 120, the difference between the predicted value and the input signal is quantized and supplied to the multiplexing circuit 121. The multiplexing circuit 121 multiplexes the signals predictively encoded by the prediction circuits 119 and 120, and outputs the multiplexed signals from the output terminal 122.

Here, the frame interpolation pre-value prediction circuit 111.1 in FIG.
12 will be explained using FIG. 2(b).

In the frame interpolation pre-interpolation value prediction circuits 111 and 112,
When performing plane prediction, as shown in FIG. 2(b), the frame interpolation pre-value prediction circuit 111 converts pixel X into pixel A,
C and D, and the frame interpolation pre-value prediction circuit 112 predicts pixel X' to pixel ', C', D'. At this time, pixels C" and D" are signals decoded one horizontal scanning period ago by the frame interpolation pre-value prediction circuit 112, and pixels C" and D" are signals decoded by the frame-interpolation pre-value prediction circuit 112.
This is a signal decoded one horizontal period ago.

As described above, according to this embodiment, a switch is used as an image signal distribution circuit, and the television signal is divided into two parts and supplied to the time axis expansion circuit, and the time axis is expanded twice and predictively encoded. As a result, as shown in FIG. 2(b), the predictive encoding processing time can be made twice the sampling period Ts. In addition, by using the two-dimensional predictive coding output of the predictive coding circuit as the input to another two-dimensional predictive coding circuit, two-dimensional predictive coding is possible, and by adding predictive coding between frames, adaptive 3-dimensional (inter-frame/intra-frame) predictive coding is also possible.

A second embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a block diagram of a predictive encoding device showing a second embodiment of the present invention. In the figure, 301 is a television signal input terminal, 302 is an image signal distribution circuit, and 303.3
04.305.306 is time axis expansion circuit, 307.30
8, 309, and 310 are predictive encoding circuits, 311 is a multiplexing circuit, and 312 is an output terminal for predictive code signals. A predictive encoding circuit 309 in the figure has a similar configuration to the predictive encoding circuits 119 and 120 in FIG. Further, the image signal distribution circuit 302 has n outputs,
The multiplexing circuit 311 also has n inputs. (n=2, 3
,...) The operation of the predictive encoding device configured as above will be described below. A television signal inputted from an input terminal 301 is distributed to n lines in units of horizontal scanning lines in an image signal distribution circuit 302, and each signal is divided into n lines.
time axis expansion circuits 303 to 306. The television signal whose time axis has been expanded by n times in the time axis expansion circuits 303 to 306 is predictively encoded in n predictive encoding circuits 307 to 310, and then sent to the multiplexing circuit 3.
11. In the multiplexing circuit 311, n predicted code signals are multiplexed and output from an output terminal 312. When the predictive encoding circuits 307 to 310 perform two-dimensional face measurement, this becomes possible by using the output of the predictive encoding circuit of the next line as the input of the predictive encoding circuit.

As described above, by distributing the television signal into n pieces and expanding the time axis by n times, the prediction processing time can be increased by n times. Further, the time axis expansion circuits 303 to 306 and the predictive encoding circuits 307 to 310 in this embodiment all have the same internal configuration. Therefore, even if the number of layers n is increased, the circuit configuration simply becomes n times larger and does not become more complicated.

The first embodiment is described as a three-dimensional predictive encoding device, and the configuration is such that the number of layers n is 2 and the number of vertical scanning lines of the television signal is an even number. If it is not an integer divided by the number of vertical scanning lines of the signal,
The input of the interframe extrapolation prediction circuits 113 and 114 in FIG. 1 will be supplied from the output of another predictive encoder.

Alternatively, this can be handled by resetting the distribution method every frame.

Effects of the Invention As described above, the present invention connects the outputs of n trees of an image signal distribution circuit to the inputs of n time axis expansion circuits, and calculates the outputs of the n time axis expansion circuits into n predictions, respectively. By connecting to the input of the encoding circuit, it is possible to increase the predictive encoding processing time to n times the sampling period, allowing prediction using the immediately preceding pixel even for signals with very short sampling periods such as high-definition television signals. It becomes possible to realize an encoding circuit, and therefore, image quality deterioration due to a decrease in prediction efficiency does not occur. Furthermore, even if the number of layers n is increased, the circuit configuration simply increases by n times, which is a very advantageous configuration when integrated into an IC or LSI.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a predictive encoding device according to a first embodiment of the present invention, FIG. 2 is a block diagram of a horizontal scanning line of a television signal to explain the operation of FIG. 1, and FIG. 3 is a block diagram of a horizontal scanning line of a television signal. FIG. 4 is a configuration diagram of a conventional two-dimensional predictive encoding device, FIG. 5 is an arrangement diagram of samples of a television signal, and FIG. FIG. 7 is a block diagram of a conventional three-dimensional predictive encoding device. FIG. 7 is an arrangement diagram of samples of a television signal for explaining the operation of FIG. 6. 103.104...Time axis expansion circuit, 107.
108...Quantization circuit, 111.112...
...Frame interpolation pre-value prediction circuit, 113.114.
・・・・・・Inter-frame extrapolation prediction circuit, 117.118・
...Switching control circuit, 119.120...
...Predictive encoding circuit, 302... Image signal distribution circuit, 303-306... Time axis expansion circuit, 3
07-310... Predictive encoding circuit, 311...
...Multiplexing circuit, 403...Quantization circuit,
405...1 sample delay circuit, 406...
・1 line delay circuit, 407...Prediction circuit, 4
08...Plane prediction circuit, 602...Pixel separation circuit, 603...Delay circuit, 606.6
07...Quantization circuit, 610゛...Frame interpolation previous value prediction circuit, 611...Intraframe interpolation prediction circuit, 612.613...・Interframe extrapolation prediction circuit, 616...Delay circuit, 6
17...Switching control circuit, 618...
・Multiplex circuit. Name of agent Patent attorney Toshio Nakao 1 person Figure 3 Figure 2 Ka picture 4 signal 7s Time opening axis expansion Gaka Figure 4 phrase / q child change mouth ■ - Toto ■ 1 seed tree 1 completion mortar

Claims (1)

[Claims] (1) In a predictive encoding device for a television signal, an input terminal of the television signal is connected to an image signal distribution circuit, and n outputs of the image signal distribution circuit are respectively input to n time axis expansion circuits. connected (n=2, 3, 4・
), the outputs of the n time axis expansion circuits are respectively connected to the inputs of the n predictive encoding circuits. (2) The predictive encoding device according to claim 1, wherein the outputs of the n predictive encoding circuits are connected to the inputs of the other n predictive encoding circuits.