JPH01108641A - Information processor - Google Patents

Abstract

PURPOSE:To constitute hardware flexible corresponding to a program to be executed by providing a program memory to store a data flow program outside a device. CONSTITUTION:A program storage part is bi-sected to two parts, a program attaching part 8 and a program memory part 9, and the program attaching part 8 is arranged in the device, and the program memory part 9 outside the device. Dotted line shown in Fig. shows a path used at the time of loading program data first on the program memory 13. An address is calculated from destination information similarly as a normal operation at an address calculation part 11, and data in an operand is sent to the program memory 13 as the program data via a data latch part 14. In such a way, it is possible to constitute the hardware flexibly corresponding to the program to be executed.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a data flow type information processing device.

<Prior Art> FIG. 6 shows a block diagram of a conventional data flow type information processing device.

In the figure, l stores a data flow program and reads out the destination light information and instruction information by addressing based on the contents of the destination field (destination light information) of the input data packet, as shown in FIG. , is a program storage unit that stores and outputs each piece of information in the destination field and command field of the input data bucket. 2) It waits for data packets input from the program storage unit 1, and outputs the destination optical information. matching 2
This is a paired data detection unit that stores operand data of one of the two data packets in the data field of the other data packet and outputs the same. 3 decodes the command information of the data packet input from the paired data detection unit 2, performs predetermined arithmetic processing on the two operand data, and stores the result in the data field of the input data packet. The above program storage section 1
This is an arithmetic processing unit that outputs data to As the data packet continues to circulate in the program storage unit 1 pair data detection unit 2 - arithmetic processing unit 3 - program storage unit 1 - . . . , arithmetic processing based on the program stored in the program storage unit 1 progresses.

FIG. 8 shows the functional configuration of the program storage section 1.

Reference numeral 4 denotes an input card data selection section, which holds current inbound light information. Command information is deleted. The operand here is operand data. Reference numeral 5 denotes an address calculation unit that calculates the address of the program memory 6 from the current optical information.

6 is a program memory for storing data flow programs. Reference numeral 7 denotes an output data launch unit that holds new optical information and command information obtained from the program memory 6. As for the operand data here, the operand data that has entered the input data latch section 4 is used as is.

FIG. 7 shows part of the contents stored in the program memory.

The stored contents consist of forward light information and command information, and are specified by a false address based on the current forward light information.

<Problems to be Solved by the Invention> In the conventional technology, the entire program instruction information reading section is located within the device (a section that is created in advance and cannot be added to or deleted), so it is difficult to store the entire program. It is necessary to install memory with a capacity of In this case,
Regardless of whether the device is made up of multiple semiconductor components or a single LSI, it is difficult to optimize the capacity of the program memory, and a flexible hardware configuration is required depending on the program to be executed. I can't take it.

The present invention aims to solve the above-mentioned problems in conventional devices.

Solution to the problem: Separate the program memory that stores the data flow program outside the device (a part that can be added/deleted), supply the program's optical information and command information from outside the device, The amount of space outside the device is variable depending on the capacity of the program.

<Example> Hereinafter, the present invention will be described in detail based on Examples.

FIG. 1 is a block diagram showing the functional configuration of a program storage section in a first embodiment of the present invention.

The program storage section is divided into two parts: a program assignment section 8 and a program memory section 90, and the program assignment section 8 is installed inside the device, and the program memory section 9 is installed outside the device.

Reference numeral 10 denotes an input differential launch section similar to 4 in FIG. 11 is an address calculation unit similar to 5 in FIG.

That is, if the destination light information does not directly point to an address, it is converted into an address as, for example, the destination light information x 2, destination informant correction value, etc. If the destination optical information is an address, the address calculation unit 11 is unnecessary. 12
is an address latch section placed outside the device. This part is necessary because the program memory 13 is placed outside the device. 13, similar to 6 in FIG. 8, is a program memory having the contents shown in FIG. 14 is a read data latch section placed outside the device.

This part is necessary because the program memory 13 is placed outside the device. When loading program data indicated by dotted lines, it functions as a data latch in the opposite direction. 15 is an output data latch section similar to 7 in FIG.

The dotted line in the figure is a path used when initially loading program data into the program memory 13. The address is calculated by the address calculation section 11 as usual from the forward light information, and the data in the operand is sent to the program memory 13 via the data latch section 14 as program data.

In this case, it is also possible to place the address calculation unit 11 outside the device and omit the address latch unit 12 (the address calculation unit also has a data latch to prevent data from changing while calculating the address). include). Second
The figure shows an example in that case.

This concludes the description of the first embodiment.

Next, a second embodiment of the present invention will be described.

FIG. 3 is a block diagram showing the functional configuration of the program storage section in the same embodiment.

In the figure, 16 is a program providing section (inside the device), 17
is the program memory section (outside the device).

In this embodiment, addresses are calculated not from the input data launch section 18 but from the output data launch section 19.

In the figure, reference numeral 20 is an address calculation unit similar to 11 in FIG. 21F/'i is an address latch section placed outside the device, similar to 12 in FIG.

22 is a program memory similar to 13 in FIG. 23 is a read data latch section placed outside the device, similar to 14 in FIG. When loading program data indicated by dotted lines, it functions as a data latch in the opposite direction. The dotted line in the figure shows the path used when loading program data into the program memory 22 for the first time. The address is determined by the address calculation unit 2 in the same way as usual from the destination optical information.
0 and the data in the operand is sent to the program memory 22vc via the data latch section 23 as program data. However, when loading the program, the forward light information in the input data latch section 18 is used.

As in FIG. 2, the address calculation unit 20 is placed outside the device, and -
It is possible to omit the address latch section 21. FIG. 4 shows an embodiment in that case.

As for the order of processing, first, as an initial state, at the same time as the program data is loaded, initial value forwarding light information and instruction information are stored in the program memory 22 in advance, and by outputting them, the output data latch section 19 is loaded. New destination light information and command information are stored. The data in the output data latch section 19 waits in the output data latch section 19 until the input data is input to the input data latch section 18 .

Next, when the input data latch unit 18vc data packet arrives, only the operand data thereof is immediately sent to the output data latch unit 19, and the already waiting optical information and command information are obtained and output. At the same time, the forward light information is sent to the address calculation section 20, converted into a program memory address, and inputted to the address launch section 21.

From the address set in address latch section 21VC,
The contents of the program memory 22, that is, the forward light information and command information, are read out and set in the data latch unit 23. The forward light information and command information of the data latch section 23 are sent to the output data latch section 19 and set therein. In this way, the process proceeds along the path 19→2°→21-22→23-19.

This is 10-11-12-13→14 in the case of Figure 1.
→The access time is exactly the same as in 15.

However, the process shown in FIG.
-19) Paired data detection unit - Since the program arithmetic processing that proceeds with the arithmetic processing unit and the program memory access processing proceed in parallel, the access speed to memory will be impaired unless the access speed is lower than the internal processing. It will never be.

FIG. 5 shows the difference in access methods between the two embodiments of the present invention.

(1) is the first example, (2) is the second example,
As is clear from the figure, the processing loop runs faster in the second embodiment than in the conventional device.

<Effects of the Invention> As described in detail above, according to the present invention, the data flow type information processing device is provided with a program memory for storing data flow programs outside the device, so that execution It is possible to obtain an extremely useful information processing device that can have a flexible hardware configuration according to the program.

[Brief explanation of the drawing]

1 to 4 are block diagrams showing the functional configuration of the program storage unit in the embodiment of the present invention, FIG. 5 is a diagram showing the difference in access methods between the two embodiments of the present invention, and FIG. 6 7 is a block diagram of a conventional information processing device, FIG. 7 is a diagram showing a part of the storage contents in the program storage section, and FIG. 8 is a block diagram showing the functional configuration of the program storage section in the conventional information processing device. It is a diagram. Explanation of symbols s, 8' Niprogram program attaching section, 91 9' Niprogram program memory section, 10: Input data latch section, 11 Near trace calculation section, 12 Near address latch section, 13 Ni program memory, 14: Data latch section, 15: Output data latch section, 16.16" Niprogramming section, 17.17'
Niprogram memory section, 18: Input data latch section, 1
9: Output data latch section, 20 Near address calculation section, 21
Near address latch section, 22 nib program memory, 23:
Data latch section.

Claims (1)

[Claims] 1. An information processing device of data flow type, characterized in that a program memory for storing a data flow program is provided outside the device.