JP7353765B2 - Photodetection device, photodetection system, and moving object - Google Patents

Description

The present invention relates to a photodetection device, a photodetection system, and a moving object.

2. Description of the Related Art Conventionally, photodetection devices that utilize avalanche (electron avalanche) multiplication and can detect weak light at the single photon level are known. Patent Document 1 discloses a photoelectric conversion element having a light receiving section in which pixels including avalanche photodiodes are arranged in a two-dimensional array. The output currents from each pixel are collectively collected and photon counting is performed. Thereby, the photoelectric conversion element of Patent Document 1 can measure a weak amount of incident light. In the photoelectric conversion element of Patent Document 1, one quench element is connected in series to one avalanche photodiode.

Japanese Patent Application Publication No. 2017-117835

In a structure such as that described in Patent Document 1, if the performance of some quench elements is significantly different from that of other quench elements, the accuracy of the output signal may become insufficient. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a photodetection device with improved accuracy of output signals.

According to one aspect of the present invention, a plurality of avalanche diodes, a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes, and a signal output from each of the plurality of avalanche diodes are added together. The pixel signal processing unit includes a pixel signal processing unit that processes a signal, and a plurality of switch elements corresponding to each of the plurality of avalanche diodes, and one of the quench elements is connected in series with the plurality of avalanche diodes. The plurality of avalanche diodes and the quench element are formed on the same substrate, and the quench element has two avalanche diodes of the plurality of avalanche diodes formed in a planar view from a direction perpendicular to the substrate. each of the plurality of switch elements is connected between a corresponding avalanche diode and the quench element, and the plurality of switch elements are turned on at mutually different timings. Accordingly, there is provided a photodetection device characterized in that the plurality of avalanche diodes output signals to the pixel signal processing section at mutually different timings .
According to another aspect of the present invention, the signal obtained by adding together a plurality of avalanche diodes, a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes, and a signal output from each of the plurality of avalanche diodes is obtained. a pixel signal processing unit that processes a signal received by the user, and a plurality of switch elements corresponding to each of the plurality of avalanche diodes, one of the quench elements being connected in series with the plurality of avalanche diodes. The plurality of avalanche diodes and the quench element are formed on the same substrate, and the first region includes one of the plurality of avalanche diodes and the second region includes the quench element. regions are arranged on the substrate in a matrix with a plurality of rows and a plurality of columns, each of the plurality of switch elements is connected between a corresponding avalanche diode and the quench element, A photodetection device is provided, wherein the plurality of switch elements are turned on at different timings, so that the plurality of avalanche diodes output signals to the pixel signal processing section at different timings. .
According to another aspect of the present invention, the signal obtained by adding together a plurality of avalanche diodes, a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes, and a signal output from each of the plurality of avalanche diodes is obtained. a pixel signal processing unit that processes the signal, one of the quench elements is connected in series to the plurality of avalanche diodes, and the plurality of avalanche diodes and the quench element are the same. a first region including one of the plurality of avalanche diodes and a second region including the quench element forming a plurality of rows and a plurality of columns on the substrate. Provided is a photodetecting device further comprising avalanche diodes arranged in a matrix, the second region having a smaller area than the avalanche diode included in the first region. .
According to another aspect of the present invention, the signal obtained by adding together a plurality of avalanche diodes, a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes, and a signal output from each of the plurality of avalanche diodes is obtained. a pixel signal processing unit that processes the signal, one of the quench elements is connected in series to the plurality of avalanche diodes, and the plurality of avalanche diodes and the quench element are the same. a first region including one of the plurality of avalanche diodes and a second region including the quench element forming a plurality of rows and a plurality of columns on the substrate. There is provided a photodetecting device characterized in that the photodetecting device is arranged in a matrix, and the second region does not include an avalanche diode.
According to another aspect of the present invention, the signal obtained by adding together a plurality of avalanche diodes, a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes, and a signal output from each of the plurality of avalanche diodes is obtained. a pixel signal processing unit that processes a signal received by the user, and a plurality of switch elements corresponding to each of the plurality of avalanche diodes, one of the quench elements being connected in series with the plurality of avalanche diodes. The plurality of avalanche diodes are formed on a first substrate, the quench element is formed on a second substrate different from the first substrate , and the plurality of switch elements are formed on a second substrate. Each of the avalanche diodes is connected between the corresponding avalanche diode and the quench element, and by turning on the plurality of switch elements at mutually different timings, the plurality of avalanche diodes are connected to the pixel at different timings. A photodetection device is provided that outputs a signal to a signal processing section .

A photodetection device with improved output signal accuracy can be provided.

FIG. 1 is a block diagram showing a schematic configuration of a photodetection device according to a first embodiment. FIG. 2 is a circuit diagram showing an example of the configuration of a pixel according to the first embodiment. FIG. 2 is a circuit diagram illustrating a configuration example of a quench element according to the first embodiment. 1 is a diagram illustrating a configuration example of a photoelectric conversion element according to a first embodiment; FIG. FIG. 3 is a diagram showing a configuration example of a photoelectric conversion element according to a comparative example of the first embodiment. It is a graph showing the potential of each node in a comparative example of the first embodiment. It is a graph showing the potential of each node in a comparative example of the first embodiment. It is a graph showing the potential of each node in the first embodiment. FIG. 7 is a schematic diagram showing an example of the configuration of a pixel according to a second embodiment. FIG. 7 is a schematic diagram showing a configuration example of a pixel according to a third embodiment. FIG. 7 is a schematic diagram showing a configuration example of a pixel according to a fourth embodiment. FIG. 7 is a schematic diagram showing an example of the configuration of a pixel according to a fifth embodiment. FIG. 7 is a schematic cross-sectional view of a photoelectric conversion unit according to a sixth embodiment. FIG. 7 is a potential diagram of a photoelectric conversion unit according to a sixth embodiment. It is a figure showing the example of composition of the photoelectric conversion element concerning a 6th embodiment. 12 is a timing chart showing a method for driving a photoelectric conversion element according to a sixth embodiment. It is a block diagram of a photodetection system concerning a 7th embodiment. It is a block diagram of a photodetection system concerning an 8th embodiment. It is a figure showing an example of composition of a photodetection system and a mobile object concerning an 8th embodiment.

Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. Corresponding elements across multiple drawings may be designated by common reference numerals, and their descriptions may be omitted or simplified.

[First embodiment]
A photodetection device according to a first embodiment will be described with reference to FIGS. 1 to 8. FIG. 1 is a block diagram showing a schematic configuration of a photodetecting device 1010 according to this embodiment. The photodetector 1010 includes a vertical scanning circuit section 103, a horizontal scanning circuit section 104, a column circuit 105, a pixel section 106, a signal line 107, an output circuit 108, and a control pulse generation section 109.

The pixel section 106 includes a plurality of pixels 100 arranged in a matrix. The pixel 100 includes a photoelectric conversion element 101 and a pixel signal processing section 102. The photoelectric conversion element 101 photoelectrically converts incident light into an electrical signal. The pixel signal processing unit 102 outputs the converted electrical signal to the column circuit 105.

Note that in this specification, "light" may include electromagnetic waves of any wavelength. That is, "light" is not limited to visible light, but may include invisible light such as infrared rays, ultraviolet rays, X-rays, and gamma rays.

The control pulse generation section 109 generates control pulses for driving the vertical scanning circuit section 103, the horizontal scanning circuit section 104, and the column circuit 105, and supplies them to each of these sections. Thereby, the control pulse generation section 109 controls the drive timing of each section, etc.

The vertical scanning circuit section 103 supplies a control pulse to each of the plurality of pixels 100 based on the control pulse supplied from the control pulse generation section 109. As shown in FIG. 1, the vertical scanning circuit section 103 supplies control pulses to each pixel 100 on a row-by-row basis via drive lines provided for each row of the pixel section 106. Logic circuits such as a shift register and an address decoder may be used for the vertical scanning circuit section 103.

A signal line 107 provided for each column of the pixel section 106 transmits the signal output from the pixel 100 in the row selected by the vertical scanning circuit section 103 to the column circuit 105 at the subsequent stage of the pixel 100 as a potential signal. The column circuit 105 performs predetermined processing on the signal of each pixel 100 input via the signal line 107. The predetermined processing is, for example, processing such as noise removal, amplification, and output format conversion of the input signal. In order to realize these functions, the column circuit 105 may include a parallel-to-serial conversion circuit or the like.

The horizontal scanning circuit unit 104 supplies control pulses to the column circuit 105 for sequentially outputting signals that have been subjected to predetermined processing to the output circuit 108 based on the control pulses supplied from the control pulse generation unit 109. The output circuit 108 includes a buffer amplifier, a differential amplifier, etc., and outputs the signal output from the column circuit 105 to a recording section or a signal processing section outside the photodetecting device 1010.

In FIG. 1, the pixels 100 within the pixel unit 106 may be arranged in a one-dimensional manner, or there may be only one pixel 100. When the pixel 100 in the pixel section 106 is divided into several blocks, a plurality of vertical scanning circuit sections 103, horizontal scanning circuit sections 104, and column circuits 105 are arranged corresponding to each block. Good too. Moreover, the horizontal scanning circuit section 104 and the column circuit 105 may be arranged for each column.

It is not essential that one pixel signal processing unit 102 be provided for each pixel 100. For example, one pixel signal processing unit 102 may be shared by a plurality of pixels 100. In this case, the pixel signal processing unit 102 provides a signal processing function to each pixel by sequentially processing the signals output from each photoelectric conversion element 101.

Further, the pixel signal processing unit 102 may be provided on a semiconductor substrate different from the semiconductor substrate on which the photoelectric conversion element 101 is provided. In this case, sensitivity can be improved by increasing the ratio of the light-receiving area (aperture ratio) of the photoelectric conversion element 101. In this case, the photoelectric conversion element 101 and the pixel signal processing unit 102 are electrically connected via a connection wiring provided for each pixel 100. Furthermore, like the pixel signal processing section 102, the vertical scanning circuit section 103, horizontal scanning circuit section 104, column circuit 105, and signal line 107 are also provided on a semiconductor substrate different from the semiconductor substrate on which the photoelectric conversion element 101 is provided. You can leave it there.

FIG. 2 is a circuit diagram showing a configuration example of the pixel 100 according to this embodiment. The pixel 100 has a photoelectric conversion element 101 and a pixel signal processing section 102. The photoelectric conversion element 101 includes four photoelectric conversion sections 201a, 201b, 201c, and 201d and a quench element 202. The four photoelectric conversion units 201a, 201b, 201c, and 201d are connected in parallel to each other. Note that the number of photoelectric conversion units included in one pixel 100 is not limited to four, but may be a plurality. Furthermore, in the following description, the four photoelectric conversion units 201a, 201b, 201c, and 201d may be collectively referred to as the photoelectric conversion unit 201.

The photoelectric conversion units 201a to 201d generate charge pairs according to incident light by photoelectric conversion. Avalanche diodes are used in the photoelectric conversion units 201a to 201d. A potential VL is supplied to the anodes of the photoelectric conversion units 201a to 201d. The cathodes of the photoelectric conversion units 201a to 201d are connected to one end of the quench element 202. The other end of the quench element 202 is supplied with a potential VH higher than the potential VL.

Here, a reverse bias potential that can cause avalanche multiplication of the charges generated in the photoelectric conversion units 201a to 201d is supplied to the anodes and cathodes of the photoelectric conversion units 201a to 201d. When charges generated by incident light pass through the avalanche multiplication region while such a reverse bias potential difference is supplied, an avalanche current is generated.

Note that when a reverse bias potential difference is supplied and the potential difference between the anode and the cathode is larger than the breakdown voltage of the avalanche diode, the avalanche diode operates in Geiger mode. A photodiode that detects weak signals at the single photon level at high speed in Geiger mode is called a SPAD.

Furthermore, if the potential difference between the anode and cathode of the photoelectric conversion units 201a to 201d is greater than or equal to the potential difference that causes avalanche multiplication and less than the breakdown voltage, the avalanche diode is Operates in linear mode. An avalanche diode that performs photodetection in linear mode is called an avalanche photodiode (APD). In this embodiment, the photoelectric conversion units 201a to 201d may operate as either SPAD or APD avalanche diodes.

The quench element 202 has a function of converting changes in avalanche currents generated in the photoelectric conversion units 201a to 201d into voltage signals. Furthermore, the quench element 202 functions as a load circuit (quench circuit) during signal amplification by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the photoelectric conversion units 201a to 201d. quench operation). Specific examples of the circuit elements constituting the quench element 202 include a resistance element or an active quench circuit. The active quench circuit actively suppresses avalanche multiplication by detecting an increase in avalanche current and performing feedback control.

The pixel signal processing section 102 includes a waveform shaping section 203, a selection circuit 206, and a counter circuit 209. When the signal voltage at the single photon level is input from the photoelectric conversion element 101, the waveform shaping section 203 shapes the voltage change and outputs a pulse signal. A specific example of the circuit element that constitutes the waveform shaping section 203 is an inverter circuit. Although FIG. 2 shows a circuit configuration in which one inverter circuit is provided as the waveform shaping section 203, other circuits may be used as long as they have a waveform shaping effect. For example, the waveform shaping section 203 may be a circuit in which a plurality of inverter circuits are connected in series.

The counter circuit 209 counts the number of pulses of the pulse signal output from the waveform shaping section 203. The counter circuit 209 may be, for example, an N-bit counter (N: positive integer). In this case, the counter circuit 209 can count the number of pulses up to approximately 2 to the N power. The count number is held in the counter circuit 209 as a detection signal. Furthermore, a control pulse pRES can be supplied to the counter circuit 209 from the vertical scanning circuit section 103 shown in FIG. 1 via the drive line 207. When the control pulse pRES is supplied to the counter circuit 209, the held count number is reset.

The selection circuit 206 switches between electrical connection and disconnection between the counter circuit 209 and the signal line 107. A control pulse pSEL is supplied to the selection circuit 206 from the vertical scanning circuit section 103 shown in FIG. 1 via a drive line 208. When the control pulse pSEL is supplied to the selection circuit 206, electrical connection or disconnection between the counter circuit 209 and the signal line 107 is switched depending on the level of the control pulse pSEL. The selection circuit 206 may include, for example, a transistor, a buffer circuit for outputting a signal to the outside of the pixel 100, and the like. When the counter circuit 209 and the signal line 107 are electrically connected, a digital signal indicating the count value of the detection signal held in the counter circuit 209 is transmitted to the signal line 107.

Note that instead of the selection circuit 206, a switch such as a transistor may be provided at a node between the quench element 202 and the photoelectric conversion units 201a to 201d, between the photoelectric conversion element 101 and the pixel signal processing unit 102, etc. good. In this case as well, the same function as the selection circuit 206 can be realized by switching between connection and disconnection of the switch. Similarly, the same function as the selection circuit 206 can be realized by switching whether or not the potential is supplied to the quench element 202 or the photoelectric conversion element 101 using a switch such as a transistor.

Each pixel 100 of the pixel section 106 may be driven by a rolling shutter operation or a global electronic shutter operation. The signal acquired from each pixel 100 may be used to generate an image based on the light incident on the pixel portion 106.

The rolling shutter operation is an operation in which a count value in the counter circuit 209 is reset and a signal is output from the counter circuit 209 in sequence at different timings for each row. The global electronic shutter operation is an operation in which the counts in the counter circuits 209 of all rows are reset at the same time, and then the signals held in the counter circuits 209 are sequentially output for each row.

Note that when a global electronic shutter operation is performed, it is preferable to further add means for switching whether or not the counter circuit 209 performs counting in order to make the time for counting pulses the same for each row. The means for switching whether or not to perform counting may be, for example, a switch such as a transistor.

Further, instead of the counter circuit 209, a time to digital converter (hereinafter referred to as TDC) and a memory may be provided. In this case, the photodetector 1010 can acquire the timing at which the pulse was detected.

In this modification, the generation timing of the pulse signal output from the waveform shaping section 203 is converted into a digital signal by the TDC. A control pulse pREF is supplied to the TDC from the vertical scanning circuit unit 103 via a drive line as a reference signal used to measure the timing of the pulse signal. The TDC acquires a digital signal corresponding to the input time of the pulse from the waveform shaping section 203 using the control pulse pREF as a time reference.

For the TDC circuit, for example, a delay line method in which a delay circuit is formed using a delay line in which buffer circuits are connected in series, a looped TDC method in which a circuit in which delay lines are connected in a loop, etc. can be used. Although other methods may be used for the TDC circuit, in order to ensure sufficient time resolution, it is preferable to use a method that can achieve a time resolution equal to or higher than that of the photoelectric conversion units 201a to 201d.

The digital signals acquired by the TDC are held in one or more memories. When there are a plurality of memories, by supplying a plurality of control pulses pSEL to the selection circuit 206, it is possible to selectively output a signal from one of the plurality of memories to the signal line 107.

3(a), FIG. 3(b), and FIG. 3(c) are circuit diagrams illustrating some configuration examples of the quench element 202. FIG. 3A is a circuit diagram showing a configuration example in which a resistance element having a resistance value R is disposed as the quench element 202 on the cathode side of the photoelectric conversion unit 201. The connection relationships among the photoelectric conversion section 201, quench element 202, and waveform shaping section 203 are the same as those in FIG. 2, and therefore the description thereof will be omitted. Further, FIG. 3A shows the PN junction capacitance C _PD of the photoelectric conversion section 201, the well capacitance C _w of the photoelectric conversion section 201, and the parasitic capacitance C of the wiring and the diffusion layer. Vsub shown in FIG. 3(a) indicates the substrate potential.

The PN junction capacitance _CPD of the photoelectric conversion unit 201 is a capacitance in a detection region where a strong electric field is induced to cause avalanche multiplication. Therefore, the PN junction capacitance C _PD is proportional to the area of the detection region.

In the configuration of FIG. 3A, it takes a certain amount of time after the input potential of the waveform shaping section 203 changes due to the avalanche current until the bias of the photoelectric conversion section 201 returns to the initial state due to the voltage drop caused by the quench element 202. is necessary. The time from when the photoelectric conversion element 101 detects a charge once until it returns to a state in which it can detect a charge the next time is called dead time. The shorter the dead time, the greater the number of charges that can be counted per unit time, and the greater the dynamic range of the photodetector 1010.

The dead time τ _d of the photoelectric conversion element 101 in the configuration example of FIG. 3(a) is determined by the following equation (1).

FIG. 3B is a circuit diagram showing a configuration example in which a resistance element having a resistance value R is arranged as the quench element 202 on the anode side of the photoelectric conversion unit 201. In this example, the potential VH is supplied to the cathode of the photoelectric conversion unit 201. The anode of the photoelectric conversion unit 201 is connected to one end of the quench element 202. The other end of the quench element 202 is supplied with a potential VL lower than the potential VH.

The dead time τ _d of the photoelectric conversion element 101 in the configuration example of FIG. 3(b) is determined by the following equation (2).

FIG. 3C is a circuit diagram showing a configuration example in which a switch is arranged as the quench element 202 on the cathode side of the photoelectric conversion unit 201. The quench element 202 is configured to be controlled into an on state or an off state by a quench element control section 210. The quench element control unit 210 delays the pulse output from the waveform shaping unit 203 and outputs the delayed pulse. Thereby, the quench element control unit 210 is configured to control the quench element 202 to be in an off state immediately after avalanche multiplication occurs. According to this configuration example, since the quench operation is actively performed, the dead time can be shortened compared to the case where a passive element is used as the quench element 202.

FIGS. 4A and 4B are diagrams showing an example of the configuration of the photoelectric conversion element 101 according to this embodiment. FIG. 4A is a schematic plan view from a direction perpendicular to the semiconductor substrate on which the photoelectric conversion element 101 and the pixel signal processing unit 102 are formed. FIG. 4(b) is a circuit diagram of the photoelectric conversion element 101.

As shown in FIG. 4A, one pixel 100 is provided with four photoelectric conversion units 201a, 201b, 201c, and 201d. The four photoelectric conversion units 201a, 201b, 201c, and 201d are arranged in a matrix with two rows and two columns. The pixel signal processing section 102 is arranged near the center of the four photoelectric conversion sections 201a, 201b, 201c, and 201d. The quench element 202 is arranged between the two photoelectric conversion sections 201a and 201c.

In this manner, in this embodiment, the four photoelectric conversion units 201a, 201b, 201c, and 201d, the pixel signal processing unit 102, and the quench element 202 are formed on the same surface of the same semiconductor substrate. This allows manufacturing costs to be reduced compared to the case where these are formed on separate substrates. This area reduction effect is greater when the quench element 202 is an active quench circuit as shown in FIG. 3(c) than when it is a passive element such as a resistive element. This is because an active quench circuit generally has a larger element area than a passive element.

As shown in FIG. 4(b), one quench element 202 is connected in series to four photoelectric conversion units 201a, 201b, 201c, and 201d. At the node 221 where the quench element 202 and the photoelectric conversion units 201a, 201b, 201c, and 201d are connected, the wirings extending from the cathodes of the four photoelectric conversion units 201a, 201b, 201c, and 201d are bundled into one.

FIGS. 5A and 5B are diagrams showing a configuration example of a photoelectric conversion element 101 according to a comparative example of this embodiment. FIG. 5A is a schematic plan view from a direction perpendicular to the semiconductor substrate on which the photoelectric conversion element 101 and the pixel signal processing unit 102 are formed. FIG. 5(b) is a circuit diagram of the photoelectric conversion element 101.

The comparative example shown in FIGS. 5(a) and 5(b) is different from FIGS. 4(a) and 4(b) in that four quench elements 231a, 231b, 231c, and 231d are provided. It is a point. Four quench elements 231a, 231b, 231c, and 231d are provided corresponding to four photoelectric conversion units 201a, 201b, 201c, and 201d, respectively. The four quench elements 231a, 231b, 231c, and 231d are connected in series to the four photoelectric conversion units 201a, 201b, 201c, and 201d, respectively.

In the configuration of this embodiment shown in FIGS. 4(a) and 4(b), the quench element 202 connected in series to the four photoelectric conversion units 201a, 201b, 201c, and 201d is unified into one. ing. This makes it possible to reduce the influence on the accuracy of the output signal caused by variations in performance of the quench elements 231a, 231b, 231c, and 231d that may occur in the comparative examples shown in FIGS. 5(a) and 5(b). can. This effect will be explained in more detail with reference to FIG. 6(a), FIG. 6(b), FIG. 7(a), FIG. 7(b), FIG. 8(a), and FIG. 8(b).

FIGS. 6A and 6B are graphs showing the potential of each node in a comparative example of this embodiment. The horizontal axis of each graph represents time, and the vertical axis represents potential. Note that in this specification, the units of the axes of each graph are arbitrary, and the scales of the graphs do not match. FIG. 6(a) is a graph showing changes in the potentials of nodes 232a, 232b, 232c, and 232d when one photon is incident on each of the four photoelectric conversion units 201a, 201b, 201c, and 201d at different timings. It is. The graphs of nodes 232a, 232b, 232c, and 232d are shown shifted in the vertical direction so that they do not overlap. Figure 6(a) shows that the potential of each node decreases at the timing when a photon enters each photoelectric conversion unit, and then returns to the original potential due to a quench operation after a predetermined time (dead time) has elapsed. There is.

FIG. 6(b) is a graph showing changes in the potential of the node 233 when photons are incident on the four photoelectric conversion units 201a, 201b, 201c, and 201d at the timing shown in FIG. 6(a). Since one photon is incident on each of the four photoelectric conversion units 201a, 201b, 201c, and 201d, the potential of the node 233, which is the potential obtained by adding and averaging these, drops four times.

The broken line in FIG. 6B indicates the potential level of the logic determination threshold VT when counting potential changes in the pixel signal processing unit 102. The counter circuit 209 counts the number of times the potential changes from a state higher than the logic judgment threshold VT to a state lower than the logic judgment threshold VT across the logic judgment threshold VT. Since the number of times the potential of the node 233 falls below the logic determination threshold VT is four, the count number counted by the counter circuit 209 is four. This count matches the total number of incident photons, and the pixel signal processing unit 102 outputs an appropriate value.

However, if any one of the quench elements 231a, 231b, 231c, and 231d cannot perform ideal operation, the waveform of the potential at the node 233 will be different from that shown in FIG. 6(b). Become. 7(a) and 7(b) show graphs showing the potential of each node when the effective resistance value of the quench element 231b is larger than the other quench elements 231a, 231c, and 231d. There is. In FIGS. 7A and 7B, the timing of incidence of photons on the four photoelectric conversion units 201a, 201b, 201c, and 201d is the same as in FIGS. 6A and 6B.

In FIG. 7(a), changes in the potentials of nodes 232a, 232c, and 232d are similar to those shown in FIG. 6(a). However, for the node 232b, it takes a long time for the potential to return to its original level after the potential decreases. The reason for this is that since the effective resistance value of the quench element 231b is large, the time constant of the circuit becomes large, and the dead time τ _d shown in the above equation (1) or equation (2) becomes large. .

In this case, the potential of the node 233 is as shown in FIG. 7(b). The number of times that the potential of the node 233 crosses and falls below the logic determination threshold VT is two. Therefore, the count number counted by the counter circuit 209 is two. As described above, in the comparative example, the amount of potential drop at the time when a photon is incident on the photoelectric conversion units 201c and 201d is not counted due to the effect that it takes a long time for the potential drop at the node 232b to recover. As described above, in the comparative example, the count number does not match the total number of incident photons, and the accuracy of the value output from the pixel signal processing unit 102 may decrease.

In the configuration of this embodiment shown in FIGS. 4A and 4B, four photoelectric conversion units 201a, 201b, 201c, and 201d are connected in series to one quench element 202. In this case, since there is only one quench element 202, accuracy deterioration due to performance variations between different quench elements does not occur. The potential of each node in this case is shown in FIGS. 8(a) and 8(b). In FIGS. 8A and 8B, the timing of incidence of photons on the four photoelectric conversion units 201a, 201b, 201c, and 201d is the same as in FIGS. 6A and 6B.

FIG. 8(a) is a graph showing changes in the potential at the node 221 in FIG. 4(a). The four photoelectric conversion units 201a, 201b, 201c, and 201d are connected to the quench element 202 in a state where the output potentials are averaged on the wiring. Therefore, the number of times the potential drops matches the number of photons incident on the photoelectric conversion units 201a, 201b, 201c, and 201d.

FIG. 8(b) is a graph showing changes in the potential at the node 222 in FIG. 4(a). In this configuration, the node 222 has the same potential as the node 221, so FIG. 8(b) has the same waveform as FIG. 8(a). Therefore, the number of times the potential of the node 222 falls below the logic determination threshold VT is four, and the number of counts counted by the counter circuit 209 is four. This count matches the total number of incident photons, and the pixel signal processing unit 102 outputs an appropriate value.

As described above, in this embodiment, the four photoelectric conversion units 201a, 201b, 201c, and 201d are connected in series to one quench element 202. Therefore, accuracy deterioration due to performance variations between different quench elements does not occur. Therefore, according to this embodiment, a photodetection device 1010 with improved output signal accuracy is provided.

Furthermore, in this embodiment, since one quench element 202 is provided for the four photoelectric conversion units 201a, 201b, 201c, and 201d, the quench element 202 is provided for each photoelectric conversion unit. The number of elements can be reduced. Therefore, the element area required for arranging the quench element can be reduced, and by allocating that element area to the area of the photoelectric conversion section, the detection sensitivity of the photodetector 1010 can be improved.

[Second embodiment]
In the first embodiment, as shown in FIG. 4A, the four photoelectric conversion units 201a, 201b, 201c, and 201d, the pixel signal processing unit 102, and the quench element 202 are located on the same semiconductor substrate. formed on the surface. In contrast, in this embodiment, four photoelectric conversion units 201a, 201b, 201c, and 201d are formed on the first substrate 500, and the pixel signal processing unit 102 and the quench element 202 are different from the first substrate 500. An example of formation on the second substrate 600 will be described.

FIG. 9 is a schematic diagram showing a configuration example of the pixel 100 according to this embodiment. As shown in FIG. 9, the photodetector 1010 of this embodiment includes a first substrate 500 and a second substrate 600. Four photoelectric conversion units 201a, 201b, 201c, and 201d are formed on the first substrate 500. The pixel signal processing section 102 and the quench element 202 are formed on the second substrate 600.

The first substrate 500 has electrodes 501a to 501d, and the second substrate 600 has electrodes 601a to 601d. Electrodes 501a to 501d and electrodes 601a to 601d are electrically connected to each other. As a result, a circuit configuration similar to that of the first embodiment is realized.

In this embodiment as well, a photodetection device 1010 with improved output signal accuracy is provided, as in the first embodiment. Furthermore, by forming the pixel signal processing section 102 and the quench element 202 on a separate substrate from the photoelectric conversion sections 201a, 201b, 201c, and 201d, the area of the photoelectric conversion sections 201a, 201b, 201c, and 201d can be increased. . This increases the light-receiving area, so the detection sensitivity of the photodetector 1010 can be improved.

On the other hand, in this embodiment, compared to the case of the first embodiment, manufacturing costs increase due to reasons such as an increase in the number of substrates. Therefore, if cost reduction is a priority, the configuration of the first embodiment may be more desirable.

[Third embodiment]
In the first embodiment, as shown in FIG. 4(a), the four photoelectric conversion units 201a, 201b, 201c, and 201d have the same area. In contrast, in this embodiment, an example will be described in which the area of the photoelectric conversion section 201a is smaller than the area of the photoelectric conversion sections 201b, 201c, and 201d.

FIG. 10 is a schematic diagram showing a configuration example of the pixel 100 according to this embodiment. In this embodiment, the area of the photoelectric conversion section 201a is smaller than the area of the photoelectric conversion sections 201b, 201c, and 201d. Assuming that the area where one of the photoelectric conversion units 201b, 201c, and 201d is arranged is a first area, and the area where the photoelectric conversion unit 201a is arranged is a second area 700, the first area and the first area are The second area 700 is arranged in a matrix. In the second region 700, a photoelectric conversion section 201a, a quench element 202, and a pixel signal processing section 102 are arranged. With this configuration, the area of the photoelectric conversion units 201b, 201c, and 201d can be increased compared to the first embodiment, and the detection sensitivity of the photodetector 1010 can be improved.

Note that the area of the photoelectric conversion unit 201a may be smaller than that in the first embodiment. However, by optimizing the design of the optical system such as a microlens provided on the photoelectric conversion unit 201a and focusing the incident light on the light receiving area of the photoelectric conversion unit 201a, the decrease in sensitivity due to the reduction in area can be compensated for. can do.

[Fourth embodiment]
In the first embodiment, one quench element 202 is connected to four photoelectric conversion units 201a, 201b, 201c, and 201d, as shown in FIG. 4(a). In contrast, in this embodiment, an example will be described in which two quench elements 202a and 202b are connected to four photoelectric conversion units 201a, 201b, 201c, and 201d.

FIG. 11 is a schematic diagram showing a configuration example of the pixel 100 according to this embodiment. The pixel 100 of this embodiment includes two quench elements 202a and 202b and two pixel signal processing units 102a and 102b. The two photoelectric conversion units 201a and 201c are connected to one quench element 202a and the pixel signal processing unit 102a. The two photoelectric conversion units 201b and 201d are connected to one quench element 202b and the pixel signal processing unit 102b. In this way, in this embodiment, one quench element, two photoelectric conversion sections, and one pixel signal processing section are arranged in one region, and this region is arranged on the semiconductor substrate. Multiple pieces are arranged.

In the first embodiment, the configuration is such that the signals obtained by four photoelectric conversion units are added together for detection, whereas in this embodiment, the signals obtained by two photoelectric conversion units are added together for detection. It is the composition. As a result, two signals are obtained from one pixel 100 in this embodiment. Therefore, compared to the configuration of the first embodiment, the spatial resolution of the image acquired by the photodetector 1010 is improved.

Note that the photoelectric conversion units 201a, 201b, 201c, and 201d of this embodiment may have a smaller area than those of the first embodiment. However, similarly to the third embodiment, by optimizing the design of the optical system such as a microlens and focusing the incident light on the light receiving area, it is possible to compensate for the decrease in sensitivity due to the reduction in area.

[Fifth embodiment]
In the first embodiment, as shown in FIG. 4(a), one quench element 202 is arranged between two photoelectric conversion units 201a and 201c. In contrast, in this embodiment, an example will be described in which one quench element 202 is arranged in the second region 701 in the center of the first region where each of the eight photoelectric conversion units 201a to 201h is arranged. .

FIG. 12 is a schematic diagram showing a configuration example of the pixel 100 according to this embodiment. The pixel 100 of this embodiment has eight photoelectric conversion units 201a to 201h. The center of the first area where each of the eight photoelectric conversion units 201a to 201h is arranged is a second area 701 in which no photoelectric conversion unit is provided. The first region and the second region 701 are arranged in a matrix with three rows and three columns. In the second region 701, the pixel signal processing section 102 and the quench element 202 are arranged.

In the configuration of the first embodiment, when the area of the photoelectric conversion section is small, the photoelectric conversion section, the quench element 202, and the pixel signal processing section 102 can be arranged in a matrix within one area within the pixel 100. It becomes difficult. In this embodiment, layout design is facilitated by arranging only the quench element 202 and the pixel signal processing unit 102 without arranging the photoelectric conversion unit in the second region 701.

[Sixth embodiment]
13(a), FIG. 13(b), and FIG. 13(c) are diagrams schematically showing the cross-sectional structure of the photoelectric conversion section 2070. As shown in FIGS. 13(a), 13(b), and 13(c), the photoelectric conversion section 2070 includes an N-type semiconductor region 2001, a P-type semiconductor region 2002, and an N-type semiconductor region formed on a semiconductor substrate. 2003 and an N-type semiconductor region 2012. The N-type semiconductor region 2001 and the P-type semiconductor region 2002 constitute a PD (photodiode) that converts light into signal charges and accumulates them. The P-type semiconductor region 2002, the N-type semiconductor region 2003, and the N-type semiconductor region 2012 constitute an AD (avalanche diode). As will be described later, the operation period of the photoelectric conversion unit 2070 is roughly divided into an accumulation period in which signal charges are accumulated in the PD, and a readout period in which the signal charges accumulated in the PD are transferred to the AD. During at least part of the readout period, transferred signal charges cause avalanche multiplication in the AD.

Photoelectric conversion section 2070 further includes a P-type semiconductor region 2009 formed below N-type semiconductor region 2001 and P-type semiconductor regions 2010 and 2011 formed on the sides of N-type semiconductor regions 2001 and 2012. P-type semiconductor regions 2010 and 2011 separate adjacent photoelectric conversion units 2070 from each other.

The arrangement of these semiconductor regions in the cross-sectional structure is as shown in FIG. 13(a) and the like. In particular, N-type semiconductor region 2001 is surrounded by P-type semiconductor regions 2002, 2009, and 2010. Furthermore, a P-type semiconductor region 2002 is disposed at least partially between the N-type semiconductor region 2001 and the N-type semiconductor region 2003. N-type semiconductor region 2012 has a lower impurity concentration than N-type semiconductor region 2003 and is arranged between P-type semiconductor region 2002 and N-type semiconductor region 2003. At least a portion of the N-type semiconductor region 2012 forms an avalanche multiplier. Note that in FIGS. 13(a), 13(b), and 13(c), it is assumed that the incident light is incident from the upper side in the drawings.

A potential control section 2005 is connected to the N-type semiconductor region 2003. The potential control unit 2005 applies a potential Vn to the N-type semiconductor region 2003. A potential control section 2006 is connected to the P-type semiconductor region 2011. The potential control unit 2006 applies a potential Vp to the P-type semiconductor region 2011. The potential Vp can also be supplied to the P-type semiconductor regions 2002, 2009, and 2010 via the P-type semiconductor region 2011. In the state shown in FIG. 13(a), the N-type semiconductor region 2001 is electrically floating.

The potential distribution inside the semiconductor substrate is determined by the arrangement of each semiconductor region described above, the impurity concentration distribution of each semiconductor region, and the potentials applied to the potential control section 2005 and the potential control section 2006. Therefore, by controlling the potentials applied to the potential control section 2005 and the potential control section 2006, the above-described accumulation period state and readout period state can be switched. In addition, in order to realize a predetermined potential state such as causing avalanche multiplication during signal charge transfer, the arrangement of each semiconductor region and the impurity concentration distribution of each semiconductor region are determined in the design of the photodetector. may be adjusted from time to time.

13(a), FIG. 13(b), and FIG. 13(c) show examples in which the value of the potential Vn applied to the N-type semiconductor region 2003 is changed to Vn0, Vn1, and Vn2. In addition, FIGS. 14(a), 14(b), and 14(c) show the potentials at AA' corresponding to FIGS. 13(a), 13(b), and 13(c), respectively. FIG. In these three examples, the heights of potential barriers generated between N-type semiconductor region 2001 and N-type semiconductor region 2003 are different from each other. As a result, the period for accumulating signal charges in the N-type semiconductor region 2001 and the period for reading signal charges from the N-type semiconductor region 2001 to the N-type semiconductor region 2003 are controlled. To simplify the explanation, it is assumed in FIGS. 13(a), 13(b), and 13(c) that a fixed potential Vp is applied to the P-type semiconductor region 2002. The potentials applied to the regions 2002 may be different from each other. Note that the broken lines in FIGS. 13(a), 13(b), and 13(c) indicate the ends of the depletion layer.

FIG. 13(a) is a diagram showing the photoelectric conversion unit 2070 in a state where signal charges are accumulated in the N-type semiconductor region 2001, and FIG. 14(a) shows the potential at AA' in FIG. 13(a). FIG. The potential Vn0 applied to the potential control unit 2005 is higher than the potential Vp applied to the potential control unit 2006. That is, a reverse bias is applied to the PN junction, and a depletion layer spreads near the PN junction surface. As shown in FIG. 13(a), a neutral region exists in a part of the P-type semiconductor region 2002. In the neutral region of the P-type semiconductor region 2002, there are many holes that are majority carriers of the P-type semiconductor region. Therefore, the potential of the neutral region of the P-type semiconductor region 2002 is approximately the same as the potential Vp of the potential control section 2006. Note that neutral regions also exist in each of the P-type semiconductor regions 2011, 2010, and 2009.

In the dark state, that is, when there is no signal charge, the depletion layer spreads over the entire N-type semiconductor region 2001 in the state shown in FIG. 13(a). At this time, a reverse bias called a "depletion voltage" is applied between the neutral region of the P-type semiconductor region 2002 (and the neutral regions of other surrounding P-type semiconductor regions) and the N-type semiconductor region 2001. At least a voltage is present. In other words, for signal charges (electrons) existing in the N-type semiconductor region 2001, a potential barrier corresponding to the voltage obtained by adding the depletion voltage to the built-in potential between the PN junctions is generated around the N-type semiconductor region 2001. ing. Therefore, in the potential distribution along AA', as shown in FIG. It is occurring. Note that the above-described depletion voltage of the PD is typically at the same level as the depletion voltage of the PD in an image sensor such as a CMOS sensor or a CCD sensor, that is, about 1V to 2V.

In FIG. 13A, the potential Vn0 applied to the N-type semiconductor region 2003 is higher than the potential Vp applied to the potential control section 2006. Therefore, a reverse bias corresponding to the difference between the potential Vn0 and the potential Vp is applied to the PN junction between the P-type semiconductor regions 2002, 2011 and the N-type semiconductor regions 2003, 2012. Further, a depletion layer corresponding to the reverse bias is spread in the P-type semiconductor region 2002 and the P-type semiconductor region 2011. In the state shown in FIG. 13A, the potential Vn0 is basically set so that avalanche multiplication does not occur in the AD PN junction formed by the P-type semiconductor region 2002 and the N-type semiconductor regions 2003 and 2012. Ru. Further, signal charges generated by light incidence are accumulated in the N-type semiconductor region 2001.

FIG. 13(b) is a diagram showing a state in which the potential Vn applied to the N-type semiconductor region 2003 changes from Vn0 to Vn1 higher than Vn0. Vn1 is at a higher potential than Vn0, while Vp is fixed. Therefore, a larger reverse bias is applied to the PN junction between the P-type semiconductor regions 2002, 2011 and the N-type semiconductor regions 2003, 2012 than in the case of FIG. 13(a). Moreover, the depletion layer of the P-type semiconductor region 2002 is expanded accordingly compared to the case of FIG. 13(a). As a result, when the potential Vn is Vn1, the depletion layer of the P-type semiconductor region 2002 around the N-type semiconductor region 2001 and the depletion layer of the P-type semiconductor region 2002 around the N-type semiconductor region 2003 are connected. In other words, the depletion layer extends continuously from the N-type semiconductor region 2001 to the N-type semiconductor region 2003.

The potential of the depleted portion of the P-type semiconductor region 2002 is lower than the potential of the neutral region of the P-type semiconductor region 2002 (approximately the same as Vp). This is because it is affected by the potential Vn applied to the N-type semiconductor region 2003. Therefore, in the potential distribution along AA' in FIG. 13(b), as shown in FIG. 14(b), the height of the potential barrier between the N-type semiconductor region 2001 and the N-type semiconductor region 2003 is , is lower than that in the case of FIG. 13(a).

At this time, most of the periphery of the N-type semiconductor region 2001 is surrounded by the neutral regions of the P-type semiconductor regions 2002, 2009, and 2010. The potential Vp of the potential control unit 2006 is fixed. Therefore, the potential at the center of the N-type semiconductor region 2001 hardly changes. Therefore, as described above, the height of the potential barrier to the N-type semiconductor region 2001 can be locally lowered.

In FIG. 13B, when signal charges are accumulated in the N-type semiconductor region 2001, the signal charges exceed the potential barrier and begin to be transferred to the N-type semiconductor region 2003. At this time, it is preferable that a reverse bias voltage is generated between the N-type semiconductor region 2003 and the P-type semiconductor region 2002 to the extent that avalanche multiplication occurs.

After a continuous depletion layer is formed, the potential Vn applied to the N-type semiconductor region 2003 changes from Vn1 to a potential Vn2 higher than Vn1. Correspondingly, the potential barrier gradually lowers. Further, the width of the depletion layer generated in the P-type semiconductor region 2002 also changes according to a change in the potential Vn.

FIG. 13(c) is a diagram showing a state in which the potential barrier between the N-type semiconductor region 2001 and the N-type semiconductor region 2003 has almost disappeared. Further, FIG. 14(c) is a diagram showing the potential of A-A' in FIG. 13(c). At this time, potential Vn2 is applied to N-type semiconductor region 2003. In the state of FIG. 14C, all signal charges accumulated in the N-type semiconductor region 2001 are transferred to the N-type semiconductor region 2003. That is, complete depletion transfer becomes possible.

The voltage required for such complete depletion transfer becomes lower as the impurity concentration of the P-type semiconductor region 2002 is lower, and conversely becomes higher as the impurity concentration of the P-type semiconductor region 2002 is higher. The P-type semiconductor region 2002 is configured such that a reverse bias that causes avalanche multiplication occurs between the P-type semiconductor region 2002 and the N-type semiconductor region 2003 during at least part of the period during which signal charges are transferred as described above. and the impurity concentration of the N-type semiconductor region 2012 are set.

Note that in the dark state, when the potential Vn changes from the state shown in FIG. 13(b) to the state shown in FIG. 13(c), the potential of the N-type semiconductor region 2001 may change somewhat. However, since the P-type semiconductor region 2002 is closer to the N-type semiconductor region 2003 to which the potential Vn is supplied than the N-type semiconductor region 2001, the P-type semiconductor region 2002 is more susceptible to changes in the potential Vn. receive. Therefore, the potential of the depleted portion of the P-type semiconductor region 2002 changes more easily than the potential of the N-type semiconductor region 2001. As a result, a potential barrier between N-type semiconductor region 2001 and N-type semiconductor region 2003 can be eliminated.

In this embodiment, in FIG. 13C, neutral regions remain in the P-type semiconductor region 2009 and the P-type semiconductor region 2010. According to this configuration, the potential Vp can be supplied to most of the periphery of the N-type semiconductor region 2001, so that changes in the potential of the N-type semiconductor region 2001 can be reduced in the states of FIGS. 14(b) and 14(c). It can be suppressed. Therefore, complete charge transfer is possible even if the amount of change in potential Vn is not very large. However, during the process in which the potential Vn changes from Vn0 to Vn2, the entire P-type semiconductor region 2009 or P-type semiconductor region 2010 may become depleted.

As explained above, the photoelectric conversion unit 2070 of this embodiment can control the height of the potential barrier between the N-type semiconductor region 2001 and the N-type semiconductor region 2003 by controlling the potential Vn. can. Therefore, the photodetecting device including the photoelectric conversion unit 2070 of this embodiment has the following operations: accumulating signal charges in the N-type semiconductor region 2001; reading signal charges from the N-type semiconductor region 2001 to the N-type semiconductor region 2003; can be implemented selectively.

Here, it has been explained that avalanche multiplication preferably occurs when signal charges are transferred in FIG. 13(b). However, while the potential Vn changes from Vn0 to Vn2, the timing at which a reverse bias large enough to cause avalanche multiplication is applied is different from the timing at which the depletion layer connects (that is, the timing at which the potential barrier begins to fall). It's okay. The timing at which a reverse bias large enough to cause avalanche multiplication is applied and the timing at which the depletion layer is connected in the P-type semiconductor region 2002 may occur either first. The amount of saturation charge in the N-type semiconductor region 2001 is determined by the potential barrier when a bias voltage that allows signal detection to be started by avalanche multiplication is applied.

A configuration example of the photoelectric conversion element 101 including the photoelectric conversion unit 2070 having the above-described configuration will be described. FIGS. 15(a) and 15(b) are diagrams showing a configuration example of the photoelectric conversion element 101 according to this embodiment. 15(a) and 15(b), the difference from FIG. 4(a) and FIG. 4(b) is that the switching elements 241a, 241b, 241c, and 241d are added. Here, it is assumed that the photoelectric conversion units 201a, 201b, 201c, and 201d all have the same configuration as the photoelectric conversion unit 2070 described above. The photoelectric conversion unit 201a is connected to a node 221, which is a connection node to the quench element 202, with a switch element 241a interposed therebetween. The photoelectric conversion unit 201b is connected to the node 221 with a switch element 241b interposed therebetween. The photoelectric conversion unit 201c is connected to the node 221 with a switch element 241c interposed therebetween. The photoelectric conversion unit 201d is connected to the node 221 with a switch element 241d interposed therebetween.

As shown in FIG. 15(b), in the initial state, the switch elements 241a, 241b, 241c, and 241d are all on, and the potential VH0 is supplied to the photoelectric conversion units 201a, 201b, 201c, and 201d. Thereafter, for example, if only the switch element 241a is turned on and the other switch elements 241b, 241c, and 241d are turned off, the potential VH0 is supplied only to the photoelectric conversion section 201a.

A method for driving the photoelectric conversion element 101 will be described using the timing chart shown in FIG. 16. "Cathode potential" in the figure indicates the potential applied to the potential control unit 2005, and "241a", "241b", "241c", and "241d" in the figure indicate the on state of the corresponding switch element. Or indicates an off state.

After the above-mentioned initial state, the switch elements 241a, 241b, 241c, and 241d are turned off, and the photoelectric conversion units 201a, 201b, 201c, and 201d are placed in an accumulation state in which charges are accumulated. At time t1, only the switch element 241a is turned on. At this point, the other switch elements 241b, 241c, and 241d remain off. Before time t2, the cathode potential of the photoelectric conversion unit 201a is VH0. At this time, the bias voltage necessary for avalanche multiplication to occur is not applied to the photoelectric conversion unit 201a, and the photoelectric conversion unit 201a is in a state before the potential barrier begins to fall. Therefore, the charges accumulated in the photoelectric conversion unit 201a are not read out from the potential control unit 2005. In other words, the period before time t2 is the accumulation period 251a. The potential of A-A' in FIG. 13(a) at this time is shown in FIG. 14(a). As shown in FIG. 14A, the charges accumulated in the N-type semiconductor region 2001 do not reach the N-type semiconductor region 2003 due to the potential barrier of the P-type semiconductor region 2002.

At time t2, the cathode potential of the photoelectric conversion unit 201a starts transitioning from VH0. From the time when the cathode potential reaches VH1, a bias necessary for avalanche multiplication to occur begins to be applied to the photoelectric conversion unit 201a. This lowers the potential barrier and gradually begins to read out the accumulated charge. The potential of A-A' in FIG. 13(b) at this time is shown in FIG. 14(b). As shown in FIG. 14(b), as the potential barrier of the P-type semiconductor region 2002 is lowered, part of the charges accumulated in the N-type semiconductor region 2001 reaches the N-type semiconductor region 2003.

Over the period from time t2 to time t3, the cathode potential of the photoelectric conversion unit 201a gradually transitions from VH0 to VH2. Around time t3, a bias sufficient to cause avalanche multiplication is applied to the photoelectric conversion unit 201a, all accumulated signal charges are transferred, and complete depletion transfer is realized. The potential of A-A' in FIG. 13(c) at this time is shown in FIG. 14(c). As shown in FIG. 14C, the potential barrier of the P-type semiconductor region 2002 is lowered, so that all of the charges accumulated in the N-type semiconductor region 2001 reach the N-type semiconductor region 2003. In this way, the charges accumulated in the photoelectric conversion unit 201a are read out. In other words, the period from time t2 to time t3 is the read period 252a.

Thereafter, at time t3, the cathode potential of the photoelectric conversion unit 201a transitions from VH2 to VH0. As a result, a bias necessary for avalanche multiplication to occur is not applied to the photoelectric conversion unit 201a, and the potential barrier returns to the same state as before time t2. In other words, the period after time t3 is the accumulation period 251a. Note that after the read period 252a, the count number of charges transferred from the photoelectric conversion unit 201a is reset.

Processing similar to the above-described reading from the photoelectric conversion unit 201a is sequentially performed on the photoelectric conversion units 201b, 201c, and 201d. Thereby, the charges accumulated in the photoelectric conversion units 201a, 201b, 201c, and 201d are sequentially read out.

In the first embodiment described above, the circuit configuration is such that it is not possible to distinguish which of the four photoelectric conversion units 201a, 201b, 201c, and 201d the output signal is caused by charges generated. In contrast, in this embodiment, it is possible to control each of the photoelectric conversion units 201a, 201b, 201c, and 201d to perform reading individually. Therefore, according to this embodiment, the photodetecting device 1010 is capable of distinguishing which of the four photoelectric conversion units 201a, 201b, 201c, and 201d the output signal is caused by charges generated. is provided. Note that in this embodiment, the signal charge may be a hole, and in that case, the N-type and P-type of each semiconductor region are opposite.

[Seventh embodiment]
In this embodiment, an example of a photodetection system using the photodetection devices 1010 of the first to sixth embodiments will be described with reference to FIG. 17. The photodetection system of this embodiment is an invisible light detection system that detects light in a wavelength band that is invisible light, and is used in medical diagnostic systems such as PET (Positron Emission Tomography). Note that the pixel 100 of this embodiment includes a TDC 204 and a memory 205 instead of the counter circuit 209 in FIG.

FIG. 17 is a block diagram of an invisible light detection system. The invisible light detection system includes a plurality of photodetection devices 1010A and 1010B, a wavelength conversion section 1201, and a data processing section 1207. Each of the plurality of photodetecting devices 1010A and 1010B is the same as the photodetecting device 1010 of the first to sixth embodiments, except that the counter circuit 209 is replaced with a TDC 204 and a memory 205.

The irradiation object 1200 irradiates light in a wavelength band (first wavelength band) that is invisible light. The wavelength conversion unit 1201 receives invisible light emitted from the irradiation object 1200 and irradiates light in a wavelength band (second wavelength band) that is visible light. Visible light emitted from the wavelength converter 1201 enters the photoelectric converter 201. The photoelectric conversion unit 201 photoelectrically converts incident light into an electrical signal. This electrical signal is held in the memory 205 as a digital signal via the quench element 202, the waveform shaping section 203, and the TDC 204. The plurality of photodetecting devices 1010A and 1010B may be configured as one device or may be configured as a plurality of devices.

A plurality of digital signals held in the memories 205 of the plurality of photodetecting devices 1010A and 1010B are read out by a data processing unit 1207 and subjected to signal processing. The data processing unit 1207 functions as a signal processing unit that performs synthesis processing of a plurality of images obtained from a plurality of digital signals.

Next, the configuration of a medical diagnostic system such as PET will be described as a specific example of an invisible light detection system. The subject, which is the irradiation object 1200, emits radiation pairs such as gamma rays from within the body. The wavelength conversion unit 1201 includes a scintillator, and the scintillator irradiates visible light when the radiation pair emitted from the subject is incident thereon.

The visible light emitted from the scintillator enters the photodetecting devices 1010A and 1010B, and a digital signal based on the incident light is held in the memory 205. Thereby, the photodetectors 1010A and 1010B can detect the arrival time of each radiation pair emitted from the subject.

A plurality of digital signals held in the memories 205 of the plurality of photodetecting devices 1010A and 1010B are read out by a data processing unit 1207 and subjected to signal processing. The data processing unit 1207 performs synthesis processing such as image reconstruction using a plurality of images obtained from a plurality of digital signals, and generates an in-vivo image of the subject.

According to this embodiment, by using the photodetection devices 1010A and 1010B with improved detection performance, it is possible to provide a photodetection system such as a highly accurate invisible light detection system or a medical diagnosis system.

[Eighth embodiment]
In this embodiment, another example of a photodetection system using the photodetection device 1010 of the first to sixth embodiments will be described with reference to FIGS. 18 and 19.

First, a distance detection system, which is an example of a light detection system, will be described with reference to FIG. Note that the pixel 100 of this embodiment includes a TDC 204 and a memory 205 instead of the counter circuit 209 in FIG.

FIG. 18 is a block diagram of the distance detection system. The distance detection system includes a light source control section 1301, a light emitting section 1302, an optical member 1303, a light detection device 1010, and a distance calculation section 1309.

A light source control unit 1301 controls driving of a light emitting unit 1302. The light emitting unit 1302 is a light emitting device that emits short pulses (rows) of light in the photographing direction in response to a signal from the light source control unit 1301.

Light emitted from the light emitting unit 1302 is reflected by the subject 1304. The reflected light passes through an optical member 1303 such as a lens and is received by the photoelectric conversion unit 201 of the photodetector 1010. The photoelectric conversion unit 201 outputs a signal based on the incident light, and the signal is input to the TDC 204 via the waveform shaping unit 203.

The TDC 204 acquires a signal indicating the timing of light irradiation from the light emitting unit 1302 from the light source control unit 1301. The TDC 204 compares the signal acquired from the light source control unit 1301 and the signal input from the waveform shaping unit 203. Thereby, the TDC 204 outputs the time from when the light emitting unit 1302 emits pulsed light until it receives the reflected light reflected by the subject 1304 as a digital signal. The digital signal output from TDC 204 is held in memory 205. This process is repeated multiple times, and the memory 205 can hold digital signals for multiple times.

The distance calculation unit 1309 calculates the distance from the photodetector 1010 to the subject 1304 based on the plurality of digital signals held in the memory 205. This distance detection system can be applied to, for example, a vehicle-mounted distance detection device. Note that since the processing performed by the distance calculation unit 1309 is digital signal processing, it may be more generally referred to as a signal processing unit.

Next, a light detection system using the light detection device 1010 as an on-vehicle camera will be described with reference to FIGS. 19(A) and 19(B). 19(A) and 19(B) are diagrams showing the configurations of a photodetection system 1000 and a moving object according to this embodiment.

FIG. 19(A) is a block diagram showing an example of a light detection system 1000 related to a vehicle-mounted camera. The photodetection system 1000 includes a photodetection device 1010 according to the first embodiment. The photodetection system 1000 includes an image processing unit 1030 that performs image processing on a plurality of digital signals acquired by the photodetection device 1010. Furthermore, the photodetection system 1000 includes a parallax calculation unit 1040 that calculates parallax (phase difference of parallax images) from a plurality of image data acquired by the image processing unit 1030.

The light detection system 1000 also includes a distance measurement unit 1050 that calculates the distance to the object based on the calculated parallax, and a collision determination unit that determines whether there is a possibility of a collision based on the calculated distance. 1060. Here, the parallax calculation unit 1040 and the distance measurement unit 1050 are an example of distance information acquisition means that acquires distance information to the target object. That is, distance information is information regarding parallax, defocus amount, distance to a target object, and the like.

Collision determination section 1060 may determine the possibility of collision using any of these distance information. The distance information acquisition means may be realized by specially designed hardware, a software module, or a combination thereof. Further, it may be realized by FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or the like. Furthermore, it may be realized by a combination of these.

The optical detection system 1000 is connected to a vehicle information acquisition device 1310, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Furthermore, the optical detection system 1000 is connected to a control ECU 1410 that is a control device that outputs a control signal for generating a braking force on the vehicle based on the determination result by the collision determination section 1060.

The light detection system 1000 is also connected to a warning device 1420 that issues a warning to the driver based on the determination result of the collision determination section 1060. For example, if the collision determination unit 1060 determines that there is a high possibility of a collision, the control ECU 1410 performs vehicle control to avoid the collision and reduce damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 1420 warns the user by sounding an alarm such as a sound, displaying alarm information on a screen of a car navigation system, etc., or applying vibration to a seat belt or steering wheel.

In this embodiment, the light detection system 1000 images the surroundings of the vehicle, for example, the front or rear. FIG. 19(B) shows a light detection system 1000 for capturing an image in front of a vehicle (imaging range 1510). Vehicle information acquisition device 1310 sends an instruction to photodetection system 1000 or photodetection device 1010 to perform a predetermined operation. With such a configuration, the accuracy of distance measurement can be further improved.

In the above example, control to avoid collisions with other vehicles was explained, but the light detection system 1000 can also be applied to control to automatically drive by following other vehicles, control to automatically drive to avoid moving out of the lane, etc. It is possible. Furthermore, the optical detection system 1000 is applicable not only to vehicles but also to mobile objects (mobile devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to mobile objects but also to a wide range of devices that use object recognition, such as intelligent transportation systems (ITS).

According to this embodiment, by using the photodetection device 1010 with improved detection performance, a higher performance photodetection system and moving body can be provided.

[Modified embodiment]
The present invention is not limited to the above-described embodiments, and various modifications are possible. For example, an example in which a part of the configuration of one embodiment is added to another embodiment, or an example in which a part of the configuration in another embodiment is replaced is also an embodiment of the present invention.

Further, the systems shown in the seventh and eighth embodiments are examples of system configurations to which the photodetection device of the present invention can be applied, and the systems to which the photodetection device of the present invention can be applied are 17 to 17. The configuration is not limited to that shown in FIG. 19.

The present invention provides a system or device with a program that implements one or more functions of the embodiments described above via a network or a storage medium, and one or more processors in a computer of the system or device reads and executes the program. This can also be achieved by processing. It can also be realized by a circuit (for example, an ASIC) that realizes one or more functions.

Note that the above-described embodiments are merely examples of implementation of the present invention, and the technical scope of the present invention should not be interpreted to be limited by these embodiments. That is, the present invention can be implemented in various forms without departing from its technical idea or main features.

102 Pixel signal processing section 201 Photoelectric conversion section 202 Quench element 1010 Photodetection device

Claims (12)

multiple avalanche diodes;
a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes;
a pixel signal processing unit that processes a signal obtained by adding signals output from each of the plurality of avalanche diodes;
a plurality of switch elements corresponding to each of the plurality of avalanche diodes;
has
one of the quench elements is connected in series with the plurality of avalanche diodes,
The plurality of avalanche diodes and the quench element are formed on the same substrate,
The quench element is arranged between two avalanche diodes of the plurality of avalanche diodes in a plan view from a direction perpendicular to the substrate ,
Each of the plurality of switch elements is connected between a corresponding avalanche diode and the quench element,
By turning on the plurality of switch elements at mutually different timings, the plurality of avalanche diodes output signals to the pixel signal processing section at mutually different timings.
A photodetection device characterized by: A plurality of regions including one quench element and two avalanche diodes connected in series to the one quench element are arranged on the substrate. The photodetection device described in . multiple avalanche diodes;
a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes;
a pixel signal processing unit that processes a signal obtained by adding signals output from each of the plurality of avalanche diodes;
a plurality of switch elements corresponding to each of the plurality of avalanche diodes;
has
one of the quench elements is connected in series with the plurality of avalanche diodes,
The plurality of avalanche diodes and the quench element are formed on the same substrate,
A first region including one of the plurality of avalanche diodes and a second region including the quench element are arranged in a matrix with a plurality of rows and a plurality of columns on the substrate,
Each of the plurality of switch elements is connected between a corresponding avalanche diode and the quench element,
By turning on the plurality of switch elements at mutually different timings, the plurality of avalanche diodes output signals to the pixel signal processing section at mutually different timings.
A photodetection device characterized by: multiple avalanche diodes;
a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes;
a pixel signal processing unit that processes a signal obtained by adding signals output from each of the plurality of avalanche diodes;
has
one of the quench elements is connected in series with the plurality of avalanche diodes,
The plurality of avalanche diodes and the quench element are formed on the same substrate,
A first region including one of the plurality of avalanche diodes and a second region including the quench element are arranged in a matrix with a plurality of rows and a plurality of columns on the substrate,
The photodetecting device, wherein the second region further includes an avalanche diode having a smaller area than an avalanche diode included in the first region. multiple avalanche diodes;
a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes;
a pixel signal processing unit that processes a signal obtained by adding signals output from each of the plurality of avalanche diodes;
has
one of the quench elements is connected in series with the plurality of avalanche diodes,
The plurality of avalanche diodes and the quench element are formed on the same substrate,
A first region including one of the plurality of avalanche diodes and a second region including the quench element are arranged in a matrix with a plurality of rows and a plurality of columns on the substrate,
A photodetecting device, wherein the second region does not include an avalanche diode. multiple avalanche diodes;
a quench element that suppresses avalanche multiplication in the plurality of avalanche diodes;
a pixel signal processing unit that processes a signal obtained by adding signals output from each of the plurality of avalanche diodes;
a plurality of switch elements corresponding to each of the plurality of avalanche diodes;
has
one of the quench elements is connected in series with the plurality of avalanche diodes,
The plurality of avalanche diodes are formed on a first substrate,
The quench element is formed on a second substrate different from the first substrate,
Each of the plurality of switch elements is connected between a corresponding avalanche diode and the quench element,
By turning on the plurality of switch elements at mutually different timings, the plurality of avalanche diodes output signals to the pixel signal processing section at mutually different timings.
A photodetection device characterized by: The photodetection device according to any one of claims 1 to 6, wherein the plurality of avalanche diodes are connected in parallel with each other. The photodetection according to any one of claims 1 to 7, wherein the quench element includes an active quench circuit that suppresses the avalanche multiplication by changing the potential supplied to the avalanche diode. Device. A photodetection device according to any one of claims 1 to 8 ,
A photodetection system comprising: signal processing means for processing a signal output from the photodetection device. a wavelength conversion unit that converts light in a first wavelength band to light in a second wavelength band different from the first wavelength band;
A plurality of photodetecting devices according to any one of claims 1 to 8 , configured to receive light in the second wavelength band converted by the wavelength conversion unit;
a signal processing means that performs a process of synthesizing a plurality of images based on a plurality of signals acquired by the plurality of photodetecting devices;
A light detection system comprising: A light emitting part that emits light;
The light detection device according to any one of claims 1 to 8 , configured to detect the light;
distance calculation means for calculating a distance using a signal based on the light detected by the light detection device;
A light detection system comprising: A mobile object,
A photodetection device according to any one of claims 1 to 8 ,
distance information acquisition means for acquiring distance information to a target object from a parallax image based on a signal from the photodetection device;
a control means for controlling the mobile body based on the distance information;
A mobile object characterized by having.

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