JP7345831B2 - Information processing device, information processing method and program - Google Patents

Description

The present invention relates to data compression and decompression.

2. Description of the Related Art In public communication networks used on the Internet and wireless communication lines between devices, some kind of data compression algorithm is used to transmit and receive large amounts of data at high speed and efficiently. The stream-type Asymmetric Numeral Systems (hereinafter referred to as ANS) proposed by Duda is one of the encoding methods that can be used for such data compression algorithms (see Non-Patent Document 1), and has been developed by Apple. It has been adopted by Incorporated as a data compression algorithm and is being put into practical use in open source form.

Jarek Juda, "Asymmetric numerical systems", arXiv:0902.0271v5 [cs.IT], May 21, 2009 Hidetoshi Yokoo, "On the stationary distribution of asymmetric binary systems", 2016 IEEE International Symposium on Information Theory, July 2016, pp. 11-15 Marston Morse et al., "Symbolic dynamics II. Sturmian trajectories", American Journal of Mathematics, Johns Hopkins University Press, 1940, Vol. 62, No. 1, pp. 1-42. Henry John Stephen Smith, "Note on continued fractions", Messenger of Mathematics, Macmillan and Co., 1876, vol. 6, pp. 1-14.

When a data stream compression algorithm using Asymmetric Binary Systems (hereinafter referred to as ABS), which is the simplest form of ANS, can function properly, encoding using ABS is already possible. It can be expressed as a Markov chain.

However, it has been pointed out that even if ABS that can be expressed by an irreducible Markov chain is used, there may still be cases where encoding is not performed properly (see Non-Patent Document 2).

The present invention, which has been made in view of such problems, provides an information processing device and the like that more stably executes high-speed and efficient data stream compression using an ABS algorithm.

An information processing device according to one embodiment of the present invention uses ABS (Asymmetric Binary Systems) based on the appearance rate p (0<p<1) of one of two values included in a binary data stream that is a target of compression processing. comprising an arithmetic circuit that executes a data compression method, in the arithmetic circuit,
An irrational number is used as the appearance rate p, and the number of fixed points in each of the first dynamical system, which is a dynamical system regarding one of the two values, and the second dynamical system, which is a dynamical system regarding the other of the two values, is at the same time. Do not exceed 1 and do not take 0 at the same time .

Further, an information processing apparatus according to another aspect of the present invention includes an arithmetic circuit that executes a data expansion method using ABS of a binary data stream of compressed data compressed using the data compression method described above, In the ABS data expansion method executed by the arithmetic circuit, the appearance rate p used in the executed data compression method is used, and the number of fixed points in each of the first dynamical system and the second dynamical system is , is the number of data compression methods executed.

Note that these comprehensive or specific aspects may be realized by a system, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, and may be implemented by a device, a system, a method, an integrated circuit , may be realized by any combination of a computer program and a recording medium.

The information processing apparatus and the like according to the present invention can more stably compress a data stream using an ABS algorithm, which is reasonable from a practical standpoint.

FIG. 1 is a table showing examples of irreducible natural numbers and non-irreducible natural numbers based on the definitions used in the present invention. FIG. 2 is an example of a simplified table of a decoding function based on ABS. FIG. 3 is an example of a simplified table of encoding functions based on ABS. FIG. 4 shows an example of the progress of encoding using stream type ABS. FIG. 5 shows an example of the progress of decoding using stream-type ABS. FIG. 6 is a block diagram illustrating an example of a functional configuration of an arithmetic circuit included in the information processing device according to the embodiment. FIG. 7 is a flow diagram illustrating an example of the operation procedure of the information processing apparatus according to the embodiment. FIG. 8 is a flow diagram illustrating another example of the operation procedure of the information processing apparatus according to the embodiment.

(1. Knowledge forming the basis of the present invention)
According to Non-Patent Document 2, the state parameter l is a natural number that determines the number of states included in the ABS state set, and one of the two values of the binary data stream to be compressed, which is input to the ABS algorithm, is When one of the occurrence rates is p (0<p<1), Non-Patent Document 1 does not show the principle of how to give l and p. Furthermore, there are p and l that can lead to a situation in which the ABS data compression algorithm does not function properly. In particular, in the vicinity of p = 1/2, even if the Markov chain with respect to the ABS state set is irreducible, it is necessary to give a very large value for l, and from a practical point of view, reasonable encoding can be performed. I find myself in a situation where I can't do anything. For example, if such a situation occurs in a data compression algorithm used to compress and decompress a communication data stream, the amount of time required for encoding at the transmitter and decoding at the receiver will be reduced due to the large computational load. may take a long time or become impossible to calculate due to a lack of computational resources. As a result, achieving high-speed and efficient communication, which is the original purpose of data compression, is hindered. Traditionally, p and l can be found by user heuristics to avoid such undesirable situations while adapting to the amount of data stream to be compressed.

The present inventor has found necessary and sufficient conditions for the occurrence rate p and the state parameter l to allow the ABS algorithm to function normally and to perform appropriate data compression. By using the appearance rate p and the state parameter l that satisfy this condition, normal compression (encoding) and expansion (decoding) of stream data by the ABS compression algorithm are stably executed. This necessary and sufficient condition can be expressed as follows.

(1) The occurrence rate p (0<p<1) is an irrational number, and (2) the number of fixed points in the dynamical system for each binary value does not exceed 1 at the same time, that is, in each of the two dynamical systems. The number of fixed points is 0 or 1, or even if one is 2 or more, the other is 0.

However, the state parameter l is not directly expressed in the description of the above conditions, and can be defined as satisfying (2) in relation to the appearance rate p. This condition will be explained in detail below.

[1-1. appearance rate p and state parameter l]
Regarding an algorithm based on an ABS (hereinafter also referred to as a stream-type ABS) that receives input of a binary data stream to be compressed, a finite set of states J _l is defined by Equation 1 shown below.

J _l ={l,l+1,...,2l-1}...(Formula 1)

Here l is an element of the set of all natural numbers. The set J _l is determined by giving a natural number l, and is also referred to as an interval J _l . Here, we will define what is meant by the expression irreducible in this application.

(Definition 1) When encoding by stream-type ABS having an interval J _l is expressed by an irreducible finite state Markov chain, the interval J _l is said to be irreducible. Further, when the interval J _l is irreducible, the natural number l is said to be irreducible, and furthermore, the stream type ABS is also said to be irreducible.

For example, let the appearance rate p be p=1/β. Here, β=(1+√5)/2 is the golden mean. At this time, FIG. 1 shows whether some natural numbers l are irreducible in light of the above definition. FIG. 1 is a table showing examples of natural numbers that are irreducible and natural numbers that are not irreducible based on this definition, and if a natural number l in the upper column is irreducible, a check is written in the column below it.

In addition, a definition of a condition (hereinafter referred to as a first irreducible condition) that has been conventionally presented as a condition for stream type ABS to be irreducible is shown.

(Definition 2) When the appearance rate p and the natural number l that defines the interval _Jl are given, the condition that Equation 2 shown below is satisfied is called the first irreducible condition.

は実数αの整数部分、つまりαを超えない最大の整数（床関数）である。以下ではこの床関数の表記と、実数α以上の最小の整数（天井関数）を表す

の表記も用いる。 In addition,

is the integer part of the real number α, that is, the largest integer not exceeding α (floor function). Below, we will express the notation of this floor function and the smallest integer greater than or equal to the real number α (ceiling function).

The notation is also used.

All irreducible l shown in Table 1 satisfy the first irreducible condition. However, although the first irreducible condition is a necessary condition for stream-type ABS to be irreducible, it is not a sufficient condition. Regarding this, Non-Patent Document 2 proposes as an open problem to characterize the occurrence rate p and natural number l that give an irreducible interval J _l for encoding by stream-type ABS.

The inventor presents the following answer to this problem.

但しs＝０，１と定める。ここで、

及び

である。 first,

However, it is set as s=0,1. here,

as well as

It is.

は、区間[０，１]に属する無理数全体がなす集合を表す。 Also,

represents the set of all irrational numbers belonging to the interval [0, 1].

とし、このときストリーム型ＡＢＳが既約であるための必要十分条件は次のとおりである。すなわち、第一既約条件が満たされることに加えて、次の第一条件から第三条件のうちいずれか一つが満たされる。 (Corollary 1) Regarding the appearance rate p,

In this case, the necessary and sufficient conditions for stream-type ABS to be irreducible are as follows. That is, in addition to the first irreducible condition being satisfied, any one of the following first to third conditions is also satisfied.

が成立し、且つ、次の条件Ａ又は条件Ｂが成立する。
条件Ａ：

条件Ｂ：

(first condition)

is satisfied, and the following condition A or condition B is also satisfied.
Condition A:

Condition B:

が成立し、且つ、次の条件Ｃ又は条件Ｄが成立する。
条件Ｃ：

条件Ｄ：

(Second condition)

is satisfied, and the following condition C or condition D is also satisfied.
Condition C:

Condition D:

が成立し、且つ、次の条件Ｅ又は条件Ｆが成立する。
条件Ｅ：

条件Ｆ：

(Third condition)

is satisfied, and the following condition E or condition F is also satisfied.
Condition E:

Condition F:

及び

である。 here,

as well as

It is.

As a result, the ultra-discrete dynamical systems F ₀ and F ₁ (examples of the first dynamical system and the second dynamical system in the present disclosure) on the interval J _l are obtained by encoding using the stream-type ABS, as described in ""Improved Stream Type ABS" section.

Note that in Corollary 1, the first condition implies that neither F ₀ nor F ₁ has a fixed point in the interval J _l . Further, the second condition implies that F ₀ has no fixed point in the interval J _l , and that F ₁ has at least two fixed points in the interval J _l . Further, the third condition implies that F ₀ has at least two fixed points in the interval J _l , and that F ₁ has no fixed points in the interval J _l .

Furthermore, in Non-Patent Documents 1 and 2, l is required to satisfy the condition of Equation 3 shown below.

However, it can be seen from Corollary 1 that this condition is independent of the irreducibility of the interval J _l . In fact, when 1/√2<p<1, 1/(2p-1)<max{1/p, 1/(1-p)}・p=p/(1-p), while When 0<p<1/√2, 1/(2p-1)>max{1/p, 1/(1-p)}·p.

Furthermore, in Non-Patent Document 2, it has been experimentally pointed out that the interval J _l is not irreducible when p is close to 1/2. According to Corollary 1, when k ₁ (p)=1 and k ₀ (p)=1, or k ₁ (p)=1 and k ₀ (p)=2, lim _p→1/2+0 1/ This is because (2p-1)=∞.

This answer will be explained in detail below.

[1-2. Definition, etc.]
Although some have already been listed, explanations of notations and definitions of expressions used in this application are summarized in this section in order to facilitate understanding of the following explanation.

It is assumed that the set A is based on a finite alphabet, and its cardinality satisfies 2 or more. The elements of set A are also called characters or symbols.

を、長さｎ(ｎは１以上)の集合Ａ上のブロック又は語と呼び、また、単にｎブロックとも称する。集合Ａ上のブロック全体の集合を表すのにＡ^＋を用いる。 Former

is called a block or word on the set A of length n (n is 1 or more), and is also simply called n block. A ⁺ is used to represent the set of all blocks on set A.

ε is used to represent an empty block, and A ^* =A ⁺ ∪{ε} is defined.

For a block u∈A ⁺ , |u| is used to represent the length of u. On the other hand, |ε|=0 is set.

である。 A factor or partial block or partial word of the n block u=u ₁ u _{2 . .} . u _n is a block of the form u _i u _i+1 . . . u _j . here,

It is.

By convention, empty blocks are factored into all blocks.

は非負整数全体がなす集合を表す。

represents the set of all non-negative integers.

は集合Ａ上の片側（右側）無限列全体がなす集合を表し、この集合に属する点又は語

に対して、

と書く（「語」は有限ブロックに限定されず、無限列を指しても用いられる）。ここで、ｉはｊ以下である。

represents the set formed by the entire infinite sequence on one side (right side) of set A, and the points or words belonging to this set are

For,

(The word is not limited to finite blocks, but can also be used to refer to infinite sequences.) Here, i is less than or equal to j.

に対して、ｘの言語を表すのにＬ(ｘ)を用い、Ｌ(ｘ)は、次に示す式４で定義される。

, L(x) is used to represent the language of x, and L(x) is defined by Equation 4 shown below.

に対して、

と定める。 Also,

For,

It is determined that

がスツルム的（Sturmian）であるといわれるのは、全ての

に対し、Ｌ_ｎ(ｘ)の濃度に関して次に示す式５が成り立つときである。 (Definition 3) Column

is said to be Sturmian because all

On the other hand, when the following equation 5 holds regarding the concentration of L _n (x).

If the sequence x is Sturmian, then the cardinality of L ₁ (x) is 2. Therefore, the Sturm sequence is two characters above. Since this application deals with Sturm sequences, the case where A={0, 1} will be considered below.

For example, let f ₀ =0 and f ₁ =01. For n which is 2 or more, f _n =f _n-1 f _n-2 is determined. At this time, a string of finite words expressed by Equation 6 below is obtained.

When n→∞, an infinite word expressed by the following equation 7 is obtained.

For n that is 0 or more, |f _n+2 |=|f _n+1 |+|f _n | holds, so f is called a Fibonacci term. It is well known that the Fibonacci language is a Sturm sequence.

(Definition 4) Binary n block u = u ₁ u ₂ ... u _n ∈{0, 1} For ⁿ , the height of u is expressed as h(u) and determined by the following equation 8 .

In other words, h(u) is the total number of 1's appearing in u.

(Definition 5) The block set X is balanced when the following equation 9 holds true.

が平衡であるといわれるのは、Ｌ(ｘ)が平衡であるときである。 infinite word

is said to be in equilibrium when L(x) is in equilibrium.

(Definition 6) The infinite word x = u ₁ u ₂ ... is said to be periodic because m is an element of the set of all non-negative integers, and l is an element of the set of all natural numbers. exists, and x _n =x _n+1 holds for all n greater than or equal to m. An infinite word is said to be aperiodic if it is not periodic as a result.

Furthermore, the following theorem is known as a characteristic of Sturm sequences.

がスツルム的であるのは、ｘが平衡且つ非周期的であるときであり、またその時に限る（非特許文献３参照）。 (Theorem 1) Infinite word

is Sturmian if and only when x is balanced and aperiodic (see Non-Patent Document 3).

[1-3. ABS]
Next, ABS will be explained.

及び

をそれぞれ、

に対して、次に示す式１０及び式１１で定める。 (Definition 7) Let α, ρ∈[0, 1]. two infinite words

as well as

respectively,

is determined by Equations 10 and 11 shown below.

及び語

はそれぞれ、傾きαと切片ρとを有する上機械語及び下機械語と呼ばれる。 word

and words

are called an upper machine language and a lower machine language, respectively, having a slope α and an intercept ρ.

Based on Non-Patent Document 1, the definition of ABS is as follows.

に対して、非特許文献１においては、

又は

が選択される。本願では、後者とする。なお、いずれの選択においてもｘ_０＝ｘ－ｘ_１と定める。

On the other hand, in Non-Patent Document 1,

or

is selected. In this application, it is the latter. Note that in any selection, x ₀ =x−x ₁ is defined.

と置いて、ブロック符号

がＤ(ｘ)＝(ｓ，ｘ_ｓ)により定義される。これをＡＢＳにおける復号化関数と呼ぶ。復号化関数は、次に示す式１２で与えられる。すなわち、

である。

and block code

is defined by D(x)=(s, x _s ). This is called the decoding function in ABS. The decoding function is given by Equation 12 below. That is,

It is.

また、ｘ_１は、ｓ_ｐ,０の最初のｘブロックの高さである。すなわち、

ここでｘは自然数全体がなす集合の元である。 Note that the first coordinate s of the value taken by D(x) is exactly the x-th term of the lower machine language having a slope p and an intercept 0. That is, s=s _p,0 (x). here,

Also, x ₁ is the height of the first x block of sp _,0 . That is,

Here, x is an element of the set of all natural numbers.

及び

の簡約表をそれぞれ図２及び図３に示す。図２は、ＡＢＳに基づく復号化関数の簡約表の一例である。図３はＡＢＳに基づく符号化関数の簡約表の一例である。 Here, for example, the appearance rate p is assumed to be p=1/β. β=(1+√5)/2 is the golden mean. At this time, the block code

as well as

The simplified tables of are shown in FIGS. 2 and 3, respectively. FIG. 2 is an example of a simplified table of a decoding function based on ABS. FIG. 3 is an example of a simplified table of encoding functions based on ABS.

を用いて、二値ブロックｕ∈{０，１}^＊は、Ｃによって終端状態ｔに符号化される。逆に、ｉを終端状態とみなすことにより、ｔはＤによってｕに復号化される。 arbitrary initial state

The binary block u∈{0,1} ^* is encoded by C into the terminal state t using . Conversely, by considering i as a terminal state, t is decoded by D into u.

と進み（図３の矢印参照）、終端状態ｔ＝２２が得られる（図３の点線の丸囲み参照）。 For example, for i=2 and u=100, by using the table shown in FIG.

(see the arrow in FIG. 3), and the terminal state t=22 is obtained (see the dotted circle in FIG. 3).

Conversely, for the terminal state t=22, by using the table shown in FIG. 2, the decoding process becomes D(22)=(1,13)→D(13)=(0,5)→D( 5) = (0, 2) (see arrow in Figure 2) and ends with i = 2.

100 is obtained from the first coordinate column of D (see the dotted circle in FIG. 2).

[1-4. Encoding and decoding using stream-type ABS]
First, assume the above first irreducible condition.

In stream-based ABS encoding, using an arbitrary initial state i∈J _l , a binary n block u=u ₁ u ₂ ... u _n ∈{0,1} ^* has a terminal state t and a release A binary block of length n at most consists of emitted symbols. The algorithm is shown below as Equation 13 according to Non-Patent Document 2.

Conversely, t is the emission symbol determined by "Emit mod(x, 2); is decoded into u using the reverse direction (that is, from the last symbol to the first symbol).

及び

が得られる。各区間の列の濃度について、

に注意する。 Here, for example, the appearance rate p is assumed to be p=1/β. β=(1+√5)/2. When the state parameter l=10, l ₀ =4 and l ₁ =6,

as well as

is obtained. Regarding the concentration of columns in each interval,

Be careful.

及び

を得る。ブロックｕ及び区間の列は右から左に処理され、この例に対して式１３のアルゴリズムを用いて、終端状態ｔ＝１６と放出記号列１１０が得られる。図４は、この例におけるストリーム型ＡＢＳによる符号化の進行過程を示す。逆に、終端状態ｔ＝１６に対して、放出記号列を右から左に読んで、式１４のアルゴリズムを用いて、復号化過程はｉ＝１３で終了する。Ｄの第１座標の列により、１００が得られる。図５は、この例におけるストリーム型ＡＢＳによる復号化の進行過程を示す。 For example, let i=13 and u=100. First, corresponding to u=100, the sequence of intervals

as well as

get. The block u and the sequence of intervals are processed from right to left, and using the algorithm of Equation 13 for this example, a terminal state t=16 and an emission symbol sequence 110 are obtained. FIG. 4 shows the progress of encoding by stream-type ABS in this example. Conversely, for the terminal state t=16, reading the emitted symbol string from right to left and using the algorithm of Equation 14, the decoding process ends at i=13. The first coordinate column of D gives 100. FIG. 5 shows the progress of decoding by stream-type ABS in this example.

[1-5. Improved stream type ABS]
Next, a stream-type ABS (also referred to as improved stream-type ABS for convenience in this application) used in the information processing apparatus and the like according to the present invention will be described.

Characterize infinite sequences using machine language. Here, we will provide the definition of the expression mechanical used below.

とする。[０，１]に属する、あるαとρとが存在して、

又は

が成り立つとき、無限語ｘは機械的であると呼ばれる。特に、αが無理数であるとき、ｘは無理数機械的であると呼ばれる。 (Definition 8) Infinite word

shall be. There exists a certain α and ρ belonging to [0,1],

or

An infinite term x is said to be mechanical if . In particular, when α is an irrational number, x is said to be irrational mechanical.

The following theorem is known regarding the relationship between machine language and Sturm sequences.

がスツルム的であるのは、ｘが無理数機械的であるときであり、またその時に限る（非特許文献３参照）。 (Theorem 2) Infinite word

is Sturmian if and only if x is irrational mechanical (see Non-Patent Document 3).

The following lemma characterizes the first irreducible condition by stream-based encoding.

とする。このとき、全てのｓ∈{０，１}に対して、次に示す式１５が成り立つのは、第一既約条件が満たされるときであり、またそのときに限られる。 (Lemma 1) Regarding the appearance rate p,

shall be. At this time, for all s∈{0,1}, the following equation 15 holds true only when the first irreducible condition is satisfied.

Note that in stream-type ABS, a rational number has conventionally been used for the appearance rate p (see Non-Patent Documents 1 and 2). On the other hand, unless it is assumed that the appearance rate p is an irrational number, s=s _p,0 is not irrational and mechanical in stream type ABS. That is, since sp _,0 is not Sturmian according to Theorem 2 above, Lemma 1 does not necessarily hold true.

Consider a while loop expressed by Equation 16 below in stream-type ABS encoding. Here, i∈J _l and u∈{0,1}.

をｔ＝ｇ_ｓ(ｉ)により定める。ｗｈｉｌｅループのアルゴリズム並びに

及び

の定義により、各ｓ∈{０，１}に対して、ｇ_ｓは

から

への全射であることが非特許文献１により示されている。 For each s∈{0,1}, the mapping based on the while loop

is determined by t=g _s (i). While loop algorithm and

as well as

By the definition, for each s∈{0,1}, g _s is

from

Non-patent document 1 shows that it is a surjection to .

からそれ自身の中への写像Ｆｓが得られる。 In this way, for each s∈{0,1}, defined by Equation 17 shown below,

A mapping Fs into itself is obtained.

F _S (x)=C(s, g _s (x)), x∈J _l ... (Formula 17)

For each s∈{0,1}, by solving the integer equation F _S (x)=x and x∈J _l , we obtain Lemma 2 described below.

(Lemma 2) Suppose that Equation 15 holds true for all s∈{0,1}. At this time, F ₁ has at most one fixed point when and only when Equation 18 shown below holds true.

が成立し、且つ、次に示す式１９が成立するときか、

又は、

が成立し、且つ、次に示す式２０が成立するときのいずれかである。 Also, F ₀ has at most one fixed point because

holds true, and the following equation 19 holds,

Or

is satisfied, and Equation 20 shown below is also satisfied.

の合成関数を簡単のため、次に示す式２１を用いて表す。 For binary n block u=u ₁ u ₂ ... _un ∈{0,1} ⁿ ,

For simplicity, the composite function of is expressed using Equation 21 shown below.

である。記号において、合成における関数列の順序とブロックにおける文字列の順序とが逆であることに注意する。この記号を用いると、ストリーム型ＡＢＳが既約であることが次のように定式化される。 Expression 21 can be expressed using mathematical symbols.

It is. Note that in symbols, the order of function strings in composition and the order of strings in blocks are reversed. Using this symbol, the fact that stream type ABS is irreducible can be formulated as follows.

The fact that stream type ABS is irreducible can be expressed as follows. For any i and t belonging to J _l , there exists a certain n block uε{0,1} ⁿ , satisfying t=F _u (i).

In this way, using Lemma 2, we obtain Lemma 3, which will be described below.

(Lemma 3) Suppose that (Equation 15) shown in Lemma 1 holds for all sε{0, 1}. At this time, one of the first, second, and third conditions in Corollary 1 is satisfied if, for any i and t belonging to J _l , a certain n block u∈{0,1} ⁿ exists and satisfies t=F _u (i), and is limited to that case.

From the above, we obtain Theorem 3, which will be described below.

とする。このとき、自然数全体がなす集合における区間Ｊ_ｌが既約であるのは、すべてのｓ∈{０，１}に対して、補題1にて示した（式１５）が成立し、且つ系１における第一条件、第二条件及び第三条件のうち一つが成立するときであり、また、そのときに限られる。 (Theorem 3) Regarding the appearance rate p,

shall be. In this case, the interval J _l in the set of all natural numbers is irreducible because (Equation 15) shown in Lemma 1 holds for all s∈{0,1}, and if the system 1 This is when one of the first condition, second condition, and third condition is satisfied, and is limited to that case.

In this way, from Lemma 1 and Theorem 3, Corollary 1, which is the answer to the public problem stated above, is obtained.

[1-6. Supplementary information regarding irrational numbers used in improved stream type ABS]
As described above, in encoding and decoding by improved stream type ABS, p, which is an irrational number, is used as the appearance rate and plays an important role. However, computers cannot directly handle irrational numbers. While this makes the idea of using irrational numbers difficult, there is a concern that it may give the impression that the improved stream type ABS lacks practicality. There is also a concern that users may hesitate to use the improved stream type ABS if p is a rational number even though they wish to use it. This section shows that these concerns are not a problem in improved stream type ABS.

First, when the appearance rate p is a rational number, the β-adic expansion of real numbers described below is known, so by fixing the irrational number β>1, a desired rational number can be easily approximated.

Consider the base β>1. Here β is a real number. β transformation T _β is defined by Equation 22 shown below.

で表される。これは、

及びｎ＝１，２，・・・に対して

と帰納的に定義される。このとき、ｘ∈[０，１)の貪欲β展開は、次に示す式２３で定義されている。 n iterations of the transformation T _β are

It is expressed as this is,

and for n=1, 2,...

is defined inductively. At this time, the greedy β expansion of x∈[0,1) is defined by Equation 23 shown below.

貪欲算法により得られるディジットｘ_ｎ(ｎ＝１，２，・・・)はアルファベット

に属する数である。 here,

The digits x _n (n=1, 2,...) obtained by greedy algorithm are alphabetical

is a number belonging to .

For example, when β=(1+√5)/2, 1/3 is expanded as shown in Equation 24 below.

When β>1 is an irrational number and x∈[0,1) is a rational number, if the β expansion defined in Equation 23 is truncated at n digits, the irrational number expressed by Equation 25 below can be obtained. obtain.

This is an approximation of x by finite β expansion, and the error between x and Equation 25 is evaluated using Equation 26 shown below.

である。 In formula 26, o on the right side is Landau's symbol,

It is.

であるとき、下機械語

を、非特許文献４に従い、次に示す式２７及び式２９により求める。 Finally, regarding the appearance rate p

, the lower machine language

is determined by Equations 27 and 29 shown below according to Non-Patent Document 4.

The Sturm sequence s _p,p is called a characteristic sequence and is expressed as c _p . That is, c _p =s _p,p .

Expression 28, which is a continued fraction expansion of the irrational number p, shown below is expressed as p=[0, a ₁ , a ₂ , a ₃ , . . . ].

であり、ａ_ｉはｐの第ｉ部分商と呼ばれる。得られた部分商列

に対して、ブロック列

を次に示す式２９のように定める。 At this time, for each i that is an element of the set of all natural numbers,

, and a _i is called the i-th partial quotient of p. Obtained partial quotient sequence

For, the block column

is defined as shown in Equation 29 below.

に対して、

及び

このとき、

である。 here,

For,

as well as

At this time,

It is.

For example, when the appearance rate p=1/β, β=(1+√5)/2, p=[0,1,1,1...].

c _p =101101011011010110101...

s _p,0 =0c _p =0101101011011010110101...

The obtained s _p,0 =0c _p corresponds to s in the table shown in FIG.

Note that the occurrence rate p used in the example in the explanation of the theory on which the present invention is based up to this point is a quadratic irrational number obtained using the golden mean, but the occurrence rate p intended in the present invention is a quadratic irrational number. Not limited to number. A similar effect can be obtained by using the appearance rate p, which is an irrational number that is not a quadratic irrational number. Note that in the case of a quadratic irrational number, the expansion of Equation 28 becomes periodic, so implementation is easier. If it is not a quadratic irrational number, it is sufficient to obtain the Sturm sequence s _p,p by 2l-1 bits (digits) (finite value) depending on the desired precision.

[1-7. Brief Summary]
As explained above, necessary and sufficient conditions regarding the occurrence rate p and the state parameter l are given for the compression algorithm of the improved stream type ABS to function normally. The information processing apparatus and the like according to the present invention use the appearance rate p and the state parameter l that satisfy these conditions as input to a compression algorithm. This makes it possible to more stably transmit and receive large amounts of binary data streams efficiently and at high speed. For example, in the era of IoT (Internet of Things) where devices compatible with 5G (5th generation mobile communication system) become widespread, we will realize smoother transmission of communication data, which is expected to increase explosively, and improve society and society. To ensure that individuals receive the benefits of IoT. In addition, such compression technology will ultimately reduce the social burden required to install and expand transmission lines to accommodate the future increase in communication data between devices, not limited to those compatible with 5G. It can more reliably support and promote advanced informatization.

(2. Embodiment)
Below, embodiments of the present invention will be described. Note that the embodiments described below are comprehensive or specific examples. The numerical values, shapes, materials, components, positions, arrangements and connection forms of the components, steps, order of steps, etc. shown are examples, and are not intended to limit the present invention.

[2-1. composition]
FIG. 6 is a block diagram schematically showing an example of the functional configuration of an arithmetic circuit included in the information processing device according to the present embodiment.

The information processing device in the present disclosure is a variety of devices that internally perform some information processing and have a communication function, such as a personal computer, a tablet computer, a server computer, a smartphone, and an active tracker. In addition, in view of the arrival of the IoT era, the present disclosure also applies to various other devices or mobile objects that have not been considered as information processing devices in the past, as long as they perform some kind of information processing internally and are equipped with communication functions. This is what the information processing device refers to. In addition, various devices that control, relay, or monitor communication between these devices may also be included in the information processing device in the present disclosure. Furthermore, elements constituting these devices that provide the information processing function or communication function of each device may also be included in the information processing device in the present disclosure. It does not matter whether the communication performed by these information processing devices is wired communication or wireless communication, and it does not matter what medium is used to convey the data signal.

In such information processing apparatuses, this arithmetic circuit executes a compression method using the above-described improved stream type ABS compression algorithm on an input data stream, and outputs compressed data.

The arithmetic circuit 10 includes an input section 20, an output section 30, a memory 40, and a processor 50.

The input unit 20 receives an input of a data stream to be compressed.

The data stream input to the arithmetic circuit 10 is received from an external device by a communication module included in the information processing device, for example. As another example, a device included in or directly connected to the information processing device may be the source of this data stream. More specifically, moving image data generated by an image sensor, measurement data output by a sensor, audio data read from a recording medium, etc. may be input to the input unit 20 moment by moment as a data stream.

The memory 40 is a storage device and holds a program that describes the compression algorithm of the improved stream type ABS.

Processor 50 executes this program held in memory 40. As a result, the arithmetic circuit 10 executes the data compression method using the improved stream type ABS on the data stream that is the target of compression processing that has been input to the input unit 20 .

The output unit 30 outputs compressed data generated as a result of the processor 50 executing the above program. The compressed data is transmitted to an external device, for example, via a communication module included in the information processing device. Alternatively, the information may be recorded on a recording medium in a recording device included in or connected to the information processing device.

Note that compressed data compressed using the data compression method using the improved stream type ABS must be processed using the data expansion method using the improved stream type ABS in information processing equipment that receives input of this compressed data in the form of a data stream. It is developed using The functional configuration of an information processing device that executes the data expansion method using this improved stream type ABS is also represented in the block diagram shown in FIG. In this case, what the input unit 20 receives is data compressed using the improved stream type ABS data compression method. Furthermore, the data after being expanded by the improved stream type ABS data expansion method executed by the processor 50 is output from the output unit 30.

[2-2. motion]
The operation of the information processing apparatus according to the present embodiment including the arithmetic circuit having the above configuration will be described. FIG. 7 is a flow diagram illustrating an example of the operation procedure of the information processing apparatus according to the present embodiment.

(Step S10) In the information processing device, a data stream to be compressed is input to the arithmetic circuit 10. In the arithmetic circuit 10, an input section 20 receives input of this data stream.

(Step S30) The processor 50 calculates and obtains the appearance rate of either 0 or 1 included in the data stream input to the arithmetic circuit 10.

(Step S50) The processor 50 further inputs the appearance rate p and state parameter l used as inputs to the algorithm of the improved stream type ABS into the system 1 described in the section "1-1. Occurrence rate p and state parameter l" above. It is determined that the following conditions are met. In other words, the appearance rate p is an irrational number satisfying 0<p<1, and the appearance rate is set so that the number of fixed points in the dynamical system for each of the binary values included in the data stream to be compressed does not exceed 1 at the same time. p and the state parameter l are determined. The appearance rate p determined in this way takes a value that approximates the appearance rate calculated in step S30, and the state parameter l is set to one of the first to third conditions together with this appearance rate p. Fulfill.

(Step S70) The processor 50 executes ABS using the determined appearance rate p and state parameter l. As a result, the data stream input to the arithmetic circuit 10 is encoded to generate smaller data, that is, it is compressed.

(Step S90) The compressed data is output from the output section 30 of the arithmetic circuit 10.

The output compressed data is transmitted, for example, directly from a communication module included in the information processing device or to an external device through a communication line.

In addition, in implementation, when the appearance rate p is determined, the state parameter l in step S50 is determined and used to satisfy any one of the three conditions: the first condition, the second condition, and the third condition. It can be designed arbitrarily. For example, in the information processing device, a program written to find the minimum l that satisfies the first condition together with the determined appearance rate p may be executed. More specifically, for example, the irrational number β (for example, the golden mean, which is a quadratic irrational number) used to express the appearance rate and the number of digits n are determined in advance at the design stage. In an information processing device, when the appearance frequency (appearance rate) of 0 and 1 in a data stream to be compressed is determined, this appearance rate p is β-expanded (p=1/β+1/β ² +...+1/β ⁿ ) (determination of the occurrence rate p). Then, along with this appearance rate p, the minimum l that satisfies the first condition is determined (determination of the state parameter l). The reason for using the minimum l is to suppress the computational load required for data compression and expansion of compressed data. Furthermore, when implementing the information processing device that expands compressed data, the same appearance rate p and state parameters as those of the information processing device that compresses the data are designed and acquired.

Next, the operation of a device that acquires compressed data using the improved stream type ABS data compression method will be described. FIG. 8 is a flow diagram illustrating an example of the operation procedure of the information processing apparatus according to the present embodiment that receives compressed data.

(Step S20) In the information processing apparatus, a data stream to be expanded, that is, a data stream of compressed data output in the above-described operating procedure, is input to the arithmetic circuit 10. In the arithmetic circuit 10, an input section 20 receives input of this data stream.

(Step S40) The processor 50 executes the ABS data expansion method based on the value indicated by the data stream input by the input unit 20, using the appearance rate p and the state parameter l used for data compression. Get the uncompressed binary data stream.

(Step S60) The expanded data is output from the output section 30 of the arithmetic circuit 10.

The output expanded data is recorded on a recording medium by, for example, a recording device that is included in or connected to the information processing device, or is presented to the user through a display or a speaker. Alternatively, if this data includes an instruction to the information processing device, an operation according to the instruction is further executed.

[2-3. others]
As described above, the embodiments have been described as examples of the technology according to the present invention. However, the technology according to the present invention is not limited to the embodiments described above, and may be modified by appropriately changing, replacing, adding, omitting, etc. the embodiments. For example, the following modifications are also included in one embodiment of the present invention.

In the information processing apparatus in the above embodiment, the arithmetic circuit executes the software in which the improved stream type ABS algorithm is written to realize compression or expansion of the data stream, but the present invention is not limited thereto. For example, the arithmetic circuit may be a logic circuit that implements all or part of the algorithm in hardware. A specific example is implementation using an FPGA (Field Programmable Gate Array) that can be programmed after manufacturing.

Furthermore, each of the constituent elements constituting the above-mentioned arithmetic circuit may be individually integrated into one chip, or may be integrated into one chip so as to include some or all of them.

Furthermore, the order of execution of the operational procedures (see FIGS. 7 and 8) shown in the above embodiments is not necessarily limited to the order described above, and the order of execution may be determined within the scope of the gist of the invention. You can swap steps, perform multiple steps in parallel, or omit some steps. Furthermore, the processing content of each step is not limited to the above description. For example, in step S50 shown in FIG. 7, p, which is an irrational number, may be determined in light of an evaluation based on an error calculated using Equation 26.

Furthermore, one aspect of the present invention may be an information processing method including all or part of the processing procedure shown in FIG. 7 or 8. Further, one aspect of the present invention may be a program (computer program) for realizing predetermined information processing related to this information processing method by a computer, or a digital signal indicating this program.

Further, as an aspect of the present invention, the above program or digital signal can be stored in a computer-readable recording medium, such as a flexible disk, hard disk, CD-ROM, MO, DVD, DVD-ROM, DVD-RAM, BD ( It may be recorded on a Blu-ray (registered trademark) Disc), a semiconductor memory, or the like. Moreover, the above-mentioned digital signals recorded on these recording media may be used.

Further, as one aspect of the present invention, the above program or digital signal may be transmitted via a telecommunication line, a wireless or wired communication line, a network typified by the Internet, data broadcasting, or the like.

In addition, embodiments realized by arbitrarily combining the respective components and configurations shown in the above embodiments and modified examples are also included within the scope of the present invention.

INDUSTRIAL APPLICABILITY The present invention can be used in information processing equipment that compresses and transmits/receives data streams.

10 arithmetic circuit 20 input section 30 output section 40 memory 50 processor

Claims (10)

comprising an arithmetic circuit that executes a data compression method using ABS (Asymmetric Binary Systems) based on the appearance rate p (0<p<1) of one of the binary values included in the binary data stream that is the target of compression processing,
In the arithmetic circuit,
An irrational number is used as the appearance rate p,
The number of fixed points in each of the first dynamical system, which is a dynamical system regarding one of the two values, and the second dynamical system, which is a dynamical system regarding the other of the two values , does not simultaneously exceed 1 and do not simultaneously take 0. ,
Information processing device. The information processing device according to claim 1, wherein the irrational number is a quadratic irrational number. The occurrence rate p and the natural number l that determines the number of states included in the ABS state set are:

However, s=0 or 1,

as well as

As,
The first condition is

is established, and

or

to be,
The second condition is

is established, and

or

and the third condition is

is established, and

or

The information processing device according to claim 1 or 2, wherein the information processing device takes a value that satisfies any one of three conditions. The arithmetic circuit includes a memory that holds a program and a processor that executes the program,
The information processing device according to any one of claims 1 to 3, wherein the program causes the arithmetic circuit to execute the data compression method by being executed by the processor. The information processing device according to any one of claims 1 to 3, wherein the arithmetic circuit is a logic circuit that executes the data compression method. The information processing apparatus according to any one of claims 1 to 5, comprising an arithmetic circuit that executes a data expansion method using ABS of a binary data stream of compressed data compressed using the data compression method,
In the ABS data expansion method executed by the arithmetic circuit, the occurrence rate p used in the executed data compression method is used, and the number of fixed points in each of the first dynamical system and the second dynamical system is is the number of data compression methods executed. Information processing apparatus. Obtain the occurrence rate of one of the two values included in the binary data stream that is the target of compression processing,
An irrational number p (0<p<1) that approximates the obtained appearance rate and a natural number l that determines the number of states included in the state set of ABS (Asymmetric Binary Systems) are expressed as determining that the number of fixed points in each of the one dynamical system and the second dynamical system, which is a dynamical system regarding the other of the two values , does not exceed 1 at the same time and does not take 0 at the same time ,
An information processing method comprising compressing the binary data stream by using the irrational number p as the appearance rate and performing ABS on the binary data stream using the natural number l. Obtaining a binary data stream of compressed data compressed using the information processing method according to claim 7,
obtaining p as the appearance rate and the natural number l used in the information processing method;
An information processing method, wherein the compressed data is expanded by performing ABS on the binary data stream using the appearance rate p and the natural number l. A program executed by an arithmetic circuit included in an information processing device,
The program is executed by the arithmetic circuit to cause the information processing device to:
Obtain the appearance rate of one of the two values included in the binary data stream that is the target of compression processing,
An irrational number p (0<p<1) and ABS (Asymmetric Binary
The natural number l that determines the number of states included in the state set of Systems) is a fixed point in each of the first dynamical system, which is a dynamical system regarding one of the two values, and the second dynamical system, which is a dynamical system regarding the other of the two values. Let it be decided so that the number of ``does not exceed 1 at the same time and does not take 0 at the same time ,''
A program for compressing the binary data stream by using the irrational number p as the appearance rate and performing ABS on the binary data stream using the natural number l. A program executed by an arithmetic circuit included in an information processing device,
The program is executed by the arithmetic circuit to cause the information processing device to:
obtaining a binary data stream of compressed data compressed using the information processing method according to claim 7;
A program for expanding the compressed data by executing ABS on the binary data stream using the appearance rate p and the natural number l.

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