JP7146729B2 - game machine - Google Patents

Description

The present invention relates to a game machine such as a pachinko machine, an arrange-ball machine, a mammoth ball game machine, a slot, and an enclosed pachinko machine (management game machine) that internally circulates enclosed game balls, and more particularly to a main control side. To provide a game machine in which a payout operation is normally performed even if a power failure occurs in a situation in which prize information to be given to a player remains in the game machine.

2. Description of the Related Art As a conventional game machine such as a pachinko machine, for example, a game machine as described in Patent Document 1 is known. In this gaming machine, when the main control receives the unpaid number data from the payout control during the period from the occurrence of the power failure until the power is turned off, the data is stored in a backup process.

JP 2016-168504 A

However, in the gaming machine as described above, the prize ball information to be paid out remains on the main control side. There was a problem that the data could not be transmitted and thus the payout control could not receive the payout number data normally.

Therefore, in view of the above problems, the present invention provides a gaming machine that normally performs a payout operation even if a power failure occurs in a situation where award information to be given to a player remains on the main control side. purpose.

The above objects of the present invention are achieved by the following means. In addition, although the inside of parenthesis is attached with the reference code|symbol of embodiment mentioned later, this invention is not limited to this.

According to the gaming machine according to the first aspect of the invention, a CPU (for example, a main control CPU 600a shown in FIG. 34) that governs general control of game operations based on a predetermined game program and a RAM (for example, a main control CPU 600a shown in FIG. 34) and a RAM (which can store various data) For example, the main control means (for example, the main control board 60 shown in FIG. 6) including the main control RAM 600c shown in FIG. 34,
sub-control means (for example, sub-control board 80 shown in FIG. 6) that controls various performance operations;
Prize management means (for example, payout/launch control board 70 shown in FIG. 6) for managing prizes given to players;
voltage monitoring means (for example, the voltage monitoring section 1310 shown in FIG. 6) that generates a voltage abnormality signal (for example, the voltage abnormality signal ALARM shown in FIG. 42) that changes to an abnormal value when a voltage drop is detected;
Serial communication means (for example, an asynchronous serial communication circuit (CH0) 646 shown in FIG. 34, an asynchronous a serial communication circuit (CH1) 647);
When an abnormal value of the voltage abnormality signal (for example, the voltage abnormality signal ALARM shown in FIG. 42) generated by the voltage monitoring means (for example, the voltage monitoring unit 1310 shown in FIG. 6) is detected, backup data is created and the backup processing means (for example, power supply abnormality check processing shown in FIG. 47) stored in RAM (for example, main control RAM 600c shown in FIG. 34);
The serial communication means (for example, the asynchronous serial communication circuit (CH0) 646 shown in FIG. 34 and the asynchronous serial communication circuit (CH1) 647 shown in FIG. 34)
First serial transmission means (for example, an asynchronous serial communication circuit (for example, shown in FIG. 34) for serially transmitting the first data regarding a prize to be awarded to the player to the prize management means (for example, payout/launch control board 70 shown in FIG. 6) CH0) 646) and
a second serial transmission means (for example, an asynchronous serial communication circuit (CH1) 647 shown in FIG. 34) for serially transmitting second data relating to the performance operation to the sub-control means (for example, the sub-control board 80 shown in FIG. 6); including
The predetermined game program is
In the initial processing (for example, step S12 shown in FIG. 44), the first baud rate in the first serial transmission means (for example, the asynchronous serial communication circuit (CH0) 646 shown in FIG. 34) and the second serial transmission means (for example, , the second baud rate in the asynchronous serial communication circuit (CH1) 647) shown in FIG. 34, and
In the regular processing (for example, the timer interrupt processing shown in FIG. 48) after the initial processing (for example, step S12 shown in FIG. 44) is completed, the first serial transmission means (for example, the asynchronous serial communication circuit (for example, shown in FIG. 34) CH0) 646) to set the first data to be serially transmitted (for example, step S106 shown in FIG. 48), and the second serial transmission means (for example, asynchronous serial communication shown in FIG. Circuit (CH1) 647) for setting the second data to be serially transmitted (for example, step S102 shown in FIG. 48), and the backup processing means (for example, power failure shown in FIG. 47). check processing) and backup processing (for example, step S88 shown in FIG. 47),
After creating backup data in the backup process (for example, step S88 shown in FIG. 47), the first transmission data set process (for example, step S106 shown in FIG. 48) and the second transmission data set process (for example, Without executing step S102 etc. shown in FIG. 48), wait processing (for example, refer to infinite loop processing after step S91 shown in FIG. 47) for waiting until the voltage at which the control of the game operation cannot be executed is executed,
In the initial processing (for example, step S12 shown in FIG. 44), when setting the first baud rate in the first serial transmission means (for example, the asynchronous serial communication circuit (CH0) 646 shown in FIG. 34), the first transmission From the transmission time until completion of serial transmission of the first data set in the data setting process (for example, step S106 shown in FIG. 48), the backup processing means (for example, power supply abnormality check process shown in FIG. 47) The time from detecting the abnormal value of the abnormal voltage signal (for example, the abnormal voltage signal ALARM shown in FIG. 42) to the voltage at which the control of the game operation cannot be executed (for example, timing T21 to timing T22 shown in FIG. 42 ) is longer, set the first baud rate in the first serial transmission means (for example, the asynchronous serial communication circuit (CH0) 646 shown in FIG. 34),
In setting the second baud rate in the second serial transmission means (for example, the asynchronous serial communication circuit (CH1) 647 shown in FIG. 34) in the initial processing (for example, step S12 shown in FIG. 44), the second transmission From the transmission time until the completion of serial transmission of the second data set in the data setting process (for example, step S102 shown in FIG. 48), the backup processing means (for example, the power supply abnormality check process shown in FIG. 47) The time from detecting an abnormal value of the abnormal voltage signal (for example, the abnormal voltage signal ALARM shown in FIG. 42) to a voltage at which game operation control cannot be executed (for example, timing T21 to timing T22 shown in FIG. 42 setting the second baud rate in the second serial transmission means (for example, the asynchronous serial communication circuit (CH1) 647 shown in FIG. 34) so that the time) becomes longer,
Even after an abnormal value of the abnormal voltage signal (for example, the abnormal voltage signal ALARM shown in FIG. 42) is detected, timer interrupt processing can be executed based on a timer interrupt signal generated at predetermined intervals,
In the timer interrupt process executed after detecting the abnormal value of the abnormal voltage signal, when the first data exists, only one first command is sent to the serial communication means as predetermined data to be serially transmitted. set, and after the first command is set, even if there is the first data, the serial communication means waits until the voltage reaches a level at which game operation control cannot be executed. Secondly, the first command is not set as predetermined data to be serially transmitted .

According to the present invention, the payout operation can be performed normally even if a power failure occurs while prize information to be awarded to the player remains on the main control side.

1 is a perspective view showing the appearance of a gaming machine according to one embodiment of the present invention; FIG. 2 is a front side perspective view showing a state in which the door of the game machine is opened before the game board according to the same embodiment is installed; FIG. It is a front view showing a state in which the door of the game machine is opened before the game board according to the same embodiment is installed. It is a perspective view of the back side showing the appearance of the gaming machine according to the same embodiment. It is a front view of the game board according to the same embodiment. It is a block diagram showing a control device of the game machine according to the same embodiment. (a) shows the memory area of the main control RAM which concerns on the same embodiment, (b) is explanatory drawing explaining the memory map which shows the memory area of the main control ROM which concerns on the same embodiment. FIG. 4 shows a drawing of a production scenario table according to the same embodiment, (a) shows a diagram in which a plurality of production scenario data are stored, and (b) is stored in one layer data of the production scenario data shown in (a). (c) shows a control table referenced by the control code data shown in (b). It is a block diagram which shows VDP which concerns on the same embodiment. (a) to (c) are examples of screens showing conventional fluctuation states in decorative patterns and resident patterns. (a) to (p) are examples of screens showing from the start of variation to the stop of variation in the same embodiment for decorative symbols and resident symbols. It is a timing chart diagram showing from the start of variation to the stop of variation in the same embodiment in the decorative design and the resident design. (a) shows the variation scenario selected in the same embodiment, (b) is an explanatory diagram for explaining the processing contents of the resident symbol variation scenario shown in (a), (c) is It is an explanatory diagram for explaining the processing contents of the normal variation 12-second variation scenario for decorative symbols shown. (a) is an explanatory diagram for explaining a predetermined display area for displaying the resident symbols on the liquid crystal display device, and (b-1) is an explanatory diagram for explaining the processing contents of the resident symbol variation start sequence table L. , (b-2) is an explanatory diagram for explaining the processing contents of the resident symbol fluctuation sequence table L, (b-3) is an explanatory diagram for explaining the processing contents of the resident symbol fluctuation stop sequence table L, (c- 1) is an explanatory diagram for explaining the processing contents of the resident symbol variation start sequence table C, (c-2) is an explanatory diagram for explaining the processing contents of the resident symbol variation sequence table C, and (c-3) is Explanatory diagram for explaining the processing contents of the resident symbol variation stop sequence table C, (d-1) is an explanatory diagram for explaining the processing contents of the resident symbol variation start sequence table R, (d-2) is during resident symbol variation. An explanatory diagram for explaining the processing contents of the sequence table R, and (d-3) is an explanatory diagram for explaining the processing contents of the resident symbol variation stop sequence table R. FIG. (a-1) to (d-1) are explanatory diagrams for explaining predetermined scenes for displaying variations in decorative patterns on the liquid crystal display device, (a-2) to (d-2) are (a-3) is an explanatory diagram for explaining a predetermined scene for displaying the shaking fluctuation of the decorative pattern on the liquid crystal display device. FIG. 10 is an explanatory diagram for explaining a scene in which (a) is an explanatory diagram for explaining the processing contents of the fluctuation start sequence table X, (b) is an explanatory diagram for explaining the processing contents of the high-speed fluctuation sequence table X, and (c) is the processing of the deceleration fluctuation sequence table X. (d) is an explanatory diagram for explaining the processing contents of the shaking fluctuation sequence table X; (e) is an explanatory diagram for explaining the processing contents of the fluctuation stop sequence table X; (a) is an explanatory diagram for explaining the processing contents of the fluctuation start sequence table Y, (b) is an explanatory diagram for explaining the processing contents of the high-speed fluctuation sequence table Y, and (c) is the processing of the deceleration fluctuation sequence table Y. 3D is an explanatory diagram for explaining the processing contents of the shaking fluctuation sequence table Y; and (e) is an explanatory diagram for explaining the processing contents of the fluctuation stop sequence table Y. FIG. (a) is an explanatory diagram for explaining the processing contents of the fluctuation start sequence table Z, (b) is an explanatory diagram for explaining the processing contents of the high-speed fluctuation sequence table Z, and (c) is the processing of the deceleration fluctuation sequence table Z. (d) is an explanatory diagram for explaining the processing contents of the shaking fluctuation sequence table Z; (e) is an explanatory diagram for explaining the processing contents of the fluctuation stop sequence table Z; (a) is an explanatory diagram illustrating decorative patterns 1 to 9, and (b-1) to (b-5) are the scenes shown in FIGS. 15 (a-1) to (d-1). It is explanatory drawing explaining the method of changing a decorative design. (a) to (n) are examples of screens showing an example of variation until the start of SP reach in decorative symbols and resident symbols. It is a timing chart diagram showing from the start of fluctuation in the middle decorative pattern to the start of SP reach. (a) shows a variation scenario selected in executing the variation example shown in FIG. 20, (b) is an explanatory diagram for explaining the processing contents of the normal variation scenario for decorative symbols shown in (a), (c ) is an explanatory diagram for explaining the processing contents of the decorative symbol ten-time variation scenario shown in (a), and (d) is an explanatory diagram for explaining the processing contents of the decorative symbol reach development time variation scenario shown in (a). is. (a) to (d) are explanatory diagrams for explaining predetermined scenes for displaying on the liquid crystal display device fluctuations in left and right decorative symbols when the reach develops. (a) is an explanatory diagram for explaining the processing contents of the change sequence table Y during tense, (b) is an explanatory diagram for explaining the processing contents of the sequence table X during reach development, (c) is a sequence table during reach development FIG. 11 is an explanatory diagram for explaining the processing contents of Z; (a) shows the variation scenario selected based on the SP reach per variation pattern command, (b) shows the variation scenario selected based on the SP reach out variation pattern command, (c) is decoration An explanatory diagram for explaining the processing contents of the SP reach fluctuation scenario for the symbol, (d) is an explanatory diagram for explaining the processing contents of the SP reach hit display scenario for the decorative design, (e) is the SP reach loss display scenario for the decorative design. 2 is an explanatory diagram for explaining the processing contents of . (a) to (c) are screen examples showing a state in which the resident pattern changes at high speed, and the decorative pattern does not start to change, but changes at high speed after being enlarged and displayed. FIG. 27 is a timing chart of left resident symbols and left decorative symbols for explaining switching timings in the screen example shown in FIG. 26; (a) is an explanatory diagram explaining the flow of a conventional game, (b) is an explanatory diagram explaining the flow of a relief game, and (c) is an explanatory diagram explaining the flow of a special electric support symbol game. is. (a) shows a table in which a variation pattern table to be referred to according to the game state is stored, and (b) shows a variation pattern table selected in the normal game state. (a) shows the variation pattern table selected in the first time-saving gaming state (1st to 79th rotation), and (b) shows the variation pattern selected in the first time-saving gaming state (80th to 99th rotation) It is a figure which shows a table. (a) shows the variation pattern table selected in the first time-saving gaming state (100th rotation), (b) shows the variation pattern table selected in the second time-saving gaming state (1st rotation), (c) is a diagram showing a variation pattern table selected in the second time-saving gaming state (2nd to 100th rotations). It is a diagram showing a variation pattern table selected in the second time-saving gaming state (101 to the final rotation). It is an explanatory diagram for explaining the processing contents when the small hit and the special electric sapo symbol are used together. 7 is a block diagram of a one-chip microcomputer mounted on the main control board shown in FIG. 6; FIG. 34A is an explanatory diagram of a reception prescaler register incorporated in the asynchronous serial communication circuit shown in FIG. 34, and FIG. 34B is an explanatory diagram of a reception buffer register incorporated in the asynchronous serial communication circuit shown in FIG. be. 34A is an explanatory diagram of a transmission prescaler register incorporated in the asynchronous serial communication circuit shown in FIG. 34, and FIG. 34B is an explanatory diagram of a transmission buffer register incorporated in the asynchronous serial communication circuit shown in FIG. be. (a) to (c) are timing charts showing a serial communication format of one frame. (a) is an explanatory diagram of a communication setting register built into the synchronous serial communication circuit shown in FIG. 34, and (b) is an explanatory diagram of a transmission data register built into the synchronous serial communication circuit shown in FIG. , (c) is an explanatory diagram of a reception data register incorporated in the synchronous serial communication circuit shown in FIG. 34, and (d) is an explanation of a transmission/reception status register incorporated in the synchronous serial communication circuit shown in FIG. It is a diagram. 7 is a block diagram of a payout control one-chip microcomputer mounted on the payout/launch control board shown in FIG. 6. FIG. (a) is an explanatory diagram of the serial communication baud rate setting register built into the asynchronous serial communication circuit shown in FIG. 39, and (b) is a diagram of the serial communication setting register built into the asynchronous serial communication circuit shown in FIG. It is an explanatory diagram. (a) is an explanatory diagram of an asynchronous serial communication status register incorporated in the asynchronous serial communication circuit shown in FIG. 39, and (b) is an illustration of a serial communication data register incorporated in the asynchronous serial communication circuit shown in FIG. It is an explanatory diagram. FIG. 4 is a timing chart showing the timing from when the external power supply is cut off to when the internal voltage drops. (a) is an explanatory diagram for explaining a state in which the movable accessory device is moving to the front of the liquid crystal display device during the customer waiting demonstration; It is an explanatory diagram for explaining a state in which the liquid crystal display device returns to the origin position (original position), stops the customer waiting demonstration, and displays a normal screen for performing variable display of special symbols. It is a flowchart figure explaining the main process of the main control which concerns on the same embodiment. FIG. 45 is a flowchart for explaining the continuation of the main processing of the main control shown in FIG. 44; FIG. 45 is a flowchart for explaining the setting switching process shown in FIG. 44; It is a flowchart figure explaining a power supply abnormality check process. It is a flowchart figure explaining the timer interrupt processing of the main control which concerns on the same embodiment. It is a flowchart figure explaining the design process normally shown in FIG. 48. It is a flowchart figure explaining the special design process shown in FIG. FIG. 51 is a flowchart for explaining a starting port check process 1 (2) shown in FIG. 50; FIG. 51 is a flowchart for explaining special symbol variation start processing shown in FIG. 50; FIG. 53 is a flowchart for explaining the hit determination process shown in FIG. 52; FIG. 53 is a flowchart for explaining the special electric sapo symbol hit determination process shown in FIG. 52 ; FIG. 10 is a diagram showing a program example of a hit determination table; FIG. 10 is a diagram showing a program example of a hit determination table when there is only one set value; It is a figure which shows the example of a program of a special electric support symbol hit determination table. FIG. 51 is a flow chart diagram for explaining a process during special symbol fluctuation shown in FIG. 50 ; FIG. 51 is a flow chart for explaining processing during a special symbol confirmation time shown in FIG. 50; FIG. 49 is a flowchart for explaining the out-of-use area processing shown in FIG. 48; (a) shows a normal symbol winning determination table used when executing a winning lottery of normal symbols, (b) shows a special symbol jackpot determining table used when executing a winning lottery of special symbols, (c) shows the special symbol small hit determination table used when executing the special symbol lottery, and (d) shows the special electric support symbol hit determination table used when executing the special symbol lottery. It is a figure which shows. It is a flowchart figure which shows the main process of sub-control which concerns on the same embodiment. FIG. 63 is a flowchart showing the data analysis processing shown in FIG. 62; It is a flowchart figure which shows the command reception process of sub-control which concerns on the same embodiment. It is a flowchart figure which shows the timer interrupt processing of sub control which concerns on the same embodiment. (a) shows a flow chart for explaining an initial command list for moving pictures, (b) shows a flow chart for explaining a stationary command list for moving pictures, and (c) is a flow chart for explaining a command list for still pictures. .

Hereinafter, one embodiment of the gaming machine according to the present invention will be specifically described with reference to the drawings, taking a pachinko gaming machine as an example. In the following description, when the directions of up, down, left, and right are indicated, they refer to up, down, left, and right when viewed from the front of the drawing.

<Description of pachinko machine exterior configuration>
First, referring to FIGS. 1 to 6, the external configuration of the pachinko gaming machine according to the present embodiment will be described.

<Description of the exterior configuration of the front of the pachinko machine>
As shown in FIG. 1, the pachinko game machine 1 includes a wooden outer frame 2 and a hinge 4a (see FIG. 2) provided on the front surface of the outer frame 2 and on the left side thereof. It is provided with a rectangular front frame 3 which is pivotally mounted so as to be openable and detachable.

The front frame 3 includes an upper mounting portion 5 and a lower mounting portion 6 provided below the upper mounting portion 5, as shown in FIGS. On the front side of the upper mounting portion 5, an upper opening/closing door 7 supporting a transparent glass is pivoted about the vertical axis via the hinge 4a so as to be openable and detachable. A lower opening/closing door 8 is pivotally attached to the hinge 4b provided on the same side as the hinge 4a so as to be openable and detachable.

As shown in FIG. 1, the lower opening/closing door 8 has an upper tray 9 for storing discharged game balls, and a lower tray for receiving and storing surplus balls when the upper tray 9 is full. A receiving plate 10 is integrally formed. In addition, a ball lending button 11 and a prepaid card ejection button 12 (card return button 12) are provided on the lower opening/closing door 8, and a built-in lamp (not shown) is lit on the surface of the upper tray 9. A push-button type performance button device 13 is provided which can change the performance effect by pressing it. Further, the upper receiving tray 9 is provided with a ball extracting button 14 for drawing down the game balls stored in the upper receiving tray 9, and further provided with a setting button 15 consisting of a substantially cross key. The setting button 15 can be operated by the player, and includes a circular determination key 15a provided in the center, a triangular up key 15b provided above the determination key 15a in the drawing, and a determination key 15b provided above the determination key 15a. A triangular left key 15c provided on the left side of the key 15a in the figure, a triangular right key 15d provided on the right side of the enter key 15a in the figure, and a triangular right key 15d provided on the lower side of the enter key 15a in the figure. and a lower key 15e.

On the other hand, on the right end side of the lower opening/closing door 8, as shown in FIG. 1, a firing handle 16 for operating the firing unit is provided, and as shown in FIGS. A speaker 17 that emits BGM (background music) or sound effects is provided on the face side and in the vicinity of the firing handle 16 . Decorative lamps, such as LED lamps, are arranged at various locations on the upper opening/closing door 7 and the lower opening/closing door 8 to produce a dramatic effect by light decoration.

On the other hand, as shown in FIGS. 2 and 3, the upper mounting portion 5 is provided with a game board mounting frame 18, and the game board YB (see FIG. 1) is attached to the game board mounting frame 18 as shown in FIG. It is installed with the game area 40 shown facing the front, and is fixed within the game board installation frame 18 . That is, as shown in FIG. 3, the upper mounting portion 5 is provided with a plurality of connectors 19 (four in the figure) for connection on the right side lower portion, so that these connectors 19 are connected to the game board YB. The game board YB is mounted in the game board mounting frame 18 by connecting a connector for connection (not shown) provided on the rear surface of the game board YB. Then, the game board YB is fixed within the game board mounting frame 18 by the fixtures 20a and 20b provided in the vertical direction on the right side. As a result, the game board YB is mounted in the game board mounting frame 18, and the upper opening/closing door 7 supporting the transparent glass is provided in front of the game area 40 of the game board YB (see FIG. 1). ). The game area 40 is an area surrounded by ball guide rails UR (see FIG. 5) arranged on the surface of the game board YB.

On the other hand, as shown in FIGS. 2 and 3 , the lower mounting portion 6 has a firing mechanism 21 arranged substantially in the center in the left-right direction, and a speaker 17 is placed on the right side of the firing mechanism 21 . As shown in FIG. 3, the shooting mechanism 21 includes a support plate 22 made of sheet metal, a shooting rail 23 attached to the front surface of the support plate 22, and a game ball attached to the front surface of the support plate 22 for shooting. a ball holding portion 25 that holds the ball at a firing standby position 24 on the firing rail 23; and a payout/shooting control board 70 equipped with a shooting motor for driving the hitting mallet 27 in the hitting direction via the drive shaft 26 .

<Description of the appearance configuration of the game board>
On the other hand, in the game area 40 of the game board YB, as shown in FIG. 5, a liquid crystal display device 41 comprising an LCD (Liquid Crystal Display) or the like is arranged substantially in the center. The liquid crystal display device 41 divides the display area into three areas, left, middle and right, and is capable of independently displaying numbers, characters, characters (character conversations, lyric telops, etc.) or special patterns. is. A top decoration 42a, a left decoration 42b, and a right decoration 42c are provided around the liquid crystal display device 41, and the back side of the top decoration 42a, the left decoration 42b, and the right decoration 42c are provided. A movable accessory device 43 is arranged.

As shown in FIG. 5, the movable accessory device 43 includes an upper movable accessory 43a, a left movable accessory 43b, a right movable accessory 43c, an upper left movable accessory, and a left movable accessory 43c, which performs a predetermined effect operation as the game progresses. It is composed of an object 43d and a motor (not shown) such as a two-phase stepping motor for driving the upper, left, right, and upper left movable accessories 43a to 43d, respectively. Decorative lamps, such as LED lamps, are arranged on these upper/left/right/upper left movable accessories 43a to 43d to produce a dramatic effect by light decoration.

On the other hand, right below the liquid crystal display device 41, a special symbol 1 starting port 44 is arranged, and a special symbol 1 starting port switch 44a (see FIG. 6) for detecting winning balls is provided therein. Then, the number of valid winning balls detected by the special symbol 1 starting port switch 44a (see FIG. 6), that is, the number of the first start holding balls is displayed on the liquid crystal display device 41 in a predetermined number (for example, 4). . It should be noted that the number of the first start and hold balls is added by 1 (+1) when a game ball enters the special symbol 1 start port 44 and is detected by the special symbol 1 start port switch 44a (see FIG. 6). When the variable display of special symbols such as numbers, characters or patterns (decorative patterns) is started, 1 is subtracted (-1).

On the other hand, a special symbol 2 starting port 45 is arranged on the lower right side of the liquid crystal display device 41, and a special symbol 2 starting port switch 45a (see FIG. 6) for detecting winning balls is provided therein. Then, the number of valid winning balls detected by the special pattern 2 starting port switch 45a (see FIG. 6), that is, the number of second start holding balls is displayed on the liquid crystal display device 41 in a predetermined number (for example, 4). . It should be noted that the number of the second starting and holding balls is added by 1 (+1) when a game ball enters the special symbol 2 starting port 45 and is detected by the special symbol 2 starting port switch 45a (see FIG. 6). When the variable display of special symbols such as numbers, characters or patterns (decorative patterns) is started, 1 is subtracted (-1).

On the other hand, as shown in FIG. 5, the special symbol 2 starting port 45 is provided with an opening/closing member 45b, and when the opening/closing member 45b is opened, a game ball is easily won. The opening/closing member 45b is opened a predetermined number of times for a predetermined period of time in the case of winning a lottery for a normal symbol, which will be described later. In addition, hereinafter, a device including such an opening/closing member 45b and a normal electric accessory solenoid 45c may be referred to as a normal electric accessory.

On the other hand, a winning device 46 is arranged on the right side of the special symbol 1 starting port 44, as shown in FIG. The winning device 46 opens and closes a large winning opening (not shown) that is closed by the open/close door 46a when a special symbol lottery, which will be described later, is won, that is, in a special game state caused by a big win. A door 46a is driven and controlled by a special electric accessory solenoid 46b (see FIG. 6), and a game ball can enter a big winning hole (not shown). A game ball entering this big winning hole (not shown) is detected as a winning ball by a big winning hole switch 46c (see FIG. 6) provided inside the big winning hole (not shown).

On the other hand, when the lottery for the special symbol is not won, that is, when it is not in the special game state, the opening/closing door 46a is driven and controlled by the special electric role item solenoid 46b (see FIG. 6), and a large winning opening (not shown) is opened. is closed. As a result, the game ball cannot enter the big winning hole (not shown). Incidentally, hereinafter, a device combining such an opening/closing door 46a and a special electric accessory solenoid 46b may be referred to as a special electric accessory.

On the other hand, in the upper right part of the liquid crystal display device 41, as shown in FIG. 5, a normal symbol starting port 47 consisting of a gate is arranged. 6) are provided. In addition, on the right side of the winning device 46 and on the left side of the special symbol 1 start opening 44, general winning openings 48 are arranged, respectively. The general prize winning openings 48 are an upper right general winning opening 48a arranged on the right side of the winning device 46, an upper left general winning opening 48b arranged on the left side of the special symbol 1 starting opening 44, and a middle left general winning opening. It is composed of an opening 48c and a lower left general winning opening 48d. An upper right general prize winning port switch 48a1 (see FIG. 6) for detecting passage of game balls is provided inside the upper right general prize winning port 48a, and an upper left switch for detecting passage of game balls is provided inside the upper left general prize winning port 48b. A general winning opening switch 48b1 (see FIG. 6) is provided, and a middle left general winning opening switch 48c1 (see FIG. 6) for detecting passage of game balls is provided inside the middle left general winning opening 48c, and a lower left general winning opening is provided. Inside the opening 48d, a lower left general winning opening switch 48d1 (see FIG. 6) for detecting passage of game balls is provided.

On the other hand, directly below the special symbol 1 starting port 44, an out port 49 is arranged into which a game ball (out ball) that has flowed down to the most downstream part of the game area 40 without winning a prize is entered. A game ball entering the out port 49 is detected as a non-winning ball by an out port switch 49a (see FIG. 6) provided inside. Since it will flow down to the most downstream part, it will be detected by the out port switch 49a (see FIG. 6). Therefore, the out port switch 49a (see FIG. 6) detects the total number of ejected outs, that is, the same number of game balls as the game balls shot into the game area 40 by the shooting handle 16. FIG.

On the other hand, in the lower right peripheral portion of the game area 40 of the game board 4, three 7-segments are arranged side by side, two of which are special symbol display devices 50, and the other 7-segment display devices. 52a is for displaying the special symbol 1, the special symbol 2, the number of start pending balls of normal symbols, and the game state. As shown in FIG. 5, the special symbol display device 50 is composed of a special symbol 1 display device 50a and a special symbol 2 display device 50b. A normal symbol display device 51 composed of LEDs is provided, and further, a round lamp 52b for informing the number of rounds of the jackpot game, and a right-handed informing lamp 52c for informing right-handed hitting are provided.

Further, an identification lamp device 50A indicating identification information corresponding to the special pattern 1 and the special pattern 2 is provided on the upper end side of the left decoration 43b.

This identification lamp device 50A has first and second identification lamps 50Aa and 50Ab for informing the player of the information that the special pattern 1 and the special pattern 2 are fluctuating or that the special pattern 1 and the special pattern 2 are hit and lost. have. The first identification lamp 50Aa corresponds to the special symbol 1, and the second identification lamp 50Ab corresponds to the special symbol 2. When the special symbol 1 is fluctuating, the first identification lamp 50Aa blinks, when the special symbol 1 wins, the first identification lamp 50Aa lights, and when the special symbol 1 fails, the first identification lamp 50Aa. turns off. Further, when the special pattern 2 is fluctuating, the second identification lamp 50Ab blinks, when the special pattern 2 is a win, the second identification lamp 50Ab lights, and when the special pattern 2 is lost, the second identification lamp. 50Ab is for extinguishing.

In the game area 40 of the game board 4, a plurality of game nails (not shown) are arranged, and a windmill 53 as a member for changing the falling direction of the game balls is arranged.

<Description of the exterior configuration of the back of the pachinko machine>
As shown in FIG. 4, the rear surface of the pachinko game machine 1 constructed as described above is provided with a frame-shaped back mechanism plate 54 that covers the game board mounting frame 18 and holds down the game board YB from the back side. there is A game ball storage tank 55 for storing game balls supplied from a game ball supply device (not shown) of the pachinko hall side island facility is provided on the upper right side of the back mechanism plate 54. A tank rail 56 is provided for leading out balls from the game ball storage tank 55 .

A payout device 57 and a payout passage 58 are attached to the inclined lower end of the tank rail 56, and when a game ball enters a winning opening such as a big winning opening (not shown), or a game ball lending device When there is a ball lending command from (not shown), the game balls in the game ball storage tank 55 are paid out by the payout device 57 through the tank rail 56, and the game balls are sent through the payout passage 58 to the upper tray 9 ( (See Fig. 1).

A transparent back cover 59 (see also FIG. 3) attached detachably to the back side of the game board YB is mounted substantially in the center of the back mechanism plate 54. A transparent sub-control board case 80a containing the control board 80 is detachably provided. Under the sub-control board case 80a, a transparent main control board case 60a containing the main control board 60 is detachably provided. A transparent payout/fire control board case 70a containing the board 70 is detachably provided. Further, below the main control board case 60a, a power board case 130a containing a power board 130 is detachably provided.

<Description of the control device>
Next, a control device that performs electronic control according to the progress of a game provided in the pachinko game machine 1 having the above-described exterior configuration will be described with reference to FIG. As shown in FIG. 6, this control device includes a main control board 60 that controls the overall game operation, a payout/shooting control board 70 that pays out game balls based on control commands from the main control board 60, It is mainly composed of a sub-control board 80 that controls images, light, and sound.

<Description on the main control board>
The main control board 60 is composed of a main control CPU 600a, a main control ROM 600b that stores a game program describing a series of game control procedures, and a main control RAM 600c that functions as a work area and a buffer memory. A computer 600 displays the content (performance display) of the ratio of how many prize balls have been won in a low probability time (normal low probability of winning lottery), and generates a special game state advantageous to the player. A measurement/setting display device 610 consisting of 7 segments, which is also used to display probability setting contents, a RAM clear switch 620, and a setting key switch 630 are mainly mounted.

A payout/shooting control board 70 for controlling the payout motor M to pay out game balls is connected to the main control board 60 configured as described above. And further, a special symbol 1 start port switch 44a for detecting winning to the special symbol 1 start port 44, a special symbol 2 start port switch 45a for detecting winning to the special symbol 2 start port 45, and a normal symbol start port A normal symbol start opening switch 47a for detecting the passage of 47 and a winning to the general winning opening 48 (upper right general winning opening 48a, upper left general winning opening 48b, middle left general winning opening 48c, lower left general winning opening 48d) are detected. An upper right general winning opening switch 48a1, an upper left general winning opening switch 48b1, a middle left general winning opening switch 48c1, a lower left general winning opening switch 48d1, and a large winning opening (not shown) opened or closed by the open/close door 46a. A large winning opening switch 46c for detection and an out opening switch 49a capable of detecting the same number of game balls as the game balls shot into the game area 40 by the shooting handle 16 are connected. Furthermore, a normal electric accessory solenoid 45c that controls the operation of the opening/closing member 45b, a special electric accessory solenoid 46b that controls the operation of the opening/closing door 46a, a special symbol 1 display device 50a, and a special symbol 2 display device 50b , a normal symbol display device 51, a 7-segment display device 52a, a round lamp 52b, and a right-handed informing lamp 52c are connected.

The main control board 60 configured in this way is advantageous to the player when the main control CPU 600a receives a signal from the special symbol 1 starting port switch 44a, the special symbol 2 starting port switch 45a, or the normal symbol starting port switch 47a. A lottery is conducted to determine whether to generate a special game state (so-called "win") or not to generate a special game state that is advantageous to the player (so-called "losing"), and the lottery result is the success or failure information. The variation pattern of the special design, the display contents of the stop design or the normal design are determined, and the determined information is transmitted to the special design 1 display device 50a, the special design 2 display device 50b or the normal design display device 51. As a result, the lottery result is displayed on the special symbol 1 display device 50a, the special symbol 2 display device 50b, or the normal symbol display device 51. Further, the main control board 60, that is, the main control CPU 600a generates an effect control command DI_CMD including the determined information and transmits it to the sub control board 80. In addition, the main control board 60, that is, the main control CPU 600a, the special symbol 1 starting opening switch 44a, the special symbol 2 starting opening switch 45a, the upper right general winning opening switch 48a1, the upper left general winning opening switch 48b1, the middle left general winning opening switch When receiving signals from 48c1, lower left general winning opening switch 48d1, and large winning opening switch 46c, determine how many game balls are to be paid out to the player, and pay out a payout control command PAY_CMD including the determined information. - By transmitting to the launch control board 70, the payout/launch control board 70 pays out game balls to the player.

As a result of the lottery, when the lottery for the normal symbol is won, the normal electric accessory solenoid 45c is driven and controlled so that the opening/closing member 45b is opened for a predetermined number of times and for a predetermined time, and when the lottery for the special symbol is won, A special electric accessary item solenoid 46b is controlled to open a large winning opening (not shown).

On the other hand, the main control board 60, that is, the main control CPU 600a, includes the special symbol 1 starting opening switch 44a, the special symbol 2 starting opening switch 45a, the upper right general winning opening switch 48a1, the upper left general winning opening switch 48b1, and the middle left general winning opening switch. Each time a signal is received from 48c1, a lower left general prize winning port switch 48d1, and a large winning prize port switch 46c, the number of prize balls is counted, and each time a signal is received from the out port switch 49a, the total number of discharged game balls is counted. to measure Then, the main control board 60, that is, the main control CPU 600a, based on the measured number of prize balls and the total number of game balls discharged, shows the content (performance display) related to the ratio of how many prize balls were played at the time of low probability. Output to the measurement/setting display device 610 . As a result, the measurement/setting display device 610 displays the content (performance display) related to the ratio of how many prize balls have been won at the time of low probability.

Furthermore, the measurement/setting display device 610 can display the setting contents of the probability of generating a special game state advantageous to the player, for example, in six stages from "1" to "6". . Therefore, in order to change such setting contents, when a dedicated key is inserted into the setting key switch 630 and turned ON, the RAM clear switch 620 is operated to increase the probability of generating a special game state advantageous to the player. For example, the setting contents can be changed in six stages from "1" to "6" (for example, the setting "6" has the highest probability of generating a special game state advantageous to the player). , setting "1" has the lowest probability of generating a special game state advantageous to the player). The content of the setting change is displayed on the measurement/setting display device 610, and when the content of the setting change is confirmed, the dot on the lower right side of the 7-segment lights up to indicate that the content of the setting has been confirmed. It's becoming

On the other hand, when the RAM clear switch 620 is pressed by inserting a dedicated key into the setting key switch 630 and when the RAM clear switch 620 is pressed, all the memory areas of the main control RAM 600c (see FIG. 6) are cleared. is not cleared, and only a part of the memory area is cleared. That is, as shown in FIG. 7(a), the main control RAM 600c has memory space addresses 0000H to 0100H out of memory space addresses 0000H to 0200H. In the normal RAM area 600ca used as a memory space address 0100H to 0110H is an unused area 600cb, and the memory space address 0110H to 0130H is a normal used during game processing such as lottery processing In the stack area 600cc, the memory space addresses 0130H to 0150H are the unused area 600cd, and the memory space addresses 0150H to 0190H are the prize balls measured by the main control board 60, that is, the main control CPU 600. In the measurement RAM area 600ce that stores the total number of game balls shot into the game area 40, including the number and non-winning number, memory space addresses 0190H to 01E0H are unused areas 600cf and memory space address 01E0H. Addresses to 0200H constitute a measurement stack area 600cg used for measuring the total number of game balls shot to the game area 40 including the number of winning balls and the number of non-winning balls.

Thus, in the main control RAM 600c configured as described above, when the RAM clear switch 620 is pressed, the measurement RAM area 600ce and the measurement stack area 600cg of the main control RAM 600c are not cleared, and the normal RAM area 600ca and the normal RAM area 600ca are cleared. 600cc of the stack area for use is cleared. By doing so, it is possible to prevent the total number of game balls shot into the game area 40 including the measured number of prize balls and the number of non-win prizes from being erroneously cleared. In this embodiment, when the RAM clear switch 620 is pressed, the normal RAM area 600ca and the normal stack area 600cc are cleared. Including, memory space addresses 0000H to 0150H may be cleared.

The normal RAM area 600ca, the normal stack area 600cc, the measurement RAM area 600ce, and the measurement stack area 600cg are each started from an address whose last digit is 0, and the normal RAM area 600ca and the normal stack are An unused area 600cb is provided between the area 600cc, an unused area 600cd is provided between the normal stack area 600cc and the measurement RAM area 600ce, and a measurement RAM area 600ce and measurement stack area 600cg are provided. By providing an unused area 600cf between . This prevents other areas from being affected when the program runs out of control.

On the other hand, in the main control ROM 600b, as shown in FIG. 7(b), out of memory space addresses 8000H to A800H, memory space addresses 8000H to 8B90H are programs used during game processing such as lottery processing. is stored in the normal program area 600ba, memory space addresses 8B90H to 9000H are unused areas 600bb, and memory space addresses 9000H to 9A00H are used for game processing such as lottery processing. In the normal data area 600bc where data is stored, memory space addresses 9A00H to 9C00H are unused areas 600bd, and memory space addresses 9C00H to A010H contain the number of prize balls and the number of non-win prizes. In the measurement program area 600be, which stores a program used for measuring the total number of game balls shot into the game area 40, memory space addresses A010H to A200H are unused areas 600bf, Memory space addresses A200H to A320H are a measurement data area in which data used when measuring the total number of game balls shot into the game area 40, including the number of winning balls and the number of non-winning balls, is stored. 600bg, memory space addresses A320H to A780H are an unused area 600bh, and memory space addresses A780H to A800H are a vector table area 600bi.

The main control RAM 600c configured in this way has a normal program area 600ba, a normal data area 600bc, a measurement program area 600be, a measurement data area 600bg, and a vector table area 600bi. Starting from an address starting from 0, an unused area 600bb is provided between the normal program area 600ba and the normal data area 600bc, and an unused area is provided between the normal data area 600bc and the measurement program area 600be. An unused area 600bf is provided between the measurement program area 600be and the measurement data area 600bg, and an unused area 600bh is provided between the measurement data area 600bg and the vector table area 600bi. By providing the area, each area can be distinguished. This prevents other areas from being affected when the program runs out of control.

<Description on payout/launch control board>
The payout/launch control board 70 receives a payout control command PAY_CMD from the main control board 60 (main control CPU 600a) and generates a payout motor signal based on the received payout control command PAY_CMD. Then, the generated payout motor signal is used to control the payout motor M to pay out game balls to the player. Further, the payout/shooting control board 70 responds to the player's operation to launch the game balls based on the prize ball counting signal indicating the payout operation of the game balls and the status signal related to the abnormality of the payout operation. Perform the process to start or stop.

On the other hand, a touch sensor is provided on the periphery of the firing handle 16 shown in FIG. Then, it is output to the payout/launch control board 70 . In response to this, the payout/launch control board 70 will transmit the detection signal to the main control board 60 (main control CPU 600a). And the main control board 60 (main control CPU 600a) will transmit the detection signal to the sub control board 80 as the effect control command DI_CMD. This makes it possible to transmit information as to whether or not the player touched the handle 16 to play the game to the sub-control board 80 .

<Description on the sub-control board>
The sub-control board 80 receives the effect control command DI_CMD from the main control board 60 (main control CPU 600a), executes and controls various effects, and controls the display image displayed on the liquid crystal display device 41. A sub-one-chip microcomputer composed of a sub-control ROM 800b that stores a control program describing the production control procedure, a production scenario table PR_TBL shown in FIG. 800 is installed.

Furthermore, the sub-control board 80 includes a sound LSI 801 that generates desired BGM and sound effects, a sound RAM 802 that functions as a work area and buffer memory, and a display on the liquid crystal display device 41 based on instructions from the sub-one-chip microcomputer 800 . DDR2 SDRAM 804 comprising a VDP 803 for generating image data to be processed, a work area for decompressing compressed moving image data, a frame buffer area for temporarily storing image data to be displayed on the liquid crystal display device 41, and still image compression. A game ROM 805 in which data, CG data of compressed moving image data, and sound data such as BGM and sound effects are stored in advance is installed. A still image is a so-called sprite image, which indicates a single image such as text data such as characters, a background image, or a special design. In addition, a moving image means a set of a plurality of still images (for a plurality of frames) that change continuously. is reproduced.

The sub-control board 80 configured in this manner is connected to a decorative lamp board 90 on which a decorative lamp such as an LED lamp that produces a lamp effect is mounted. ) A push-button type performance button device 13 is connected which can change the performance effect by being pressed by the player when lit, and a speaker 17 is connected to emit BGM, effect sound, and the like. Further, the sub-control board 80 is connected with a movable accessory device 43 that performs a predetermined effect operation as the game progresses, and the special symbol 1 and the special symbol 2 are changing, or the special symbol 1 and the special symbol are changing. An identification lamp device 50A for informing the player of the information of winning or losing 2 is connected, a setting button 15 capable of various settings is connected, and a liquid crystal display device 41 is connected. Needless to say, this decorative lamp board 90 is also equipped with the decorative lamps arranged on the upper, left, right, and upper left movable accessories 43a to 43d.

Thus, the sub-control board 80 configured in this manner is based on the special symbol variation pattern based on the lottery result transmitted from the main control board 60 (main control CPU 600a), the current game state, the number of start pending balls, and the lottery result. The sub-control CPU 800a receives the effect control command DI_CMD including basic information necessary for the decorative symbols to be stopped. Then, the sub-control CPU 800a determines an effect pattern corresponding to the received effect control command DI_CMD by lottery from a large number of effect patterns stored in advance in the sub-control ROM 800b, and executes the determined effect pattern. The instructing control signal is temporarily stored in the sub-control RAM 800c.

The sub-control CPU 800a transmits to the sound LSI 801 a control signal relating to sound among the control signals instructing execution of the performance pattern stored in the sub-control RAM 800c. In response to this, the sound LSI 801 reads sound data corresponding to the control signal from the game ROM 805 or the sound RAM 802 and outputs it to the speaker 17 . As a result, the speaker 17 emits BGM and sound effects corresponding to the determined production pattern.

Further, the sub-control CPU 800a transmits to the decoration lamp board 90 a control signal related to light, among the control signals for instructing execution of the performance pattern stored in the sub-control RAM 800c. As a result, the decorative lamp board 90 controls lighting or extinguishing of the decorative lamp such as the LED lamp that produces the lamp effect, so that the lamp effect corresponding to the determined effect pattern is executed. .

Then, the sub-control CPU 800a transmits to the VDP 803 a command list relating to images among the control signals instructing execution of the effect patterns stored in the sub-control RAM 800c. As a result, the VDP 803 generates image data so as to display an image based on the command list, and transmits the generated image data to the liquid crystal display device 41, thereby displaying an image corresponding to the determined effect pattern. It will be displayed on the liquid crystal display device 41 .

Further, the sub-control CPU 800a transmits to the movable accessory device 43 a control signal relating to the movable accessory, among the control signals for instructing execution of the performance pattern stored in the sub-control RAM 800c. As a result, the movable accessory device 43 moves according to the determined effect pattern.

<Description of production scenario table>
Here, the effect scenario table PR_TBL stored in the sub-control ROM 800b will be described in detail with reference to FIG. As shown in FIG. 8A, the effect scenario table PR_TBL stores a plurality of effect scenario data PS_DATA corresponding to effect patterns determined by the sub-control CPU 800a. The effect scenario data PS_DATA stores a plurality of 1-layer data PS_DATA1 which are data for each layer used when drawing image data to be displayed on the liquid crystal display device 41 . As shown in FIG. 8B, this 1-layer data PS_DATA1 includes frame data PS_DATA10 for drawing 1 to 10 frames, control code data PS_DATA11, and a position to be displayed on the liquid crystal display device 41. It stores coordinate data PS_DATA12, pixel calculation data PS_DATA13 such as image deformation, enlargement, reduction and transparency, and enlargement/reduction data PS_DATA14 indicating image enlargement/reduction. Furthermore, sound data PS_DATA 15 indicating the sound emitted from the speaker 17, movable accessory data PS_DATA 16 for moving the movable accessory device 43, and lighting or Lamp data PS_DATA17 for extinguishing the lamp are stored.

The control code data PS_DATA11 stores the address address of the sub-control ROM 800b in which the control table CH_TBL shown in FIG. . That is, the control table CH_TBL stores a plurality of character data CH_DATA, as shown in FIG. 8(c). address data PS_DATA 111 indicating the address address of , image size data PS_DATA 112 indicating the image size, button data PS_DATA 113 indicating the validity/invalidity of the continuous hitting effect of the setting button 15 or the pressing effect of the effect button device 13, and the movable accessory device 43 Movable role product timing data PS_DATA 114 indicating the timing of starting the movement of is stored. As a result, the control code data PS_DATA11 refers to one character data CH_DATA from a plurality of character data CH_DATA stored in the control table CH_TBL shown in FIG. 8(c). The 1-layer data PS_DATA1 stored in the effect scenario data PS_DATA are stored in descending order of priority. Control code data PS_DATA11 is stored such that the data PS_DATA110 shown in FIG. PS_DATA11 is stored.

<Description of VDP>
On the other hand, the VDP 803 that generates image data to be displayed on the liquid crystal display device 41 is configured as shown in FIG.

As shown in FIG. 9, the VDP 803 includes an interface circuit (I/F) 8030 for the DDR2 SDRAM 804, an interface circuit (I/F) 8031 for the game ROM 805, and an interface circuit (I/F) for the sub-one-chip microcomputer 800. ) 8032 are incorporated. Further, the VDP 803 includes a system control register 8033 accessed from the sub one-chip microcomputer 800 (sub control CPU 800a) via an interface circuit (I/F) 8032, a command memory 8034 for storing command lists, and a command list. A command parser 8035 for analysis, a CG memory controller 8036 for controlling reading of data in the game ROM 805, a still image decoder 8037 for decoding compressed still image data, a moving image decoder 8038 for decoding compressed moving image data, and a still image decoder. The image decoded (decompressed) by the video decoder 8037 and video decoder 8038 is displayed on the geometry engine 8039 that executes affine transformation such as enlargement, reduction, rotation, movement, projection transformation, etc., the built-in VRAM 8040, and the liquid crystal display device 41. a rendering engine 8041 that generates image data, a DDR2 SDRAM controller 8042 that controls reading of data in the DDR2 SDRAM 804 and writing of data in the DDR2 SDRAM 804, and image data generated by the rendering engine 8041 to the liquid crystal display device 41. and an LVDS transmission unit 8044 for transmitting image data to the liquid crystal display device 41 in LVDS (Low Voltage Differential Signaling) format.

The system control register 8033 includes a register group in which the sub one-chip microcomputer 800 (sub-control CPU 800a) writes instruction data for the VDP 803, and a register in which the sub one-chip microcomputer 800 (sub-control CPU 800a) reads information indicating the operating state of the VDP 803. It is roughly divided into groups. As a result, the sub-one-chip microcomputer 800 (sub-control CPU 800a) appropriately operates the VDP 803 by writing the necessary set values to the predetermined input registers, and by referring to the values of the necessary output registers, the VDP 803 operates. It is possible to grasp the state.

On the other hand, the command memory 8034 stores a command list, which is sent from the sub one-chip microcomputer 800 (sub control CPU 800a) via an interface circuit (I/F) 8032. . More specifically, the sub one-chip microcomputer 800 (sub-control CPU 800a) pre-stores an effect pattern corresponding to the effect control command DI_CMD received by the main control board 60 (main control CPU 600a) in the sub-control ROM 800b. A lottery is determined from a large number of prepared performance patterns, a command list is created based on the determined performance pattern, and is transmitted to a command memory 8034 via an interface circuit (I/F) 8032.例文帳に追加In response to this, the command memory 8034 stores the command list.

On the other hand, the command parser 8035 analyzes the command list stored in the command memory 8034, and by this command list analysis, the drawing operation is executed every frame. That is, the still image decoder 8037 uses the CG memory controller 8036 based on the analysis result of the command list by the command parser 8035 to perform still image decoding from the address address of the game ROM 805 indicated by the address data PS_DATA111 (see FIG. 8(c)). Compressed image data is read, and the read compressed still image data is decoded (decompressed). The decoded still image data is temporarily stored in the built-in VRAM 8040 .

On the other hand, based on the analysis result of the command list by the command parser 8035, the video decoder 8038 uses the CG memory controller 8036 to compress the video from the address of the game ROM 805 indicated by the address data PS_DATA111 (see FIG. 8(c)). Data is read, and the read compressed moving image data is decoded (decompressed). Then, the decoded video data is temporarily stored in the DDR2SDRAM804.

In this way, the decoded (decompressed) still image and moving image (moving image for one frame) are converted into the analysis result of the command list by the command parser 8035, that is, the various data shown in FIG. 8B (frame data PS_DATA10, Based on the coordinate data PS_DATA 12, pixel calculation data PS_DATA 13, scaling data PS_DATA 14), the geometry engine 8039 performs processing such as affine transformation such as scaling, rotation, and movement, and projection transformation. Image data is stored in the built-in VRAM 8040 , and moving image data is stored in the DDR2 SDRAM 804 .

After that, the rendering engine 8041 functions, the moving image data stored in the DDR2SDRAM 804 is read by the DDR2SDRAM controller 8042, and the rendering engine 8041 draws the moving image data. Next, still image data is read out from the built-in VRAM 8040, and the still image data is drawn. As a result, image data to be displayed on the liquid crystal display device 41 is generated by overwriting the moving image data with the still image data. The generated image data is written into the frame buffer area within the DDR2 SDRAM 804 by the DDR2 SDRAM controller 8042 .

Thus, the image data written in the frame buffer area is read out from the DDR2 SDRAM controller 8042 by the display controller 8043 and transmitted to the liquid crystal display device 41 by the LVDS transmission section 8044 . As a result, the image data generated by the rendering engine 8041 is displayed on the liquid crystal display device 41 .

By the way, the image data displayed on the liquid crystal display device 41 is updated every frame. 6. The VSYNC (vertical synchronization signal) shown in FIG. 9 is transmitted as an interrupt signal from the VDP 803 to the sub-control CPU 800a. Thereby, the sub-control CPU 800 a can grasp that the image data for one frame has been displayed on the liquid crystal display device 41 . Note that this VSYNC interrupt signal is generated, for example, every 33 ms.

<Description of power supply board>
By the way, the power supply to each board described above is supplied from the power supply board 130 shown in FIG. The power supply board 130 includes a voltage generating section 1300 , a voltage monitoring section 1310 and a system reset generating section 1320 . The voltage generation unit 1300 receives an AC voltage of 24 V, which is an external power source supplied from a transformation transformer (not shown) installed in an amusement arcade, and generates a plurality of types of DC voltages. Although not shown, it is supplied to each substrate.

In addition, the voltage monitoring unit 1310 monitors the voltage of the AC 24V AC voltage, and when this voltage is interrupted or a power failure occurs and a voltage abnormality is detected, the voltage abnormality signal ALARM is sent to the main control board 60. is output to The voltage abnormality signal ALARM outputs a signal of "L" level when the voltage is abnormal, and outputs a signal of "H" level when it is normal.

On the other hand, the system reset generator 1320 generates a system reset signal RST at power-on, and the generated system reset signal RST is output to each substrate.

<Description of decorative design and resident design>
Next, decorative patterns and resident patterns will be specifically described with reference to FIGS. 10 to 27. FIG.

As shown in FIG. 10(a), the decorative patterns are displayed large in the center of the screen as shown in the image P1A of the liquid crystal display device 41, and the left decorative pattern (see image P1Aa) and the middle decorative pattern (see image P1Ab) are displayed. ) and the right decorative pattern (see image P1Ac). In the illustration, the left decorative design (image P1Aa) stops at "7", the middle decorative design (see image P1Ab) stops at "6", and the right decorative design (image P1Ac) stops at "7". It is stopped in a state of reach loss.

On the other hand, the resident pattern is displayed in a small size at the lower right corner of the screen, as shown in the image P2A of the liquid crystal display device 41, as shown in FIG. 10(a). This resident pattern is a reduced number of the decorative pattern that is variably displayed, and is variably displayed in synchronism with the decorative pattern in principle. Specifically, the resident symbols are composed of a left resident symbol (see image P2Aa), a middle resident symbol (see image P2Ab), and a right resident symbol (see image P2Ac). This left resident symbol (see image P2Aa) corresponds to the left decorative symbol (see image P1Aa), and is stopped at "7" in the figure. The middle resident symbol (see image P2Ab) corresponds to the middle decorative symbol (see image P1Ab), and is stopped at "6" in the figure. Further, the right resident symbol (see image P2Ac) corresponds to the right decorative symbol (see image P1Ac), and is stopped at "7" in the figure.

Thus, in a state in which the decorative patterns and resident patterns as described above are displayed on the liquid crystal display device 41, the decorative patterns (see images P3A and P5A) are variably displayed as shown in FIGS. Along with this, the resident symbols (see images P4A and P6A) are also variably displayed. Specifically, when the left resident symbol (see image P2Aa) shown in FIG. 10(a) is variably displayed, it is switched to the left resident symbol incremented by +1 as shown in image P4Aa shown in FIG. 10(b). Further, as shown in the image P6Aa shown in FIG. 10(c), the left resident symbol incremented by +1 is displayed. When the medium resident pattern (see image P2Ab) shown in FIG. 10(a) is variably displayed, it is switched to the medium resident pattern incremented by +1 as shown in image P4Ab shown in FIG. 10(b). Further, as shown in the image P6Ab shown in FIG. 10(c), the symbol is switched to the medium resident symbol incremented by +1 and displayed. Further, when the right resident symbol (see image P2Ac) shown in FIG. 10(c) is variably displayed, it is switched to the right resident symbol incremented by +1 as shown in image P4Ac shown in FIG. 10(b). Further, as shown in the image P6Ab shown in FIG. 10(c), it is switched to the right resident symbol incremented by +1 and displayed.

However, if the resident pattern is changed as described above, as shown in FIG. 10, the left resident pattern and the right resident pattern fluctuate synchronously in the fluctuation after the reach loss, so the ready-to-win effect occurs again. There is a problem that there is a possibility of giving the player a misunderstanding that they are not going to do it. In addition, after the big hit, the left resident pattern, the middle resident pattern and the right resident pattern are all the same pattern, so it looks like it fluctuates in the full rotation state, and as a result, the big win effect will occur again. There is a problem that there is a possibility of giving the player a misunderstanding.

Therefore, in the present embodiment, the following processing is performed in order to solve the above problems. That is, as shown in FIG. 11(a), after the decorative pattern (see image P1A) and the resident pattern (see image P2A) on the liquid crystal display device 41 are stopped in a reach-losing state, at timing T1A shown in FIG. , A variation pattern command is transmitted to the sub-control CPU 800a as the effect control command DI_CMD from the main control board 60 (main control CPU 600a). In response to this, the sub-control CPU 800a temporarily stores in the sub-control RAM 800c a control signal instructing execution of the variation pattern determined at timing T1A shown in FIG. As a result, the sub-control CPU 800a transmits to the VDP 803 a command list relating to images (video) among the control signals instructing execution of the effect patterns stored in the sub-control RAM 800c. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, the liquid crystal display device 41 displays an image in which the decorative pattern and the resident pattern have changed.

Specifically, as shown in FIG. 11(b), when the decorative design (see image P10A) scrolls and starts to fluctuate, the resident design is instantly changed to a predetermined resident design (see image P11A). switch. That is, the left resident symbol (see image P2Aa) displayed as "7" as shown in FIG. 11(a) is switched to "1" (see image P11Aa) as shown in FIG. 11(b), As shown in FIG. 11(a), the middle resident pattern (see image P2Ab) displayed as "6" is switched to "2" (see image P11Ab) as shown in FIG. The right resident symbol (see image P2Ac) displaying "7" as shown in (a) is switched to "3" (see image P11Ac) as shown in FIG. 11(b). Then, after instantly switching to a predetermined resident pattern (see image P11A), as shown in FIGS. It will be done. That is, the instantly switched left resident pattern (see image P11Aa) shown in FIG. , as shown in the image P13Aa shown in FIG. 11(d), it is switched to the left resident symbol incremented by 1, and further, as shown in the image P14Aa shown in FIG. 11(d), the left resident symbol incremented by 1 is displayed. It will be displayed by switching to . In addition, the instantaneously switched medium resident pattern (see image P11Ab) shown in FIG. , as shown in the image P13Ab shown in FIG. 11(d), the middle resident symbol is changed to +1 and displayed, and further, as shown in the image P14Ab shown in FIG. 11(d), the middle resident symbol is incremented by +1. It will be displayed by switching to . On the other hand, the instantly switched right resident pattern (see image P11Ac) shown in FIG. Furthermore, as shown in the image P13Ac shown in FIG. 11(d), it is switched to the right resident symbol incremented by +1, and further, as shown in the image P14Ac shown in FIG. 11(d), the right resident symbol incremented by +1 is displayed. It will switch to the pattern and will be displayed. Note that the decorative pattern scrolls and changes as shown in the image P15A shown in FIG. 11(c), the image P16A shown in FIG. 11(d), and the image P17A shown in FIG. 11(e). . Thus, by scrolling and varying the decorative symbols, the symbols displayed at the stop position in the center of the screen are sequentially switched.

Thus, by starting the variation of the resident symbols from the predetermined symbols regardless of the last stop symbol, it is possible to prevent the player from erroneously recognizing the decorative symbols and the resident symbols. . Furthermore, the control can be simplified because the resident symbols are switched instantaneously. In the present embodiment, an example in which decorative symbols are scrolled and varied is shown, but the present invention is not limited to this, and symbols may be sequentially switched in the same manner as the resident symbols. Also, at the stop position, the decorative pattern can be changed by rotating it horizontally around the Y-axis (vertical axis in the figure) or vertically around the X-axis (horizontal axis in the figure). good.

By the way, as shown in FIG. 12, at timing T1A, the left resident symbols, middle resident symbols, and right resident symbols all fluctuate at high speed. Further, since the resident pattern does not fluctuate by scrolling like the decorative pattern, the pattern can be switched instantaneously at the timing T1A without making the player feel uncomfortable.

Thus, as shown in FIG. 12, at timing T1A, the resident patterns (left resident pattern, middle resident pattern, right resident pattern) fluctuate at high speed, and decorative patterns (left decorative pattern, middle decorative pattern, right decorative pattern) are changed at high speed. pattern) starts to fluctuate, at timing T2A, the sub-control CPU 800a transmits to the VDP 803 a command list for high-speed fluctuation of the decorative patterns (left decorative pattern, middle decorative pattern, right decorative pattern). In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(f), an image is displayed on the liquid crystal display device 41 in which the decorative pattern (see image P18A) is changing at high speed.

Next, at timing T3A shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the left decorative pattern. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(g), an image in which the left decorative pattern (see image P19Aa) decelerates and fluctuates is displayed on the liquid crystal display device 41. FIG. At this time, the VDP 803 switches to a deceleration fluctuation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the left decorative pattern determined at the timing T1A shown in FIG. Specifically, in the present embodiment, since the stop symbol of the left decorative symbol is "2", as shown in FIG. ”, and the deceleration fluctuation has started. It should be noted that, during high-speed fluctuation, the decorative pattern has increased transparency (for example, semi-transparency) and is fluctuating at high speed. no.

Thus, as shown in FIG. 11(g), an image in which the left decorative pattern (see image P19Aa) is decelerating and fluctuating is displayed on the liquid crystal display device 41, and further shown in FIG. 11(h). Thus, the liquid crystal display device 41 displays an image in which the left decorative pattern (see image P20Aa) is decelerating and fluctuating.

Next, at timing T3Aa shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for stopping or swinging the left decorative symbol. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(i), the left decorative design (see image P21Aa) becomes the stop design ("2" in the drawing) of the left decorative design determined at timing T1A shown in FIG. A video that fluctuates is displayed on the liquid crystal display device 41 .

Next, at timing T4A shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the right decorative pattern. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(j), an image in which the right decorative pattern (see image P22Ac) decelerates and fluctuates is displayed on the liquid crystal display device 41. FIG. At this time, the VDP 803 switches to a decelerating variation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the right decorative pattern determined at the timing T1A shown in FIG. Specifically, in this embodiment, since the stop symbol of the right decorative symbol is "3", as shown in FIG. ”, and the deceleration fluctuation has started. It should be noted that during high-speed fluctuation, the decorative pattern has increased transparency (for example, semi-transparency) and is fluctuating at high speed. no.

Thus, in this way, as shown in FIG. 11(j), an image in which the right decorative pattern (see image P22Ac) is decelerating and fluctuating is displayed on the liquid crystal display device 41, and further shown in FIG. 11(k). Thus, the liquid crystal display device 41 displays an image in which the right decorative pattern (see image P23Ac) is decelerating and fluctuating.

Next, at timing T4Aa shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for stopping or swinging the right decorative symbol. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(l), the right decorative design (see image P24Ac) becomes the stop design ("3" in the drawing) of the right decorative design determined at timing T1A shown in FIG. A video that fluctuates is displayed on the liquid crystal display device 41 .

Next, at timing T5A shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the middle decorative pattern. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(m), the liquid crystal display device 41 displays an image in which the middle decorative pattern (see image P25Ab) is decelerating and fluctuating. At this time, the VDP 803 switches to a decelerating variation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the medium decoration pattern determined at the timing T1A shown in FIG. Specifically, in the present embodiment, since the stop symbol of the middle decorative symbol is "5", as shown in FIG. ”, and the deceleration fluctuation has started. It should be noted that during high-speed fluctuation, the decorative pattern has increased transparency (for example, semi-transparency) and is fluctuating at high speed. no.

Thus, in this manner, as shown in FIG. 11(m), an image in which the middle decorative pattern (see image P25Ab) is decelerating and fluctuating is displayed on the liquid crystal display device 41, and further, as shown in FIG. 11(n). As shown, the liquid crystal display device 41 displays an image in which the middle decorative pattern (see image P26Ab) is decelerating and fluctuating.

Next, at timing T5Aa shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for stopping or swinging the middle decorative symbols. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(o), the middle decorative design (see image P27Ab) becomes the stop design ("5" in the illustration) of the middle decorative design determined at timing T1A shown in FIG. A video that fluctuates is displayed on the liquid crystal display device 41 .

Next, at the timing T6A shown in FIG. 12, the main control board 60 (main control CPU 600a) sends a pattern determination command as the effect control command DI_CMD to the sub-control CPU 800a. In response to this, the sub-control CPU 800a transmits to the VDP 803 a command list for confirming the design. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(p), the liquid crystal display device 41 displays the stopped decorative pattern (see image P28A) and the stopped resident pattern (see image P29A). At this time, the resident symbols are switched to the stopped symbols regardless of the order of updating the symbols during fluctuation. Specifically, as shown in FIG. 12, the left resident symbol is switched from the changing symbol "6" to the stopped symbol "2", and is displayed on the liquid crystal display device 41 as shown in FIG. 11(p). (see image P29Aa). Then, as shown in FIG. 12, the medium resident symbol is switched from the changing symbol "7" to the stopped symbol "5", and is displayed on the liquid crystal display device 41 as shown in FIG. See image P29Ab). Further, as shown in FIG. 12, the right resident symbol is switched from the changing symbol "8" to the stopped symbol "3", and is displayed on the liquid crystal display device 41 as shown in FIG. 11(p). (See image P29Ac).

Thus, by doing so, it is only necessary to replace the changing resident symbols with the stationary symbols, so that the control can be simplified. Furthermore, the resident design can be replaced with the stop design without waiting for the timing of switching to the next resident design. At this time, the number of frames is smaller than the number of frames required until the next resident pattern is switched, but unlike the decorative pattern, the pattern does not fluctuate by scrolling, so that the player does not feel uncomfortable. Further, since the resident symbols can be stopped in the same state as the decorative symbols are stopped, it is possible to prevent the player from erroneously recognizing the decorative symbols and the resident symbols.

By the way, the processing from the start of fluctuation to the stop of fluctuation shown in FIGS. 11 and 12 is performed using the decorative design normal fluctuation 12-second fluctuation scenario SS_DATA and the resident design fluctuation scenario ZS_DATA shown in FIG. 13(a). ing. This decorative symbol normal variation 12-second variation scenario SS_DATA is one of a plurality of effect scenario data PS_DATA shown in FIG. 8A stored in the sub-control ROM 800b. , one of the plurality of effect scenario data PS_DATA shown in FIG. 8A stored in the sub-control ROM 800b. In this embodiment, the processing is completed in 12 seconds from the timing T1A to the timing T6A shown in FIG. 12, so the processing is completed in 364 frames with one frame of 33 ms.

As shown in FIG. 13(b), the resident symbol variation scenario ZS_DATA is the resident pattern at timing T1A, which is the first frame, when the left resident symbol is subjected to variation processing shown in timings T1A to T6A shown in FIG. Processing is performed in the pattern variation start sequence table L, processing is provided in which nothing is done from the 2nd frame to the 4th frame. Processing is performed in the resident symbol variation sequence table L until the determination command is received, and by receiving the symbol determination command transmitted from the main control board 60 (main control CPU 600a), the resident symbol variation stop sequence table L is displayed. is to be processed. Then, in performing the fluctuation processing of the medium resident symbols at timings T1A to T6A shown in FIG. A process that does nothing is provided until the 4th frame, and thereafter, from the 5th frame until the symbol confirmation command transmitted from the main control board 60 (main control CPU 600a) is received, the sequence table C during resident symbol variation is used. Processing is performed, and processing is performed in the resident symbol variation stop sequence table C by receiving a symbol confirmation command transmitted from the main control board 60 (main control CPU 600a). Further, when the right resident symbol is subjected to variation processing as shown at timings T1A to T6A shown in FIG. to the 4th frame, and after that, from the 5th frame until the symbol confirmation command transmitted from the main control board 60 (main control CPU 600a) is received, the resident symbol changing sequence table R , and by receiving a symbol determination command transmitted from the main control board 60 (main control CPU 600a), the resident symbol variation stop sequence table R is processed. It should be noted that the processing performed in the sequence table L/C/R during the resident symbol variation, which is performed from the fifth frame, is performed until the symbol determination command transmitted from the main control board 60 (main control CPU 600a) is received. becomes. As a result, the variation time of the variation pattern transmitted from the main control board 60 (main control CPU 600a) is no longer relevant, so that only the resident pattern variation scenario ZS_DATA needs to be prepared. It should be noted that the judgment of the current frame is measured by the variable scenario timer that measures during the variable scenario.

Here, the resident symbol variation start sequence tables L, C, R, the resident symbol variation in-process sequence tables L, C, R, and the resident symbol variation stop sequence tables L, C, R will be specifically described with reference to FIG. .

As shown in FIG. 14(a), the resident pattern area displayed on the liquid crystal display device 41 is determined in advance. That is, the object Lx0 for displaying the left resident design is arranged in the resident design area L, the object Cx0 for displaying the middle resident design is arranged in the resident design area C, and the right resident design is displayed. The object Rx0 for is arranged in the resident symbol area R. Thus, design images are displayed on the liquid crystal display device 41 by designating and setting design numbers in these objects Lx0, Cx0, and Rx0. Specifically, pattern numbers: 0 to 8 (0=1 pattern, 1=2 patterns, . is displayed on the liquid crystal display device 41 .

More specifically, as shown in FIG. 14(b-1), in the resident symbol variation start sequence table L, the resident symbol area L is changed so that the resident symbol changes from "123" regardless of the stop symbol of the previous variation. is set to ZuL=0. 12 and 13(b), the VDP 803 displays the left resident pattern (see image P11Aa) of pattern "1" on the liquid crystal display device 41 as shown in FIG. 11(b). will be displayed.

Then, as shown in FIG. 14(c-1), in the resident symbol variation start sequence table C, ZuC= 1 is set. As a result, at timing T1A shown in FIGS. 12 and 13(b), the VDP 803 causes the liquid crystal display device 41 to display the middle resident symbol (see image P11Ab) of symbol "2" as shown in FIG. 11(b). will be displayed.

Further, as shown in FIG. 14(d-1), in the resident symbol variation start sequence table R, ZuR is placed in the resident symbol area R so that the resident symbol changes from "123" regardless of the stop symbol of the previous variation. =2 is set. As a result, at timing T1A shown in FIGS. 12 and 13(b), the VDP 803 displays the right resident pattern (see image P11Ac) of pattern "3" on the liquid crystal display device 41 as shown in FIG. 11(b). will be displayed.

Next, as shown in FIG. 14(b-2), in the resident symbol changing sequence table L, the symbol is incremented by +1 at predetermined time intervals, as shown in FIG. 13(b). , ZuL=ZuL+1, and ZuL is set in the resident symbol area L. Then, in order for the player to recognize that the left resident symbol is fluctuating, a process of doing nothing from the second frame to the fourth frame is provided. The process of setting ZuL in area L is repeated. As a result, the VDP 803 sequentially switches the left resident symbols, so that the state in which the left resident symbols are fluctuating can be displayed on the liquid crystal display device 41 as shown in FIGS. 11(c) to 11(o). The timer of the resident symbol changing sequence table L is different from the changing scenario timer, and counts one frame from the frame when it is set.

Then, as shown in FIG. 14(c-2), in the resident symbol changing sequence table C, the symbol is incremented by 1 every predetermined time, as shown in FIG. 13(b). , ZuC=ZuC+1, and ZuC is set in the resident symbol area C. Then, in order for the player to recognize that the middle resident symbol is fluctuating, a process of doing nothing from the 2nd frame to the 4th frame is provided. The process of setting ZuC in area C is repeated. As a result, the VDP 803 sequentially switches the middle resident symbols, so that the state in which the middle resident symbols are fluctuating can be displayed on the liquid crystal display device 41 as shown in FIGS. 11(c) to (o). It should be noted that the timer of the resident symbol changing sequence table C is different from the changing scenario timer, and counts one frame from the frame when it is set.

Further, as shown in FIG. 14(d-2), in the resident symbol changing sequence table R, the symbol is incremented by 1 at predetermined time intervals, as shown in FIG. 13(c). , ZuR=ZuR+1, and ZuR is set in the resident symbol area R. Then, in order for the player to recognize that the right resident symbol is fluctuating, a process of doing nothing from the 2nd frame to the 4th frame is provided. The process of setting ZuR in area R is repeated. As a result, the VDP 803 sequentially switches the right resident symbols, so that the state in which the right resident symbols are fluctuating can be displayed on the liquid crystal display device 41 as shown in FIGS. 11(c) to (o). The timer of the resident symbol changing sequence table R is different from the changing scenario timer, and counts one frame from the frame when it is set.

Next, as shown in FIG. 14(b-3), in the resident symbol variation stop sequence table L, regardless of the order of updating the symbols during variation (in the resident symbol variation sequence table L shown in FIG. 14(b-2) ZuL=STOP_L1 (STOP_L1=1) is set in the resident design area L so that the design can be switched to the stop design regardless of the processing timing. As a result, at timing T6A shown in FIGS. 12 and 13(b), the VDP 803 displays the left resident pattern (see image P29Aa) of pattern "2" on the liquid crystal display device 41 as shown in FIG. 11(p). will be displayed.

Then, as shown in FIG. 14(c-3), in the resident symbol variation stop sequence table C, regardless of the order of updating the symbols during variation (in the resident symbol variation sequence table C shown in FIG. 14(c-2) ZuC=STOP_C1 (STOP_C1=4) is set in the resident design area C so as to switch to the stop design regardless of the processing timing. As a result, at timing T6A shown in FIGS. 12 and 13(b), the VDP 803 displays the middle resident symbol (see image P29Ab) of symbol "5" on the liquid crystal display device 41 as shown in FIG. 11(p). will be displayed.

Furthermore, as shown in FIG. 14(d-3), in the resident symbol variation stop sequence table R, regardless of the order of updating the symbols during variation (in the resident symbol variation sequence table R shown in FIG. 14(d-2) ZuR=STOP_R1 (STOP_R1=2) is set in the resident design area R so that the design can be switched to the stop design regardless of the processing timing. As a result, at timing T6A shown in FIGS. 12 and 13(b), the VDP 803 displays the right resident pattern (see image P29Ac) of pattern "3" on the liquid crystal display device 41 as shown in FIG. 11(p). will be displayed.

Thus, in this way, the processing from the start of variation of the resident symbols to the stop of variation shown at timings T1A to T6A shown in FIG. 12 is performed using the resident symbol variation scenario ZS_DATA shown in FIG. 13(b). Become.

In the present embodiment, an example in which the pattern of the resident pattern is changed by switching is shown, but the present invention is not limited to this. That is, the VDP 803 is used in the resident symbol area L shown in FIG. The VDP 803 is used in the region C to reproduce a moving image that starts fluctuating from 2 such as "2 ⇒ 3 ⇒ 4 ⇒ 9 ⇒ 1 ⇒". 4 ⇒ 5 ⇒ ⇒ 1 ⇒ 2 ⇒” may be reproduced. In addition, when stopping the fluctuation of the resident symbols, it is sufficient to stop the reproduction of the moving image and replace it with the stopped symbols. Also, this moving image may be stored in the game ROM 805 .

On the other hand, even if you do not prepare three videos, you can prepare one video "1 ⇒ 2 ⇒ 3 ⇒ 8 ⇒ 9 ⇒" and change the time to start playing the video. , a moving image starting to fluctuate from 1, a moving image starting to fluctuate from 2, and a moving image starting to fluctuate from 3 may be displayed.

In the normal variation 12-second variation scenario SS_DATA for decorative symbols, as shown in FIG. From time T1A to the 80th frame, processing is performed using the fluctuation start sequence table X. From time T2A, which is the 81st frame, to the 93rd frame, processing is performed using the high-speed variation sequence table X. Timing T3A, which is the 94th frame. From time to timing T3Aa (see FIG. 12), processing is performed with the deceleration variation sequence table X until one frame before, and processing is performed with the shake variation sequence table X from timing T3Aa (see FIG. 12) to the 363rd frame, At timing T6A, which is the 364th frame, processing is performed using the fluctuation stop sequence table X. FIG.

Then, when performing variation processing as shown in timings T1A to T6A shown in FIG. Processing is performed with the high-speed variation sequence table Y from timing T2A, which is the 274th frame, to the 273rd frame. From timing T5Aa (see FIG. 12) to the 363rd frame, processing is performed using the shake fluctuation sequence table Y. At timing T6A, which is the 364th frame, processing is performed using the fluctuation stop sequence table Y. It has become.

Further, in performing the variation processing shown in timings T1A to T6A shown in FIG. From timing T2A, which is the 184th frame, to the 2183rd frame, processing is performed using the high-speed fluctuation sequence table Z, and from timing T4A, which is the 184th frame, to timing T4Aa (see FIG. 12), which is one frame before the deceleration fluctuation sequence table Z. From timing T4Aa (see FIG. 12) to the 363rd frame, processing is performed using the shake fluctuation sequence table Z. At timing T6A, which is the 364th frame, processing is performed using the fluctuation stop sequence table Z. It has become. It should be noted that the judgment of the current frame is measured by the variable scenario timer that measures during the variable scenario.

Here, fluctuation start sequence table X, Y, Z, high speed fluctuation sequence table X, Y, Z, deceleration fluctuation sequence table X, Y, Z, shake fluctuation sequence table X, Y, Z, fluctuation stop sequence table X, Y , Z will be described in detail with reference to FIGS. 15 to 19. FIG.

As shown in FIGS. 15(a-1) to (d-1), the area of the decorative pattern displayed on the liquid crystal display device 41 is predetermined. That is, as shown in FIGS. 15(a-1) to (d-1), objects L0 to L3 for displaying the left decorative design on the liquid crystal display device 41, and objects L0 to L3 for displaying the middle decorative design on the liquid crystal display device 41. , and objects R0 to R3 for displaying the right decorative pattern on the liquid crystal display device 41 are prepared. Then, as shown in FIGS. 15(a-1) to (d-1), four scenes are prepared as display modes of the decorative patterns displayed on the liquid crystal display device 41. FIG. That is, among the four scenes, the scene shown in FIG. 15(a-1) includes a symbol variation scene X1, a symbol variation scene Y1, and a symbol variation scene Z1. In this symbol variation scene X1, among the objects L0 to L3, the liquid crystal display device 41 displays the upper half of the object L0, the object L1, and the lower half of the object L2. In the symbol variation scene Y1, among the objects C0 to C3, the liquid crystal display device 41 displays the upper half of the object C0, the lower half of the object C1, and the lower half of the object C2. Furthermore, in the symbol variation scene Z1, among the objects R0 to R3, the liquid crystal display device 41 displays the upper half of the object R0, the object L1, and the lower half of the object L2.

On the other hand, in the scene shown in FIG. 15(b-1), a symbol variation scene X2, a symbol variation scene Y2, and a symbol variation scene Z2 are prepared. In this symbol variation scene X2, among the objects L0 to L3, the liquid crystal display device 41 displays the upper portion of the object L0, the object L1, and most of the object L2. In the symbol variation scene Y2, among the objects C0 to C3, the liquid crystal display device 41 displays the upper portion of the object C0, the object C1, and most of the object C2. Furthermore, in the pattern variation scene Z2, among the objects R0 to R3, the liquid crystal display device 41 displays the upper portion of the object R0, the object R1, and most of the object R2.

On the other hand, in the scene shown in FIG. 15(c-1), a symbol variation scene X3, a symbol variation scene Y3, and a symbol variation scene Z3 are prepared. In this symbol variation scene X3, among the objects L0 to L3, the liquid crystal display device 41 displays the object L1 and the object L2. In the symbol variation scene Y3, among the objects C0 to C3, the liquid crystal display device 41 displays the object C1 and the object C2. Furthermore, in the pattern changing scene Z3, among the objects R0 to R3, the liquid crystal display device 41 displays the object R1 and the object R2.

On the other hand, in the scene shown in FIG. 15(d-1), a symbol variation scene X4, a symbol variation scene Y4, and a symbol variation scene Z4 are prepared. In this symbol variation scene X4, among the objects L0 to L3, most of the object L1, the object L2, and the lower portion of the object L3 are displayed on the liquid crystal display device 41. FIG. In the pattern variation scene Y4, among the objects C0 to C3, most of the object C1, the object C2, and the lower portion of the object C3 are displayed on the liquid crystal display device 41. FIG. Furthermore, in the pattern variation scene Z4, among the objects R0 to R3, most of the object R1, the object R2, and the lower portion of the object R3 are displayed on the liquid crystal display device 41. FIG.

Thus, by repeating the scenes shown in FIGS. 15(a-1) to (d-1), the pattern can be moved frame by frame, thereby making it appear as if the decorative pattern is scrolling.

More specifically, by designating and setting a pattern number to these objects L0 to L4, C0 to C4, and R0 to R4, it is possible to make the pattern images to be displayed on the liquid crystal display device 41 look like they are scrolling. can. Specifically, pattern numbers: 0 to 8 (0 = 1 pattern, 1 = 2 patterns, ..., 8 = 9 patterns). A pattern image to be displayed on the device 41 is displayed. To explain using a specific example, as shown in FIG. 11(a), when it is desired to start the variation from the decorative pattern (see image P1A) stopped at "767", the following processing can be performed. First, the objects L0 to L3, C0 to C3, and R0 to R3 satisfy the following equations.

Object L3 = GAZOU (ZugaraL + 2)
Object L2 = GAZOU (ZugaraL + 1)
Object L1 = GAZOU (ZugaraL)
Object L0 = GAZOU (ZugaraL-1)
Object C3 = GAZOU (ZugaraC + 2)
Object C2 = GAZOU (ZugaraC + 1)
Object C1 = GAZOU (ZugaraC)
Object C0 = GAZOU (ZugaraC-1)
Object R3 = GAZOU (ZugaraR + 2)
Object R2 = GAZOU (ZugaraR + 1)
Object R1 = GAZOU (ZugaraR)
Object R0 = GAZOU (ZugaraR-1)

By the way, this GAZOU corresponds to the decorative patterns 1 to 9 as shown in FIG. 19(a). That is, GAZOU (0) corresponds to decorative pattern 1, GAZOU (1) corresponds to decorative pattern 2, GAZOU (2) corresponds to decorative pattern 3, . It has become.

Thus, if we want to start the variation from the decoration symbol (see image P1A) that is stopped at "767", we set the variable ZugaraL to 6: L3 = GAZOU(6+2) = GAZOU(8), L2 = GAZOU(6+1) = GAZOU(7), L1 = GAZOU(6), L0 = GAZOU(6-1) = GAZOU(5). Then, when 5 is set to the variable ZugaraC, C3 = GAZOU(5+2) = GAZOU(7), C2 = GAZOU(5+1) = GAZOU(6), C1 = GAZOU(5), C0 = GAZOU(5-1) = GAZOU(4). Furthermore, when the variable ZugaraR is set to 6, R3 = GAZOU (6 + 2) = GAZOU (8), R2 = GAZOU (6 + 1) = GAZOU (7), R1 = GAZOU (6), R0 = GAZOU (6 - 1) = GAZOU(5). As a result, when this value is applied to the scene shown in FIG. 15(a-1), a variable display as shown in FIG. 19(b-1) is displayed on the liquid crystal display device 41. FIG.

Next, when the above values are applied to the scene shown in FIG. 15(b-1), a variable display as shown in FIG. 19(b-2) is displayed on the liquid crystal display device 41. FIG. When the above values are applied to the scene shown in FIG. 15(c-1), the liquid crystal display device 41 displays a variable display as shown in FIG. 19(b-3). Furthermore, when the above values are applied to the scene shown in FIG. 15(d-1), the liquid crystal display device 41 displays a variable display as shown in FIG. 19(b-4).

Thus, in this way, all the scenes shown in FIGS. 15(a-1) to (d-1) are used, and when returning to the scene shown in FIG. 15(a-1), variable ZugaraL=ZugaraL+1, variable ZugaraC= ZugaraC+1, variable ZugaraR=ZugaraR+1 and incremented (+1), thereby setting variable ZugaraL to 7 (=6+1), variable ZugaraC to 6 (=5+1), and variable ZugaraR to 7 (=6+1) It will be done. L3 = GAZOU(7+2) = GAZOU(0), L2 = GAZOU(7+1) = GAZOU(8), L1 = GAZOU(7), L0 = GAZOU(7-1) = GAZOU(6), C3 = GAZOU(6+2) = GAZOU(8), C2 = GAZOU(6+1) = GAZOU(7), C1 = GAZOU(6), C0 = GAZOU(6-1) = GAZOU(5), R3 = GAZOU(7+2) = GAZOU(0), R2 = GAZOU(7+1) = GAZOU(8), R1 = GAZOU(7), R0 = GAZOU(7-1) = GAZOU(6). As a result, when this value is applied to the scene shown in FIG. 15(a-1), a variable display as shown in FIG. 19(b-5) is displayed on the liquid crystal display device 41. FIG. When the value becomes 9 as described above, division or the like may be performed so that the value becomes 0. 19(b-1) to (b-5), only numbers are shown, but the liquid crystal display device 41 can also display decorations such as sunny and cloudy as shown in FIG. 19(a). will be displayed.

Thus, the scenes shown in FIGS. 15(a-1) to (d-1) are sequentially used, and when the scene shown in FIG. If each value is incremented by 1, the displayed pattern will be replaced, so that the pattern appears to be scrolled sequentially.

Here, in more detail, the method using the scenes shown in FIGS. This will be explained in detail by explaining the variable sequence tables X, Y, Z.

As shown in FIG. 16(a), in the variation start sequence table X, ZugaraL=STOP_L0 (STOP_L0=6) is set so that the variation starts from the stop symbol "767" of the previous variation. As a result, L3 = GAZOU(6+2) = GAZOU(8), L2 = GAZOU(6+1) = GAZOU(7), L1 = GAZOU(6), L0 = GAZOU(6-1) = GAZOU(5). Then, this value is applied by the VDP 803 to the pattern changing scene X1 shown in FIG. ) is displayed.

Next, as shown in FIG. 16(a), in the variation start sequence table X, the above values are applied by the VDP 803 to the symbol variation scene X2 shown in FIG. 15(b-1) at the 11th frame. On the liquid crystal display device 41, the symbols of the symbol variation scene X2 shown in FIG. 15(b-1) are displayed from the 11th frame to the 20th frame.

Next, as shown in FIG. 16(a), in the variation start sequence table X, the above values are applied to the symbol variation scene X3 shown in FIG. 15(c-1) by the VDP 803 at the 21st frame, thereby On the liquid crystal display device 41, the symbols of the symbol variation scene X3 shown in FIG. 15(c-1) are displayed from the 21st frame to the 30th frame.

Next, as shown in FIG. 16(a), in the variation start sequence table X, the above values are applied to the symbol variation scene X4 shown in FIG. 15(d-1) by the VDP 803 at the 31st frame, thereby On the liquid crystal display device 41, the pattern of the pattern variation scene X4 shown in FIG. 15(d-1) is displayed from the 31st frame to the 40th frame.

Next, as shown in FIG. 16(a), in the variation start sequence table X, ZugaraL=ZugaraL+1 to update the symbol number in the 41st frame, and the value of ZugaraL is incremented (+1). Therefore, ZugaraL=7 is set. As a result, L3 = GAZOU(7+2) = GAZOU(0), L2 = GAZOU(7+1) = GAZOU(8), L1 = GAZOU(7), L0 = GAZOU(7-1) = GAZOU(6). Then, this value is applied by the VDP 803 to the pattern changing scene X1 shown in FIG. ) is displayed.

Next, as shown in FIG. 16(a), in the variation start sequence table X, the above values are applied to the symbol variation scene X2 shown in FIG. 15(b-1) by the VDP 803 at the 51st frame, thereby On the liquid crystal display device 41, the symbols of the symbol variation scene X2 shown in FIG. 15(b-1) are displayed from the 51st frame to the 60th frame.

Next, as shown in FIG. 16(a), in the variation start sequence table X, at the 61st frame, the above values are applied by the VDP 803 to the symbol variation scene X3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X3 shown in FIG. 15(c-1) are displayed from the 61st frame to the 70th frame.

Next, as shown in FIG. 16(a), in the variation start sequence table X, at the 71st frame, the above values are applied by the VDP 803 to the symbol variation scene X4 shown in FIG. 15(d-1). On the liquid crystal display device 41, the pattern of the pattern variation scene X4 shown in FIG. 15(d-1) is displayed from the 71st frame to the 80th frame. Note that the timer of the variable sequence table X is different from the variable scenario timer, and counts one frame from the frame when it is set.

On the other hand, as shown in FIG. 17(a), in the variation start sequence table Y, ZugaraC=STOP_C0 (STOP_C0=5) is set so that the variation starts from the stop symbol "767" of the previous variation. As a result, C3 = GAZOU(5+2) = GAZOU(7), C2 = GAZOU(5+1) = GAZOU(6), C1 = GAZOU(5), C0 = GAZOU(5-1) = GAZOU(4). Then, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. ) is displayed.

Next, as shown in FIG. 17(a), in the variation start sequence table Y, the above values are applied to the symbol variation scene Y2 shown in FIG. 15(b-1) by the VDP 803 in the 11th frame, thereby The pattern of the pattern variation scene Y2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 11th frame to the 20th frame.

Next, as shown in FIG. 17(a), in the variation start sequence table Y, at the 21st frame, the above values are applied by the VDP 803 to the symbol variation scene Y3 shown in FIG. 15(c-1). The pattern of the pattern variation scene Y3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 from the 21st frame to the 30th frame.

Next, as shown in FIG. 17(a), in the variation start sequence table Y, the above values are applied by the VDP 803 to the symbol variation scene Y4 shown in FIG. On the liquid crystal display device 41, the pattern of the pattern variation scene Y4 shown in FIG. 15(d-1) is displayed from the 31st frame to the 40th frame.

Next, as shown in FIG. 17(a), in the fluctuation start sequence table Y, ZugaraC=ZugaraC+1 to update the symbol number in the 41st frame, and the value of ZugaraC is incremented (+1). Therefore, ZugaraC=6 is set. As a result, L3 = GAZOU(6+2) = GAZOU(8), L2 = GAZOU(6+1) = GAZOU(7), L1 = GAZOU(6), L0 = GAZOU(6-1) = GAZOU(5). Then, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. ) is displayed.

Next, as shown in FIG. 17(a), in the variation start sequence table Y, at the 51st frame, the above values are applied by the VDP 803 to the symbol variation scene Y2 shown in FIG. 15(b-1). The pattern of the pattern variation scene Y2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 51st frame to the 60th frame.

Next, as shown in FIG. 17(a), in the variation start sequence table Y, at the 61st frame, the above values are applied by the VDP 803 to the symbol variation scene Y3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the pattern of the pattern variation scene Y3 shown in FIG. 15(c-1) is displayed from the 61st frame to the 70th frame.

Next, as shown in FIG. 17(a), in the variation start sequence table Y, at the 71st frame, the above values are applied by the VDP 803 to the symbol variation scene Y4 shown in FIG. 15(d-1). On the liquid crystal display device 41, the pattern of the pattern variation scene Y4 shown in FIG. 15(d-1) is displayed from the 71st frame to the 80th frame. Note that the timer of the variable sequence table Y is different from the variable scenario timer, and counts one frame from the frame when it is set.

On the other hand, as shown in FIG. 18(a), in the variation start sequence table Z, ZugaraR=STOP_R0 (STOP_R0=6) is set so that the variation starts from the stop symbol "767" of the previous variation. As a result, R3=GAZOU(6+2)=GAZOU(8), R2=GAZOU(6+1)=GAZOU(7), R1=GAZOU(6), and R0=GAZOU(6-1)=GAZOU(5). Then, this value is applied by the VDP 803 to the pattern changing scene Z1 shown in FIG. ) is displayed.

Next, as shown in FIG. 18(a), in the variation start sequence table Z, the above values are applied to the symbol variation scene Z2 shown in FIG. 15(b-1) by the VDP 803 in the 11th frame, thereby On the liquid crystal display device 41, the pattern of the pattern change scene Z2 shown in FIG. 15(b-1) is displayed from the 11th frame to the 20th frame.

Next, as shown in FIG. 18(a), in the variation start sequence table Z, the above values are applied to the symbol variation scene Z3 shown in FIG. 15(c-1) by the VDP 803 in the 21st frame, thereby The pattern of the pattern change scene Z3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 from the 21st frame to the 30th frame.

Next, as shown in FIG. 18(a), in the variation start sequence table Z, the above values are applied to the symbol variation scene Z4 shown in FIG. On the liquid crystal display device 41, the pattern of the pattern change scene Z4 shown in FIG. 15(d-1) is displayed from the 31st frame to the 40th frame.

Next, as shown in FIG. 18(a), in the variation start sequence table Z, ZugaraR=ZugaraR+1 to update the symbol number in the 41st frame, and the value of ZugaraR is incremented (+1). Therefore, ZugaraR=7 is set. As a result, R3=GAZOU(7+2)=GAZOU(0), R2=GAZOU(7+1)=GAZOU(8), R1=GAZOU(7), and R0=GAZOU(7-1)=GAZOU(6). Then, this value is applied by the VDP 803 to the pattern changing scene Z1 shown in FIG. ) is displayed.

Next, as shown in FIG. 18(a), in the variation start sequence table Z, the above values are applied to the symbol variation scene Z2 shown in FIG. 15(b-1) by the VDP 803 at the 51st frame, thereby The pattern of the pattern change scene Z2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 51st frame to the 60th frame.

Next, as shown in FIG. 18(a), in the variation start sequence table Z, at the 61st frame, the above values are applied by the VDP 803 to the symbol variation scene Z3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the pattern of the pattern change scene Z3 shown in FIG. 15(c-1) is displayed from the 61st frame to the 70th frame.

Next, as shown in FIG. 18(a), in the variation start sequence table Z, at the 71st frame, the above values are applied by the VDP 803 to the symbol variation scene Z4 shown in FIG. 15(d-1). On the liquid crystal display device 41, the pattern of the pattern change scene Z4 shown in FIG. 15(d-1) is displayed from the 71st frame to the 80th frame. Note that the timer of the variable sequence table Z is different from the variable scenario timer, and measures one frame from the frame when it is set.

Thus, such a variation start sequence table X, Y, Z is set at timing T1A, which is the first frame, as shown in the decorative symbol normal variation 12-second variation scenario SS_DATA (see FIG. 13(c)), Up to the 80th frame, left decorative design processing based on the contents of the fluctuation start sequence table X, middle decorative design processing based on the contents of the fluctuation start sequence table Y, right decorative design based on the contents of the fluctuation start sequence table Z will be processed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the variable display of decorative patterns as shown in FIGS. Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

As shown in FIG. 16(b), in the high-speed variation sequence table X, the variable ZugaraL used in the variation start sequence table X is taken over as it is to vary the left decorative symbol, so only the symbol number is updated. That is, ZugaraL=ZugaraL+1, and the value of ZugaraL is incremented (+1). Then, the incremented value of ZugaraL is substituted for L3 = GAZOU (ZugaraL + 2), L2 = GAZOU (ZugaraL + 1), L1 = GAZOU (ZugaraL), and L0 = GAZOU (ZugaraL - 1). As a result, this value is applied by the VDP 803 to the pattern changing scene X1 shown in FIG. The symbols of the symbol variation scene X1 shown in 1) are displayed. At this time, the VDP 803 also performs processing to make the left decorative pattern translucent.

Next, as shown in FIG. 16(b), in the high-speed variation sequence table X, in the 4th frame, the VDP 803 applies the above values to the symbol variation scene X2 shown in FIG. 15(b-1). The pattern of the pattern variation scene X2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 4th frame to the 6th frame.

Next, as shown in FIG. 16(b), in the high-speed variation sequence table X, in the 7th frame, the VDP 803 applies the above values to the symbol variation scene X3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X3 shown in FIG. 15(c-1) are displayed from the 7th frame to the 9th frame.

Next, as shown in FIG. 16(b), in the high-speed variation sequence table X, at the 10th frame, the VDP 803 applies the above values to the symbol variation scene X4 shown in FIG. 15(d-1). The pattern of the pattern variation scene X4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 10th frame to the 12th frame.

It should be noted that when the left decorative pattern is changed at high speed after the 12th frame as well, the process returns to the beginning (first frame) and repeats the process. That is, 12 frames are required for the left decorative design to be switched by the high-speed change sequence table X (the left decorative design to be displayed at the stop position during scrolling is switched). On the other hand, the timer of the high-speed varying sequence table X is different from the varying scenario timer, and counts one frame from the frame when it is set.

On the other hand, as shown in FIG. 17(b), in the high-speed fluctuation sequence table Y, the variable ZugaraC used in the fluctuation start sequence table Y is taken over as it is to change the middle decoration pattern, so only the pattern number is updated. . That is, ZugaraC=ZugaraC+1 and the value of ZugaraC is incremented (+1). Then, the incremented value of ZugaraC is substituted for C3=GAZOU(ZugaraC+2), C2=GAZOU(ZugaraC+1), C1=GAZOU(ZugaraC), and C0=GAZOU(ZugaraC-1). As a result, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. The symbols of the symbol variation scene Y1 shown in 1) are displayed. At this time, the VDP 803 also performs processing to make the middle decorative pattern translucent.

Next, as shown in FIG. 17(b), in the high-speed variation sequence table Y, in the fourth frame, the above values are applied by the VDP 803 to the symbol variation scene Y2 shown in FIG. 15(b-1). The pattern of the pattern variation scene Y2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 4th frame to the 6th frame.

Next, as shown in FIG. 17(b), in the high-speed variation sequence table Y, in the 7th frame, the VDP 803 applies the above values to the symbol variation scene Y3 shown in FIG. 15(c-1). The pattern of the pattern variation scene Y3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 from the 7th frame to the 9th frame.

Next, as shown in FIG. 17(b), in the high-speed variation sequence table Y, at the 10th frame, the VDP 803 applies the above values to the symbol variation scene Y4 shown in FIG. 15(d-1). The pattern of the pattern variation scene Y4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 10th frame to the 12th frame.

It should be noted that when the middle decorative pattern is changed at high speed after the 12th frame, the processing is repeated from the beginning (first frame). That is, 12 frames are required for the middle decorative design to be switched by the high-speed change sequence table Y (the middle decorative design to be displayed at the stop position during scrolling is switched). On the other hand, the timer of the high-speed variation sequence table Y is different from the variation scenario timer, and measures one frame from the frame when it is set.

On the other hand, as shown in FIG. 18(b), in the high-speed fluctuation sequence table Z, the variable ZugaraR used in the fluctuation start sequence table Z is taken over as it is to change the right decorative pattern, so that only the pattern number is updated. . That is, ZugaraR=ZugaraR+1 and the value of ZugaraR is incremented (+1). Then, the incremented ZugaraR value is substituted for R3 = GAZOU (ZugaraR + 2), R2 = GAZOU (ZugaraR + 1), R1 = GAZOU (ZugaraR), and R0 = GAZOU (ZugaraR - 1). As a result, this value is applied by the VDP 803 to the pattern changing scene Z1 shown in FIG. The symbols of the symbol variation scene Z1 shown in 1) are displayed. At this time, the VDP 803 also performs processing to make the right decorative pattern translucent.

Next, as shown in FIG. 18(b), in the high-speed variation sequence table Z, in the fourth frame, the above values are applied by the VDP 803 to the symbol variation scene Z2 shown in FIG. 15(b-1). The pattern of the pattern change scene Z2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 4th frame to the 6th frame.

Next, as shown in FIG. 18(b), in the high-speed variation sequence table Z, at the 7th frame, the VDP 803 applies the above values to the symbol variation scene Z3 shown in FIG. 15(c-1). The pattern of the pattern change scene Z3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 from the 7th frame to the 9th frame.

Next, as shown in FIG. 18(b), in the high-speed variation sequence table Z, at the 10th frame, the VDP 803 applies the above values to the symbol variation scene Z4 shown in FIG. 15(d-1). The pattern of the pattern change scene Z4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 10th frame to the 12th frame.

It should be noted that when the right decorative pattern is changed at high speed after the 12th frame as well, the process returns to the beginning (first frame) and repeats the process. That is, 12 frames are required for the right decorative design to be switched by the high-speed change sequence table Z (the middle decorative design to be displayed at the stop position during scrolling is switched). On the other hand, the timer of the high-speed variation sequence table Z is different from the variation scenario timer, and counts one frame from the frame when it is set.

Thus, such a high-speed variation sequence table X, Y, Z is set at timing T2A, which is the 81st frame, as shown in the decorative symbol normal variation 12-second variation scenario SS_DATA (see FIG. 13(c)), Up to the 93rd frame, processing of the left decorative pattern based on the contents of the high-speed change sequence table X is performed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the high-speed variation display of the left ornamental pattern as shown in FIG. 11(f) from the timing T2A to the timing T3A shown in FIG. On the other hand, the middle decorative pattern is processed based on the contents of the high-speed change sequence table Y up to the 273rd frame. As a result, the VDP 803 causes the liquid crystal display device 41 to display the high-speed fluctuation display of the middle decorative pattern as shown in FIGS. On the other hand, the right decorative pattern is processed based on the contents of the high-speed variation sequence table Z up to the 183rd frame. As a result, the VDP 803 causes the liquid crystal display device 41 to display the high-speed variation display of the right ornamental pattern as shown in FIGS.

As shown in FIG. 16(c), in the deceleration variation sequence table X, processing is performed to change the left decorative symbol during high-speed variation to a symbol displayed at the timing of deceleration according to the stop symbol. Specifically, the stop symbol -3 is set to the variable ZugaraL in order to start decelerating three frames before the stop symbol. That is, ZugaraL is set at STOP_L1-3, and in the present embodiment, STOP_L1 is set to 1 because the stop symbol is "253". As a result, L3 = GAZOU(7+2) = GAZOU(0), L2 = GAZOU(7+1) = GAZOU(8), L1 = GAZOU(7), L0 = GAZOU(7-1) = GAZOU(6). Then, this value is applied by the VDP 803 to the pattern changing scene X1 shown in FIG. ) is displayed. Although ZugaraL becomes "-2", it is processed as "7" by performing processing such as division in order to obtain a value between 0 and 8.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, in the eighth frame, the above values are applied by the VDP 803 to the symbol variation scene X2 shown in FIG. 15(b-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X2 shown in FIG. 15(b-1) are displayed from the 8th frame to the 14th frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 15th frame, the above values are applied by the VDP 803 to the symbol variation scene X3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X3 shown in FIG. 15(c-1) are displayed from the 15th frame to the 21st frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 22nd frame, the above values are applied by the VDP 803 to the symbol variation scene X4 shown in FIG. 15(d-1). The pattern of the pattern change scene X4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 22nd frame to the 28th frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, in order to update the symbol number in the 29th frame, ZugaraL=ZugaraL+1 and the value of ZugaraL is incremented (+1). Therefore, ZugaraL=8 is set. As a result, L3=GAZOU(8+2)=GAZOU(1), L2=GAZOU(8+1)=GAZOU(0), L1=GAZOU(8), and L0=GAZOU(8-1)=GAZOU(7). Then, this value is applied by the VDP 803 to the pattern changing scene X1 shown in FIG. ) is displayed.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 36th frame, the above values are applied by the VDP 803 to the symbol variation scene X2 shown in FIG. 15(b-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X2 shown in FIG. 15(b-1) are displayed from the 36th frame to the 42nd frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 43rd frame, the above values are applied by the VDP 803 to the symbol variation scene X3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X3 shown in FIG. 15(c-1) are displayed from the 43rd frame to the 49th frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 50th frame, the above value is applied by the VDP 803 to the symbol variation scene X4 shown in FIG. 15(d-1). The pattern of the pattern variation scene X4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 50th frame to the 56th frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, in order to update the symbol number in the 57th frame, ZugaraL=ZugaraL+1 and the value of ZugaraL is incremented (+1). Therefore, ZugaraL=0 is set. As a result, L3 = GAZOU(0+2) = GAZOU(2), L2 = GAZOU(0+1) = GAZOU(1), L1 = GAZOU(0), L0 = GAZOU(0-1) = GAZOU(8). Then, this value is applied by the VDP 803 to the pattern changing scene X1 shown in FIG. ) is displayed.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 64th frame, the above values are applied by the VDP 803 to the symbol variation scene X2 shown in FIG. 15(b-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X2 shown in FIG. 15(b-1) are displayed from the 64th frame to the 70th frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 71st frame, the above values are applied by the VDP 803 to the symbol variation scene X3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the symbols of the symbol variation scene X3 shown in FIG. 15(c-1) are displayed from the 71st frame to the 77th frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, at the 78th frame, the above values are applied by the VDP 803 to the symbol variation scene X4 shown in FIG. 15(d-1). On the liquid crystal display device 41, the pattern of the pattern variation scene X4 shown in FIG. 15(d-1) is displayed from the 78th frame to the 84th frame.

Next, as shown in FIG. 16(c), in the deceleration variation sequence table X, in order to update the symbol number in the 85th frame, ZugaraL=ZugaraL+1 and the value of ZugaraL is incremented (+1). Therefore, ZugaraL=1 is set. As a result, L3=GAZOU(1+2)=GAZOU(3), L2=GAZOU(1+1)=GAZOU(2), L1=GAZOU(1), and L0=GAZOU(1-1)=GAZOU(0). 15(a-1) is applied to the symbol variation scene X1 shown in FIG. will be displayed. Note that the timer of the deceleration variation sequence table X is different from the variation scenario timer, and counts one frame from the frame when it is set.

Thus, such a deceleration variation sequence table X is set at timing T3A, which is the 94th frame, as shown in the decorative symbol normal variation 12-second variation scenario SS_DATA (see FIG. 13(c)), and at timing T3Aa ( 12), processing of the left decorative pattern based on the contents of the deceleration variation sequence table X is performed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the deceleration fluctuation display of the left ornamental pattern as shown in FIGS. That is, 28 frames are required for the left decorative design to be switched by the deceleration variation sequence X (the left decorative design to be displayed at the stop position during scrolling is switched). Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

On the other hand, as shown in FIG. 17(c), in the deceleration variation sequence table Y, processing is performed to change the middle decorative symbol during high-speed variation to a symbol displayed at the timing of deceleration according to the stop symbol. Specifically, the stop symbol -3 is set to the variable ZugaraC in order to start decelerating three frames before the stop symbol. That is, ZugaraC is set at STOP_C1-3, and in this embodiment, since the stop/stop symbol is "253", 4 is set at STOP_C1. As a result, C3=GAZOU(1+2)=GAZOU(3), C2=GAZOU(1+1)=GAZOU(2), C1=GAZOU(1), C0=GAZOU(1-1)=GAZOU(0). Then, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. ) is displayed.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, in the eighth frame, the above values are applied by the VDP 803 to the symbol variation scene Y2 shown in FIG. 15(b-1). The pattern of the pattern variation scene Y2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 8th frame to the 14th frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, at the 15th frame, the above values are applied by the VDP 803 to the symbol variation scene Y3 shown in FIG. 15(c-1). The pattern of the pattern variation scene Y3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 from the 15th frame to the 21st frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, in the 22nd frame, the above values are applied by the VDP 803 to the symbol variation scene Y4 shown in FIG. 15(d-1). The pattern of the pattern variation scene Y4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 22nd frame to the 28th frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, in order to update the symbol number in the 29th frame, ZugaraC=ZugaraC+1 and the value of ZugaraC is incremented (+1). Therefore, ZugaraC=2 is set. As a result, C3=GAZOU(2+2)=GAZOU(4), C2=GAZOU(2+1)=GAZOU(3), C1=GAZOU(2), C0=GAZOU(2-1)=GAZOU(1). Then, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. ) is displayed.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, at the 36th frame, the above values are applied by the VDP 803 to the symbol variation scene Y2 shown in FIG. 15(b-1). The pattern of the pattern variation scene Y2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 36th frame to the 42nd frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, at the 43rd frame, the above values are applied by the VDP 803 to the symbol variation scene Y3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the pattern of the pattern variation scene Y3 shown in FIG. 15(c-1) is displayed from the 43rd frame to the 49th frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, at the 50th frame, the above values are applied by the VDP 803 to the symbol variation scene Y4 shown in FIG. 15(d-1). The pattern of the pattern variation scene Y4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 50th frame to the 56th frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, in order to update the symbol number in the 57th frame, ZugaraC=ZugaraC+1 and the value of ZugaraC is incremented (+1). Therefore, ZugaraC=3 is set. As a result, C3 = GAZOU(3+2) = GAZOU(5), C2 = GAZOU(3+1) = GAZOU(4), C1 = GAZOU(3), C0 = GAZOU(3-1) = GAZOU(2). Then, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. ) is displayed.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, at the 64th frame, the above values are applied by the VDP 803 to the symbol variation scene Y2 shown in FIG. 15(b-1). From the 64th frame to the 70th frame, the pattern of the pattern variation scene Y2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 .

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, at the 71st frame, the above values are applied by the VDP 803 to the symbol variation scene Y3 shown in FIG. 15(c-1). The pattern of the pattern variation scene Y3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 from the 71st frame to the 77th frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, at the 78th frame, the above values are applied by the VDP 803 to the symbol variation scene Y4 shown in FIG. 15(d-1). The pattern of the pattern variation scene Y4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 78th frame to the 84th frame.

Next, as shown in FIG. 17(c), in the deceleration variation sequence table Y, ZugaraC=ZugaraC+1 to update the symbol number in the 85th frame, and the value of ZugaraC is incremented (+1). Therefore, ZugaraC=4 is set. As a result, C3 = GAZOU(4+2) = GAZOU(6), C2 = GAZOU(4+1) = GAZOU(5), C1 = GAZOU(4), C0 = GAZOU(4-1) = GAZOU(3). 15(a-1) is applied to the symbol variation scene Y1 shown in FIG. will be displayed. Note that the timer of the deceleration variation sequence table Y is different from the variation scenario timer, and counts one frame from the frame when it is set.

Thus, such a deceleration variation sequence table Y is set at timing T5A, which is the 274th frame, as shown in the decorative symbol normal variation 12-second variation scenario SS_DATA (see FIG. 13(c)), and at timing T5Aa ( Refer to FIG. 12), processing of the middle decorative pattern based on the contents of the deceleration variation sequence table Y is performed until one frame before. As a result, the VDP 803 causes the liquid crystal display device 41 to display the deceleration fluctuation display of the middle decorative pattern as shown in FIGS. That is, the number of frames in which the middle decorative pattern is switched by the deceleration variation sequence Y (the middle decorative pattern displayed at the stop position during scrolling is switched) requires 28 frames. Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

On the other hand, as shown in FIG. 18(c), in the deceleration variation sequence table Z, processing is performed to change the right decorative symbol during high-speed variation to a symbol displayed at the timing of deceleration according to the stop symbol. Specifically, the stop symbol -3 is set to the variable ZugaraR in order to start decelerating three frames before the stop symbol. That is, ZugaraR is set at STOP_R1-3, and in the present embodiment, the stop/stop pattern is "253", so 2 is set at STOP_R1. As a result, R3=GAZOU(8+2)=GAZOU(1), R2=GAZOU(8+1)=GAZOU(0), R1=GAZOU(8), and R0=GAZOU(8-1)=GAZOU(7). Then, this value is applied by the VDP 803 to the pattern changing scene Z1 shown in FIG. ) is displayed. Although ZugaraR becomes "-1", it is processed as "8" by performing processing such as division in order to obtain a value between 0 and 8.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, in the eighth frame, the above values are applied by the VDP 803 to the symbol variation scene Z2 shown in FIG. 15(b-1). The pattern of the pattern variation scene Z2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 from the 8th frame to the 14th frame.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, at the 15th frame, the above values are applied by the VDP 803 to the symbol variation scene Z3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the pattern of the pattern change scene Z3 shown in FIG. 15(c-1) is displayed from the 15th frame to the 21st frame.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, in the 22nd frame, the above values are applied by the VDP 803 to the symbol variation scene Z4 shown in FIG. 15(d-1). On the liquid crystal display device 41, the pattern of the pattern change scene Z4 shown in FIG. 15(d-1) is displayed from the 22nd frame to the 28th frame.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, in order to update the symbol number in the 29th frame, ZugaraR=ZugaraR+1 and the value of ZugaraR is incremented (+1). Therefore, ZugaraR=0 is set. As a result, R3=GAZOU(0+2)=GAZOU(2), R2=GAZOU(0+1)=GAZOU(1), R1=GAZOU(0), and R0=GAZOU(0-1)=GAZOU(8). Then, this value is applied by the VDP 803 to the pattern changing scene Z1 shown in FIG. ) is displayed.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, at the 36th frame, the above values are applied by the VDP 803 to the symbol variation scene Z2 shown in FIG. 15(b-1). On the liquid crystal display device 41, the pattern of the pattern change scene Z2 shown in FIG. 15(b-1) is displayed from the 36th frame to the 42nd frame.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, at the 43rd frame, the above values are applied by the VDP 803 to the symbol variation scene Z3 shown in FIG. 15(c-1). From the 43rd frame to the 49th frame, the pattern of the pattern change scene Z3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 .

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, at the 50th frame, the above values are applied by the VDP 803 to the symbol variation scene Z4 shown in FIG. 15(d-1). The pattern of the pattern change scene Z4 shown in FIG. 15(d-1) is displayed on the liquid crystal display device 41 from the 50th frame to the 56th frame.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, ZugaraR=ZugaraR+1 to update the symbol number in the 57th frame, and the value of ZugaraR is incremented (+1). Therefore, ZugaraR=1 is set. As a result, R3=GAZOU(1+2)=GAZOU(3), R2=GAZOU(1+1)=GAZOU(2), R1=GAZOU(1), and R0=GAZOU(1-1)=GAZOU(0). Then, this value is applied by the VDP 803 to the pattern changing scene Z1 shown in FIG. ) is displayed.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table X, at the 64th frame, the above values are applied by the VDP 803 to the symbol variation scene Z2 shown in FIG. 15(b-1). From the 64th frame to the 70th frame, the pattern of the pattern change scene Z2 shown in FIG. 15(b-1) is displayed on the liquid crystal display device 41 .

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, at the 71st frame, the above values are applied by the VDP 803 to the symbol variation scene Z3 shown in FIG. 15(c-1). On the liquid crystal display device 41, the pattern of the pattern change scene Z3 shown in FIG. 15(c-1) is displayed from the 71st frame to the 77th frame.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, at the 78th frame, the above values are applied by the VDP 803 to the symbol variation scene Z4 shown in FIG. 15(d-1). On the liquid crystal display device 41, the pattern of the pattern change scene Z4 shown in FIG. 15(d-1) is displayed from the 78th frame to the 84th frame.

Next, as shown in FIG. 18(c), in the deceleration variation sequence table Z, ZugaraR=ZugaraR+1 to update the symbol number in the 85th frame, and the value of ZugaraR is incremented (+1). Therefore, ZugaraR=2 is set. As a result, R3=GAZOU(2+2)=GAZOU(4), R2=GAZOU(2+1)=GAZOU(3), R1=GAZOU(2), and R0=GAZOU(2-1)=GAZOU(1). 15(a-1) is applied by the VDP 803 to the symbol variation scene Z1 shown in FIG. 15(a-1). will be displayed. Note that the timer of the deceleration variation sequence table Z is different from the variation scenario timer, and counts one frame from the frame when it is set.

Thus, such a deceleration variation sequence table Z is set at timing T4A, which is the 184th frame, as shown in the decorative symbol normal variation 12-second variation scenario SS_DATA (see FIG. 13(c)), and at timing T4Aa ( 12), processing of the right decorative pattern based on the contents of the deceleration variation sequence table Z is performed until one frame before. As a result, the VDP 803 causes the liquid crystal display device 41 to display the deceleration fluctuation display of the right ornamental pattern as shown in FIGS. That is, 28 frames are required for the right decorative design to be switched by the deceleration variation sequence Z (the left decorative design to be displayed at the stop position during scrolling is switched). Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

By the way, after the deceleration fluctuation display of the decorative pattern is performed as described above, the pattern is stopped, or, although it is not completely stopped, it undergoes a shaking fluctuation that is synonymous with a stopped state. In the decorative symbol normal variation 12-second variation scenario SS_DATA shown in 13(c), shaking variation is performed. Therefore, the swing fluctuation will be described in detail below.

As shown in FIGS. 15(a-2) to 15(d-2), the region in which the liquid crystal display device 41 undergoes shaking fluctuation is determined in advance. That is, as shown in FIGS. 15(a-2) to (d-2), four scenes are prepared as the display mode of the decorative pattern in which the liquid crystal display device 41 displays the swing fluctuation. Of the four scenes, the scene shown in FIG. 15(a-2) is provided with shaking variation scene X1, shaking variation scene Y1, and shaking variation scene Z1. Object L1 is positioned at the center of the liquid crystal display device 41 in this shake varying scene X1, object C1 is positioned at the center of the liquid crystal display device 41 in shake varying scene Y1, and object R1 is positioned at the center of the liquid crystal display device 41 in shake varying scene Z1. It is located in the central portion of the liquid crystal display device 41 .

On the other hand, in the scene shown in FIG. 15(b-2), shaking variation scene X2, shaking variation scene Y2, and shaking variation scene Z2 are prepared. Object L1 is located slightly above the central portion of the liquid crystal display device 41 in this shaking variation scene X2, and object C1 is located slightly above the center portion of the liquid crystal display device 41 in the shaking variation scene Y2. In Z2, the object R1 is positioned slightly above the central portion of the liquid crystal display device 41. FIG.

On the other hand, in the scene shown in FIG. 15(c-2), shaking variation scene X3, shaking variation scene Y3, and shaking variation scene Z3 are prepared. Object L1 is positioned above the liquid crystal display device 41 in this shake varying scene X3, object C1 is positioned above the liquid crystal display device 41 in shake varying scene Y3, and object R1 is displayed on the liquid crystal display in shake varying scene Z3. It is located above the device 41 .

On the other hand, in the scene shown in FIG. 15(d-2), shaking variation scene X4, shaking variation scene Y4, and shaking variation scene Z4 are prepared. In this shaking variation scene X4, the object L1 is located slightly closer to the center than the upper side of the liquid crystal display device 41, and in the shaking variation scene Y4, the object C1 is located slightly closer to the center than the upper side of the liquid crystal display device 41, and is shaken. In the changing scene Z4, the object R1 is located slightly closer to the center than the upper side of the liquid crystal display device 41. FIG.

Thus, by repeating the scenes shown in FIGS. 15(a-2) to 15(d-2), it is possible to make the decorative pattern look like it is fluctuating.

Here, in more detail, the method using the scenes shown in FIGS. 15(a-2) to (d-2) will be explained in detail by explaining the shake variation sequence tables X, Y, and Z. FIG.

As shown in FIG. 16(d), in the shaking variation sequence table X, the symbols set in the deceleration variation sequence table X are used as they are. The VDP 803 is applied to the shake variation scene X1 shown in FIG. 15(a-2). As a result, the pattern of the shake fluctuation scene X1 shown in FIG. 15(a-2) is displayed on the liquid crystal display device 41 in the first to fifth frames.

Next, as shown in FIG. 16(d), in the shaking variation sequence table X, the above values are applied by the VDP 803 to the shaking variation scene X2 shown in FIG. 15(b-2) in the sixth frame, thereby On the liquid crystal display device 41, the pattern of the shake fluctuation scene X2 shown in FIG. 15(b-2) is displayed from the 6th frame to the 10th frame.

Next, as shown in FIG. 16(d), in the shaking variation sequence table X, the above values are applied by the VDP 803 to the shaking variation scene X3 shown in FIG. On the liquid crystal display device 41, the pattern of the shake fluctuation scene X3 shown in FIG. 15(c-2) is displayed from the 11th frame to the 15th frame.

Next, as shown in FIG. 16(d), in the shake variation sequence table X, the above values are applied by the VDP 803 to the shake variation scene X4 shown in FIG. 15(d-2) at the 16th frame, thereby From the 16th frame to the 20th frame, the liquid crystal display device 41 displays the pattern of the shake fluctuation scene X4 shown in FIG. 15(d-2).

It should be noted that when the left decorative pattern is shaken and fluctuated after the 20th frame as well, the process returns to the beginning (first frame) and repeats the process. Also, the timer of the shaking variation sequence table X is different from the variation scenario timer, and counts one frame from the frame when it is set.

Thus, such a shaking variation sequence table X is set at timing T3Aa (see FIG. 12), as shown in the decorative pattern normal variation 12-second variation scenario SS_DATA (see FIG. 13(c)). Up to the 363rd frame, the processing of the left decorative pattern based on the contents of the shake variation sequence table X is performed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the fluctuation display of the left ornamental pattern as shown in FIGS. Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

On the other hand, as shown in FIG. 17(d), in the shake variation sequence table Y, the symbols set in the deceleration variation sequence table Y are used as they are, so the symbol numbers are not changed, and the value of C1=GAZOU (ZugaraC) is used. is applied to the shake fluctuation scene Y1 shown in FIG. 15(a-2). As a result, the liquid crystal display device 41 displays the pattern of the shake fluctuation scene Y1 shown in FIG. 15(a-2) in the first to fifth frames.

Next, as shown in FIG. 17(d), in the shake variation sequence table Y, the above values are applied to the shake variation scene Y2 shown in FIG. 15(b-2) by the VDP 803 in the sixth frame, thereby On the liquid crystal display device 41, the pattern of the shake fluctuation scene Y2 shown in FIG. 15(b-2) is displayed from the 6th frame to the 10th frame.

Next, as shown in FIG. 17(d), in the shake variation sequence table Y, the above values are applied by the VDP 803 to the shake variation scene Y3 shown in FIG. From the 11th frame to the 15th frame, the liquid crystal display device 41 displays the design of the shake fluctuation scene Y3 shown in FIG. 15(c-2).

Next, as shown in FIG. 17(d), in the shake variation sequence table Y, the above values are applied to the shake variation scene Y4 shown in FIG. 15(d-2) by the VDP 803 at the 16th frame, thereby From the 16th to 20th frames, the liquid crystal display device 41 displays the pattern of the shake fluctuation scene Y4 shown in FIG. 15(d-2).

When the middle decorative pattern is shaken and fluctuated after the 20th frame, the processing is repeated from the beginning (first frame). Also, the timer of the shaking variation sequence table Y is different from the variation scenario timer, and counts one frame from the frame when it is set.

Thus, such a shaking variation sequence table Y is set at timing T5Aa (see FIG. 12), as shown in the normal variation 12-second variation scenario SS_DATA for decorative symbols (see FIG. 13(c)). Up to the 363rd frame, processing of the middle decorative pattern based on the contents of the shake variation sequence table Y is performed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the fluctuation fluctuation display of the middle decorative pattern as shown in FIG. 11(o) from timing T5Aa to timing T6A shown in FIG. Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

On the other hand, as shown in FIG. 18(d), in the shaking variation sequence table Z, since the symbols set in the deceleration variation sequence table Z are used as they are, the symbol numbers are not changed, and the value of R1=GAZOU (ZugaraR) is used. is applied to the shake fluctuation scene Z1 shown in FIG. 15(a-2). As a result, the pattern of the shake fluctuation scene Z1 shown in FIG. 15(a-2) is displayed on the liquid crystal display device 41 in the first to fifth frames.

Next, as shown in FIG. 18(d), in the shake variation sequence table Z, the above values are applied by the VDP 803 to the shake variation scene Z2 shown in FIG. 15(b-2) in the sixth frame, thereby On the liquid crystal display device 41, the pattern of the shake fluctuation scene Z2 shown in FIG. 15(b-2) is displayed from the 6th frame to the 10th frame.

Next, as shown in FIG. 18(d), in the shake variation sequence table Z, the above values are applied by the VDP 803 to the shake variation scene Z3 shown in FIG. 15(c-2) at the 11th frame, thereby On the liquid crystal display device 41, the pattern of the shake fluctuation scene Z3 shown in FIG. 15(c-2) is displayed from the 11th frame to the 15th frame.

Next, as shown in FIG. 18(d), in the shake variation sequence table Z, the above values are applied by the VDP 803 to the shake variation scene Z4 shown in FIG. From the 16th frame to the 20th frame, the liquid crystal display device 41 displays the pattern of the shake fluctuation scene Z4 shown in FIG. 15(d-2).

It should be noted that when the right decorative pattern is shaken and fluctuated even after the 20th frame, the process is repeated from the beginning (first frame). Also, the timer of the shaking variation sequence table Z is different from the variation scenario timer, and counts one frame from the frame when it is set.

Thus, such a shaking variation sequence table Z is set at timing T4Aa (see FIG. 12) as shown in the normal variation 12-second variation scenario SS_DATA for decorative symbols (see FIG. 13(c)). Up to the 363rd frame, the processing of the right decorative pattern is performed based on the contents of the shaking variation sequence table Z. As a result, the VDP 803 causes the liquid crystal display device 41 to display the swing fluctuation display of the right ornamental pattern as shown in FIGS. . Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

By the way, after the fluctuation display of the decorative pattern is performed as described above, the game is stopped because the pattern is fixed. Therefore, the symbol stop will be described in detail below.

As shown in FIG. 15(a-3), the area in which the pattern is stopped on the liquid crystal display device 41 is determined in advance. That is, as shown in FIG. 15(a-3), one scene is prepared as a display mode of decorative symbols in which the symbol stop is displayed on the liquid crystal display device 41. FIG. Specifically, a symbol stop scene X, a symbol stop scene Y, and a symbol stop scene Z are prepared. In the symbol stop scene X, the object L1 is positioned at the center of the liquid crystal display device 41, in the symbol stop scene Y, the object C1 is positioned at the center of the liquid crystal display device 41, and in the symbol stop scene Z, the object R1 is positioned at the center of the liquid crystal display device 41. It is located in the central portion of the liquid crystal display device 41 .

Thus, by using the scene shown in FIG. 15(a-3), it is possible to make it appear that the decorative pattern is stopped.

Here, in more detail, the method using the scene shown in FIG.

As shown in FIG. 16(e), in the fluctuation stop sequence table X, the symbol numbers are set in consideration of the case where the value of the variable ZugaraL becomes an abnormal value due to noise during the deceleration fluctuation of the left decorative symbol. Specifically, ZugaraL=STOP_L1 is set, and in this embodiment, 1 is set to STOP_L1 because the stop symbol is "253". As a result, L1=GAZOU(1), and this value is applied by the VDP 803 to the symbol stop scene X shown in FIG. ) is displayed.

On the other hand, as shown in FIG. 17(e), in the fluctuation stop sequence table Y, the symbol number is set in consideration of the case where the value of the variable ZugaraC becomes an abnormal value due to noise during the deceleration fluctuation of the middle decorative symbol. Specifically, ZugaraC=STOP_C1 is set, and in the present embodiment, the stop/stop symbol is "253", so 4 is set to STOP_C1. As a result, C1=GAZOU(4), and this value is applied by the VDP 803 to the symbol stop scene Y shown in FIG. ) is displayed.

On the other hand, as shown in FIG. 17(e), in the fluctuation stop sequence table Z, the symbol number is set in consideration of the case where the value of the variable ZugaraR becomes an abnormal value due to noise during the deceleration fluctuation of the right decorative symbol. . Specifically, ZugaraR=STOP_R1 is set, and in this embodiment, 2 is set to STOP_R1 because the stop/stop symbol is "253". As a result, R1=GAZOU(2), and this value is applied by the VDP 803 to the symbol stop scene Z shown in FIG. 15(a-3). ) is displayed.

Thus, such a variation stop sequence table X, Y, Z is set at timing T6A, which is the 364th frame, as shown in the decorative pattern normal variation 12-second variation scenario SS_DATA (see FIG. 13(c)). Left decorative symbols are processed based on the contents of the stop sequence table X, middle decorative symbols are processed based on the contents of the fluctuation stop sequence table Y, and right decorative symbols are processed based on the contents of the fluctuation stop sequence table Z. will be processed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the display of the decorative symbol stop symbol as shown in FIG. 11(p) at the timing T6A shown in FIG. Although only the numbers are shown in the drawing, the liquid crystal display device 41 also displays decorations such as sunny and cloudy as shown in FIG. 19(a) together with the numbers.

Thus, in this way, while the decorative design is subjected to a variable performance based on the normal variation 12-second variation scenario SS_DATA for the decorative design (see FIG. 13(c)) according to the variation content and time of the variation pattern. , the resident design is not based on the normal variation 12-second variation scenario SS_DATA for decorative design (see FIG. 13(c)), but by switching and displaying the resident design at predetermined time intervals, a variable effect is executed. . Further, both the decorative symbols and the resident symbols start the variable performance when the sub-control CPU 800a receives the variation pattern command transmitted from the main control board 60 (main control CPU 600a). I'm trying

Thus, by making the method of varying the decorative symbols and the resident symbols different, it is possible to prevent the player from misunderstanding the decorative symbols and the resident symbols. Further, the control can be simplified because the variable performance is executed only by switching the resident symbols.

Also, the decorative patterns are changed according to the fluctuation start sequence table X, Y, Z, the high speed fluctuation sequence table X, Y, Z, the deceleration fluctuation sequence table X, Y, Z, and the swing fluctuation sequence table X, Y, Z. It's becoming For this reason, there are multiple timings for switching the decorative design. In addition, the resident symbols are changed according to the resident symbol variation start sequence table L, C, R and the resident symbol variation sequence table L, C, R. Therefore, there are a plurality of timings for switching the resident symbols. However, since the decorative patterns that the player pays attention to need playability and it is necessary to clarify that the resident patterns are changing, it is necessary to have a plurality of pattern switching timings according to the characteristics of each pattern. Fluctuation control can be performed efficiently by

On the other hand, when the decorative pattern starts to fluctuate, as shown in FIGS. 15(a-1) to (d-1), by scrolling display from the previously stopped pattern, the variable area is wider than the size of the decorative pattern. I am trying to change. In addition, as shown in FIG. 14(a), the resident symbols are designed to vary within a variation area substantially the same as the displayed size. Since the purpose of the resident symbols is to make it clear that they are changing, there is no need to scroll them like the decorative symbols. Therefore, the resident pattern only needs to fluctuate in a display area substantially the same as the size of the pattern. Therefore, unlike the decorative pattern, as shown in FIG. 14(a), by varying the resident pattern in a variable area that is substantially the same size as the displayed size, other patterns can be displayed without requiring an extra variable area. It can be displayed so as not to interfere with the liquid crystal effect.

By the way, in the present embodiment, the resident symbols are permanently displayed during the period in which they are displayed in a varying mode according to the variation content and variation time of the variation pattern corresponding to the lottery result. The display may be continued even when the variation is stopped and there is no reservation for the next variation, so-called customer waiting state. Further, when the customer waiting demonstration effect is displayed, the resident pattern may be hidden. Thus, by hiding the display, the player can clearly recognize that the content being displayed is not the variable effect. Furthermore, it may be hidden even during the big hit. Thus, according to this, the player can clearly recognize that the variation has ended and the big win state has occurred, and furthermore, the resident pattern is redisplayed to end the big win and resume the variable performance. It is possible to make the player recognize that it will be done.

By the way, in this embodiment, at timing T6A shown in FIG. Although an example in which the variation stop sequence table X, Y, Z is set in the normal variation 12-second variation scenario SS_DATA for the decorative symbol shown in (c) is shown, this is not limiting, and the symbol confirmation command is issued by the main control board 60 (main control If not transmitted from the CPU 600a), the variable stop sequence table X, Y, Z may be set when the variable scenario timer reaches a value indicating 364 frames. Also, regarding the resident symbol variation scenario ZS_DATA shown in FIG. 13(b), when the symbol confirmation command is not transmitted from the main control board 60 (main control CPU 600a), the normal variation 12-second variation scenario SS_DATA for decorative symbols is used. When the stop sequence tables X, Y and Z are set, the resident symbol variation stop sequence tables L, C and R may be set in the resident symbol variation scenario ZS_DATA.

Further, in the present embodiment, when the decorative pattern is changed at high speed, the process of making it semi-transparent is performed, but the process of making it semi-transparent may not be performed.

Furthermore, in the present embodiment, when updating the resident symbol, an example of incrementing (+1) after a predetermined time has been shown, but the present invention is not limited to this, and may be decremented (-1). Also, instead of incrementing (+1) or decrementing (-1) all of the resident symbols, two of the three resident symbols may be incremented (+1) and the remaining one may be decremented (-1). .

On the other hand, in the present embodiment, the case of normal variation has been described as an example, but the present invention is not limited to this, and can also be applied to reach variation. This point will be specifically described with reference to FIGS. 20 to 25. FIG. 20(a) to (h), the same processing is performed from the timings T1A to T4Aa shown in FIG. 12, so the description thereof will be omitted.

Next, at timing T5Ab shown in FIG. 21, the sub-control CPU 800a transmits to the VDP 803 a command list for informing the liquid crystal display device 41 of reach. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(i), the text "reach!" is displayed on the liquid crystal display device 41 (see image P40A).

Further, at timing T5Ab shown in FIG. 21, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the middle decorative symbol. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIGS. 20(j) to (k), an image is displayed on the liquid crystal display device 41 in which the middle decorative pattern (see images P41Ab and P42Ab) is decelerating and fluctuating. At this time, the VDP 803 switches to a decelerating variation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the medium decoration pattern determined at the timing T1A shown in FIG.

Thus, in this manner, as shown in FIG. 20(j), an image in which the middle decorative pattern (see image P41Ab) is decelerating and fluctuating is displayed on the liquid crystal display device 41, and further shown in FIG. 20(k). As shown, the liquid crystal display device 41 displays an image in which the middle decorative pattern (see image P42Ab) is decelerating and fluctuating.

Next, at timing T5Ac shown in FIG. 21, the sub-control CPU 800a transmits to the VDP 803 a command list for changing the left and right decorative patterns to numeric patterns and changing the middle decorative patterns at high speed. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(l), the left decorative design (see image P43Aa) and the right decorative design (see image P43Ac) are changed to number designs, and the middle decorative design (see image P43Ab) fluctuates at high speed. The image that is displayed is displayed on the liquid crystal display device 41 .

Next, the sub-control CPU 800a transmits to the VDP 803 a command list for displaying left and right decorative patterns in the upper corners of the screen. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(m), the left decorative pattern of the number pattern (see image P44Aa) is displayed in the upper left corner of the screen of the liquid crystal display device 41, and the right decorative pattern of the number pattern (see image P44Ac) is displayed on the liquid crystal display. It will be displayed in the upper right corner of the screen of the display device 41 .

Next, the sub-control CPU 800a transmits to the VDP 803 a command list for informing the liquid crystal display device 41 of the SP reach. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(n), characters "SP reach" are displayed on the liquid crystal display device 41 (see image P45A).

Thus, after the ready-to-win effect occurs, the decorative pattern is changed to only the number pattern, while the resident pattern continues to fluctuate only with the number pattern, and even if the ready-to-win effect occurs, it fluctuates without change. keep doing. As a result, it is possible to reduce the burden of controlling the resident symbols.

By the way, the processing of the above-described variation performance includes the decorative symbol normal variation scenario SS1_DATA, the decorative symbol ten-time variation scenario SS2_DATA, the decorative symbol reach development time variation scenario SS3_DATA, and the This is done using the resident pattern variation scenario ZS_DATA. The decorative symbol normal variation scenario SS1_DATA, the decorative symbol ten-time variation scenario SS2_DATA, and the decorative symbol reach development variation scenario SS3_DATA are stored in the sub-control ROM 800b and shown in FIG. It is one of a plurality of production scenario data PS_DATA. Note that the resident symbol variation scenario ZS_DATA is the same as the one described above, and is given the same reference numerals.

In the decorative symbol normal variation scenario SS1_DATA, when the left decorative symbol is subjected to variation processing as described above, as shown in FIG. X, the 81st frame from timing T2A to the 93rd frame is processed with the high-speed variation sequence table X, and the 94th frame from timing T3A to timing T3Aa (see FIG. 12) is 1 Processing is performed with the deceleration variation sequence table X up to the frame before, and processing is performed with the shake variation sequence table X from time T3Aa (see FIG. 12).

Then, in performing the variation processing of the middle decorative pattern as described above, as shown in FIG. The high-speed variation sequence table Y is used for processing from timing T2A, which is the 81st frame.

Furthermore, in performing the variation processing for the right decorative pattern as described above, as shown in FIG. From timing T2A, which is the 81st frame, to the 183rd frame, processing is performed with the high-speed fluctuation sequence table Z, and from timing T4A, which is the 184th frame, to timing T4Aa (see FIG. 12) one frame before the deceleration fluctuation sequence table. Z is processed, and from timing T4Aa (see FIG. 12), processing is performed using the shake fluctuation sequence table Z.

Thus, by using such decorative design normal variation scenario SS1_DATA, the VDP 803 causes the liquid crystal display device 41 to display the decorative design variation display as shown in FIGS.

In the variation scenario SS2_DATA for the decorative pattern tenpie, when the left decorative pattern is subjected to the above-described variation processing, as shown in FIG. is to be performed.

Then, in performing the variation processing of the middle decorative pattern as described above, as shown in FIG. 22(c), the processing is performed in the ten-time variation sequence table Y from the first frame at timing T5Ab. .

Furthermore, in performing the variation processing for the right decorative pattern as described above, as shown in FIG. 22(c), the processing is performed using the shaking variation sequence table Z from the first frame at timing T5Ab.

Thus, by using the scenario SS2_DATA for decorative design ten-time variation, the VDP 803 causes the liquid crystal display device 41 to display the decorative design variation shown in FIGS. 20(j) to (k). . In the present embodiment, in order to swing and fluctuate the left and right decorative symbols in the scenario SS2_DATA for decorative pattern tenpai, processing is performed using the swing fluctuation sequence tables X and Z, but this is not the only option. Instead, the fluctuation stop state may be set without swing fluctuation.

In the decorative symbol reach development time variation scenario SS3_DATA, as shown in FIG. is to be processed.

Then, in performing the variation processing of the middle decorative pattern as described above, as shown in FIG. 22(d), the processing is performed by the high-speed variation sequence table Y from the first frame at timing T5Ac.

Furthermore, in performing the variation processing of the right decorative pattern as described above, as shown in FIG. .

Thus, by using the scenario SS3_DATA of variation at the time of reach development for decorative symbols, the VDP 803 causes the liquid crystal display device 41 to display the variable display of the decorative symbols as shown in FIGS. Become.

Here, the variation sequence table Y during tense and the sequence tables X and Z during reach development will be described in detail. The fluctuation start sequence table X, Y, Z, the high speed fluctuation sequence table X, Y, Z, the deceleration fluctuation sequence table X, Y, Z, and the shake fluctuation sequence table X, Y, Z are the same as those described above. , explanation is omitted.

As shown in FIG. 24(a), the variation sequence table Y during ten-pie performs processing for changing the middle decorative symbol during high-speed variation to a symbol displayed at the timing of deceleration according to the stop symbol. Specifically, when reaching reach, the middle decorative pattern decelerates from -1 frame before the winning pattern, passes the winning pattern, and fluctuates at high speed to develop into SP reach. In order to start decelerating one frame before the symbol), set the left decorative symbol -1 to the variable ZugaraC. That is, a value obtained by ZugaraC=STOP_L1-1 is substituted for C3=GAZOU(ZugaraC+2), C2=GAZOU(ZugaraC+1), C1=GAZOU(ZugaraC), and C0=GAZOU(ZugaraC-1). As a result, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. The symbols of the symbol variation scene Y1 shown in 1) are displayed. In this embodiment, an example of setting the left decorative design-1 to the variable ZugaraC is shown, but the present invention is not limited to this, and the right decorative design-1 may be set to the variable ZugaraC.

Next, as shown in FIG. 24(a), in the ten-pie variation sequence table Y, in the 11th frame, the VDP 803 applies the above values to the symbol variation scene Y2 shown in FIG. , the pattern of the pattern variation scene Y2 shown in FIG.

Next, as shown in FIG. 24(a), in the ten-pie time variation sequence table Y, the above values are applied to the symbol variation scene Y3 shown in FIG. , the pattern of the pattern variation scene Y3 shown in FIG.

Next, as shown in FIG. 24(a), in the ten-pie time variation sequence table Y, the above values are applied to the symbol variation scene Y4 shown in FIG. , the pattern of the pattern variation scene Y4 shown in FIG.

Next, as shown in FIG. 24(a), in order to update the symbol number in the 41st frame, ZugaraC=ZugaraC+1 and the value of ZugaraC is incremented (+1). That is, the value of ZugaraC incremented (+1) is substituted for C3 = GAZOU (ZugaraC + 2), C2 = GAZOU (ZugaraC + 1), C1 = GAZOU (ZugaraC), and C0 = GAZOU (ZugaraC - 1). As a result, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. The symbols of the symbol variation scene Y1 shown in 1) are displayed.

Next, as shown in FIG. 24(a), in the ten-pie variation sequence table Y, at the 51st frame, the VDP 803 applies the above values to the symbol variation scene Y2 shown in FIG. , the pattern of the pattern variation scene Y2 shown in FIG.

Next, as shown in FIG. 24(a), in the ten-pie variation sequence table Y, at the 61st frame, the VDP 803 applies the above values to the symbol variation scene Y3 shown in FIG. , the pattern of the pattern variation scene Y3 shown in FIG. 15(c-1) is displayed on the liquid crystal display device 41 from the 61st frame to the 70th frame.

Next, as shown in FIG. 24(a), in the ten-pie variation sequence table Y, at the 71st frame, the VDP 803 applies the above values to the symbol variation scene Y4 shown in FIG. , the pattern of the pattern variation scene Y4 shown in FIG.

Next, as shown in FIG. 24(a), in order to update the symbol number in the 81st frame, in the tenpy time variation sequence table Y, ZugaraC=ZugaraC+1 and the value of ZugaraC is incremented (+1). That is, the value of ZugaraC incremented (+1) is substituted for C3 = GAZOU (ZugaraC + 2), C2 = GAZOU (ZugaraC + 1), C1 = GAZOU (ZugaraC), and C0 = GAZOU (ZugaraC - 1). As a result, this value is applied by the VDP 803 to the pattern variation scene Y1 shown in FIG. The symbols of the symbol variation scene Y1 shown in 1) are displayed.

Next, as shown in FIG. 24(a), in the ten-pie variation sequence table Y, at the 91st frame, the VDP 803 applies the above values to the symbol variation scene Y2 shown in FIG. , the pattern of the pattern variation scene Y2 shown in FIG.

Next, as shown in FIG. 24(a), in the 101st frame in the ten-pie variation sequence table Y, the above values are applied to the symbol variation scene Y3 shown in FIG. , the pattern of the pattern variation scene Y3 shown in FIG.

Next, as shown in FIG. 24(a), in the 111th frame in the ten-pie variation sequence table Y, the above values are applied by the VDP 803 to the symbol variation scene Y4 shown in FIG. , the pattern of the pattern variation scene Y4 shown in FIG.

Thus, such a ten-pie time variation sequence table Y is set at timing T5Ab as shown in the decorative design ten-pie time variation scenario SS2_DATA (see FIG. 22(c)), thereby changing the ten-pie time variation sequence table Y. Based on the content, processing of the middle decorative design will be performed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the deceleration fluctuation display of the middle decorative pattern as shown in FIGS. 20(j) to (k). Further, as described above, the number of frames in which the middle decorative pattern is switched by the ten-ply time variation sequence table Y (the middle decorative pattern displayed at the stop position during scrolling is switched) requires 40 frames. Therefore, the number of frames (12 frames) required for switching by the high-speed variation sequence table X/Y/Z and the number of frames (28 frames) required for switching by the deceleration variation sequence table X/Z in the normal variation scenario SS1_DATA for decorative symbols ). In other words, the variable scrolling during the tenpai period has a higher number of frames than the number of frames required for switching the decorative symbols during normal fluctuations, in order to give the player a sense of anticipation as to whether the middle decorative symbols will hit and stop with the symbols or develop into an SP reach. become longer.

On the other hand, when the reach is developed, as shown in FIGS. 23(a) to 23(d), the area of the pattern displayed on the liquid crystal display device 41 is determined in advance. That is, as shown in FIGS. 23(a) to 23(d), four scenes are prepared as display modes of decorative patterns displayed on the liquid crystal display device 41. FIG. Regarding the middle decorative symbols, the symbol variation scene Y1 shown in FIG. 15(a-1), the symbol variation scene Y2 shown in FIG. 15(b-1), the symbol variation scene Y3 shown in FIG. 15(c-1), Since the symbol variation scene Y4 shown in FIG. 15(d-1) is used, the description is omitted.

Of the four scenes shown in FIGS. 23(a) to (d), in the scene shown in FIG. 23(a), a reach development scene X1 and a reach development scene Z1 are prepared. The object L1 is positioned at the center of the liquid crystal display device 41 in the reach development scene X1, and the object R1 is positioned at the center of the liquid crystal display device 41 in the reach development scene Z1.

On the other hand, in the scene shown in FIG. 23(b), a reach development scene X2 and a reach development scene Z2 are prepared. In the reach development scene X2, the object L1 is positioned slightly above the central portion of the liquid crystal display device 41, and in the reach development scene Z1, the object R1 is positioned slightly above the central portion of the liquid crystal display device 41. .

On the other hand, in the scene shown in FIG. 23(c), a reach development scene X3 and a reach development scene Z3 are prepared. In this reach development scene X3, the frame of the object L1 is smaller than in the scenes shown in FIGS. 23(a) and 23(b) are smaller than those of the scenes shown in FIGS.

On the other hand, in the scene shown in FIG. 23(d), a reach development scene X4 and a reach development scene Z4 are prepared. In this reach development scene X4, the frame of the object L1 is smaller than in the scenes shown in FIGS. The frame of R1 is smaller than the scenes shown in FIGS.

Here, in more detail, the method using the scenes shown in FIGS. 23A to 23D will be described in detail by describing the reach development time sequence tables X and Z. FIG.

As shown in FIG. 24(b), in the reach development time sequence table X, since the variable ZugaraL used in the swing variation sequence table X is taken over as it is, the symbol number is not updated, and at timing T5a, it is changed to a numerical symbol. process. That is, the value of L1=ZugaraL is applied by the VDP 803 to the reach development time scene X1 shown in FIG. ) is displayed.

Next, as shown in FIG. 24(b), in the reach development time sequence table X, in the sixth frame, the VDP 803 applies the above values to the reach development time scene X2 shown in FIG. On the liquid crystal display device 41, from the 6th frame to the 10th frame, the design of the reach development time scene X2 shown in FIG. 23(b) is displayed.

Next, as shown in FIG. 24(b), in the reach development time sequence table X, at the 11th frame, the VDP 803 applies the above values to the reach development time scene X3 shown in FIG. On the liquid crystal display device 41, from the 11th frame to the 15th frame, the design of the reach development time scene X3 shown in FIG. 23(c) is displayed.

Next, as shown in FIG. 24(b), in the reach development time sequence table X, at the 16th frame, the above values are applied by the VDP 803 to the reach development time scene X4 shown in FIG. From the 16th to 20th frames, the pattern of the reach development scene X4 shown in FIG. 23D is displayed on the liquid crystal display device 41 .

Thus, the reach development time sequence table X is set at timing T5Ac as shown in the decorative symbol reach development time variation scenario SS3_DATA (see FIG. 22(d)), whereby the reach development time sequence table X is set. Based on the contents of the left decorative pattern processing will be performed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the moving display of the left decorative design shown in FIG. 20(l) (see image P43Aa) and the left decorative design shown in FIG. 20(m) (see image P44Aa). Become.

On the other hand, as shown in FIG. 24(c), in the reach development time sequence table Z, since the variable ZugaraR used in the swing fluctuation sequence table Z is taken over as it is, the symbol number is not updated, and at timing T5a, the numerical symbol is changed. Do the process to change. That is, the value of R1=ZugaraR is applied by the VDP 803 to the reach development time scene R1 shown in FIG. ) is displayed.

Next, as shown in FIG. 24(c), in the reach development time sequence table Z, the above values are applied to the reach development time scene Z2 shown in FIG. 23(b) by the VDP 803 in the sixth frame, thereby On the liquid crystal display device 41, from the 6th frame to the 10th frame, the design of the reach development scene Z2 shown in FIG. 23(b) is displayed.

Next, as shown in FIG. 24(c), in the reach development time sequence table Z, the above values are applied by the VDP 803 to the reach development time scene Z3 shown in FIG. On the liquid crystal display device 41, the pattern of the reach development scene Z3 shown in FIG. 23(c) is displayed from the 11th frame to the 15th frame.

Next, as shown in FIG. 24(c), in the reach development time sequence table Z, at the 16th frame, the VDP 803 applies the above values to the reach development time scene Z4 shown in FIG. From the 16th frame to the 20th frame, the liquid crystal display device 41 displays the design of the reach development time scene Z4 shown in FIG. 23(d).

Thus, such a reach development time sequence table Z is set at timing T5Ac as shown in the decorative symbol reach development time variation scenario SS3_DATA (see FIG. 22(d)), whereby the reach development time sequence table Z Based on the content of, the processing of the right decorative design will be performed. As a result, the VDP 803 causes the liquid crystal display device 41 to display the moving display of the right decorative design shown in FIG. 20(l) (see image P43Ac) and the right decorative design shown in FIG. 20(m) (see image P44Ac). Become.

Therefore, in this way, the decorative symbols are changed only to the numerical symbols after the ready-to-win effect has occurred. On the other hand, the resident pattern continues to fluctuate only with the number pattern, and continues to fluctuate without change even if the ready-to-win effect occurs. As a result, it is possible to reduce the burden of controlling the resident symbols.

Further, in the variation pattern for executing the ready-to-win production, the decorative symbols vary based on a plurality of variation scenarios, namely, a normal variation scenario for decorative symbols SS1_DATA, a scenario for ten-time variation for decorative symbols SS2_DATA, and a variation scenario for reach development for decorative symbols SS3_DATA. It will be done. On the other hand, the resident symbols fluctuate based on a single fluctuation scenario called a resident pattern fluctuation scenario ZS_DATA.

Thus, by doing so, it is possible to prevent the player from misidentifying the decoration pattern and the resident pattern. Furthermore, since the resident symbols vary based on a single variation scenario called the resident symbol variation scenario ZS_DATA, control can be simplified.

By the way, in the present embodiment, in the variation patterns for executing the ready-to-win effect, the normal variation scenario SS1_DATA for decorative symbols, the scenario for ten-time variation for decorative symbols SS2_DATA, and the variable scenario for developing ready-to-win for decorative symbols SS3_DATA are used as examples. However, a scenario as shown in FIG. 25 is also used.

That is, as shown in FIG. 25(a), when the SP reach per variation pattern command is transmitted from the main control board 60 (main control CPU 600a), timing T1A (variation start ) ~ At timing T5Ab, normal variation scenario SS1_DATA for decorative symbols is used, at timing T5Ab ~ timing T5Ac, variation scenario SS2_DATA for decorative symbols is used, At timing T5Ac ~ timing T7A, variation during reach development for decorative symbols Scenario SS3_DATA is used, during timing T7A to timing T8A, decorative symbol SP reach variation scenario SS4_DATA is used, and during timing T8A to timing T6A (variation stops), decorative symbol SP reach per display scenario SS5a_DATA is used. Incidentally, the resident symbols change based on a single variation scenario called resident symbol variation scenario ZS_DATA.

On the other hand, as shown in FIG. 25(b), when the SP reach deviation variation pattern command is transmitted from the main control board 60 (main control CPU 600a), as the variation pattern of the reach effect, timing T1A (variation start) to timing At T5Ab, normal variation scenario SS1_DATA for decorative symbols is used, at timing T5Ab to timing T5Ac, variation scenario SS2_DATA for decorative symbols at ten-pie is used, and from timing T5Ac to timing T7A, reach development time variation scenario SS3_DATA for decorative symbols is used. During timing T7A to timing T8A, the decorative symbol SP reach fluctuation scenario SS4_DATA is used, and during timing T8A to timing T6A (variation stops), the decorative symbol SP reach loss display scenario SS5b_DATA is used. Incidentally, the resident symbols change based on a single variation scenario called resident symbol variation scenario ZS_DATA.

By the way, the decorative symbol SP reach variation scenario SS4_DATA is a scenario from when the SP reach is reached to when the middle decorative symbol is hit by the winning symbol and by the losing symbol. Specifically, as shown in FIG. 25(c), when performing the variation processing of the left decorative symbol, the process is performed in the ready-to-win shake variation sequence table X from timing T7A. Then, in performing the variation processing of the middle decorative pattern, the process is performed in the reach-time variation sequence table Y from the 1st frame to the 599th frame at the timing T7A, and from the 600th frame, the pattern swing variation sequence table Y is processed. Furthermore, in performing the variation processing of the right decorative pattern, the processing is performed in the shake variation sequence table Z at reach from timing T7A. As a result, it becomes the SP reach, and the process of winning with the middle decoration pattern and the winning pattern with the missing pattern is performed.

On the other hand, the decorative symbol SP winning display scenario SS5a_DATA is a scenario in which the middle decorative symbol is hit and the symbol stops and the size of the symbol returns to its original size. Specifically, as shown in FIG. 25(d), when performing the variation processing of the left decorative pattern, the effect display sequence table X is set at the 60th frame from timing T8A, and the effect display sequence table X is set until one frame before timing T6A. Processing is performed in the display sequence table X. Then, at timing T6A, processing is performed in the fluctuation stop sequence table X. FIG.

In addition, as shown in FIG. 25(d), in performing the variation processing of the middle decorative symbols, the processing is performed in the winning symbol display sequence table Y from the 1st frame to the 59th frame at timing T8A. Processing is performed in the win effect display sequence table Y from the first frame to one frame before timing T6A. Then, at timing T6A, processing is performed in the fluctuation stop sequence table Y. FIG.

Furthermore, as shown in FIG. 25(d), when performing the variation processing of the right decorative pattern, the hit effect display sequence table Z is set at the 60th frame from timing T8A, and the hit effect display sequence is set up to one frame before timing T6A. Processing is performed on table Z. Then, at timing T6A, processing is performed in the fluctuation stop sequence table Z. FIG.

Thus, by such a process, the pattern hits the middle decorative pattern and stops, and the size of the pattern returns to its original size to produce a hit performance.

On the other hand, the decorative symbol SP lost display scenario SS5b_DATA is a scenario in which the lost symbol stops at the middle decorative symbol and the size of the symbol returns to its original size to produce a lost display scenario. Specifically, as shown in FIG. 25(e), when performing the variation processing of the left decorative symbol, the losing effect display sequence table X is set in the 60th frame from timing T8A, and the sequence table X is set until one frame before timing T6A. , the processing is performed in the losing effect display sequence table X. Then, at timing T6A, processing is performed in the fluctuation stop sequence table X. FIG.

In addition, as shown in FIG. 25(e), in performing the process of varying the middle decorative symbol, the process is performed in the lost symbol display sequence table Y from the 1st frame to the 59th frame at timing T8A. Processing is performed in the losing effect display sequence table Y from the first frame to one frame before timing T6A. Then, at timing T6A, processing is performed in the fluctuation stop sequence table Y. FIG.

Further, as shown in FIG. 25(e), when performing the variation processing of the right decorative symbol, the losing effect display sequence table Z is set at the 60th frame from timing T8A, and the losing effect display sequence table Z is set until one frame before timing T6A. Processing is performed in the display sequence table Z. Then, at timing T6A, processing is performed in the fluctuation stop sequence table Z. FIG.

Thus, by such a process, the deviated design stops at the middle decorative design, and the size of the design returns to its original size to produce a deviating effect.

Thus, in the variation pattern for executing the ready-to-win effect, the decorative symbols vary based on a plurality of scenarios. On the other hand, the resident symbols change based on a single variation scenario called resident symbol variation scenario ZS_DATA.

By the way, when the decorative symbols and resident symbols as described above change, the special symbol display device 50 shown in FIG. When the special symbol display device 50 is variably displayed, the resident symbols also vary accordingly, but the decorative symbols can start varying with a delay of a predetermined time. This point will be specifically described with reference to FIGS. 26 and 27. FIG. In addition, in FIG. 27, only the timing charts of the left resident pattern and the left decorative pattern are shown for easy understanding.

That is, as shown in FIG. 27, when a variation pattern command transmitted from the main control board 60 (main control CPU 600a) is received at timing T1A, the resident pattern is displayed on the liquid crystal display device as shown in FIG. 26(a). 41 (see image P50A) is changed to a state of high-speed fluctuation display (see image P51A) as shown in FIG. 26(b).

On the other hand, as for the decorative design, as shown in FIG. 26(b), an enlarged display is displayed on the liquid crystal display device 41 (see image P52A). This is one of the announcement effects using the decorative pattern. After that, at timing T1Aa shown in FIG. 27, the decorative pattern starts to fluctuate, and at timing T2A, a high-speed fluctuation display (see image P53A) is shown as shown in FIG.

Thus, even if the advance notice effect using the pattern is generated and the variation of the decorative pattern is started with a delay, by starting the variation of the resident pattern, the player can enjoy the variation of the pattern. can be reliably notified that has been started.

In this embodiment, the timing of stopping the variation of the left decorative pattern is the timing T3A, which is the same as the timing shown in FIG. At this time, by adjusting the time in the high-speed fluctuation sequence table X, the fluctuation may be stopped at the timing T3A, which is the same as the timing shown in FIG.

<Explanation of relief game and special electric support game>
Next, the relief game and the special electric support game will be specifically described with reference to FIGS. 28 to 33. FIG.

<Description of conventional games>
As shown in FIG. 28(a), in the conventional game, the normal game state (no low-accuracy electric support state) shifts to the jackpot game state, and then the game state is changed to a game state with a probability variation or a non-probability variation. becomes. If it shifts to the game state of variable probability, it will shift to the variable probability game state (state with high probability electric support), and a game such as shifting to the jackpot game state will be performed. On the other hand, if it shifts to a non-probable variable winning game state, it shifts to a time-saving game state (state with low probability power support), shifts to a big hit game state, or changes in special symbols a predetermined number of times (for example, 100 times ), a game such as shifting to a normal game state (low-accuracy electric support no state) is performed. In addition, low probability indicates a gaming state in which the jackpot lottery probability is low probability state, high probability indicates a gaming state in which the jackpot lottery probability is in a high probability state, and probability variable gaming state means that the jackpot lottery probability is A game state in which the variation time of special symbols is shortened in a high probability state, and furthermore, the state of power supply is shown, and the time-saving game state is a state in which the jackpot lottery probability is low and the variation of the special symbols is changed. The time is shortened, and further, the game state in which the electric sapo state is shown, and the electric sapo indicates the electric chewing support. Under the electric chew (normal electric accessory) support state, the operating rate (opening time and number of times of opening) of the opening and closing member 45b of the special symbol 2 start port 45 is improved, and the winning rate to the special symbol 2 start port 45 is increased. Since the winning frequency per unit time is increased, the game state is more advantageous to the player than when the electric chew support state is not performed (normal game state).

<Description of Relief Game>
On the other hand, in the relief game, as shown in FIG. 28(b), the normal game state (the state without the low-accuracy power support) shifts to the jackpot game state, and then the game state shifts to the game state of the probability variable hit or the non-probability variable hit. It will be done. If it shifts to the game state of variable probability, it will shift to the variable probability game state (state with high probability electric support), and a game such as shifting to the jackpot game state will be performed. On the other hand, if it shifts to a non-variable per gaming state, it shifts to the first time-saving gaming state (state with low certainty power support), transitions to a big hit gaming state, or changes in special symbols a predetermined number of times (for example, 100 times), a game such as shifting to a normal game state (low voltage support no state) is performed.

Thus, the flow of the game explained above is the same as that of the conventional game. In this relief game, the point different from the conventional game is that, as shown in FIG. When it is executed, it shifts to the second time-saving gaming state (state with low-accuracy power support), and then shifts to the jackpot gaming state, or the fluctuation of the special symbol reaches a predetermined number of times (for example, 1000 times). Then, the difference is that a game such as shifting to a normal game state (low-voltage support-free state) is performed.

Thus, by providing such a game, it is possible to add a purpose to the game in addition to the big win, and to reduce the disadvantage to the player due to the long continuation of the state of not winning the big win.

By the way, in the relief game as described above, the following processing is performed in the present embodiment.

That is, as shown in FIG. 28 (b), from the non-variable per game state, in the transition to the first time-saving gaming state (with low probability sapo state), to the ending of the jackpot production in the non-variable per game state Then, on the liquid crystal display device 41, a game state notification image after the end of the jackpot effect indicating the first time-saving game state such as "chance time entering 100 times", and the time-saving number of times indicating the maximum number of fluctuations in which the first time-saving game state is maintained. The time-saving rush effect including the notification is executed by the sub-control CPU 800a. However, a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and in shifting to the second time-saving gaming state (low-accuracy power support state), a predetermined number of times (for example, 1000 times) special At the time of fluctuation of the pattern, the sub-control CPU 800a does not execute the time-saving rush effect, and immediately after shifting to the second time-saving gaming state (state with low electric power support), for example, at the time of the 1001st special pattern fluctuation, the liquid crystal A time-saving rush effect such as displaying an image prompting the player to "beat right" on the display device 41 is executed. As a result, the opening/closing member 45b of the special pattern 2 starting port 45 is opened immediately after the player hits to the right, so that the player can enjoy the time-saving game, thereby improving the interest of the player. be able to. In addition, when the second time-saving game state is reached, the special symbol 2, which has the possibility of becoming an advantageous game state for the player compared to the special symbol 1, is changed, so the second time-saving game state ( For example, immediately after transitioning to low-accuracy support state), when the 1001st special pattern changes, the time-saving rush effect takes longer than the deviation fluctuation in the normal game state (low-accuracy support state). It will be executed by the control CPU 800a. As a result, it is possible to store the second start-holding ball and prevent the first start-holding ball from being consumed immediately after entering the second time-saving gaming state. In addition, since the time-saving performance to the second time-saving game state is performed during fluctuation, it is better to shorten the performance time than the time-saving performance to the first time-saving game state and display it simply. At this time, since the production time is short, unlike the time-saving rush production to the first time-saving game state, the second time-saving game state is maintained with only a display indicating the second time-saving game state, such as "help time rush". It is preferable not to display the number of times.

On the other hand, in this embodiment, the average fluctuation time per variation in the deviation fluctuation of the first time-saving gaming state (low-accuracy sapo state) and the deviation fluctuation of the second time-saving gaming state (low-accuracy electricity sapo state) is set to be different from the average fluctuation time per fluctuation in . That is, the number of time reductions in the first time-saving gaming state (with low-accuracy power support) and the number of time-savings in the second time-saving gaming state (with low-accuracy power support) Average variation per variation of the one with the larger number of time reductions set to be short. As a result, it is possible to improve the variation efficiency, thereby improving the interest of the player.

On the other hand, in the first time-saving gaming state (with low-accuracy power support state), before shifting to the normal gaming state after the jackpot production, the player expects whether or not it will be a big hit again. However, compared to the first half of the jackpot production, the selection ratio of reach out is increased. On the other hand, in the second time-saving game state (with low-accuracy power support), the number of fluctuations is greater than in the first time-saving game state, so the selection ratio of reach loss is reduced in the second half of the second time-saving game state. . As a result, it is possible to improve the variation efficiency, thereby improving the interest of the player.

On the other hand, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and when shifting to the second time-saving gaming state (low-accuracy power support state), sub-control In the CPU 800a, a time-saving rush effect such as displaying an image prompting the player to "right-hand hit" on the liquid crystal display device 41 is executed. , Even if a special symbol lottery is won and a big hit is achieved, the sub-control CPU 800a displays an image prompting the player to "right hit" on the liquid crystal display device 41. A rush effect is executed first, and the effect changes from the middle. Thus, in this way, when shifting to the second time-saving game state (low-accuracy power support state), if you win a special symbol lottery and win a jackpot, perform a partly common production with the time-saving rush production, If the player hits right at the start of the time-saving performance, it becomes impossible for the player to determine whether the game is a win or a loss, thereby improving the player's interest. That is, when moving to the second time-saving gaming state (low-accuracy power support state), if you win a lottery with a special pattern and win a big hit, you will not perform a time-saving rush effect, but will perform hit fluctuations such as reach, while special If the pattern lottery is not won and the player loses, the player can determine whether the player wins or loses by performing a time-saving rush performance, thereby lowering the player's interest. I will let you. Therefore, in this embodiment, when shifting to the second time-saving gaming state (state with low electric power support), if you win a special symbol lottery and win a jackpot, a time-saving rush effect and a partly common effect will be performed. , Right-handed notification is performed at the start of the time-saving rush production. Also, when shifting to the second time-saving game state (state with low-accuracy power support), the right-handed informing lamp 52c (see FIG. 5) for informing right-handed hitting is lit at the start of the 1001st special symbol variation. At this time, when moving to the second time-saving game state (with low-accuracy power support), if you win a lottery with a special pattern and win a jackpot, the liquid crystal will show that you hit the jackpot with a fanfare effect that starts the jackpot after that. Since the entire liquid crystal of the display device 41 is used for display, there is a case where the right-handed information is temporarily hidden. In this case, by lighting the right-handed notification lamp 52c (see FIG. 5) and continuing the right-handed notification, the right-handed display started by shifting to the second time-saving game state is hidden. Accordingly, the player can continue the right-handed state without hesitation as to whether or not to continue right-handed hitting.

On the other hand, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and the power supply is interrupted (power cut), the power is turned on again and the game is resumed. The background image (picture) is made different from the background image (picture) at the time of returning to the game, or part of the lighting of the decoration lamp is made different from the lighting of the decoration lamp at the time of returning to the game. As a result, the hall side can know the gaming machine 1 close to the predetermined number of times (for example, 1000 times), thereby correcting the disadvantage of the hall side. That is, at the end of the business on the previous day, if the power supply is interrupted (power cut) in a state where the special symbol loss variation has been executed, for example, 900 times, the special symbol loss variation will be 100 in the next day's business. When it is executed twice, it will shift to the second time-saving game state (state with low-accuracy power support). Then, the hall side unintentionally provides the player with the second time-saving game state by executing the relief game for the number of fluctuations in the previous day across the day, and thus the hall side suffers a disadvantage. becomes. Therefore, in the present embodiment, the hall side is notified of the gaming machine 1 that is close to the predetermined number of times (for example, 1000 times). As a result, the employee on the hall side presses the RAM clear switch 620 to clear the normal RAM area 600ca (see FIG. 7(a)) of the main control RAM 600c, which holds the number of fluctuations in the special symbols. countermeasures can be taken, and thus the disadvantage of the hall side can be corrected.

On the other hand, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and the power supply is interrupted (power cut), when the power is turned on again to return to the game, the sub-control CPU 800a determines the predetermined number of times (for example, 1000 times) in the fluctuation of the special symbol in the first rotation after returning to the game. To execute an effect according to the remaining number of times up to. As a result, the player can either keep the number of special symbol win fluctuations at the end of the previous day's business, or press the RAM clear switch 620 to store the number of special symbol win fluctuations in the main control RAM 600c. It is possible to guess whether the normal RAM area 600ca (see FIG. 7A) is in a cleared state, thereby increasing the player's desire to continue playing the game.

On the other hand, in the normal game state (state without low-accuracy power support) as shown in FIG. A warning is issued by, for example, displaying an image prompting to However, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) the special symbol loss variation is executed, and when shifting to the second time-saving gaming state (state with low-accuracy power support), the second When the player hits to the right due to the variation of the special symbols before shifting to the time-saving game state (state with low-accuracy power support), the above warning is not given. As a result, it is possible to prevent a situation in which the interest of a player who knows the number of times until transition to the second time-saving game state (state with low-accuracy power support) shown in FIG. 28(b) is reduced.

<Explanation of the game with the special electric sapo pattern>
Next, the game of the special electric sapo symbol will be described with reference to FIG. 28(c).

In the game of the special electric sapo symbol, as shown in FIG. 28(c), the normal game state (the state without the low electric power sapo) shifts to the jackpot game state, and then the game state of the probability variable winning or the non-probability variable winning. will move to If it shifts to the game state of variable probability, it will shift to the variable probability game state (state with high probability electric support), and a game such as shifting to the jackpot game state will be performed. On the other hand, if it shifts to a non-variable per gaming state, it shifts to the first time-saving gaming state (state with low certainty power support), transitions to a big hit gaming state, or changes in special symbols a predetermined number of times (for example, 100 times), a game such as shifting to a normal game state (low voltage support no state) is performed.

Thus, the flow of the game explained above is the same as that of the conventional game. In this special electric sapo symbol game, the difference from the conventional game is that, as shown in FIG. When winning, it shifts to the second time-saving gaming state (state with low-accuracy power support), and then shifts to the jackpot gaming state, or when the fluctuation of the special symbol reaches a predetermined number of times (for example, 100 times or more). The difference is that a game such as shifting to a normal game state (low voltage support no state) is performed.

Thus, by providing such a game, it is possible to add a purpose to the game in addition to the big win, and to reduce the disadvantage to the player due to the long continuation of the state of not winning the big win.

Thus, in the game of the special electric support symbol as described above, the following processing is performed in the present embodiment.

Figure 28 (c), or the first time-saving state shown in Figure 28 (b) (state with low-accuracy electric support) reaches a predetermined number of times (for example, 100 times), normal game state (low-accuracy When returning to the state without electric support), the sub-control CPU 800a displays the result effect on the liquid crystal display device 41 at the final change (for example, 100th time) of a predetermined number of times (for example, 100th time). ○○○point, etc.). However, the fluctuation of the special symbol reaches a predetermined number of times (for example, 100 times or more) from the second time-saving game state (state with low-accuracy electric support) shown in FIG. ), or when the variation of the special symbol reaches a predetermined number of times (for example, 1000 times) from the second time-saving game state (state with low probability power support) shown in FIG. When returning to the state without electric support, the sub-control CPU 800a controls the liquid crystal display device 41 so that the result effect is not displayed in the final variation of the predetermined number of times. This makes it possible to provide the player with appropriate information. That is, in the second time-saving gaming state (state with low-accuracy power support) shown in FIG. Since it is not passed through, there is no information that the player can obtain even if the result effect is displayed on the liquid crystal display device 41 . Therefore, as shown in the present embodiment, even in the same time-saving game state, by making the effects different depending on the timing of entry, appropriate information can be provided to the player.

By the way, a table as shown in FIGS. 29 to 31 is used to determine whether or not to perform the above result effect. This point will be described in detail below.

The table TBL shown in FIG. 29(a) is stored in the main control ROM 600b, and stores a variation pattern table specification code corresponding to each game state and a variation pattern table to be referred to. The variation pattern table specification code is data for referring to the variation pattern table managed on the program.

Specifically, in the table TBL shown in FIG. 29(a), "00H" is selected as the variation pattern table designation command in the normal game state, and NOR_TBL is used as the variation pattern table to be referred to. becomes. Also, in the first time-saving game state shown in FIG. 28(b) or the first time-saving game state shown in FIG. "01H" is selected, and JT1_TBL1 is used as the variation pattern table to be referred to. Then, in the first time-saving game state shown in FIG. 28(b) or the first time-saving game state shown in FIG. "02H" is selected, JT1_TBL2 is used as the variation pattern table to be referred to, and "03H" is selected as the variation pattern table specification command in the 100th rotation special symbol variation, and as the variation pattern table to be referred to , JT1_TBL3 will be used.

On the other hand, in the second time-saving gaming state shown in FIG. 28(b) or the second time-saving gaming state shown in FIG. ” is selected, and JT2_TBL1 is used as the variation pattern table to be referred to. Then, in the second time-saving game state shown in FIG. 28(b) or the second time-saving game state shown in FIG. "05H" is selected, JT2_TBL2 is used as the reference variation pattern table, and "06H" is selected as the variation pattern table specification command in the variation of the special symbol of the 101st to the final rotation, and the variation pattern to be referred to As a table, JT2_TBL3 will be used.

On the other hand, in the variable probability gaming state shown in FIG. 28(b) or in the variable probability gaming state shown in FIG. will be selected. Note that HI_TBL is not illustrated and will not be described.

By the way, the variation pattern table NOR_TBL referred to in the normal game state is as shown in FIG. 29(b). Specifically, if the lottery for the special symbol is not won and the number of the first start holding ball or the second start holding ball is "0", the normal fluctuation 12 seconds is selected with the probability shown. , Normal reach loss (20 seconds) is selected with the probability shown, and SP reach loss (50 seconds) is selected with the probability shown. Then, when the number of the first start holding ball or the second start holding ball is "1", the normal fluctuation of 8 seconds is selected with the probability shown in the figure, and the normal reach deviation (20 seconds) is selected with the probability shown in the figure. SP reach out (50 seconds) will be selected with a probability of . Furthermore, when the number of the first start holding ball or the second start holding ball is "2", the normal fluctuation 5 seconds is selected with the probability shown, and the normal reach deviation (20 seconds) is selected with the probability shown, With the probability shown in the figure, SP reach miss (50 seconds) will be selected. Furthermore, when the number of the first start holding ball or the second start holding ball is "3", the normal fluctuation of 3 seconds is selected with the probability shown, and the normal reach deviation (20 seconds) is selected with the probability shown, With the probability shown in the figure, SP reach miss (50 seconds) will be selected.

On the other hand, as shown in FIG. 29(b), in the special symbol lottery, if the special electric sapo symbol small hit A or the special electric sapo symbol small hit B is won, the normal reach is lost with the probability shown. + time-saving rush production (25 seconds) is selected, SP reach off + time-saving rush production (55 seconds) is selected with the probability shown. Thus, when the special electric sapo symbol is won, a series of variation patterns are selected in which the time-saving entry performance is performed after performing the losing performance during the variation of the special symbol.

On the other hand, as shown in FIG. 29(b), when a small hit C is won in a special symbol lottery, the normal reach loss (20 seconds) is selected. At this time, during the small winning operation, the sub-control CPU 800a executes the small winning effect.

On the other hand, as shown in FIG. 29 (b), if you win the special symbol lottery and win the probability variation, the probability shown in the figure, per normal reach (30 seconds) is selected, the probability shown in the figure, per SP reach (60 seconds) will be selected, and with the probability shown, (100 seconds) will be selected per full rotation variation.

On the other hand, as shown in FIG. 29(b), if you win the special symbol lottery and win the non-variable per, with the probability shown, per normal reach (30 seconds) is selected, with the probability shown, SP Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL1 referred to in the variations of the special symbols of the 1st to 79th rotations in the first time-saving gaming state is as shown in FIG. 30(a). Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 12 seconds is selected. Then, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "0", the normal fluctuation 5 seconds is selected with the probability shown, and the normal reach is lost with the probability shown. (20 seconds) is selected, and SP reach out (50 seconds) is selected with the probability shown. In addition, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "1" to "3", the normal fluctuation of 3 seconds is selected with the probability shown, and the probability shown is shown. , the loss of normal reach (20 seconds) is selected, and the loss of SP reach (50 seconds) is selected with the probability shown.

On the other hand, as shown in FIG. 30(a), in the special symbol lottery, when the small hit A of the special electric support symbol is won, the normal variation of 3 seconds is selected.

By the way, when the small win and the special electric support symbol are used together, the processing shown in FIG. 33 is performed. That is, when a small hit A is won with a probability of 1/200, it is also used as a special electric sapo symbol, and after the small hit, 1000 times are given as the number of times of time reduction. Then, when a small win A of the special electric support symbol is won during the time saving game, 1000 times are not reset as the number of times of time saving. On the other hand, if a small win B is won with a probability of 100/200, it is also used as a special electric sapo symbol, and after the small win, 100 times are given as the number of times of time reduction. Then, when a small hit B of the special electric support symbol is won during the time saving game, 100 times are not reset as the number of times of time saving. On the other hand, when the small hit C is won with a probability of 99/200, it is not used as a special electric sapo symbol. In this way, if the small hit and the special electric sapo symbol are used together, it is possible to provide a new game property such as whether or not the time reduction is given after the small hit. It can improve the interest of the person.

Thus, even if the small hit A of the special electric support symbol is won during the time saving game, since the time saving is not added again, as shown in FIG. When the small hit A of the electric sapo symbol is won, the normal fluctuation of 3 seconds, which is the same fluctuation pattern as the normal fluctuation loss, is selected.

On the other hand, as shown in FIG. 30(a), in the special symbol lottery, when the special electric sapo symbol small hit B is won, the normal reach loss + time reduction rush effect (25 seconds) is selected with the probability shown. , With the probability shown, the SP reach out + time saving rush effect (55 seconds) is selected. Thus, when winning the small hit B of the special electric support symbol during the time saving game, as shown in FIG. It will be done. It should be noted that the time-saving rush effect is switched according to each game state so that the sub-control CPU 800a performs a time-saving number of times reset effect.

On the other hand, as shown in FIG. 30(a), when a small win C is won in the special symbol lottery, the normal variation (3 seconds) is selected.

On the other hand, as shown in FIG. 30 (a), if you win the special symbol lottery and win the probability variation, the normal reach (30 seconds) is selected with the probability shown, and the SP reach is selected with the probability shown. (60 seconds) will be selected, with the probability shown, per full rotation variation (100 seconds) will be selected, and with the probability shown, per burst (10 seconds) will be selected.

On the other hand, as shown in FIG. 30 (a), if you win the special symbol lottery and win the non-variable per, with the probability shown, per normal reach (30 seconds) is selected, with the probability shown, SP Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL2 referred to in the variations of the special symbols on the 80th to 99th rotations in the first time-saving gaming state is as shown in FIG. 30(b). Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 12 seconds is selected. Then, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "0", the normal fluctuation 5 seconds is selected with the probability shown, and the normal reach is lost with the probability shown. (20 seconds) is selected, and SP reach out (50 seconds) is selected with the probability shown. In addition, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "1" to "3", the normal fluctuation of 3 seconds is selected with the probability shown, and the probability shown is shown. , the loss of normal reach (20 seconds) is selected, and the loss of SP reach (50 seconds) is selected with the probability shown.

Thus, as shown in FIG. 30(b), in the variation of the special symbols on the 80th to 99th rotations nearing the end of the first time-saving game state, the selection ratio of reach (normal reach, SP reach) is increased. ing. As a result, it is possible to give the player a sense of anticipation that he might win.

On the other hand, as shown in FIG. 30(b), in the special symbol lottery, when the small hit A of the special electric support symbol is won, the normal variation of 3 seconds is selected. In addition, as shown in FIG. 30(b), in the special symbol lottery, when the special electric sapo symbol small hit B is won, the normal reach loss + time reduction rush effect (25 seconds) is selected with the probability shown. , With the probability shown, the SP reach out + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 30(b), when a small win C is won in the special symbol lottery, the normal variation (3 seconds) is selected.

On the other hand, as shown in FIG. 30(b), if you win the special symbol lottery and win the probability variation, the normal reach per (30 seconds) is selected with the probability shown, and the SP reach per (60 seconds) will be selected, with the probability shown, per full rotation variation (100 seconds) will be selected, and with the probability shown, per burst (10 seconds) will be selected.

On the other hand, as shown in FIG. 30(b), if you win the special symbol lottery and win the non-probable variation, the normal reach (30 seconds) is selected with the probability shown, SP Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL3 referred to in the variation of the 100th special symbol in the first time-saving gaming state is as shown in FIG. 31(a). Specifically, if you do not win the special symbol lottery and lose, and the number of the first start retention ball or the second start retention ball is "0" to "3", the result effect of losing (30 seconds) will be selected.

On the other hand, in the special symbol lottery, when the special electric sapo symbol small hit A is won, the losing result performance (30 seconds) is selected. Thus, even if a small hit of the special electric support symbol is won during the time saving game, as shown in FIG. 33, the time saving is not added again. When the small winning A is won, the result performance of the loss, which is the same variation pattern as the normal variation, is selected.

In addition, as shown in FIG. 31(a), in the special symbol lottery, when the special electric sapo symbol small hit B is won, the reset effect (80 seconds) is selected from the result effect. becomes. Thus, when winning a small hit B of the special electric support symbol during the time saving game, as shown in FIG. A pattern will be selected.

On the other hand, as shown in FIG. 31(a), if a small win C is won in a special symbol lottery, a losing result effect (30 seconds) is selected.

On the other hand, as shown in FIG. 31 (a), if you win the special symbol lottery and win the probability variable hit, or if you win the non-variability hit, a series of variation patterns (100 seconds) will be selected.

Next, the variation pattern table JT2_TBL1 referred to in the variation of the special symbols for the first rotation in the second time-saving gaming state is as shown in FIG. 31(b). Specifically, as shown in FIG. 31(b), if the lottery for the special symbol is not won, and the number of the first start retention ball or the second start retention ball is "0" to "3". In this case, the rush effect (12 seconds) is selected.

On the other hand, as shown in FIG. 31(b), in the special symbol lottery, when the small winning A and the small winning C of the special electric sapo symbol are won, the rush effect (12 seconds) is selected. Become. Then, when a small hit B of the special electric sapo symbol is won, a series of variation patterns (80 seconds) are selected for resetting performance from rush performance.

On the other hand, as shown in FIG. 31 (b), if you win the special symbol lottery and win the probability variable hit, or if you win the non-variability hit, a series of variation patterns (100 seconds) will be selected.

Next, the variation pattern table JT2_TBL2 referred to in the variations of the special symbols on the 2nd to 100th rotations in the second time-saving gaming state is as shown in FIG. 31(c). Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 5 seconds is selected. Then, if the lottery for the special symbol 2 is not won and the number of the second start holding balls is "0" to "3", the normal fluctuation of 1.5 seconds is selected with the probability shown. Normal reach loss (20 seconds) is selected with a probability of , and SP reach loss (50 seconds) is selected with the probability shown.

On the other hand, as shown in FIG. 31(c), in the special symbol lottery, if the special electric sapo symbol small hit A or small hit C is won, the normal variation of 1.5 seconds is selected. Become.

On the other hand, as shown in FIG. 31(c), in the special pattern lottery, if the special electric sapo pattern small hit B is won, the normal reach loss + time reduction rush effect (25 seconds) is selected with the probability shown. Then, with the probability shown, SP reach out + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 31 (c), if you win the special symbol lottery and win the probability variation, or if you win the non-variability per, the normal reach (30 seconds) is selected with the probability shown. , and with the probability shown, a sudden hit (10 seconds) will be selected.

Next, the variation pattern table JT2_TBL3 referred to in the variations of the special symbols of the 101st to the final rotation in the second time-saving gaming state is as shown in FIG. Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 5 seconds is selected. Then, if the lottery for the special symbol 2 is not won and the number of the second start holding balls is "0" to "3", the normal fluctuation of 1.5 seconds is selected with the probability shown. With a probability of , normal reach deviation (20 seconds) is selected.

On the other hand, as shown in FIG. 32, in the special symbol lottery, when the small winning A or the small winning C of the special electric support symbol is won, the normal variation of 1.5 seconds is selected.

On the other hand, as shown in FIG. 32, in the special symbol lottery, when the special electric sapo symbol small hit B is won, the normal reach loss + time reduction rush effect (25 seconds) is selected with the probability shown. With a probability of , SP reach out + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 32, if you win the lottery of special symbols, if you win the probability variation, or if you win the non-variability per, with the probability shown, per normal reach (30 seconds) is selected, shown With a probability of , the sudden hit (10 seconds) will be selected.

Thus, using such a variation pattern table, it is determined whether or not the result effect is performed. Thus, in the first time-saving game state, when the first time-saving game state ends, the variation pattern table JT1_TBL3 shown in FIG. 31 (a) is selected, and before the end, shown in FIG. 30 (b) The variation pattern table JT1_TBL2 is selected, and thus a different variation pattern table is selected. On the other hand, in the second time-saving gaming state, when the second time-saving gaming state ends at the 100th rotation, or ends at 1000 rotations, and even before it ends, the variation pattern table JT2_TBL2 shown in FIG. 31 (c) is selected, or the variation pattern table JT2_TBL3 shown in FIG. 32 is selected, thereby selecting the same variation pattern table. As a result, it is possible to select whether or not the result effect is to be performed, thereby providing appropriate information to the player.

By the way, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) the special symbol loss variation is executed, and the second time-saving gaming state (state with low-accuracy power support) is triggered by a predetermined The number of times may be any number, but it is preferable to set the number of times equal to or less than the number obtained by multiplying the denominator of the jackpot probability by three. In this way, if the number of times less than or equal to the tripled denominator of the probability of a big win is made, there are many cases where the big win occurs before the number of times equal to or less than the tripled number, and even if the big win does not occur before this number of times, the game is played. It is possible to prevent the player from forcibly continuing the game aiming at the second time-saving game state (state with low power supply support) shown in FIG. 28(b).

Also, when shifting to the second time-saving gaming state (state with low-accuracy power support) shown in FIG. It is preferable to set the number of times to be less than or equal to the number. In this way, if the number of times equal to or less than the number obtained by multiplying the denominator of the probability of a big win by four, there is a possibility that the number of times equal to or less than the quadrupled number will inevitably result in a big win once, so the game is continued. A privilege can be given to a player.

By the way, when the number of times of time saving is given in this way (the number of times of time saving exceeding the denominator of the jackpot probability), the current number of times of time saving is not displayed on the liquid crystal display device 41 until the predetermined number of times is reached, or A fixed number of times such as 100 times is displayed on the liquid crystal display device 41 . More specifically, every time the number of times of working hours changes, the main control board 60 (main control CPU 600a) transmits a number of times of working hours command indicating the number of times of working hours saving. Then, the sub-control CPU 800a receives the time saving command. At this time, even if the sub-control CPU 800a receives a time saving count command indicating the number of time saving times, the sub-control CPU 800a controls not to display the current number of time saving times on the liquid crystal display device 41 until the number of time saving times is equal to or less than the predetermined number of time saving times. Control is performed so that a fixed number of times such as times is displayed on the liquid crystal display device 41 . Then, when the predetermined number of times of time saving has been reached, the sub-control CPU 800a controls the liquid crystal display device 41 to display the number of times of working hours information based on the received number of times of working hours command indicating the number of times of working hours saving. Thus, by doing so, it is possible to improve the interest of the player. That is, in the case of a large number of times of time saving (the number of times of saving time exceeding the denominator of the jackpot probability), if the time saving state continues until the next jackpot is won, the number of times of saving time is displayed and counted down. Therefore, the player's interest is lowered. On the other hand, when the remaining number of times reaches a predetermined number such as 100 times, it is better to notify the player that the time-saving game may end. It is possible to prevent a situation in which a time-saving game ends without the player's knowledge. Thus, according to this embodiment, the interest of the player can be improved.

By the way, in the present embodiment, an example in which the relief game and the game with the special electric support symbol are described separately has been shown, but the game is not limited to this, and a game having both games may be performed.

<Description of serial communication>
Next, serial communication will be specifically described with reference to FIGS. 34 to 43. FIG.

<Main control board: Description of one-chip microcomputer>
The one-chip microcomputer 600 shown in FIG. 6 has a configuration as shown in FIG. 34 when explained in detail. That is, as described above, the one-chip microcomputer 600 includes a main control CPU 600a, a main control ROM 600b storing a game program describing a series of game control procedures, and a main control ROM 600b that functions as a work area, a buffer memory, and the like. A control RAM 600c is mainly incorporated, and a clock generation circuit 640 is also incorporated. This clock generation circuit 640 divides an external clock (not shown) to generate a clock used inside the one-chip microcomputer 600 .

In addition, as shown in FIG. 34, the one-chip microcomputer 600 incorporates a reset controller 641. This reset controller 641 generates a system reset signal generated by the system reset generator 1320 (see FIG. 6). RST and a reset signal such as an abnormal reset signal generated by a WDT (watchdog timer) 643, which will be described later, are controlled.

Furthermore, as shown in FIG. 34, the one-chip microcomputer 600 incorporates an interrupt controller 642. This interrupt controller 642 outputs a timer interrupt signal generated by a CTC (Counter Timer Circuit) 644, which will be described later. control.

Further, the one-chip microcomputer 600 has a built-in WDT (watchdog timer) 643, as shown in FIG. It is something to do. This abnormal reset signal is input to the reset controller 641 to reset the inside of the one-chip microcomputer 600 . Therefore, an asynchronous serial communication circuit (CH0) 646, an asynchronous serial communication circuit (CH1) 647, and a synchronous serial communication circuit 648, which will be described later, are also reset.

On the other hand, the one-chip microcomputer 600 incorporates a CTC (Counter Timer Circuit) 644 as shown in FIG. It is generated. This timer interrupt signal is output to the interrupt controller 642 described above.

In addition, as shown in FIG. 34, the one-chip microcomputer 600 has a built-in random number circuit 645, which generates a hardware random number used for special symbol random number lottery.

Furthermore, the one-chip microcomputer 600 incorporates an asynchronous serial communication circuit (CH0) 646 and an asynchronous serial communication circuit (CH1) 647 to enable serial communication. The asynchronous serial communication circuit (CH0) 646 indicates that it is a channel 0 asynchronous serial communication circuit, and the asynchronous serial communication circuit (CH1) 647 indicates that it is a channel 1 asynchronous serial communication circuit. Therefore, the internal structure is the same. The following description is based on the assumption that the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 have the same internal structure.

The asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 respectively incorporate the reception prescaler registers RXPRE shown in FIG. However, since they have the same internal structure, they are shown as one receive prescaler register RXPRE in this embodiment). As shown in FIG. 35(a), this receive prescaler register RXPRE consists of 16 bits, and the least significant bit (0th bit) to 12th bit is composed of a receive baud rate setting register RPR which can set a receive baud rate. The 13th bit is unused, the 14th bit consists of a parity setting register RPEN that can set the presence or absence of parity, and the most significant bit (15th bit) sets odd parity or even parity. It consists of a parity odd/even setting register REVEN.

This reception baud rate setting register RPR has an initial value of 0000h, is a register that can read and write values, and can set a reception baud rate from 0000h to 1FFFh. The reception baud rate (bps) is calculated by internal clock (clock generated by clock generation circuit 640 shown in FIG. 34) frequency/(reception baud rate setting register RPR×32). Specifically, for example, if the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 34) frequency is 20 MHz and 01F4h (=500) is set in the reception baud rate setting register RPR, then the reception baud rate ( bps) is calculated by 20 (MHz)/(500×32), resulting in 1,250 (bps). Note that when 0000h is set in the reception baud rate setting register RPR, calculation is performed assuming that 0001h is set in the reception baud rate setting register RPR.

On the other hand, the parity presence/absence setting register RPEN has an initial value of 0, and the value can be read and written. When 0 is set, no parity is set, and when 1 is set, parity is set. The parity odd/even setting register REVEN has an initial value of 0 and can read and write values. When 0 is set, even parity is set, and when 1 is set, odd parity is set.

On the other hand, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 further incorporate a reception buffer register RXBUF shown in FIG. 35(b). This reception buffer register RXBUF has an initial value of 00h, can only read the value, and can store data from 00h to FFh.

Thus, in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647, data is set in the reception baud rate setting register RPR so as to be the same as the transmission speed of the transmitted data, and the parity is set. When 0 is set in the presence/absence setting register RPEN, the data shown in FIG. 37(a) can be received. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 set the "L" level start bit length, the 8-bit data length, and the "H" level stop bit length to one frame ( (See timing T10 section). Then, this 8-bit length data is stored in the reception buffer register RXBUF.

On the other hand, in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647, data is set in the reception baud rate setting register RPR so as to be the same as the transmission speed of the transmitted data, and parity is set. When 1 is set in the presence/absence setting register RPEN, the data shown in FIG. 37(b) can be received. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 each have a start bit length of "L" level, data of 8-bit length, parity bit, and stop bit length of "H" level. Data having a communication format of one frame (see timing T11) can be received. Then, this 8-bit length data is stored in the reception buffer register RXBUF. If the parity bit on the transmission side is set to even parity, 0 is set in the parity odd/even setting register REVEN, and if the parity bit is set to odd parity, 1 is set to the parity odd/even setting register REVEN. It will happen.

By the way, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 further incorporate a transmission prescaler register TXPRE shown in FIG. , as shown in FIG. 36(a), consists of 16 bits, the least significant bit (0th bit) to the 12th bit is composed of a transmission baud rate setting register TPR in which a transmission baud rate can be set, and the 13th bit is , is unused. The 14th bit is composed of a parity presence/absence setting register TPEN which can set the presence or absence of parity, and the most significant bit (15th bit) is a parity odd/even setting register TEVEN which can set odd parity or even parity. consists of

This transmission baud rate setting register TPR has an initial value of 0000h, can read and write values, and can set a transmission baud rate from 0000h to 1FFFh. The transmission baud rate (bps) is calculated by the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 34) frequency/(transmission baud rate setting register TPR×32), and is calculated in the same manner as the reception baud rate (bps). be.

On the other hand, the parity presence/absence setting register TPEN has an initial value of 0, and the value can be read and written. When 0 is set, no parity is set, and when 1 is set, parity is set. The parity odd/even setting register TEVEN has an initial value of 0 and can read and write values. When 0 is set, even parity is set, and when 1 is set, odd parity is set.

Furthermore, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 incorporate a transmission buffer register TXBUF shown in FIG. The value is 00h, and only the value can be written, and data from 00h to FFh can be stored.

Thus, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 are configured as shown in FIG. The data shown in (a) can be transmitted. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 set the "L" level start bit length, the 8-bit data length, and the "H" level stop bit length to one frame ( (See timing T10 section). This 8-bit length data is data stored in the transmission buffer register TXBUF.

On the other hand, when 1 is set in the parity presence/absence setting register TPEN, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 can transmit the data shown in FIG. 37(b). . That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 each have a start bit length of "L" level, data of 8-bit length, parity bit, and stop bit length of "H" level. It is possible to transmit data in a communication format of one frame (see timing T11). This 8-bit data is the data stored in the transmission buffer register TXBUF. The parity bit is even parity if 0 is set in the parity odd/even setting register REVEN, and 1 is set in the parity odd/even setting register REVEN. is set, it is odd parity.

By the way, as shown in FIG. 34, the one-chip microcomputer 600 incorporates a synchronous serial communication circuit 648 to enable serial communication. The synchronous serial communication circuit 648 incorporates a communication setting register SPIFM shown in FIG. 38(a). This communication setting register SPIFM consists of 8 bits, as shown in FIG. It is composed of a frequency ratio setting register CLK, and the most significant bit (seventh bit) to the fourth bit is composed of a data length setting register LENG in which the data length can be set.

The initial value of this synchronous clock division ratio setting register CLK is 00h, and the value can be read and written. /2 and 02h is set, then the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 34) is divided by 4 and . . . 09h is set. Then, the internal clock (the clock generated by the clock generation circuit 640 shown in FIG. 34) is divided by 1/512, and when 0Ah is set, the internal clock (generated by the clock generation circuit 640 shown in FIG. 34) clock) is divided by 1/1024.

That is, the frequency-divided clock frequency-divided according to the value set in the synchronous clock division ratio setting register CLK is synchronized from the synchronous clock 649 incorporated in the one-chip microcomputer 600, as shown in FIG. It is input to the serial communication circuit 648 and output from the synchronous serial communication circuit 648 together with the transmission data. If a value other than 01h to 0Ah is set in the synchronous clock dividing ratio setting register CLK, the synchronous clock 649 will not output the clock.

On the other hand, the data length setting register LENG can set the format of the communication data. . . , 08h, the data length is set to 8 bits.

On the other hand, the synchronous serial communication circuit 648 further incorporates a transmission data register TRBUF shown in FIG. 38(b). This transmission data register TRBUF has an initial value of 00h, can only be written to, and can store data from 00h to FFh. The data stored in the transmission data register TRBUF is transferred to a transmission shift register (not shown) and output in synchronization with the frequency-divided clock output from the synchronization clock 649 .

On the other hand, the synchronous serial communication circuit 648 further incorporates a reception data register REBUF shown in FIG. 38(c). This reception data register REBUF has an initial value of 00h, can only read the value, and can store data from 00h to FFh. When synchronous serial data is received, the received data is stored in the reception data register REBUF. Data is stored in this reception data register REBUF in synchronization with the frequency-divided clock transmitted from the transmission side.

On the other hand, the synchronous serial communication circuit 648 further incorporates a transmission/reception status register SPIST shown in FIG. 38(d). As shown in FIG. 38(d), this transmission/reception status register SPIST is read-only and consists of 8 bits. SPTMT, the 1st bit is composed of a transmission shift register flag register TRSHF indicating whether or not the data to be transmitted has been transferred to a transmission shift register (not shown), and the 2nd bit is shown in FIG. 38(c) indicates whether or not data is stored in the transmission data register TRBUF shown in FIG. 38(c). The 4th bit to the most significant bit (7th bit) are not used.

This transmitting flag register SPTMT is set to "1" when data is being transmitted, and is set to "0" when data is not being transmitted.

On the other hand, the transmission shift register flag register TRSHF is set to "0" when the data to be transmitted has not been transferred to the transmission shift register (not shown), and indicates that the data to be transmitted has been transferred to the transmission shift register (not shown). In this case, "1" is set.

On the other hand, the transmission register flag register TRREF is set to "0" when no data is stored in the transmission data register TRBUF shown in FIG. 38(b), and the transmission data register shown in FIG. If data is stored in TRBUF, "1" is set.

On the other hand, the reception register flag register REREF is set to "0" when no data is stored in the reception data register REBUF shown in FIG. If data is stored in REBUF, "1" is set.

Thus, the one-chip microcomputer 600 configured as described above uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. , the asynchronous serial communication circuit (CH1) 647 is used to transmit predetermined data to the sub-control board 80 by serial transmission. Although the synchronous serial communication circuit 648 is not used in this embodiment, it may be used to serially transmit predetermined data to the payout/launch control board 70 or the sub control board 80 .

<Payment/launch control board: Description of payout control one-chip microcomputer>
Here, the payout/launch control board 70 will be described in detail with reference to FIG. Since the sub-control board 80 is equipped with a serial communication circuit similar to that of the payout/launch control board 70, description thereof will be omitted. Also, the same components as those of the one-chip microcomputer 600 shown in FIG.

As shown in FIG. 39, the payout/launch control board 70 includes a payout control CPU 700a, a payout control ROM 700b storing a payout program describing a series of payout control procedures, and a payout control ROM 700b that functions as a work area, buffer memory, and the like. A payout control one-chip microcomputer 700 mainly composed of a RAM 700c is mounted. This payout control one-chip microcomputer 700 further includes an external bus interface 701, which controls the direction of an address bus, data bus, and control signals.

In addition, as shown in FIG. 39, the payout control one-chip microcomputer 700 has a built-in clock circuit 702. This clock circuit 702 divides an external clock (not shown) to It generates the clocks used inside the computer 700 . The synchronous clock 649 shown in FIG. 39 divides the clock used inside the payout control one-chip microcomputer 700 .

Furthermore, as shown in FIG. 39, the payout control one-chip microcomputer 700 incorporates a reset controller 703, which incorporates a WDT (watchdog timer) 703a. The WDT 703a detects a program abnormality due to noise or the like and generates an abnormality reset signal. The reset controller 703 controls reset signals such as the system reset signal RST generated by the system reset generator 1320 (see FIG. 6) and the abnormal reset signal generated by the WDT (watchdog timer) 703a. is.

On the other hand, the payout control one-chip microcomputer 700 includes a CTC (Counter Timer Circuit) 704 as shown in FIG. It generates a signal. This timer interrupt signal is output to the interrupt controller 705, which will be described later.

In addition, the payout control one-chip microcomputer 700, as shown in FIG. 39, has a built-in interrupt controller 705, the timer interrupt signal generated by the CTC704, as well as the asynchronous serial communication circuit 706 to be described later It controls interrupt signals.

On the other hand, as shown in FIG. 39, the payout control one-chip microcomputer 700 incorporates an asynchronous serial communication circuit 706 to enable serial communication. This asynchronous serial communication circuit 706 incorporates a serial communication baud rate setting register SCBR shown in FIG. This register can be set up to FFFh. The baud rate (bps) is calculated by internal clock (clock generated by clock circuit 702 shown in FIG. 39) frequency/(serial communication baud rate setting register SCBR×16). Specifically, for example, if the internal clock (clock generated by the clock circuit 702 shown in FIG. 39) has a frequency of 15 MHz and 0BCh (=188) is set in the serial communication baud rate setting register SCBR, the baud rate (bps ) is 15 (MHz)/(188×16)=4986.7 (bps). Although the baud rate setting explained in the one-chip microcomputer 600 has shown an example in which the reception baud rate and the transmission baud rate can be set separately, this baud rate is common to both transmission and reception. Further, when 000h is set in the serial communication baud rate setting register SCBR, calculation is performed assuming that 001h is set in the serial communication baud rate setting register SCBR.

Furthermore, the asynchronous serial communication circuit 706 incorporates a serial communication setting register SCFM shown in FIG. 40(b). As shown in FIG. 40(b), this serial communication setting register SCFM consists of 8 bits. The second bit is composed of a parity function setting register PEN that can set whether or not to use the parity function, the second bit is composed of a data length setting register FMT that can set the data length, and the third bit is the operation. It consists of an operation mode setting register MOD that can set the mode, the 4th and 5th bits are unused, and the 6th bit consists of a reception function setting register REN that can set whether or not to use the reception function. The bit (7th bit) consists of a transmission function setting register TEN which can set whether or not to use the transmission function.

As shown in FIG. 40(b), the parity type setting register PTP has an initial value of 0 and can read and write values. When 0 is set, even parity is set, and when 1 is set, odd parity is set to The parity function setting register PEN has an initial value of 1 and can read and write values. When 0 is set, parity is not used, and when 1 is set, parity is used.

On the other hand, as shown in FIG. 40(b), the data length setting register FMT has an initial value of 1 and can read and write values. data, and a communication format in which the "H" level stop bit length is one frame (see FIGS. 37(a) and (b)). When 1 is set, the "L" level start bit length is eight bits The communication format is one frame (refer to the timing T12 section in FIG. 37(c)) of the length data and the stop bit length of the "H" level for two pulses. When 0 is set in the parity function setting register PEN, parity is set to unused, so as shown in FIGS. When 1 is set in the setting register PEN, parity use is set, so parity is added to the communication format as shown in FIG. 37(b). At this time, 0 is set in the parity type setting register PTP for even parity, and when 1 is set for odd parity.

The operation mode setting register MOD, as shown in FIG. 40(b), has an initial value of 0 and can read and write values. becomes. That is, it is possible to set whether or not to use the reception register 706a and the transmission register 706b built in the asynchronous serial communication circuit 706 shown in FIG. 39 as FIFO. Therefore, when 0 is set in the operation mode setting register MOD, the receiving register 706a and the transmitting register 706b are not used as FIFOs, and when 1 is set, the receiving register 706a and the transmitting register 706b are used as FIFOs. will be used as

On the other hand, as shown in FIG. 40(b), the reception function setting register REN has an initial value of 0, which is readable and writable. Then, set the reception function to be available. Note that the use of the reception function is disabled at the moment 0 is set in the reception function setting register REN.

As shown in FIG. 40(b), the transmission function setting register TEN has an initial value of 0, which is readable and writable. Then set the transmission function to be available. When 0 is set in the transmission function setting register TEN, if there is data in the middle of transmission, the transmission is prohibited after the transmission is completed.

On the other hand, the asynchronous serial communication circuit 706 incorporates a serial communication setting status register SCST shown in FIG. 41(a). As shown in FIG. 41(a), this serial communication setting status register SCST is read-only and consists of 8 bits. The first bit consists of a framing error flag register FE indicating whether or not a framing error has been detected, and the second bit consists of a break code detection flag register BRK indicating whether or not a break code has been detected. The fourth bit is composed of an overrun detection flag register ORE indicating whether or not an overrun is detected, the fourth bit is composed of a noise detection flag register NF which indicates whether or not noise is detected, and the fifth bit is the receiving register 706a. (see FIG. 39) is composed of a reception data flag register RDRF indicating whether or not data is stored in the register 706b (see FIG. 39). The 6th bit serially transmits data stored in the transmission register 706b (see FIG. 39) The transmission data empty flag register TDBE indicates whether or not the data has been transferred to the transmission shift register 706d (see FIG. 39) used during transmission. It consists of a transmission completion flag register TC indicating whether or not the transmission is in progress.

As shown in FIG. 41(a), when data is received by the asynchronous serial communication circuit 706, the parity error flag register PE stores the parity data (see FIG. 37(b)) added to the data as If the parity is even, the asynchronous serial communication circuit 706 counts "1" of the 8-bit length data. If the parity bit is 0, it is not a parity error. 0” will be set. If the parity is odd, the asynchronous serial communication circuit 706 counts "1" of the 8-bit length data. If the parity bit is 1, the parity error flag register PE is set to "0". On the other hand, even parity is set, and when the asynchronous serial communication circuit 706 counts "1" in the 8-bit length data, if the parity bit is 1, a parity error occurs. "1" will be set. If the parity bit is 0 when the parity bit is 0 when the asynchronous serial communication circuit 706 counts "1" of the 8-bit length data, the parity error flag register PE is set to odd parity. "1" will be set. When "1" is set in the parity error flag register PE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 39) assuming that an error has occurred.

On the other hand, as shown in FIG. 41(a), when data is received by the asynchronous serial communication circuit 706, the framing error flag register FE indicates that a framing error has occurred if the stop bit of the data is "L". If "1" is set in the asynchronous serial communication circuit 706 and the stop bit is "H", "0" will be set assuming that no framing error has occurred. When "1" is set in the framing error flag register FE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 39) assuming that an error has occurred.

41(a), when data is received by the asynchronous serial communication circuit 706, the break code detection flag register BRK detects one frame of data (timing T10 section of FIG. 37(a), ( b) Timing T11 interval, (c) Timing T12 interval) If it is "0" above, the asynchronous serial communication circuit 706 detects a break code and sets "1". , "0" is set as break code undetected. When "1" is set in the break code detection flag register BRK, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 39) assuming that an error has occurred.

On the other hand, as shown in FIG. 41(a), when the asynchronous serial communication circuit 706 receives data, the overrun detection flag register ORE indicates that an overrun has occurred if the previously received data processing has not been completed. , "1" is set in the asynchronous serial communication circuit 706, otherwise "0" is set. When "1" is set in the overrun detection flag register ORE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 39) assuming that an error has occurred.

As shown in FIG. 41(a), the noise detection flag register NF is set to "1" by the asynchronous serial communication circuit 706 when noise is detected when data is received by the asynchronous serial communication circuit 706. is set to "0" if no noise is detected.

On the other hand, as shown in FIG. 41(a), the reception data flag register RDRF is a reception shift register 706c ( 39) to the receiving register 706a, "1" is set, otherwise "0" is set. When "1" is set in the reception data flag register RDRF, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 39).

Also, as shown in FIG. 41(a), the transmission data empty flag register TDBE is set to the asynchronous serial communication circuit 706 used when serially transmitting the data stored in the transmission register 706b (see FIG. 39). When the data is transferred to the built-in transmission shift register 706d (see FIG. 39), "1" is set, otherwise "0" is set. When "1" is set in the transmission data empty flag register TDBE, the asynchronous serial communication circuit 706 transmits an interrupt request signal to the interrupt controller 705 (see FIG. 39).

On the other hand, as shown in FIG. 41(a), the transmission completion flag register TC is set to "0" when data is being transmitted from the asynchronous serial communication circuit 706, and is set to "1" when data transmission is completed. be done.

On the other hand, the asynchronous serial communication circuit 706 further incorporates a serial communication data register SCDT shown in FIG. 41(b). This serial communication data register SCDT has an initial value of 00h, is readable and writable, and can store data from 00h to FFh. This serial communication data register SCDT functions as receive data when read, and functions as transmit data when written.

Thus, the one-chip microcomputer 600 controls the asynchronous serial communication circuit (CH0) 646 shown in FIG. 34, the asynchronous serial communication circuit (CH1) 647 is used to serially transmit predetermined data.

<Description of serial communication settings>
By the way, the one-chip microcomputer 600 performs the following settings when serially transmitting predetermined data to the payout/launch control board 70 .

That is, the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 incorporated in the one-chip microcomputer 600 are reset when the inside of the one-chip microcomputer 600 is reset. It is reset regardless of whether backup processing is performed or not. Therefore, the payout control command PAY_CMD is being serially transmitted to the payout/launch control board 70 using the asynchronous serial communication circuit (CH0) 646, or the payout control command PAY_CMD is being sent to the transmission buffer register TXBUF shown in FIG. If the power is cut off (power off) in the stored state, the asynchronous serial communication circuit (CH0) 646 is not backed up, so the payout control command PAY_CMD stored (set) before the power off is It will not be transmitted to the payout/launch control board 70 . Therefore, there is a problem that the payout/launch control board 70 cannot receive the payout control command PAY_CMD, and thus the payout/launch control board 70 cannot normally receive the payout number data.

Therefore, in this embodiment, when serial communication is performed using the asynchronous serial communication circuit (CH0) 646, the transmission time at the time of serial communication<the control of the game operation after the voltage abnormality signal ALARM becomes "L". The following processing is performed so that the time until the voltage becomes unexecutable.

That is, as shown in FIG. 42, when the AC 24V power supply, which is an external power source supplied from a transformation transformer (not shown) installed in the amusement arcade, is cut off (see timing T20), the voltage monitoring shown in FIG. The unit 1310 outputs the voltage abnormality signal ALARM of “L” level 20 to 30 ms (see timing T21) after the power is cut off (see timing T20). Then, 20 ms or more after the timing T21 (see timing T22), DC5V, which is the DC voltage generated by the voltage generator 1300 shown in FIG. becomes. As a result, the one-chip microcomputer 600 is not supplied with a voltage capable of executing the control of the game operation, so that the control of the game operation cannot be executed.

Therefore, in the present embodiment, the time from when the voltage abnormality signal ALARM becomes "L" to when it becomes a voltage at which game operation control cannot be executed (refer to timing T21 to timing T22 shown in FIG. 42), serial communication The baud rate is set in the transmission baud rate setting register TPR shown in FIG.

That is, the frequency of the internal clock (the clock generated by the clock generation circuit 640 shown in FIG. 34) is 20 MHz, and the transmission baud rate setting register TPR shown in FIG. Baud rate is set low. At this time, the transmission baud rate (bps) is calculated by 20 (MHz)/(500×32) and becomes 1,250 (bps). Since this 1,250 (bps) means that 1250 bits can be transmitted in one second, 5 bits can be transmitted in 4 ms. Then, the payout control command PAY_CMD serially transmitted from the one-chip microcomputer 600 to the payout/launch control board 70 using the asynchronous serial communication circuit (CH0) 646 is 8 bits. One bit is added as a start bit and one bit is added as a parity bit, so that a total of 10 bits are transmitted. Therefore, if 5 bits can be transmitted in 4 ms, the transmission will be completed in two timer interrupt processes (8 ms) in the timer interrupt process started every 4 ms in the main control described later. Thus, the transmission time during serial communication is shorter than the time from when the voltage abnormality signal ALARM becomes "L" to when the voltage becomes such that the control of the game operation cannot be executed (see timing T21 to timing T22 shown in FIG. 42). can be short.

Thus, even if the baud rate setting is set low in order to improve the noise resistance, the time from when the voltage abnormality signal ALARM becomes "L" to when it reaches the voltage at which the control of the game operation cannot be executed (Fig. 42 (see timing T21 to timing T22 shown in ), the serial communication is completed. That is, since the payout/launch control board 70 executes a backup process in the same manner as the program in the main control described later, the payout operation will be performed normally if the serial communication is completed. Thus, even if a power failure occurs in a situation where prize ball information to be dispensed remains on the main control side, the dispensation operation will be performed normally.

On the other hand, when the baud rate setting is set high in order to increase the amount of data to be transmitted, for example, the internal clock (the clock generated by the clock generation circuit 640 shown in FIG. 34) has a frequency of 20 MHz, and FIG. Assuming that the shown transmission baud rate setting register TPR is set to 32h (=50), the transmission baud rate (bps) is calculated by 20 (MHz)/(50×32) and becomes 12,500 (bps). Since this 12,500 (bps) means that 12,500 bits can be transmitted in one second, 12.5 bits can be transmitted in 1 ms. Then, the payout control command PAY_CMD serially transmitted from the one-chip microcomputer 600 to the payout/launch control board 70 using the asynchronous serial communication circuit (CH0) 646 is 8 bits. One bit is added as a start bit and one bit is added as a parity bit, so that a total of 10 bits are transmitted. Therefore, if 12.5 bits can be transmitted in 1 ms, the transmission is completed in a shorter time than either of the timer interrupt processing started every 4 ms in the main control and the timer interrupt processing started every 1 ms in the payout control. It will be done.

Thus, even if the port rate setting is set high in order to increase the amount of data to be transmitted, the voltage becomes such that the control of the game operation cannot be executed after the voltage abnormality signal ALARM becomes "L". (See timing T21 to timing T22 shown in FIG. 42), serial communication is completed. Even if it occurs, the payout operation will be performed normally.

In this embodiment, the setting for the asynchronous serial communication circuit (CH0) 646 has been described, but the same setting is also applied to the asynchronous serial communication circuit (CH1) 647 for serially transmitting predetermined data to the sub-control board 80. It is possible to

By the way, when the WDT 643 shown in FIG. 34 generates an abnormal reset signal, the inside of the one-chip microcomputer 600 is reset. 647, the synchronous serial communication circuit 648 is also reset. That is, the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 are reset regardless of whether or not there is transmission data. As a result, it is possible to reduce a situation in which abnormal data is transmitted. That is, when an abnormal reset occurs, the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 may store abnormal data. Therefore, if the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 are reset regardless of whether or not there is transmission data, abnormal data will be transmitted. It is possible to reduce the situation where it is lost.

On the other hand, in this embodiment, when the player's hand touches the touch sensor of the shooting handle 16, the touch sensor outputs a detection signal to the payout/shooting control board 70 as shown in FIG. In response to this, the payout/launch control board 70 will transmit the detection signal to the main control board 60 (main control CPU 600a). And the main control board 60 (main control CPU 600a) will transmit the detection signal to the sub control board 80 as the effect control command DI_CMD. This makes it possible to transmit information as to whether or not the player touched the handle 16 to play the game to the sub-control board 80 . In this way, as shown in FIG. 43(a), even if the movable accessory device 43 is moving to the front of the liquid crystal display device 41 during the customer waiting demonstration, Also, when the sub-control board 80 receives information as to whether or not the player has touched the handle 16 to play a game, the sub-control board 80 sends the game ball to the special symbol 1 starting port 44 (see FIG. 5). Alternatively, as shown in FIG. 43(b), the movable accessory device 43 is controlled to return to the origin position (original position), and the liquid crystal display device 41 stops the customer waiting demonstration and displays special symbols. It is possible to perform control so that the normal screen display (see image P60A shown in FIG. 43(b)) is displayed. It should be noted that it is not possible to transmit the detection signal by the touch sensor of the shooting handle 16 directly to the sub-control board 80 due to game rules.

<Main control: description of the program>
Here, the program used during game processing such as lottery processing stored in the normal program area 600ba of the main control ROM 600b shown in FIG. The outline of the program used for measuring the total number of game balls shot into the game area 40 including the number of winning balls and the number of non-winning balls will be described with reference to FIGS. 44 to 61. FIG.

<Main control: Description of main processing>
First, when the pachinko game machine 1 is powered on, a power-on signal is sent to the effect that the DC voltage generated by the voltage generator 1300 of the power supply board 130 (see FIG. 6) is supplied to each control board. , in response to the signal, the main control CPU 600a (see FIG. 6) reads out the program stored in the normal program area 600ba of the main control ROM 600b shown in FIG. I do. At this time, the main control CPU 600a first sets itself to an interrupt disabled state (step S1).

Next, the main control CPU 600a performs stack pointer setting processing for setting the value of the stack pointer inside the main control CPU 600a corresponding to the final address of the normal stack area 600cc (see FIG. 7A) (step S2 ).

Next, the main control CPU 600a clears the WDT 643 shown in FIG. 34 (step S3) and clears the output port for outputting the firing control signal (step S4).

Subsequently, the main control CPU 600a sets the activation waiting time of the sub-control board 80 (step S5), decrements (-1) the set waiting time (step S6), and clears the WDT 643 shown in FIG. S7).

Next, the main control CPU 600a confirms whether or not the set waiting time has become "0" (step S8), and if it has not become "0" (step S8: ≠ 0), returns to the process of step S7. , "0" (step S8:=0), the process proceeds to step S9.

Next, the main control CPU 600a acquires the voltage abnormality signal ALARM (see FIG. 6) output from the power supply board 130 (voltage monitoring unit 1310) (see FIG. 6) twice, and are stored in an internal register of the main control CPU 600a (not shown), and the level of the voltage abnormality signal ALARM is confirmed (step S9). If the level of the voltage abnormality signal ALARM is "L" level (step S10: YES), the process returns to step S9. The process proceeds to step S11. That is, the main control CPU 600a repeats the same processing until the abnormal voltage signal ALARM changes to the normal level (that is, "H" level) (steps S9 to S10). By acquiring the abnormal voltage signal ALARM twice in this manner, an accurate signal can be read.

Next, the main control CPU 600a permits data writing to the main control RAM 600c (step S11), and initializes the working area of the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c (step S12 ). Specifically, 00H is set in the power failure check counter, and 01H is set in the system operation status. Then, the main control CPU 600a sets data in the reception baud rate setting register RPR (see FIG. 35(a)), sets the reception baud rate (bps), and sets the parity presence/absence setting register RPEN (see FIG. 35(a)). Set data, set whether parity is present or not, and if parity is set, set data in the parity odd-even setting register REVEN (see FIG. 35(a)) to set even parity or odd parity. I do. Also, data is set in the transmission baud rate setting register TPR (see FIG. 7(a)) to set the transmission baud rate (bps), and data is set in the parity presence/absence setting register TPEN (see FIG. 36(a)), Whether or not there is parity is set, and when parity is set, data is set in the parity odd/even setting register TEVEN (see FIG. 36(a)) to set even parity or odd parity. Further, the main control CPU 600a sets the division ratio of the synchronous clock in the synchronous clock division ratio setting register CLK (see FIG. 38(a)), and sets the data length setting register LENG (see FIG. 38(a)). , set the data length.

Thus, by making such settings, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. It becomes possible to transmit predetermined data to the sub-control board 80 by serial transmission using the asynchronous serial communication circuit (CH1) 647 .

Thus, according to this embodiment, the main control CPU 600a (see FIG. 6) sets the reception baud rate and the transmission baud rate (bps) by initializing when the pachinko game machine 1 is powered on, or , the reception baud rate and the transmission baud rate (bps) are set without determining whether the initial setting is due to the reset of the inside of the one-chip microcomputer 600 by the abnormal reset signal. As a result, it is possible to reduce a situation in which abnormal data is transmitted. That is, there is a risk that abnormal data is stored in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 when an abnormal reset occurs. Therefore, the initial setting is made by turning on the power of the asynchronous serial communication circuit (CH0) 646 and the pachinko game machine 1, or by resetting the inside of the one-chip microcomputer 600 by an abnormal reset signal. By setting the baud rate without judging, it is possible to reduce a situation in which abnormal data is transmitted.

Also, in step S12, the main control CPU 600a performs a process of setting initial values in the transmission buffer register TXBUF (see FIG. 36(b)) and the transmission data register TRBUF (see FIG. 38(b)). Thus, by doing so, it is possible to reduce a situation in which abnormal data is transmitted due to the influence of noise or the like immediately after the start of serial communication. That is, when the pachinko game machine 1 is powered on, the system reset signal RST generated by the system reset generator 1320 (see FIG. 6) causes the transmission buffer register TXBUF (see FIG. The credit data register TRBUF (see FIG. 38(b)) will be initialized. It is possible to reduce situations in which incorrect data is transmitted.

Next, the main control CPU 600a transmits to the sub-control board 80 a processing command (effect control command DI_CMD) for displaying a standby screen on the liquid crystal display device 41 (step S13).

Next, the main control CPU 600a clears the WDT 643 shown in FIG. 34 (step S14), and confirms whether or not a signal indicating that the power has been turned on (power-on signal) has come from the payout control board 70 (step S15). . If the power-on signal has not been received (step S15: OFF), the process returns to step S14, and if the power-on signal has been received (step S15: ON), the process proceeds to step S16.

Next, the main control CPU 600a acquires the level data of the RAM clear switch 620 and the setting key switch 630, and saves them in the work area of the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c (step S16). .

Next, as shown in FIG. 2, the main control CPU 600a generates a door open signal indicating whether the upper open/close door 7 and the lower open door 8 are open, and a normal RAM area 600ca (FIG. 7 ( The signal of the RAM clear switch 620 and the signal of the setting key switch 630, which have been saved in the work area of (see a)), are obtained (step S17), and it is confirmed whether they are all ON (step S18). If all are ON (step S18: YES), the main control CPU 600a performs setting switching processing (step S19).

<Main control: Main processing: Description of setting switching processing>
Here, this setting switching process will be specifically described with reference to FIG.

First, the main control CPU 600a transmits a setting switching start command (effect control command DI_CMD) indicating that the setting is being changed to the sub control board 80 (step S50).

Next, the main control CPU 600a clears the backup flag (step S51). The backup flag is data indicating whether backup processing has been executed when a voltage drop due to a power failure or the like is detected in the power failure check processing shown in FIG. The reason why this backup flag is cleared is to detect in step S21 shown in FIG. is.

Next, the main control CPU 600a sets the system operation status to 02H (step S52), and sets the set value of the probability of generating a special game state advantageous to the player stored in the main control RAM 600c (see FIG. 6). It acquires it and sets it in the W register (step S53). Specifically, if the set values are, for example, "1" to "6", the program associates the set values "1" to "6" with the values "00H" to "05H". It will be set in the W register.

Next, the main control CPU 600a compares the value set in the W register with the set maximum value of the probability of generating a special game state advantageous to the player (for example, "05H" corresponding to "6") (step S54). . Then, the main control CPU 600a, if the value set in the W register is greater than the set maximum value of the probability of generating a special game state advantageous to the player (for example, "05H" corresponding to "6") (step S55 : YES), it is judged to be an abnormal value, and 00H is set in the W register (step S56).

On the other hand, if the value set in the W register is smaller than the set maximum value of the probability of generating a special game state advantageous to the player (for example, "05H" corresponding to "6") (step S55: NO), the normal value , and the process proceeds to step S57.

Next, the main control CPU 600a sets ON a security signal to be output to a hall computer (not shown) used for managing game islands of the game arcade via an external terminal (not shown), and the security signal is turned on. The data is output to a hall computer (not shown) via an external terminal (step S57).

Next, the main control CPU 600a sets 00H to the LED common port (step S58).

Next, the main control CPU 600a outputs the value set in the W register to the LED data port (step S59).

Next, the main control CPU 600a turns on the LED common port that displays the set value (step S60).

Next, the main control CPU 600a sets a predetermined value in a register in the main control CPU 600a so as to wait 4 ms, and performs a countdown process (step S61). In this process, when confirming changes in the level data of the RAM clear switch 620 (see FIG. 6) and the setting key switch 630 (see FIG. 6), it is possible to wait at least 4 ms after the previous acquisition of the switch level. , to confirm that the level data is not changed due to irregularities such as noise. Furthermore, when checking the change in the voltage abnormality signal in the subsequent power supply abnormality check process and counting the power supply abnormality confirmation counter, by setting a time of 4 ms, the "L" level of the voltage abnormality signal becomes noise. It is also a process for confirming that it is not irregular level data.

Next, the main control CPU 600a performs power supply abnormality check processing (step S62). This power supply abnormality check process will be specifically described with reference to FIG.

<Main control: Main processing: Description of power failure check processing>
As shown in FIG. 47, the main control CPU 600a acquires the voltage abnormality signal ALARM (see FIG. 6) output from the power supply board 130 (voltage monitoring unit 1310) (see FIG. 6) twice (step S80), It is checked whether or not the levels of the voltage abnormality signal ALARM obtained twice match (step S81). If they match (step S81: YES), the main control CPU 600a checks the level of the voltage abnormality signal ALARM (step S82), and if they do not match (step S81: NO), the process returns to step S80.

Next, if the level of the voltage abnormality signal ALARM is "H" level (step S82: OFF), the main control CPU 600a clears the power abnormality confirmation counter (step S83) and ends the power abnormality check process.

On the other hand, if the level of the voltage abnormality signal ALARM is "L" level (step S82: ON), the main control CPU 600a increments (+1) the power supply abnormality confirmation counter (step S84), and changes the value of the power supply abnormality confirmation counter to Confirm (step S85). If the value of the power supply abnormality confirmation counter is not 2 or more (step S85: NO), the power supply abnormality check process is finished.

On the other hand, if the value of the power supply abnormality confirmation counter is 2 or more (step S85: YES), the main control CPU 600a transmits a power interruption command (effect control command DI_CMD) indicating that the power supply has been cut off to the sub control board 80. (step S86).

Next, the main control CPU 600a confirms the value of the system operation status (step S87). If the value of the system operation status is 02H, it is determined that the setting change process is in progress (step S87: YES), the backup flag is not set to ON, and the process proceeds to step S89. In this way, it is possible to detect in step S21 shown in FIG. 45, which will be described later, a case where the main control RAM 600c is not normally backed up due to a power failure for some reason during the setting switching process.

On the other hand, if the value of the system operation status is not 02H, it is determined that the setting change process is not being performed (step S87: NO), and the backup flag is set to ON (step S88).

Next, the main control CPU 600a prohibits data writing to the main control RAM 600c (step S89), and clears the output data of all output ports (step S90). Then, timer interrupt is prohibited (step S91), and infinite loop processing is repeated to wait for the voltage to drop.

<Main control: Main processing: Description of setting switching processing>
Thus, after completing the power supply abnormality check process (step S62) through the above process, the main control CPU 600a determines from the previous and current level data of the RAM clear switch 620 and the level data of the setting key switch 630, The switch edge data of the RAM clear switch 620 signal and the switch edge data of the setting key switch 630 signal are created (step S63). The main control CPU 600a stores the created edge data in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c.

Next, the main control CPU 600a checks the edge data stored in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c, and if the setting key switch 630 is ON (step S64: NO) , the process proceeds to step S65, and if the setting key switch 630 is OFF (step S64: YES), the process proceeds to step S67.

Next, if the RAM clear switch 620 is ON (step S65: NO), the main control CPU 600a increments (+1) the value of the W register (step S66), and returns to the process of step S54.

On the other hand, if the RAM clear switch 620 is OFF (step S65: NO), the process returns to step S57.

Thus, the above processing is repeated until the setting key switch 630 is turned off, and when the setting key switch 630 is turned off, the main control CPU 600a stores the value of the W register in the main control RAM 600c (see FIG. 6). Overwrite the set value of the probability of generating a special game state advantageous to the player (for example, the set value of "00H" to "05H" corresponding to "1" to "6") and store it (step S67).

Next, the main control CPU 600a outputs a setting confirmation display to the LED data port (step S68).

Next, the main control CPU 600a transmits a setting switching end command (effect control command DI_CMD) reflecting the setting value to the sub control board 80 (step S69).

<Main control: Description of main processing>
Thus, after completing the setting switching process (step S19) shown in FIG. 44 through the processes described above, the main control CPU 600a proceeds to the process of step S26 shown in FIG.

On the other hand, the main control CPU 600a confirms whether or not the signals of the RAM clear switch 620 and the signals of the setting key switch 630 are all ON (step S18). : NO), the main control CPU 600a performs the process of step S20 shown in FIG.

That is, the main control CPU 600a stores the set value of the probability of generating a special game state advantageous to the player (for example, "00H to "05H"), and confirms whether or not it is equal to or less than the set maximum value (for example, "05H" corresponding to "6") (step S20). If it is equal to or less than the set maximum value (step S20: YES), it is checked whether or not the backup flag is set to ON (step S21).

<Main control: Main processing: Description of RAM error processing>
If it is equal to or less than the set maximum value (step S20: NO) or if the backup flag is not set to ON (step S21: NO), the main control CPU 600a indicates to the sub-control board 80 that there is a RAM error. An error command (effect control command DI_CMD) is transmitted (step S22).

Next, the main control CPU 600a outputs an error indication to the LED data port (step S23).

Next, the main control CPU 600a performs power failure check processing (step S24), returns to the processing of step S23, and repeats the processing. This power supply abnormality check process is the same as the power supply abnormality check process shown in FIG.

<Main control: Description of main processing>
On the other hand, if the backup flag is set to ON (step S21: YES), the signal of the RAM clear switch 620 is checked (step S25).

<Main control: Main processing: Description of RAM clear processing>
When the signal of the RAM clear switch 620 is ON (step S25: YES), or when the setting switching process (step S19) shown in FIG. (a)), the measurement stack area 600cg (see FIG. 7(a)) is not cleared, the normal RAM area 600ca of the main control RAM 600c (see FIG. 7(a)), the normal stack area 600cc (see FIG. 7 (a)) is cleared (step S26). At this time, a relief number counter, which will be described later, is cleared (set to 00H).

Next, the main control CPU 600a sets the RAM clear notification timer to 30 seconds (30s) (step S27), and through an external terminal (not shown), a hall computer (not shown) used for game island management of the game hall. A timer for outputting a security signal to be output to is set to 30 seconds (30s) (step S28).

Next, the main control CPU 600a performs initial value setting in a part of the main control RAM 600c (step S29), and proceeds to the process of step S41. Incidentally, when setting the initial value, the initial value is set in a relief number counter, which will be described later.

<Main control: Description of main processing>
On the other hand, if the signal of the RAM clear switch 620 is OFF (step S25: NO), the main control CPU 600a outputs a door open signal indicating whether the upper open/close door 7 and the lower open door 8 are open, and a setting key. The signal of the switch 630 is obtained (step S30), and it is confirmed whether or not all of them are ON (step S31). If all are not ON (step S31: NO), the process proceeds to step S40.

<Main control: Main processing: Description of setting confirmation processing>
On the other hand, if all are ON (step S31: YES), the main control CPU 600a transmits a set value command (effect control command DI_CMD) reflecting the set value to the sub control board 80 (step S32).

Next, the main control CPU 600a sets a timer to 30 seconds for outputting a security signal to a hall computer (not shown) used for managing game islands of the game arcade through an external terminal (not shown). (step S33).

Next, the main control CPU 600a sets ON a security signal to be output to a hall computer (not shown) used for managing game islands of the game arcade via an external terminal (not shown), Then, a security signal is output to the hall computer (not shown) for 30 seconds (30s) set by the timer (step S34).

Next, the main control CPU 600a outputs the set value to the LED data port (step S35).

Next, the main control CPU 600a sets a predetermined value in a register in the main control CPU 600a so as to wait 4 ms, and performs a countdown process (step S36).

Next, the main control CPU 600a performs power supply abnormality check processing (step S37). This power supply abnormality check process is the same as the power supply abnormality check process shown in FIG.

Next, the main control CPU 600a creates switch edge data for the setting key switch 630 signal from the previous and current level data of the setting key switch 630 (step S38). The main control CPU 600a stores the created edge data in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c.

Next, the main control CPU 600a checks the edge data stored in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c (step S39), and if the setting key switch 630 is ON (step S39: NO), the process returns to step S34.

<Main control: Description of main processing>
On the other hand, if the setting key switch 630 is OFF (step S39: YES), initial values such as a backup flag and an error detection timer are set in a part of the main control RAM 600c (step S40).

Next, the main control CPU 600a transmits to the sub-control board 80 a command (effect control command DI_CMD) indicating power failure recovery by RAM clearing or power failure recovery by backup (step S41). When a command (effect control command DI_CMD) indicating whether power is restored by backup is transmitted to the sub-control board 80, the sub-control board 80 uses the relief number command as the effect control command DI_CMD based on the value of the relief number counter described later. 80.

Next, the main control CPU 600a performs a game state notification information update process for updating the game state notification information (step S42).

Next, the main control CPU 600a sets the internal function register (step S43). Specifically, the firing control signal is set to ON and transmitted to the payout control board 70 . As a result, the payout control board 70 controls the launch control board 71 to start operating. In addition, the CTC 644 (see FIG. 34), which is provided inside the main control CPU 600a and has a function of generating a constant period pulse output, a function of time measurement, etc., is set. That is, the main control CPU 600a sets the time constant register of the CTC 644 so that timer interrupts are periodically applied every 4 ms.

Thus, the above processing is the initial processing in the main control main processing.

Next, the main control CPU 600a reads the program stored in the measurement program area 600be of the main control ROM 600b shown in FIG. A winning ball winning number management process 1 for calculating performance such as the total number of game balls shot into the game area 40 including the number of balls and the number of non-winning balls is performed (step S45). Then, the main control CPU 600a updates various random number counters based on the program stored in the normal program area 600ba of the main control ROM 600b shown in FIG. The permission state is restored (step S47), the process returns to step S44, and a loop process of repeating the processes of steps S44 to S47 is performed. Note that this loop processing and interrupt processing, which will be described later, are regular processing.

Thus, according to this embodiment, when the power is turned off for some reason during the setting change and then the power is turned on again, if the setting switching process (step S19) shown in FIG. 44 is not performed, step S22 to step As shown in the process of S24, the RAM is abnormal, and only when the setting switching process (step S19) shown in FIG. 44 is performed, the normal game state is entered. Further, as shown in step S57 shown in FIG. 46, time is not monitored during the setting change, and if the setting is being changed, a security signal is output from the external terminal, and after the setting change is shown in FIG. As shown in steps S33 and S34, the security signal is output from the external terminal for a predetermined time by time monitoring. The reason why the time is not monitored while the settings are being changed is that the time required for the setting change operation is uncertain depending on the operator. This is because the processing load increases when the processing for extending the monitoring time during operation is included.

Thus, conventionally, when an abnormality occurs in the RAM value due to a power failure, there is a possibility that the game will be restarted from the setting change state while the setting value and the like may still affect the game. However, if the processing as in the present embodiment is performed, it is possible to reduce the possibility that the game will be restarted while the game may still be affected.

Further, in the processing of this embodiment, when the power is turned off for some reason during the setting change and then the power is turned on again, if the setting switching processing (step S19) shown in FIG. 44 is not performed, steps S22 to step In the power supply abnormality check process, the main control CPU 600a clears the output data of the output port but does not set the backup flag to ON so that the RAM abnormality occurs as shown in the process of S24. In addition, when clearing the output data of the output port, the main control CPU 600a clears the output data of the output port (for example, the LED data port and the LED common port) used when changing the setting, and also clears the output data used when changing the setting. The output data of no output port is also cleared.

In this embodiment, the set value of the probability of generating a special game state advantageous to the player (for example, the set value of "00H" to "05H" corresponding to "1" to "6") is set in six stages. Although an example that can be changed is shown, even if there is only one setting value (for example, the setting value of "00H" corresponding to "1"), the setting change function as described above is provided in order to share the components and programs. It's okay to be At this time, in the setting switching process shown in FIG. 46, even if the set value stored in the W register is incremented by 1 in step S66, the set maximum value becomes "00H" corresponding to "1". At step S56 shown in 46, the value of the W register is set to "00H". Thereby, the setting change process can be executed by the same program as the program when there are a plurality of setting values. Thus, even if the main control CPU 600a overwrites the set value stored in the main control RAM 600c (see FIG. 6) in step S67 shown in FIG. I have nothing to do. This makes it possible to share members and programs.

<Main control: Description of timer interrupt processing>
Next, with reference to FIG. 48, a timer interrupt program that interrupts the above-described main processing and is started every 4 ms will be described. It should be noted that this program reads and executes a program stored in the normal program area 600ba of the main control ROM 600b shown in FIG. 7(b).

When this timer interrupt occurs, save processing is executed to save the contents of the register group in the main control CPU 600a to the normal stack area 600cc (see FIG. 7A) of the main control RAM 600c (step S100). Abnormality check processing is executed (step S101). This voltage abnormality check process is the same as the power supply abnormality check process shown in FIG.

Next, the main control CPU 600a controls the special symbol 1 start switch 44a (see FIG. 6), the special symbol 2 start switch 45a (see FIG. 6), the normal symbol start switch 47a (see FIG. 6), and the upper right general Winning gate switch 48a1 (see FIG. 6), upper left general winning gate switch 48b1 (see FIG. 6), middle left general winning gate switch 48c1 (see FIG. 6), lower left general winning gate switch 48d1 (see FIG. 6), and an out port. ON/OFF signals of various switches including the switch 49a (see FIG. 6) and the big winning opening switch 46c (see FIG. 6) are input, and the ON/OFF signal level and its rise are stored in the work area in the main control RAM 600c. The state is stored (step S102). At this time, the main control CPU 600a transmits information as to whether or not the player has played the game by touching the handle 16 to the sub-control board 80 as the effect control command DI_CMD. As a result, as shown in FIG. 43(a), even when the movable accessory device 43 is moving to the front of the liquid crystal display device 41 during the customer waiting demonstration, the sub-control board 80 can be used by the player. By receiving information as to whether or not the player has played a game by touching the handle 16, the sub-control board 80 can enter the game ball as shown in FIG. As shown, the movable accessory device 43 is controlled to return to the origin position (original position), the liquid crystal display device 41 stops the customer waiting demonstration, and displays a normal screen ( (See image P60A shown in FIG. 43(b)). When transmitting information as to whether or not the player touched the handle 16 to play the game as the effect control command DI_CMD to the sub-control board 80, the one-chip microcomputer 600 uses the asynchronous serial communication circuit ( CH1) 647 is used to transmit to the sub-control board 80 by serial transmission. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 36(b)).

Next, the main control CPU 600a performs timer subtraction processing of various timers (normal symbol variation timer, normal symbol role timer, etc.) that manage the time of each game operation (step S103).

Next, the main control CPU 600a performs random number management processing (step S104). Specifically, it carries out a process of updating random numbers such as normal symbols and special symbols used in the lottery.

Next, the main control CPU 600a performs error management processing (step S105). In the error management process, the supply of game balls is stopped, or the game balls are jammed, the special symbol 1 start switch 44a (see FIG. 6), the special symbol 2 start switch 45a (see FIG. 6), Normal symbol start opening switch 47a (see FIG. 6), upper right general winning opening switch 48a1 (see FIG. 6), upper left general winning opening switch 48b1 (see FIG. 6), middle left general winning opening switch 48c1 (see FIG. 6), lower left It is to determine whether there is an abnormality inside the device, such as disconnection of the general winning opening switch 48d1 (see FIG. 6), the out opening switch 49a (see FIG. 6), and the big winning opening switch 46c (see FIG. 6). be. In addition, when some error occurs, a command (effect control command DI_CMD) corresponding to the error is transmitted to the sub-control board 80 . At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 34 to transmit to the sub control board 80 by serial transmission. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 36(b)).

Next, the main control CPU 600a executes prize ball management processing (step S106). This prize ball management process outputs a payout control command PAY_CMD for causing the payout/launch control board 70 (see FIG. 6) to perform a payout operation. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 36(b)).

Next, the main control CPU 600a executes normal symbol processing (step S107). In this normal design process, a winning lottery for normal symbols is executed, and based on the result of the lottery, the variation pattern of the normal symbols and the stop display state of the normal symbols are determined. The details of this processing will be described later.

Next, the main control CPU 600a executes normal electric accessory management processing (step S108). In this normal electric auditors management process, a signal relating to the control of the normal electric auditors solenoid 45c (see FIG. 6) necessary for generating the normal electric auditors open game is generated based on the lottery result of the normal symbol processing (step S107). It is a thing.

Next, the main control CPU 600a executes special symbol processing (step S109). In this special design process, a lottery for the special design is executed, and the variation pattern of the special design and the stop display mode of the special design are determined based on the result of the lottery. The details of this processing will be described later.

Next, the main control CPU 600a executes a special electric accessary product management process (step S110). In this special electric accessary product management process, when the jackpot lottery result is "big hit" or "small hit", setting processing necessary for executing and controlling the winning game corresponding to the hit is performed. be. At this time, a signal for controlling the special electric accessory solenoid 46b (see FIG. 6) is also generated. In addition, when the jackpot lottery result is “big hit” or “small hit”, a command (effect control command DI_CMD) related thereto is transmitted to the sub-control board 80 . In addition, the main control CPU 600a sets an initial value to a relief number counter, which will be described later, when the jackpot process starts or when the jackpot process ends in the process of step S110. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 34 to transmit to the sub control board 80 by serial transmission. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 36(b)).

Next, the main control CPU 600a performs right-handed notification information management processing (step S111). In this right-handed informing information management process, right-handed is advantageous, such as when the opening/closing member 45b is opened a predetermined number of times for a predetermined period of time, or when the opening/closing door 46a is opened and a large winning opening (not shown) is opened. In , a process for displaying a "shooting position guidance effect (right hitting notification effect)" for notifying a right hitting instruction is performed. When a right-handed notification effect is performed, a command (effect control command DI_CMD) related to the right-handed notification effect is transmitted to the sub-control board 80 in this right-handed notification information management process. In addition, in the right-handed notification information management process, when the player hits right in the normal game state (no low-accuracy power support state), a command related to the left-handed warning notification (effect control command DI_CMD) is sent to the sub-control board 80. sent. As a result, the liquid crystal display device 41 is caused to display an image prompting the player to "hit left" or the like. However, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) special symbol loss fluctuations are executed, and when shifting to the second time-saving gaming state (state with low-accuracy power support), the second When the player hits right from the variation of the special symbols before transitioning to the time-saving game state (state with low-accuracy power support), a command (production control command DI_CMD) related to left-handed warning notification is sent to the sub-control board 80. Or, a command (effect control command DI_CMD) related to left-handed warning notification is sent to the sub-control board 80, and the sub-control CPU 800a controls not to perform left-handed warning notification. As a result, it is possible to prevent a situation in which the interest of a player who knows the number of times until transition to the second time-saving game state (state with low-accuracy power support) shown in FIG. 28(b) is reduced. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 34 to transmit to the sub control board 80 by serial transmission. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 36(b)).

Next, the main control CPU 600a executes LED management processing (step S112).

Next, the main control CPU 600a executes external terminal management processing (step S113). In this external terminal management process, a hall computer (not shown) used for management of game islands in a game arcade stores, during a winning game, the number of occurrences of winning, the number of fluctuations of special symbols, winning ball detection information for winning openings, Predetermined game information such as time-saving game state information and security information is output from an external terminal (not shown). At this time, in the second time-saving game state (state with low-accuracy power support) shown in FIG. Or, after outputting the state transition time information from an external terminal (not shown), the information during the time saving game state is output from the external terminal (not shown). Then, in the first time-saving gaming state (with low-accuracy power support state) shown in FIG. Output the information during the time saving game state from the external terminal (not shown), or output the information during the time saving game state from the external terminal (not shown) after outputting the jackpot information from the external terminal (not shown) . Thus, in this way, the second time-saving gaming state shown in FIG. Since it does not pass through the hit, it is possible to distinguish between those that have passed through the hit and those that have not passed through the hit. becomes possible. It should be noted that the information at the time of state transition is output based on the fact that a relief activation flag, which will be described later, is set to ON.

Next, the main control CPU 600a performs solenoid management processing (step S114). At this time, the main control CPU 600a checks the signal related to the control of the normal electric auditors product solenoid 45c (see FIG. 6) generated in the normal electric auditors product management process (step S108), and also confirms the special electric auditors product management process ( A signal relating to the control of the special electric accessory solenoid 46b (see FIG. 6) generated in step S110) is checked. Based on this signal, the operation/stop of the normal electric accessory solenoid 45c or the special electric accessory solenoid 46b is controlled to open or close the opening/closing member 45b (see FIG. 5), or open or close the big prize opening (not shown). The open/close door 46a (see FIG. 5) is operated so that the is opened or closed.

Next, the main control CPU 600a performs out-of-use area processing (step S115). The details of this processing will be described later.

Next, the main control CPU 600a clears the WDT 643 shown in FIG. 34 (step S116), returns it to the interrupt enabled state (step S117), and saves it in the normal stack area 600cc (see FIG. 7(a)) of the main control RAM 600c. The contents of the stored register are restored and the timer interrupt is terminated (step S118). As a result, the interrupt processing routine returns to the main processing (see FIG. 44).

Thus, as shown in FIG. 42, after 20 to 30 ms (see timing T21) after the power supply is cut off (see timing T20), the voltage abnormality signal ALARM becomes "L" level. When the timer interrupt occurs, the one-chip microcomputer 600 is supplied with a voltage (DC12V, DC5V) capable of executing the control of the game operation shown in FIG. processing will be performed. Then, as shown in FIG. 42, the supply of the voltage (DC12V, DC5V) capable of executing the control of the game operation is stopped after 20 ms or more from the timing T21 (refer to the timing T22), so the second timer interrupt will occur. At this time, when the voltage abnormality check process of step S101 shown in FIG. 48 is executed, the value of the power supply abnormality confirmation counter becomes 2 or more, so the processes of steps S86 to S91 shown in FIG. is repeated to wait for the voltage to drop. Therefore, with the first timer interrupt, the main control CPU 600a stores the data to be sent in the transmission buffer register TXBUF (see FIG. 36(b)), but with the second timer interrupt, the main control CPU 600a stores the data in the transmission buffer Data to be transmitted is not stored in the register TXBUF (see FIG. 36(b)).

Therefore, data to be transmitted is not stored (set) in the transmission buffer register TXBUF (see FIG. 36(b)) except for the first timer interrupt after the power is turned off. Therefore, the transmission time during serial communication is longer than the time from when the voltage abnormality signal ALARM becomes "L" to the voltage at which the control of the game operation becomes unexecutable (see timing T21 to timing T22 shown in FIG. 42). 36(a), the data stored (set) in the transmission buffer register TXBUF (see FIG. 36(b)) is , the serial communication is completed by the time (refer to timing T21 to timing T22 shown in FIG. 42) until the voltage reaches a level at which game operation control cannot be executed. As a result, the payout operation can be performed normally even if a power failure occurs in a situation where prize ball information to be paid out remains on the main control side.

In addition, the main control CPU 600a stores (sets) the data to the effect that the backup process will be shifted to the backup process due to the power shutdown in the transmission buffer register TXBUF (see FIG. 36(b)) at the first timer interrupt after the power shutdown. is possible, it becomes possible to transmit to the payout/launch control board 70 and the sub-control board 80 that the main control board 60 has been powered off and has shifted to backup processing. This enables these control boards to execute processing in preparation for power shutdown.

On the other hand, if the baud rate setting is set high in order to increase the amount of data to be transmitted, as described above, for example, 12.5 bits can be transmitted in 1 ms. 36(b)), the second timer interrupt occurs after the start of serial transmission, and the value of the power failure confirmation counter is 2 or more (step S85 shown in FIG. 47: YES), the serial communication will be completed. Thus, even in this case, the payout operation can be performed normally even if a power failure occurs in a situation where prize ball information to be paid out remains on the main control side.

On the other hand, as described in the timer interrupt process shown in FIG. 48, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. In transmitting the payout control command PAY_CMD to the payout/launch control board 70, only one payout control command PAY_CMD is stored (set) in the transmission buffer register TXBUF (see FIG. 36(b)). On the other hand, within one timer interrupt process, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. In doing so, a plurality of effect control commands DI_CMD are stored (set) in the transmission buffer register TXBUF (see FIG. 36(b)).

Thus, if only one payout control command PAY_CMD is stored (set) in the transmission buffer register TXBUF (see FIG. 36(b)) in one timer interrupt process, one time With this timer interrupt, it is possible to transmit one payout control command PAY_CMD, so that untransmitted commands will not continue to be stored (set) in the transmission buffer register TXBUF (see FIG. 36(b)). . Therefore, even if the one-chip microcomputer 600 is reset due to the power shutdown, the unsent payout control command PAY_CMD is not stored (set) in the transmission buffer register TXBUF (see FIG. 36(b)). Therefore, it is possible to prevent a situation in which the player is disadvantaged by clearing the unsent payout control command PAY_CMD.

<Main control: Description of normal symbol processing>
Next, referring to FIG. 49, the normal symbol processing will be described in detail.

As shown in FIG. 49, in the normal symbol processing, first, in the normal symbol starting port 47 (see FIG. 5) consisting of a gate, it is confirmed whether or not the passage of the game ball is detected. The signal level of the normal symbol starting port switch 47a (see FIG. 6) is confirmed (step S150). Then, when the passage of the game ball is detected (step S150: YES), the main control CPU 600a determines whether the number of start suspension balls of the normal symbol is, for example, 4 or more, so that the number of start suspension balls of the normal symbol is stored. The normal RAM area 600ca (see FIG. 9A) of the main control RAM 600c is confirmed (step S151). At that time, if the number of starting reservation balls in the normal design is less than 4 (step S151: ≠MAX), the number of starting reservation balls in the normal design is added by 1 (step S152). After that, the main control CPU 600a puts the random number value for judging the winning of the normal symbols, which is used for the lottery of the normal symbols, into the normal RAM area 600ca (Fig. 7(a)) ) (step S153), and the process proceeds to step S154.

On the other hand, in step S150, when the passage of the game ball is not detected (step S150: NO), in step S151, when it is determined that the number of start suspension balls in the normal design is 4 or more (step S151: = MAX), the process of steps S152 and S153 is not performed, and the process proceeds to step S154.

When proceeding to the process of step S154, the main control CPU 600a checks whether the normal symbol per operation flag is set to ON, that is, whether the normal symbol per operation flag is set to 5AH (step S154). If 5AH is set in the normal design winning operation flag (step S154: ON), it is determined that the normal design is in the process of winning, and after updating the display data of the normal design (step S163), normal design processing is performed. finish.

On the other hand, if 5AH is not set to the operation flag per normal symbol (step S154: OFF), the processing state indicating the behavior of the normal symbol, that is, the value of the normal symbol operation status flag is confirmed (step S155). Then, if the normal design operation status flag is 00H, the main control CPU 600a judges that it is in a state before the start of fluctuation of the normal design, proceeds to step S156, and determines whether the number of start suspension balls of the normal design is 0 or not. Confirm (step S156).

When the main control CPU 600a checks the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c storing the start pending ball number of the normal symbol and determines that it is 0 (step S156 :=0) normally finishes the design process after updating the display data of the normal design (step S163). On the other hand, if it is determined not to be 0 (step S156: ≠0), 1 is subtracted from the number of start-holding balls of normal symbols (step S157).

After that, the main control CPU 600a uses the normal symbol hit determination table NPP_TBL shown in FIG. Hit judgment is performed with a random value corresponding to the number of balls. That is, the main control CPU 600a, if the normal symbol probability variation flag indicating the game state is OFF, the random number is the lower limit value of the normal symbol hit determination table NPP_TBL (normal state) shown in FIG. 61 (a) (in the illustration, 249) or more and the upper limit value (250 in the figure) or less is determined, and if the lower limit value or more and the upper limit value or less, the normal symbol hit determination flag is set to 5AH and turned ON. Otherwise, the normal symbol hit determination flag is turned OFF.

On the other hand, if the normal symbol probability variation flag indicating the gaming state is ON, the random number is the lower limit value (4 in the illustration) of the normal symbol hit determination table NPP_TBL (probability variation state) shown in FIG. 61 (a). A value (250 in the figure) is determined, and if it is equal to or more than the lower limit value and equal to or less than the upper limit value, 5AH is set to the normal symbol hit determination flag and turned ON. Otherwise, a process of setting the normal symbol hit determination flag to OFF is performed (step S158).

Then, the main control CPU 600a determines a stop symbol (normal symbol stop symbol) based on the lottery result determined in the random number lottery process (step S159).

Next, the main control CPU 600a confirms whether or not the normal symbol time saving flag for shortening the normal symbol variation time is set to ON, and if it is set to ON, sets the variation time corresponding to the normal symbol variation timer. However, if it is set to OFF, a process of setting a normal variation time to the normal symbol variation timer is performed (step S160).

In addition, in the present embodiment, in the electric sapo state, the winning probability of the normal symbol is described as an example with a high probability state. In the second time-saving game state, the game state is shifted to the second time-saving game state without going through a big hit, so there is a possibility that the rule prohibits making the winning probability of the normal symbol high probability state. In that case, the winning probability of the normal design remains the same as the normal game state, and the normal design time-saving game state in which the fluctuation time of the normal design is shortened is set. As a result, even if the normal patterns do not reach a high probability state, the fluctuation time of the normal patterns is shortened, the frequency of lottery of the normal patterns is increased, and the normal patterns are easily won. In addition, when shifting to the first time-saving game state, the winning probability of normal symbols may be set to a high probability state, and when shifting to the second time-saving game state, the winning probability of normal symbols may not be changed from the normal game state. . On the other hand, in both the case of shifting to the first time-saving game state and the case of shifting to the second time-saving game state, the winning probability of normal symbols may not be changed from the normal game state.

Next, the main control CPU 600a stores the random number used in the lottery of the normal symbols corresponding to the number of start-holding balls of the normal symbols. The storage area is shifted (step S161). That is, assuming that the number of start-holding balls of the normal design can be reserved up to 4, the random number used for the lottery of the normal design corresponding to the number of start-holding balls of the normal design of 4 is set to the number of start-holding balls of the normal design of 3. The random number used for the lottery of the corresponding normal symbol is shifted to the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c, and the normal corresponding to the number of start suspension balls 3 of the normal symbol A normal RAM area 600ca (Fig. 7(a)) of the main control RAM 600c in which the random number used for the winning/failing lottery for the normal symbol corresponding to the number of start-holding balls 2 of the normal symbol is stored. )), and the random number used for the lottery of the normal design corresponding to the number of starting suspension balls of the normal design of 2 is stored in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c.

After this process, the main control CPU 600a sets the normal symbol operation status flag used in step S155 to 01H, and the random number used for the normal symbol success/fail lottery corresponding to the normal symbol starting hold ball number 4 is 00H is set in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c (step S162).

Then, after completing the process of step S162, the main control CPU 600a updates the display data of the normal symbol (step S163), and ends the normal symbol process.

On the other hand, the main control CPU600a, in the above step S155, the processing state indicating the behavior of the normal symbol, that is, if the value of the normal symbol operation status flag is 01H, the main control CPU600a determines that the normal symbol is fluctuating. It judges, it progresses to step S164, and it confirms whether a normal design variation timer is 0 (step S164). If the normal symbol fluctuation timer is not 0 (step S164: ≠0), the normal symbol display data is updated (step S163), and the normal symbol processing is finished. Then, if the normal symbol variation timer is 0 (step S164: = 0), the main control CPU 600a sets 02H to the normal symbol operation status flag used in step S155, and the normal symbol lottery result is fixed. In order to maintain the time, for example, a period of about 600 ms is set in the normal symbol variation timer (step S165).

After completing the process of step S165, the main control CPU 600a updates the display data of the normal symbol (step S163), and ends the normal symbol process.

On the other hand, in the above step S155, the main control CPU 600a is in a processing state that indicates the behavior of the normal symbol, that is, if the value of the normal symbol operation status flag is 02H, the main control CPU 600a determines that the normal symbol is during the confirmation time (normal The symbol variation is finished and stopped), and the process proceeds to step S166 to confirm whether or not the normal symbol variation timer is 0 (step S166). If the normal symbol fluctuation timer is not 0 (step S166: ≠0), the normal symbol display data is updated (step S163), and the normal symbol processing is finished. Then, if the normal symbol variation timer is 0 (step S166:=0), the main control CPU 600a sets the normal symbol operation status flag used in step S155 to 00H (step S167), and determines the normal symbol hit. It is checked whether the flag is set to ON (5AH is set) (step S168).

Thus, if the normal symbol hit determination flag is set to OFF (5AH is not set) (step S168: OFF), the main control CPU 600a updates the normal symbol display data (step S163), Finish normal design processing. Then, if the normal symbol hit determination flag is set to ON (5AH is set) (step S168: ON), the main control CPU 600a turns ON the normal symbol hit operation flag used in step S154 (sets 5AH). (step S169), the normal design process is finished.

<Main control: Explanation of special symbol processing>
Next, with reference to FIGS. 50 to 59, the special symbol processing will be described in detail.

As shown in FIG. 50, in the special symbol processing, first, a game ball enters (winning ball) at the special symbol 1 starting port switch 44a (see FIG. 6) of the special symbol 1 starting port 44 (see FIG. 5). It is confirmed whether or not it is detected (step S200), and furthermore, in the special symbol 2 start port switch 45a (see FIG. 6) of the special symbol 2 start port 45 (see FIG. 5), the entering ball (winning ball) of the game ball is detected. It is checked whether or not it has been detected (step S201).

<Main control: Special symbol processing: Description of starting port check processing>
This process will be described in detail using FIG. The level of the special pattern 1 starting port switch 44a of the pattern 1 starting port 44 or the special pattern 2 starting port switch 45a of the special pattern 2 starting port 45 is confirmed (step S250). Thereby, if the entry of the game ball (winning a prize) is not detected (step S250: NO), the special symbol processing is finished.

On the other hand, if the entry of a game ball (winning a prize) is detected (step S250: YES), the main control CPU 600a determines that the number of starting and holding balls that triggers the fluctuation of the special symbol is a predetermined number, and the normal RAM area 600ca of the main control RAM 600c. (See FIG. 7(a)) to confirm whether or not it is stored (step S251). If the starting pending ball number is less than 4 (step S251: ≠ MAX), the starting pending ball number is added by 1 (+1) (step S252).

Next, the main control CPU 600a stores the random number used when stopping the special symbols, the random number for the variation pattern, and the random number for judging the big hit in the main control RAM 600c, which stores the number of starting pending balls that trigger the variation of the special symbols. is stored in the RAM area 600ca (see FIG. 7A) (step 253).

Next, the main control CPU 600a confirms the current gaming state (whether or not the special symbol jackpot determination flag is set to ON, etc.), and determines whether or not the prefetching is prohibited (step S254). Then, if it is not in the pre-reading prohibited state (step S254: NO), the main control CPU 600a stores the special symbol lottery in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c in the above step S253. (Step S255), and further acquires a random number determination table (not shown) at the time of start-up winning (Step S256).

Next, the main control CPU 600a performs a jackpot lottery using the random number value for jackpot determination acquired in step S255 and the random number determination table (not shown) at the time of start-up winning acquired in step S256. At step S253, using the special symbol random number value stored in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c, the type of jackpot (rank-up bonus hit, normal jackpot, etc.) is determined. , Using the random number for the variation pattern, the variation pattern is determined, and a special symbol start opening winning command is generated accordingly (step S257). In addition, at this time, not only the jackpot lottery, but also the small lottery and special electric support symbol lottery are performed, and either the random number for the special symbol described above is used, or a random number different from the random number for the special symbol is used. Use to determine the type of small hit and the type of special electric sapo symbol, use the random number for the variation pattern to determine the variation pattern, and generate a special symbol start opening winning command accordingly.

Next, the main control CPU 600a generates a start pending addition command of lower bytes according to the generated special symbol start opening winning command (step S258).

On the other hand, the main control CPU 600a finishes the processing of step S258, or the number of starting holding balls of special symbol 1 or 2 is 4 or more in step S251 (step S251:=MAX), or pre-reading If it is in the prohibited state (step S254: YES), a start suspension addition command of the upper byte corresponding to the increased number of start suspension balls is generated (step S259).

Next, the main control CPU 600a combines the low-order byte starting pending addition command generated in step S258 with the high-order byte starting pending addition command generated in step S259, and then outputs the starting pending addition command (effect A control command DI_CMD) is transmitted to the sub-control board 80 (step S260).

<Main control: Explanation of special symbol processing>
Thus, when the processing of steps S200 and S201 shown in FIG. 50 is completed, the main control CPU 600a determines whether the special symbol small hit operation flag is set to ON, that is, whether the special symbol small hit operation flag is set to 5AH. It is confirmed whether there is (step S202). If 5AH is set in the special symbol small hit operation flag (step S202: ON), it is determined that the special symbol is in the middle of a small hit, and after updating the display data of the special symbol (step S208), special Complete pattern processing.

On the other hand, if the special symbol small winning operation flag is not set to 5AH (step S202: OFF), is the special symbol big winning operation flag set to ON, that is, is the special symbol big winning operation flag set to 5AH? is confirmed (step S203). If 5AH is set in the special symbol big hit operation flag (step S203: ON), it is determined that the special symbol is in the midst of a big hit, and after updating the display data of the special symbol (step S208), special symbol processing is performed. finish.

On the other hand, if 5AH is not set in the special symbol jackpot operation flag (step S203: OFF), the processing state indicating the behavior of the special symbol, that is, the value of the special symbol operation status flag is confirmed (step S204). More specifically, if the value of the special symbol operation status flag is 00H or 01H, the main control CPU 600a is in a special symbol variation waiting state (a special symbol variation is not performed and it is in a standby state for the next variation. It indicates that there is), and performs special symbol variation start processing (step S205).

<Main control: Special symbol processing: Description of special symbol variation start processing>
This process will be described in detail with reference to FIG. 52. The main control CPU 600a confirms whether or not the number of starting pending balls, which triggers the variation of special symbols, is 0 (step S300). That is, the main control CPU 600a confirms whether or not it is stored in the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c. :=0), and confirms whether or not the value of the special symbol operation status flag is 00H (step S301). If the value of the special symbol operation status flag is 00H (step S301: YES), the special symbol variation start process is terminated.

On the other hand, if the value of the special symbol operation status flag is not 00H (step S301: NO), the main control CPU 600a transmits the customer waiting demo command as the effect control command DI_CMD to the sub control board 80 (see FIG. 6) (step S302).

Next, the main control CPU 600a sets the special symbol operation status flag to 00H (step S303), and ends the special symbol variation start process.

On the other hand, when the main control CPU 600a determines that the number of start-holding balls is not 0 (step S300: ≠ 0), it subtracts 1 (-1) from the number of start-holding balls (step S304), and controls the start-holding subtraction command. It is transmitted as a command DI_CMD to the sub-control board 80 (sub-control CPU 800a) (step S305).

Next, the main control CPU 600a confirms the value of the relief number counter, which will be described later, and transmits the relief number command as the effect control command DI_CMD to the sub control board 80 (sub control CPU 800a) (step S306). Thereby, the sub-control CPU 800a can grasp how many times the special symbol losing variation shown in FIG. 28(b) has been executed. Therefore, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is performed, and before shifting to the second time-saving gaming state (low-accuracy power support state), If the power supply is interrupted (power cut off), when the power supply is turned on again and the game is resumed, the sub-control CPU 800a displays the remaining number of times up to the predetermined number of times (for example, 1000 times) on the liquid crystal display device 41. The background image (video) to be played is made different from the background image (video) when returning to the game, or part of the lighting of the decorative lamps is controlled to be different from the lighting of the decorative lamps when returning to the game. be able to. In addition, as shown in FIG. 28(b), a predetermined number of times (for example, 1000 times) the special symbol loss variation is executed, and the power supply is interrupted (power cut), when the power is turned on again to return to the game, the sub-control CPU 800a determines the predetermined number of times (for example, 1000 times) in the fluctuation of the special symbol in the first rotation after returning to the game. It is possible to control to execute an effect according to the remaining number of times up to.

Next, the main control CPU 600a confirms the value of the special symbol time saving number counter, which will be described later, and transmits the time saving number command as the effect control command DI_CMD to the sub control board 80 (sub control CPU 800a) (step S307). In response to this, the sub-control CPU 800a does not display the current number of times of time saving on the liquid crystal display device 41 until the number of times of time saving falls below the predetermined number of times, or displays a fixed number of times such as 100 times on the liquid crystal display device 41. A command list related to images (video) is transmitted to the VDP 803 . As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41. , the current number of times of time saving is not displayed, or a fixed number of times such as 100 times is displayed. Then, when the predetermined number of times of time saving has been reached, the sub-control CPU 800a transmits to the VDP 803 a command list related to an image (video) to be displayed on the liquid crystal display device 41 based on the received time saving number of times information. As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41. , the current number of time reductions will be displayed.

Next, the main control CPU 600a stores the random number used when stopping the special symbols, the random number for the variation pattern, and the random number for judging the big hit (see step S253 in FIG. 51). (See FIG. 7(a)) shifts the storage area in (step S308), and the normal RAM area 600ca of the main control RAM 600c in which the random number used for the lottery of the special symbol corresponding to the start suspension 4 is stored. 0 is set in the area inside (see FIG. 7A) (step S309).

Next, the main control CPU 600a performs hit determination processing (step S310).

<Main control: Special symbol processing: Description of hit determination processing>
This process will be described in detail with reference to FIG. 53. The main control CPU 600a controls the normal RAM area 600ca (see FIG. )), a random value for judging a big hit is obtained (step S350).

Next, the main control CPU 600a acquires the address address of the hit determination table corresponding to the fluctuating special figure. Here, the address address of the hit determination table D_RNDJDG shown in FIG. 55 corresponding to the fluctuating special figure 1 is acquired. FIG. 55 shows hit determination table data corresponding to the special symbol big hit determination table SDH_TBL shown in FIG. 61(b) and the special symbol small hit determination table SDP_TBL shown in FIG. 61(c). This hit determination table will be described with reference to FIG. 55. This hit determination table contains information as to whether the determination value differs for each set value (in this embodiment, set values 1 to 6 are exemplified), and , the determination value, and the values of the special symbol big hit determination flag and the special symbol small hit determination flag are stored.

Specifically, as can be easily understood by referring to the special symbol jackpot determination table SDH_TBL shown in FIG. Probability fluctuation state which is a high probability state) Since there is no difference for each set value and the lower limit value is "10001",
DB 000H
DW 10000
DB 000H, 000H, 000H
is programmed with

On the other hand, as can be easily understood by referring to the special symbol jackpot determination table SDH_TBL shown in FIG. ,
DB 001H
DW 10164
DW 10180
DW 10185
DW 10190
DW 10195
DW 10200
DB 05AH, 05AH, 000H
is programmed with

On the other hand, as can be easily understood by referring to the special symbol jackpot determination table SDH_TBL shown in FIG. For,
DB 001H
DW 11640
DW 11800
DW 11850
DW 11900
DW 11950
DW 12000
DB 000H, 05AH, 000H
is programmed with

On the other hand, as can be easily understood by referring to the special symbol small hit determination table SDP_TBL shown in FIG. Since there is no difference for each set value and it is "20001",
DB 000H
DW 20000
DB 000H, 000H, 000H
is programmed with

Also, as can be easily understood by referring to the special symbol small hit determination table SDP_TBL shown in FIG. Since there is no difference for each set value and it is "20164",
DB 000H
DW 20164
DB 000H, 000H, 05AH
is programmed with

On the other hand, as shown in FIG. 55, the upper limit value (65535) of the random number value for judging the big win is programmed in the hit judging table as follows.
DB 000H
DW65535
DB 000H, 000H, 000H

Thus, the main control CPU 600a acquires the address of the hit determination table as described above (step S351).

Next, the main control CPU 600a changes the acquired address address to the address address where the determination value shown in FIG. 55 is stored (step S352).

Next, the main control CPU 600a acquires information as to whether the determination value differs for each set value shown in FIG. 55 (step S353), and confirms the value of the acquired information (step S354). If the acquired value is "0" (step S354:=0), the process proceeds to step S357, and if the acquired value is not "0" (step S354: ≠0), the main control CPU 600a A set value of the probability of generating a special game state advantageous to the player stored in the RAM 600c (see FIG. 6) (for example, a set value of "00H" to "05H" corresponding to "1" to "6"). is obtained (step S355).

Next, the main control CPU 600a changes the address to the address in which the determination value corresponding to the acquired set value is stored (step S356). For example, when acquiring the determination value of the upper limit value of the game state normal state (low probability state), if the acquired setting value is "1", the address where the determination value "10164" of the setting value 1 is stored If the setting value is "6", the address address that stores the judgment value "10200" of the setting value 6 is changed, and the address address that refers to the data of the judgment table is changed.

Next, the main control CPU 600a acquires the determination values shown in FIG. 55 from the current address. For example, if the information on whether the judgment value is different for each set value is "000H", it is related to the jackpot, and if the information is "000H", the judgment value of "10000" is acquired, and the information whether the judgment value is different for each set value is " 001H" and the set value is "1", a determination value of "10164" is obtained (step S357).

Next, the main control CPU 600a changes the address address to the top address where the next determination value is stored (step S358), and compares the acquired random number value for judging a big hit with the acquired determination value (step S359).

Next, the main control CPU 600a returns to the process of step S353 if the acquired random number value for judging a big hit is not smaller than the acquired judgment value (step S360: NO), The processing from step S353 to step S360 is repeated until it becomes smaller (step S360: YES).

Next, when the acquired random number value for judging a big hit becomes smaller than the judgment value (step S360: YES), the main control CPU 600a generates a special symbol big hit judgment flag and a special symbol small hit according to the game state shown in FIG. A determination flag is acquired (step S361), and the hit determination process ends.

By the way, even if there is only one set value (for example, a set value of "1"), the program shown in steps S350 to S361 can be used as it is (commonization of the program). is changed to the data shown in FIG.

That is, to explain only the difference from FIG. 55, since there is only one setting value, the upper limit value of the game state is normal state (low probability state), although there is no difference for each setting value, for the commonization of the program , to program "DB 001H". Furthermore, since there is only one set value, the upper limit value of the variable probability state (high probability state) of the game state is programmed as "DB 001H" for commonization of the program, although there is no difference for each set value. Further, dummy data "DW 0000H" is added in order to make the data size the same as the data size of the hit determination table shown in FIG.

In this way, even if there is only one set value, the set value is referenced to obtain the judgment value. Programs can be shared without having to This is because it is necessary to use all programs because unused programs will result in disqualification in the certification test.

<Main control: Special symbol processing: Description of special symbol variation start processing>
Thus, after finishing the hit determination process (step S310) as described above, the main control CPU 600a performs the special electric support symbol hit determination process (step S311). In addition, this process is a process of performing a lottery using a big hit determination random number when playing a game with a special electric support symbol without using it as a small winning symbol.

<Main control: Special symbol processing: Explanation of special electric sapo symbol hit determination processing>
This process will be described in detail with reference to FIG. 54. The main control CPU 600a controls the normal RAM area 600ca (see FIG. )), a random value for judging a big hit is obtained (step S370).

Next, the main control CPU 600a acquires the address address of the special electric sapo per symbol determination table corresponding to the fluctuating special figure. Here, the address address of the special electric support symbol determination table D_RNDJDG2 shown in FIG. 57 corresponding to the fluctuating special figure 1 is acquired. FIG. 57 shows special electric sapo symbol winning determination table data corresponding to the special electric sapo symbol winning determination table TDS_TBL shown in FIG. 61(d). This special electric support symbol win determination table will be described with reference to FIG. 57. In this special electric support symbol win determination table, determination values and values of special electric support symbol win determination flags are stored.

Specifically, as can be easily understood by referring to the special electric support symbol hit determination table TDS_TBL shown in FIG.
DW 30000
DB 000H
is programmed with

Also, as can be easily understood by referring to the special electric sapo symbol hit determination table TDS_TBL shown in FIG.
DW 30218
DB 05AH
is programmed with

On the other hand, as shown in FIG. 57, the upper limit value (65535) of the random number value for judging the big hit is programmed as follows in this special electric sapo symbol hit determination table.
DW65535
DB 000H

Thus, if the determination value for winning the special electric support symbol does not overlap with the range of the winning determination value for either the big win or the small win, it can be used in the winning determination process in step S310 shown in FIG. A lottery can be performed using the random number for judging a big hit.

Thus, the main control CPU 600a acquires the address address of the special electric support symbol hit determination table as described above (step S371).

Next, the main control CPU 600a changes the acquired address address to the address address where the judgment value shown in FIG. 57 is stored (step S372).

Next, the main control CPU 600a acquires the judgment value shown in FIG. 57 from the current address (step S373).

Next, the main control CPU 600a changes the address address to the leading address where the next determination value is stored (step S374), and compares the acquired random number value for judging a big hit with the acquired determination value (step S375).

Next, the main control CPU 600a returns to the process of step S373 if the acquired random value for judging a big hit is not smaller than the acquired judgment value (step S376: NO), The processing from step S373 to step S376 is repeated until it becomes smaller (step S376: YES).

Next, the main control CPU 600a acquires the special electric support symbol hit determination flag shown in FIG. Finish the special electric sapo symbol hit determination process.

<Main control: Special symbol processing: Description of special symbol variation start processing>
Thus, after completing the special electric support symbol hit determination process (step S311) as described above, the main control CPU 600a clears the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c in step S253 of FIG. ) is used to stop the special symbols, a special symbol stop symbol is generated (step S312).

Next, the main control CPU 600a prepares to shift to a game state such as a normal state, a time saving state, a latent probability variable state, or a probability variable state (step S313).

Next, the main control CPU 600a generates a special symbol variation pattern using the variation pattern random number value stored in the normal RAM area 600ca (see FIG. 7(a)) of the main control RAM 600c in step S253 of FIG. Then, the variation pattern command of the generated special symbol variation pattern is transmitted to the sub-control board 80 (sub-control CPU 800a) as the effect control command DI_CMD (step S314). At this time, the main control CPU 600a refers to the variation pattern table shown in FIGS. First, the main control CPU 600a refers to the table TBL shown in FIG. 29(a). In the normal game state, the variation pattern table NOR_TBL shown in FIG. 29(b) is used as the variation pattern table to be referred to. And further, in the first time-saving game state shown in FIG. 28 (b), or in the first time-saving game state shown in FIG. The variation pattern table JT1_TBL1 shown in is used, and the variation pattern table JT1_TBL2 shown in FIG. A variation pattern table JT1_TBL3 shown in 31(a) is used. Furthermore, in the second time-saving game state shown in FIG. 28(b) or the second time-saving game state shown in FIG. The variation pattern table JT2_TBL1 is used, and in the variation of the special symbols of the 2nd to 100th rotations, the variation pattern table JT2_TBL2 shown in FIG. A variation pattern table JT2_TBL3 shown in 32 is selected. Thus, the variation pattern of the special symbol is generated according to the variation pattern table selected in this way, and the variation pattern command of the generated special symbol variation pattern is used as the effect control command DI_CMD as the sub control board 80 ( It is transmitted to the sub-control CPU 800a). In response to this, the sub-control CPU 800a, as shown in FIG. 28(b), performs a predetermined number of times (for example, 1000 times) special symbol loss variation, and the second time-saving game state (low-accuracy power support state) ), immediately after shifting to the second time-saving game state (low-accuracy power support state) without executing the time-saving rush effect at the time of the deviation fluctuation of the special symbol for the predetermined number of times (for example, 1000th time) , at the time of the 1001st change of the special symbols, a time-saving rush effect is executed, such as displaying an image prompting the player to "hit to the right" on the liquid crystal display device 41.例文帳に追加

Also, as shown in FIG. 28(b), when shifting to the second time-saving gaming state (state with low-accuracy power support), even if a special symbol lottery is won and the jackpot is won, the liquid crystal display device At 41, a time-saving rush effect including a notification of hitting to the right such as displaying an image prompting the player to "hit to the right" is first executed, and the effect changes from the middle.

Furthermore, FIG. 28 (c), or the first time-saving state shown in FIG. When returning to the low-accuracy power support state), the sub-control CPU 800a displays the result effect on the liquid crystal display device 41 at the final variation (for example, 100th time) of a predetermined number of times (for example, 100th time). display of acquired number of points, etc.). However, the fluctuation of the special symbol reaches a predetermined number of times (for example, 100 times or more) from the second time-saving game state (state with low-accuracy electric support) shown in FIG. ), or when the variation of the special symbol reaches a predetermined number of times (for example, 1000 times) from the second time-saving game state (state with low probability power support) shown in FIG. When returning to the state without electric support, since the same variation pattern table as before the final variation is used to select the variation pattern, the variation pattern command for executing the result production is not sent to the sub-control CPU 800a. The sub-control CPU 800a performs control so that the liquid crystal display device 41 does not display the result effect after the predetermined number of final fluctuations.

On the other hand, the sub-control CPU 800a determines the variation pattern at timing T1A shown in FIG. 12, and temporarily stores the control signal instructing execution in the sub-control RAM 800c. As a result, the sub-control CPU 800a transmits to the VDP 803 a command list relating to images (video) among the control signals instructing execution of the effect patterns stored in the sub-control RAM 800c. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIGS. 11(a) to 11(e), the liquid crystal display device 41 displays images in which the decorative patterns and the resident patterns have changed.

In this step S314, the main control CPU 600a sets the variable time to the special symbol variation timer, sets the number of times to the special symbol time saving number counter, and sets the probability variation number to the special symbol probability variation number counter. .

Next, the main control CPU 600a sets the special symbol fluctuating flag to 5AH and turns it ON (step S315).

Next, the main control CPU 600a generates a symbol designation command for designating a special symbol to be displayed on the liquid crystal display device 41 (step S316), and uses the generated symbol designation command as the effect control command DI_CMD. A process of transmitting to the control CPU 800a) is performed (step S317).

Next, the main control CPU 600a sets the special symbol operation status flag to 02H (step S318), and ends the special symbol variation start process.

<Main control: Explanation of special symbol processing>
On the other hand, as shown in FIG. 50, when the value of the special symbol operation status flag is 02H, the main control CPU 600a determines that the special symbol is fluctuating (indicating that the special symbol is currently fluctuating). During symbol variation processing is performed (step S206).

<Main control: Special symbol processing: Explanation of special symbol fluctuation process>
This process will be explained in detail using FIG. 58. First, the main control CPU 600a determines whether the variation time set in the special symbol variation timer in step S314 of FIG. is confirmed (step S400). If the special symbol variation timer is not 0 (step S400: NO), the main control CPU 600a ends the special symbol variation process.

On the other hand, if the special symbol variation timer is 0 (step S400: YES), the main control CPU 600a transmits the symbol determination command as the effect control command DI_CMD to the sub control board 80 (sub control CPU 800a) (step S401). In response to this, the sub-control CPU 800a transmits to the VDP 803 a command list for determining the design at timing T6A shown in FIG. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(p), the liquid crystal display device 41 displays the stopped decorative pattern (see image P28A) and the stopped resident pattern (see image P29A). At this time, the resident symbols are switched to the stopped symbols regardless of the order of updating the symbols during fluctuation.

Next, the main control CPU 600a sets the special symbol operation status flag to 03H, and sets the special symbol fluctuating flag to 00H. Further, the main control CPU 600a sets the special symbol variation timer to a time of about 500 ms, for example, in order to maintain the result of the special symbol lottery for a certain period of time (step S402). After that, the main control CPU 600a ends the special symbol fluctuation process.

<Main control: Explanation of special symbol processing>
On the other hand, as shown in FIG. 50, when the value of the special symbol operation status flag is 03H, the main control CPU 600a indicates that the special symbol is being confirmed (indicating that the special symbol variation is finished and is stopped). It judges and performs processing during special design confirmation time (Step S207).

<Main control: Special symbol processing: Explanation of special symbol confirmation processing>
This process will be described in detail with reference to FIG. 59. First, the main control CPU 600a determines whether the variation time set in the special symbol variation timer in step S314 of FIG. is confirmed (step S450). If the special symbol variation timer is not 0 (step S450≠0), the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the special symbol variation timer is 0 (step S450=0), the main control CPU 600a sets the special symbol operation status flag to 01H (step S451), and whether the special symbol jackpot determination flag is set to ON. (Whether 5AH is set) is confirmed (step S452). If the special symbol jackpot determination flag is set to ON (if 5AH is set) (step S452: YES), the special symbol jackpot determination flag is set to 00H, and the special symbol jackpot operation flag is set to 5AH. , Then set 00H to the normal symbol time saving flag, set 00H to the normal symbol probability variation flag, further set 00H to the special symbol time saving flag, set 00H to the special symbol probability variation flag, and set 00H to the relief activation flag set. Further, a process of setting 00H to a special symbol time saving number counter, a special symbol probability variation number counter, and a relief number counter, which will be described later, is performed (step S453). After that, the main control CPU 600a ends the special symbol confirmation time process. In this embodiment, an example of setting 00H to the relief number counter at step S453 is shown, but at step S110 shown in FIG. Since an initial value is set to the relief number counter at this time, the processing for setting 00H to the relief number counter may be omitted to simplify the process. Further, in this embodiment, after setting 00H to the relief number counter or after not setting 00H to the relief number counter, in step S110 shown in FIG. 48, the initial value is set to the relief number counter. However, after 00H is set in the relief number counter or after 00H is not set in the relief number counter, 00H is set to the relief number counter at the point where the initial value is set to the relief number counter. is set anywhere, such as during processing in step S453, and is not particularly limited.

On the other hand, if the special symbol big hit determination flag is not set to ON (if 5AH is not set) (step S452: NO), the main control CPU 600a determines whether the special symbol small hit determination flag is set to ON ( 5AH is set) (step S454). If the special symbol small hit determination flag is set to ON (if 5AH is set) (step S454: YES), the special symbol small hit determination flag is set to 00H, and the special symbol small hit operation flag is set to 5AH. is set (step S455). In addition, when the small winning design and the special electric sapo design are used together, in preparation for the transition to the second time saving game state, the normal design time saving flag, the normal design probability variable flag and the special design time saving flag are turned ON (5AH set ), and set the number of times of time saving in the special symbol time saving number counter. Alternatively, in step S110 shown in FIG. 48, when the jackpot process starts, or when the jackpot process ends, the normal symbol time saving flag, normal symbol probability change flag and special symbol time saving flag are turned ON (set 5AH), Set the number of times of time saving in the special pattern time saving number counter. On the other hand, if the small winning symbol and the special electric sapo symbol are not used together, if the special electric sapo symbol hit determination flag is set to ON as in step S454, the special electric sapo symbol determination flag is set to 00H, As a preparation for shifting to the second time-saving game state, a normal pattern time-saving flag, a normal pattern probability variable flag and a special pattern time-saving flag are turned ON (5AH is set), and the number of times of time-saving is set in a special pattern time-saving counter.

After finishing the process of step S455, or if the special symbol small hit determination flag is not set to ON (if 5AH is not set) (step S454: NO), the main control CPU 600a special symbol time saving It is checked whether the value of the number counter is 0 (step S456).

If the value of the special symbol time saving number counter is not 0 (step S456: NO), the value of the special symbol time saving number counter is subtracted by 1 (-1) (step S457), and the main control CPU 600a again, the special symbol time saving number of times It is checked whether the value of the counter is 0 (step S458). Then, if the value of the special symbol time-reduction counter is 0 (step S458: YES), the normal symbol time-reduction flag is set to 00H, the normal symbol probability variation flag is set to 00H, and the normal symbol time-reduction flag is set to 00H. set. Further, an initial value is set in the relief number counter (step S459).

After finishing the process of step S459, or the value of the special symbol time saving number counter is 0 (step S456: YES), or the value of the special symbol time saving number counter is not 0 (step S458: NO), the main The control CPU 600a confirms whether or not the value of the special symbol probability variation counter is 0 (step S460). If the value of the special symbol probability variation counter is 0 (step S460: YES), the process proceeds to step S464.

On the other hand, if the value of the special symbol probability variation number counter is not 0 (step S460: NO), the main control CPU 600a subtracts 1 from the value of the special symbol probability variation number counter (-1) (step S461), and again special symbols It is checked whether the value of the probability variation number counter is 0 (step S462). If the value of the special symbol probability variation counter is not 0 (step S462: NO), the process proceeds to step S464.

On the other hand, if the value of the special symbol probability variation counter is 0 (step S462: YES), the main control CPU 600a sets the normal symbol probability variation flag to 00H, sets the normal symbol probability variation flag to 00H, and sets the special symbol probability variation flag to 00H. is set to 00H, the process of setting 00H to the special symbol probability variation flag is performed (step S463), and the process proceeds to step S464.

Next, the main control CPU 600a confirms whether or not the special symbol probability variation flag is ON (5AH is set) (step S464). If the special symbol probability variation flag is set to ON (if it is set to 5AH) (step S464: YES), the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the special symbol probability change flag is not set to ON (if not set to 5AH) (step S464: NO), the main control CPU 600a determines whether the special symbol time saving flag is set to ON (5AH is set) (step S465). If the special symbol time saving flag is set to ON (if it is set to 5AH) (step S465: YES), the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the special symbol time saving flag is not set to ON (if not set to 5AH) (step S465: NO), the main control CPU 600a confirms whether the value of the relief number counter is 0 (step S466). If the value of the relief number counter is 0 (step S466: YES), the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the value of the relief number counter is not 0 (step S466: NO), the value of the relief number counter is subtracted by 1 (-1) (step S467), and the main control CPU 600a again determines that the value of the relief number counter is It is checked whether it is 0 (step S468). If the value of the relief number counter is not 0 (step S468: NO), the main control CPU 600a ends the special symbol confirmation time processing. On the other hand, if the value of the relief number counter is 0 (step S468: YES), the main control CPU 600a turns on the special symbol time saving flag (sets 5AH) and sets the time saving number of times to the special symbol time saving number counter. Furthermore, the main control CPU 600a turns the relief activation flag ON (sets 5AH), turns the right-handed state flag ON (sets 5AH) (step S469), and ends the special symbol confirmation time processing. As described above, when the relief activation flag is set to ON, state transition information is output from an external terminal (not shown) in step S113 shown in FIG.

Thus, the relief number counter is set to 00H and cleared at step S26 shown in FIG. 45, and then set to an initial value at step S29 shown in FIG. And, in the normal game state, the count is executed in step S467 shown in FIG. 59, FIG. In this case, as indicated by step S465: YES in FIG. 49, the relief number counter is not cleared (00H is not set) and counting is not performed. 28(b) or, when the second time-saving game state (the state of the special symbol time-saving flag ON) shown in FIG. The initial value is set, FIG. 28 (b), or in the normal game state shifted from the second time-saving game state shown in FIG. 28 (c), the count is executed in step S467 shown in FIG. Become. As a result, the relief number counter is set to a value at an appropriate location and counted, so that wasteful processing can be omitted, thereby simplifying the processing.

By the way, in the present embodiment, when the special symbol probability variation flag is set to ON, the relief number counter is not subtracted. Even if there is, the relief number counter may be decremented. As a result, it is possible to reduce the frequency of reducing the player's possession balls (game balls). That is, although it is in the high probability game state, it is also possible that it is not in the high probability game state that is not in the electric sapo state. At that time, the player has to reduce the number of balls (game balls) held because the electric support state is not established in spite of the high probability game state. Therefore, even if the special symbol probability variation flag is set to ON, if the relief number counter is subtracted, if the deviation fluctuation continues for a predetermined number of times, as shown in FIG. Since it becomes a state, it is possible to reduce the frequency of reducing the player's possession balls (game balls).

Further, in the present embodiment, when the special symbol time saving flag is set to ON, the relief number counter is not subtracted. Even if there is, the relief number counter may be decremented. As a result, the burden on the player can be reduced. That is, as shown in FIGS. 28(b) and (c), when the second time-saving game state is performed a predetermined number of times, the second time-saving game state ends and the normal game state is entered. . At this time, if the number of fluctuations in the second time-saving game state is also counted as the number of fluctuations of a predetermined number of times shown in FIG. is repeated, it is possible to reduce the number of fluctuations until the transition to the second time-saving game state shown in the next FIG.

Further, the subtraction of the number of rescue counters may be executed regardless of whether or not there is an electric support if the game state is low probability. Even in a game state with a low-accuracy power support, the next hit is not confirmed, so by counting the deviation fluctuations until reaching the predetermined number of times shown in FIG. , Aiming at the 2nd time saving game state shown in FIG.28(b), the situation which continues a game forcibly can be suppressed.

The relief counter is composed of a 2-byte size counter. Therefore, in step S306 in FIG. 52, in transmitting the relief count command as the effect control command DI_CMD to the sub-control board 80 (sub-control CPU 800a), for example, the value of the relief counter is 1000 (03E8H in hexadecimal). Then, two commands of F603H+F7E8H are transmitted.

<Main control: Explanation of special symbol processing>
Thus, when any one of the steps S205, S206, and S207 shown in FIG. 50 is completed, the main control CPU 600a updates the special symbol display data (step S208), and then finishes the special symbol processing. .

<Main control: Description of processing outside of the used area>
Next, referring to FIG. 60, the out-of-use area processing will be described in detail. In this process, the total number of game balls shot into the game area 40 including the number of winning balls and the number of non-winning balls stored in the measurement program area 600be (see FIG. 7B) of the main control ROM 600b is calculated. It is done using the program used when measuring.

The main control CPU 600a saves all registers to the measurement stack area 600cg (see FIG. 7A) of the main control RAM 600c (step S500), and saves the stack pointer during normal processing to the measurement stack area of the main control RAM 600c. 600 cg (see FIG. 7A) (step S501).

Next, the main control CPU 600a sets the stack pointer address for outside the use area to the stack pointer inside the main control CPU 600a (step S502).

Next, the main control CPU 600a performs prize ball winning number management processing 2 (step S503). In this prize ball winning number management process 2, a process of displaying the performance display value calculated in the prize ball winning number management process 1 of step S45 shown in FIG. .

Next, the main control CPU 600a performs out-of-use area LED update processing (step S504).

Next, the main control CPU 600a has a special symbol 1 starter switch 44a (see FIG. 6), a special symbol 2 starter switch 45a (see FIG. 6), a normal symbol starter switch 47a (see FIG. 6), and an upper right general winning switch. 48a1 (see FIG. 6), upper left general winning slot switch 48b1 (see FIG. 6), middle left general winning slot switch 48c1 (see FIG. 6), lower left general winning slot switch 48d1 (see FIG. 6), out slot switch 49a (see FIG. 6), the outside-of-use area switch detection information such as the big winning opening switch 46c (see FIG. 6) is stored in the measurement RAM area 600ce (see FIG. 7A) of the main control RAM 600c (step S505).

Next, the main control CPU 600a performs a process of updating the test-firing test signal used when outputting various game-related signals to the testing machine in the gaming machine certification test (test-firing test) (step S506). The stack pointer during normal processing saved in the measurement stack area 600cg (see FIG. 8A) is restored (step S507), and all registers are restored (step S508).

Thus, according to this embodiment, the measurement/setting display device 610 displays the content (performance display) related to the ratio of how many prize balls are played when the probability is low, and a special game state advantageous to the player. It can also be used to display the setting contents of the probability of occurrence. Furthermore, the measurement/setting display device 610 has four 7 segments (a first measurement/setting display device 610A, a second measurement/setting display device 610B, a third measurement/setting display device 610C, a fourth measurement・Setting display device 610D), and when the content (performance display) related to the ratio of how many prize balls are played at the time of low accuracy is displayed, four 7 segments are used, and a special When the set content of the probability of generating a game state is displayed, one 7-segment is used. In addition, as shown in the setting switching process shown in FIG. 46, it is designed to be lit by a dynamic lighting method, but the content (performance display) related to the ratio of how many prize balls are played when the accuracy is low is displayed. When switching the common data, four 7 segments (first measurement/setting display device 610A, second measurement/setting display device 610B, third measurement/setting display device 610C, fourth measurement/setting display device 610C, fourth measurement/setting display device 610C) are displayed. display device 610D) is turned on, whereas in the setting switching process shown in FIG. The segment (first measurement/setting display device 610A) is lit.

Furthermore, when changing the setting of the probability of generating a special game state advantageous to the player, it is used during game processing such as lottery processing stored in the normal program area 600ba of the main control ROM 600b shown in FIG. 7(b). Data is output to the measurement/setting display device 610 using the program to be set (see the setting switching process shown in FIG. 46). On the other hand, when the contents (performance display) related to the ratio of how many prize balls are played at the time of low accuracy are displayed, the prize balls stored in the measurement program area 600be of the main control ROM 600b shown in FIG. Data is output to the measurement/setting display device 610 by using a program used for measuring the total number of game balls shot into the game area 40 including the number and non-winning number.

Thus, conventionally, in a situation where the program capacity is limited, there is a danger that the processing will become complicated and the program capacity will be squeezed. can be used as intended. When outputting data, the common data used for the special symbol 1 display device 50a and the like and the common data used for the measurement/setting display device 610 are different, but are output from one port. At this time, when changing the setting of the probability of generating a special game state advantageous to the player, only the common data displayed on the measurement/setting display device 610 is output (see steps S58 to S60 shown in FIG. 46). At times, the common data used for the special symbol 1 display device 50a and the like and the common data used for the measurement/setting display device 610 are output at the same timing. This allows for more efficient use of limited program capacity.

By the way, in this embodiment, different common data are output from one port, but they may be output from different ports. Even in this case, if the LED output counter described above is used in common, the program capacity can be reduced.

<Details of processing of the sub-control board>
11 to 27 and 28 will be specifically described with reference to the processing contents (outline of the program) of the sub-control board 80 shown in FIGS. 62 to 66. FIG.

First, when the pachinko game machine 1 is powered on, a power-on signal is sent from the power board 130 (see FIG. 6) to each control board to the effect that the power is turned on. Upon receiving the signal, the sub-control CPU 800a performs the main processing shown in FIG.

<Sub control: main processing>
As shown in FIG. 62, first, the sub-control CPU 800a initializes internal registers and sets the input/output direction of the input/output port. Further, the data transmitted from the output port set in the output direction is set to be serially transferred (step S1000).

Next, the sub-control CPU 800a initializes the memory area in the sub-control RAM 800c that stores the effect control command DI_CMD received from the main control board 60 (see FIG. 6) (step S1001). Then, the sub-control CPU 800a performs interrupt permission setting processing for the input port that receives the interrupt signal from the main control board 60 (step S1002).

Next, the sub-control CPU 800a initializes the memory area in the sub-control RAM 800c used as a work area and stack area (step S1003), and issues an initialization command to the sound LSI 801 (see FIG. 6). As a result, the sound LSI 801 initializes a register provided therein (step S1004).

Next, the sub-control CPU 800a determines whether or not an abnormality has occurred in the motor (not shown) that operates the upper/left/right/upper left movable accessories 43a to 43d (see FIG. 5). ) is stored in the memory area in the sub-control RAM 800c. If abnormal data is stored, the sub-control CPU 800a issues a command to return the motor to the origin position. As a result, the upper/left/right/upper left movable accessories 43a to 43d return to their initial positions (step S1005).

Next, the sub-control CPU 800a sets up a CTC (Counter Timer Circuit) having a function of generating a constant-cycle pulse output, a function of measuring time, and the like. That is, the sub-control CPU 800a sets the time constant register of the CTC so that the timer interrupt is periodically applied every 1 ms (step S1006).

Next, the sub-control CPU 800a performs a checksum operation, which is an 8-bit addition operation for the work area of the sub-control RAM 800c (step S1007), and stores the checksum operation value and a memory backup (see step S1015) described later. is compared with the checksum calculation value stored in the sub-control RAM 800c to confirm whether or not they match (step S1008). If they do not match (step S1008: NO), a process of clearing all areas in the sub-control RAM 800c is performed (step S1009).

On the other hand, after matching (step S1008: YES) or after completing the process of step S1009, the sub-control CPU 800a cancels the watchdog timer function (not shown) (step S1010), is refreshed (step S1011).

Next, the sub-control CPU 800a reads the effect control command DI_CMD received from the main control board 60 (see FIG. 6) stored in the memory area in the sub-control RAM 800c, and creates a effect pattern corresponding to the content of the command DI_CMD. It is determined by lottery from many production patterns stored in advance in the control ROM 800b (step S1012). At this time, when the customer waiting demo command is not provided and the game state shifts to the customer waiting demo state with the pattern confirmation command as a trigger, when the pattern confirmation command is received, a timer is started and counts for a predetermined time. It will happen.

Next, the sub-control CPU 800a performs a process of analyzing the input contents of the setting button 15 or the effect button device 13 acquired by the timer interrupt process (step S1013). Specifically, analysis is performed as to whether the setting button 15 or the effect button device 13 is pressed by the player, released, or kept pressed.

Next, the sub-control CPU 800a controls the operation of the upper/left/right/upper left movable accessories 43a to 43d (see FIG. 5) and the decorative lamp substrate 90 ( (see FIG. 6), controls the lighting or extinguishing of decorative lamps such as LED lamps, controls the speaker 17, and controls the image displayed on the liquid crystal display device 41 (step S1014). A specific processing method will be described later.

Next, the sub-control CPU 800a performs a checksum operation, which is an 8-bit addition operation, on the work area of the sub-control RAM 800c, and performs memory backup processing for storing the checksum operation value in the sub-control RAM 800c (step S1015).

Next, the sub-control CPU 800a confirms whether or not a VSYNC interrupt signal has been transmitted from the VDP 803 to the sub-control CPU 800a (step S1016). If the VSYNC interrupt signal has not been transmitted (step S1016: NO), the sub-control CPU 800a repeatedly executes the process of step S1016 until the VSYNC interrupt signal is transmitted. (Step S1016: YES), the process returns to step S1007, and the processes of steps S1007 to S1016 are repeated.

<Sub-control: data analysis processing>
Subsequently, referring to FIG. 63, the data analysis processing in step S1014 of the main processing will be described in detail. First, the sub-control CPU 800a selects the effect scenario data PS_DATA (see FIG. 8A) corresponding to the effect pattern determined by lottery in step S1012 from the effect scenario table PR_TBL, and stores it in the selected effect scenario data PS_DATA. Based on various data (frame data PS_DATA10, control code data PS_DATA11, coordinate data PS_DATA12, pixel calculation data PS_DATA13, scaling data PS_DATA14) stored in the 1 layer data PS_DATA1 stored in the VDP 803, an image to be displayed on the liquid crystal display device 41 A command list for generating data is generated (step S1050). At this time, the normal variation 12-second variation scenario SS_DATA for decorative symbols as shown in FIG. Variation scenario SS2_DATA during tenpai, variation scenario SS3_DATA during development of decorative symbol reach, decorative symbol SP reach variation scenario SS4_DATA shown in FIGS. Scenario SS5a_DATA, SP reach loss display scenario SS5b_DATA for decorative symbols shown in FIG. 25(b) is selected. At this time, a command list for generating image data to be displayed on the liquid crystal display device 41 as described with reference to FIGS. 28(b) and 28(c) is also generated.

Next, the sub-control CPU 800a sets the button data PS_DATA113 (see FIG. 8(c)) stored in the selected effect scenario data PS_DATA to the data indicating that the pressing effect of the effect button device 13 is valid or the setting button 15. If the data indicating that the repeated hit effect is effective is stored, the data is stored in the memory area in the sub-control RAM 800c.

Further, the sub-control CPU 800a generates a light-related control signal based on the data content of the lamp data PS_DATA17 (see FIG. 8(b)) stored in the selected effect scenario data PS_DATA, and stores it in the sub-control RAM 800c. , and store it in the At this time, a control signal relating to light for lighting the decoration lamp as described with reference to FIGS. 28(b) and 28(c) is also generated.

Further, the sub-control CPU 800a controls the top/left/right/upper left movable accessory 43a based on the data content of the movable accessory data PS_DATA16 (see FIG. 8(b)) stored in the selected production scenario data PS_DATA. 43d is determined, and motor data for the motor (not shown) of the movable accessory device 43 corresponding to the determined operation content is generated.

Furthermore, the sub-control CPU 800a generates a control signal regarding sound based on the data contents of the sound data PS_DATA15 (see FIG. 8(b)) stored in the selected effect scenario data PS_DATA (step S1051).

Thus, the sub-control CPU 800a repeats the processing of steps S1050 and S1051 until all the data based on the effect pattern determined by lottery in step S1012 shown in FIG. 62 is generated (step S1052: NO). When all the data have been generated (step S1052: YES), the process proceeds to step S1053.

Next, the sub-control CPU 800a executes the button valid time processing based on the contents stored in the sub-control RAM 800c in step S1051 and the input contents of the setting button 15 or effect button device 13 processed in step S1013 shown in FIG. (step S1053).

<Sub control: command reception interrupt processing>
Subsequently, with reference to FIG. 64, the processing when the effect control command DI_CMD and the interrupt signal are transmitted from the main control board 60 during execution of such main processing will be described.

As shown in FIG. 64, when the sub-control CPU 800a receives the interrupt signal, the sub-control CPU 800a executes save processing for saving the contents of each register to the stack area in the sub-control RAM 800c (step S1100). After that, the sub-control CPU 800a reads the register of the input port that received the effect control command DI_CMD (step S1101), and calculates a pointer indicating the address address of the command transmission/reception memory area in the sub-control RAM 800c (step S1102).

After that, the sub-control CPU 800a again reads the register of the input port that received the effect control command DI_CMD (step S1103), and determines whether the value read at step S1101 and the value read at step S1103 match. to confirm. If not matched (step S1104: NO), proceed to step S1107, if matched (step S1104: YES), the effect control command received from the main control board 60 to the address address corresponding to the pointer calculated above DI_CMD is stored (step S1105). It should be noted that this stored effect control command DI_CMD is read out to the sub-control CPU 800a during the process of step S1012 shown in FIG.

Next, the sub-control CPU 800a updates the pointer indicating the address of the command transmission/reception memory area in the sub-control RAM 800c (step S1106), and restores the register saved in the process of step S1100 (step S1107). As a result, the process returns to the main process shown in FIG.

<Sub control: timer interrupt processing>
Next, with reference to FIG. 65, processing when a timer interrupt occurs every 1 ms, which is set in the processing of step S1006 (see FIG. 62) of the main processing, will be described.

As shown in FIG. 65, the sub-control CPU 800a executes save processing for saving the contents of each register to the stack area in the sub-control RAM 800c when a timer interrupt occurs every 1 ms (step S1150).

Next, the sub-control CPU 800a acquires the data of the setting button 15, the data of the performance button device 13, the motor data of the movable accessory device 43, etc. twice (step S1151), and checks whether the data acquired twice match. Confirm whether or not (step S1152). If the data do not match (step S1152: NO), the sub-control CPU 800a repeats the process of step S1151 until the data match. (step S1153).

Next, the sub-control CPU 800a receives a signal from the setting button 15 or the effect button device 13 (step S1154). This received signal is analyzed by the button analysis processing in step S1013 shown in FIG.

Next, the sub-control CPU 800a transmits the light-related control signal stored in the sub-control RAM 800c in step S1051 shown in FIG. 63 to the decorative lamp board 90 (see FIG. 6) (step S1155). A control signal necessary to turn on or off the identification lamp device 50A (see FIG. 5) is also transmitted.

Next, the sub-control CPU 800a restores the register saved in the process of step S1150 (step S1156). As a result, the process returns to the main process shown in FIG.

<Sub control: command list>
Here, the command list generated in step S1050 shown in FIG. 63 will be described in detail using FIG.

This command list is a command string listing commands for the VDP 803 (command parser 8035). differ.

When instructing the VDP 803 to draw a moving image, the initial command list shown in FIG. 66(a) and the regular command list shown in FIG. 66(b) are configured.

As shown in FIG. 66(a), the sub-control CPU 800a first generates a command for setting the memory area of the DDR2 SDRAM 804 in which the frame buffer area is set and the memory area for storing the video data of the DDR2 SDRAM 804 ( step S1200). In setting the memory area of the DDR2SDRAM 804 in which the frame buffer area is set, the image size data PS_DATA 112 shown in FIG. 8C is referred to. That is, if the size is 640×320, for example, a memory area is set accordingly.

Next, a command for instructing decoding of moving images is generated (step S1201). Specifically, it is an instruction which moving image compression data is to be decoded, along with the address address of the CG data storage area of the game ROM 805 shown in FIG. . Address data PS_DATA111 shown in FIG. 8(c) is referred to for the address address of the CG data storage area in which the relevant moving image is stored, and the number of frames of the moving image is determined by frame data PS_DATA10 shown in FIG. 8(b). is referenced.

Next, a termination process command is entered to complete the generation of the initial command list (step S1202).

Subsequently, the sub-control CPU 800a generates a stationary command list shown in FIG. 66(b).

As shown in FIG. 66(b), this stationary command list is composed of moving image drawing instructions. A command is generated to indicate at which coordinate position drawing is to be performed (step S1203). Next, a termination process command is entered to complete the generation of the steady command list (step S1204). Note that frame data PS_DATA10, coordinate data PS_DATA12, pixel calculation data PS_DATA13, and scaling data PS_DATA14 shown in FIG.

On the other hand, when instructing the VDP 803 to draw a still image, as shown in FIG. 66(c), the sub-control CPU 800a first stores the memory area of the DDR2 SDRAM 804 in which the frame buffer area is set and the still image data. A command for setting the memory area of the built-in VRAM 8040 is generated (step S1210). In setting the memory area of the DDR2SDRAM 804 in which the frame buffer area is set, the image size data PS_DATA 112 shown in FIG. 8C is referred to. That is, if the size is 640×320, for example, a memory area is set accordingly.

Next, a command for instructing decoding of a still image is generated (step S1211). Specifically, it is an instruction which compressed still image data is to be decoded, together with the address address and data size of the CG data storage area of the game ROM 805 shown in FIG. 9 in which the corresponding still image is stored. The address of the CG data storage area in which the corresponding still image is stored refers to the address data PS_DATA 111 shown in FIG. Referenced.

Next, a command is generated to indicate at which coordinate position on the liquid crystal display device 41 and in what manner (rotational angle, reduction/enlargement, etc.) the decoded still image data should be drawn (step S1212). Next, a termination processing command is entered to complete the generation of the command list for the still image (step S1213). Note that frame data PS_DATA10, coordinate data PS_DATA12, pixel calculation data PS_DATA13, and scaling data PS_DATA14 shown in FIG.

Thus, the command list for moving images and the command list for still images are transmitted to the VDP 803 (see FIG. 9), processed as appropriate, and then transmitted to the liquid crystal display device 41 . Thereby, a desired image (for example, FIGS. 11, 20, and 26) is displayed on the liquid crystal display device 41. FIG.

Specifically, at the timing T1A shown in FIG. 12, the sub-control CPU 800a receives the variation pattern command transmitted as the effect control command DI_CMD from the main control board 60 (main control CPU 600a), FIG. As shown in (e), the liquid crystal display device 41 displays an image in which the decorative pattern and the resident pattern have changed. When FIG. 11(b) is displayed, the resident pattern is instantaneously switched to a predetermined resident pattern (see image P11A).

Thus, by starting the variation of the resident symbols from the predetermined symbols regardless of the last stop symbol, it is possible to prevent the player from erroneously recognizing the decorative symbols and the resident symbols. . Furthermore, the control can be simplified because the resident symbols are switched instantaneously.

Next, at timing T2A shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for high-speed variation of decorative symbols (left decorative design, middle decorative design, right decorative design). In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(f), an image is displayed on the liquid crystal display device 41 in which the decorative pattern (see image P18A) is changing at high speed.

Next, at timing T3A shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the left decorative pattern. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(g), an image in which the left decorative pattern (see image P19Aa) decelerates and fluctuates is displayed on the liquid crystal display device 41. FIG. At this time, the VDP 803 switches to a deceleration fluctuation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the left decorative pattern determined at the timing T1A shown in FIG. As a result, as shown in FIG. 11(g), an image in which the left decorative pattern (see image P19Aa) is decelerating and fluctuating is displayed on the liquid crystal display device 41, and furthermore, as shown in FIG. An image in which the decoration pattern (see image P20Aa) is decelerating and fluctuating is displayed on the liquid crystal display device 41 .

Next, at timing T3Aa shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for stopping or swinging the left decorative symbol. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 19(i), the left decorative design (see image P21Aa) becomes the stop design ("2" in the figure) of the left decorative design determined at timing T1A shown in FIG. A video that fluctuates is displayed on the liquid crystal display device 41 .

Next, at timing T4A shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the right decorative pattern. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(j), an image in which the right decorative pattern (see image P22Ac) decelerates and fluctuates is displayed on the liquid crystal display device 41. FIG. At this time, the VDP 803 switches to a decelerating variation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the right decorative pattern determined at the timing T1A shown in FIG. As a result, as shown in FIG. 11(j), an image in which the right decorative pattern (see image P22Ac) decelerates and fluctuates is displayed on the liquid crystal display device 41, and furthermore, as shown in FIG. An image in which the decoration pattern (see image P23Ac) is decelerating and fluctuating is displayed on the liquid crystal display device 41 .

Next, at timing T4Aa shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for stopping or swinging the right decorative symbol. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(l), the right decorative design (see image P24Ac) becomes the stop design ("3" in the drawing) of the right decorative design determined at timing T1A shown in FIG. A video that fluctuates is displayed on the liquid crystal display device 41 .

Next, at timing T5A shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the middle decorative pattern. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(m), the liquid crystal display device 41 displays an image in which the middle decorative pattern (see image P25Ab) is decelerating and fluctuating. At this time, the VDP 803 switches to a decelerating variation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the medium decoration pattern determined at the timing T1A shown in FIG. As a result, as shown in FIG. 11(m), an image in which the middle decorative pattern (see image P25Ab) is decelerating and fluctuating is displayed on the liquid crystal display device 41, and further, as shown in FIG. An image in which the decoration pattern (see image P26Ab) is decelerating and fluctuating is displayed on the liquid crystal display device 41 .

Next, at timing T5Aa shown in FIG. 12, the sub-control CPU 800a transmits to the VDP 803 a command list for stopping or swinging the middle decorative symbols. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 11(o), the middle decorative design (see image P27Ab) becomes the stop design ("5" in the illustration) of the middle decorative design determined at timing T1A shown in FIG. A video that fluctuates is displayed on the liquid crystal display device 41 .

Next, at the timing T6A shown in FIG. 12, when a pattern confirmation command is received as the effect control command DI_CMD from the main control board 60 (main control CPU 600a), the liquid crystal display device 41, as shown in FIG. A stopped decorative pattern (see image P28A) and a stopped resident pattern (see image P29A) are displayed. At this time, the resident symbols are switched to the stopped symbols regardless of the order of updating the symbols during fluctuation.

Thus, by doing so, it is only necessary to replace the changing resident symbols with the stationary symbols, so that the control can be simplified. Furthermore, the resident design can be replaced with the stop design without waiting for the timing of switching to the next resident design. At this time, the number of frames is smaller than the number of frames required until the next resident pattern is switched, but unlike the decorative pattern, the pattern does not fluctuate by scrolling, so that the player does not feel uncomfortable. Further, since the resident symbols can be stopped in the same state as the decorative symbols are stopped, it is possible to prevent the player from erroneously recognizing the decorative symbols and the resident symbols.

On the other hand, at timing T5Ab shown in FIG. 21, the sub-control CPU 800a transmits to the VDP 803 a command list for informing the liquid crystal display device 41 of reach. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(i), the text "reach!" is displayed on the liquid crystal display device 41 (see image P40A).

Further, at timing T5Ab shown in FIG. 21, the sub-control CPU 800a transmits to the VDP 803 a command list for decelerating and varying the middle decorative symbol. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIGS. 20(j) to (k), an image is displayed on the liquid crystal display device 41 in which the middle decorative pattern (see images P41Ab and P42Ab) is decelerating and fluctuating. At this time, the VDP 803 switches to a decelerating variation start pattern and displays it on the liquid crystal display device 41 in order to match the stop pattern of the medium decoration pattern determined at the timing T1A shown in FIG.

Thus, in this manner, as shown in FIG. 20(j), an image in which the middle decorative pattern (see image P41Ab) is decelerating and fluctuating is displayed on the liquid crystal display device 41, and further shown in FIG. 20(k). As shown, the liquid crystal display device 41 displays an image in which the middle decorative pattern (see image P42Ab) is decelerating and fluctuating.

Next, at timing T5Ac shown in FIG. 21, the sub-control CPU 800a transmits to the VDP 803 a command list for changing the left and right decorative patterns to numeric patterns and changing the middle decorative patterns at high speed. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(l), the left decorative design (see image P43Aa) and the right decorative design (see image P43Ac) are changed to number designs, and the middle decorative design (see image P43Ab) fluctuates at high speed. The image that is displayed is displayed on the liquid crystal display device 41 .

Next, the sub-control CPU 800a transmits to the VDP 803 a command list for displaying left and right decorative patterns in the upper corners of the screen. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(m), the left decorative pattern of the number pattern (see image P44Aa) is displayed in the upper left corner of the screen of the liquid crystal display device 41, and the right decorative pattern of the number pattern (see image P44Ac) is displayed on the liquid crystal display. It will be displayed in the upper right corner of the screen of the display device 41 .

Next, the sub-control CPU 800a transmits to the VDP 803 a command list for informing the liquid crystal display device 41 of the SP reach. In response, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41 . As a result, as shown in FIG. 20(n), characters "SP reach" are displayed on the liquid crystal display device 41 (see image P45A).

Thus, after the ready-to-win effect occurs, the decorative pattern is changed to only the number pattern, while the resident pattern continues to fluctuate only with the number pattern, and even if the ready-to-win effect occurs, it fluctuates without change. keep doing. As a result, it is possible to reduce the burden of controlling the resident symbols.

On the other hand, as shown in FIG. 27, when a variation pattern command transmitted from the main control board 60 (main control CPU 600a) is received at timing T1A, the resident pattern is displayed on the liquid crystal display device as shown in FIG. 26(a). 41, the static display (see image P50A) is shifted to the state of high-speed fluctuation display (see image P51A) as shown in FIG. 26(b). On the other hand, as for the decorative design, as shown in FIG. 26(b), an enlarged display is displayed on the liquid crystal display device 41 (see image P52A). This is one of the announcement effects using the decorative pattern. After that, at timing T1Aa shown in FIG. 27, the decorative pattern starts to fluctuate, and at timing T2A, a high-speed fluctuation display (see image P53A) is shown as shown in FIG.

Thus, even if the advance notice effect using the pattern is generated and the variation of the decorative pattern is started with a delay, by starting the variation of the resident pattern, the player can enjoy the variation of the pattern. can be reliably notified that has been started.

By the way, such a command list instructs to draw a still image after instructing to draw a moving image. That is, the sub-control CPU 800a selects one of the plurality of effect scenario data PS_DATA stored in the effect scenario table PR_TBL shown in FIG. This is because the scenario data PS_DATA is selected, and the 1-layer data PS_DATA1 stored in the selected effect scenario data PS_DATA are referenced in descending order of priority to generate the command list. That is, according to the present embodiment, control code data such that the data PS_DATA110 (see FIG. 8(c)) indicating a moving image is referenced from the control table CH_TBL shown in FIG. PS_DATA11 is stored, and the control code data PS_DATA11 is stored at a position having a higher priority so that the data PS_DATA110 (see FIG. 8(c)) indicating a still image is referenced from the control table CH_TBL shown in FIG. 8(c). Therefore, a command list for instructing drawing of a moving image is generated first, and then a command list for instructing drawing of a still image is generated. Thus, after the moving image data is drawn, the still image data is overwritten on the drawn moving image data, and image data to be displayed on the liquid crystal display device 41 is generated.

Thus, the image data is generated by overwriting the drawn moving image data with the still image data, so that the characters can be clearly displayed even if the compressed image is used.

Thus, according to the present embodiment described above, the payout operation is performed normally even if a power failure occurs in a situation where prize ball information to be paid out remains on the main control side.

On the other hand, according to the present embodiment, it is possible to add a purpose to the game in addition to the big win, and to reduce the disadvantage to the player due to the long-lasting state in which the big win is not won.

On the other hand, according to the present embodiment, it is possible to simplify the control of the resident symbols and prevent the player from erroneously recognizing the decorative symbols and the resident symbols.

Further, according to the present embodiment, it is possible to reduce the possibility that the game will be restarted while the game may still be affected.

Furthermore, according to this embodiment, the limited program capacity can be used efficiently.

Furthermore, according to this embodiment, the efficiency of development can be improved.

Furthermore, according to the present embodiment, it is possible to efficiently perform control and flexibly cope with data changes due to development.

In the present embodiment, only an example of lighting display as a display method of the measurement/setting display device 610 is shown, but the display of the measurement/setting display device 610 is blinked during setting change. You can do it.

Also, in this embodiment, an example in which the sound LSI 801 and the VDP 803 are configured separately has been shown, but they may be integrated as one chip.

Also, in this embodiment, the frame buffer area is set in the DDR2 SDRAM 804, but the frame buffer area may be set in the built-in VRAM 8040 instead.

Also, in this embodiment, an example in which the sub-control CPU 800a is provided in the sub-one-chip microcomputer 800 is shown, but the present invention is not limited to this, and the sub-control CPU 800a may be provided in the VDP 803.

1 pachinko game machine 60 main control board (main control means)
70 payout/launch control board (prize management means)
80 sub-control board (sub-control means)
600 One-chip microcomputer 600a Main control CPU (CPU)
600c Main control RAM (RAM)
643 WDT (abnormal reset signal generating means)
646 asynchronous serial communication circuit (CH0) (serial communication means, first serial transmission means)
647 asynchronous serial communication circuit (CH1) (serial communication means, second serial transmission means)
1310 voltage monitoring unit (voltage monitoring means)
1320 System reset generator (reset means)
ALARM Voltage error signal RST System reset signal (system reset)
TXBUF Transmit buffer register (first transmit buffer register, second transmit buffer register)

Claims (1)

a main control means including a CPU for overall control of game operations based on a predetermined game program and a RAM capable of storing various data;
sub-control means for controlling various performance operations;
award management means for managing awards given to players;
voltage monitoring means for generating a voltage abnormality signal that changes to an abnormal value when a voltage drop is detected;
serial communication means for serially transmitting predetermined data from the main control means;
backup processing means for creating backup data and storing it in the RAM when an abnormal value of the voltage abnormality signal generated by the voltage monitoring means is detected;
The serial communication means is
a first serial transmission means for serially transmitting first data relating to a prize to be given to a player to the prize management means;
a second serial transmission means for serially transmitting second data related to the performance operation to the sub-control means;
The predetermined game program is
In initial processing, setting a first baud rate in the first serial transmission means and a second baud rate in the second serial transmission means,
In regular processing after completion of initial processing, first transmission data setting processing for setting the first data to be serially transmitted to the first serial transmission means; executing a second transmission data setting process for setting 2 data and a backup process by the backup processing means;
After creating backup data in the backup process, a standby process is executed to wait until a voltage at which control of game operations cannot be executed is reached without executing the first transmission data setting process and the second transmission data setting process. death,
In the initial processing, when setting the first baud rate in the first serial transmission means, the backup processing is performed based on the transmission time until completion of serial transmission of the first data set in the first transmission data setting processing. setting the first baud rate in the first serial transmission means so that the time from the detection of the abnormal value of the voltage abnormality signal by the means to the voltage at which the control of the game operation cannot be executed becomes longer,
In the initial processing, when setting the second baud rate in the second serial transmission means, the backup processing is performed based on the transmission time until completion of serial transmission of the second data set in the second transmission data setting processing. setting the second baud rate in the second serial transmission means so that the time from the detection of the abnormal value of the abnormal voltage signal by the means to the voltage at which the control of the game operation cannot be executed becomes longer,
Even after the abnormal value of the voltage abnormality signal is detected, the timer interrupt processing executed based on the timer interrupt signal generated at predetermined time intervals can be executed,
In the timer interrupt process executed after detecting the abnormal value of the abnormal voltage signal, when the first data exists, only one first command is sent to the serial communication means as predetermined data to be serially transmitted. set, and after the first command is set, even if there is the first data, the serial communication means waits until the voltage reaches a level at which game operation control cannot be executed. (2) a gaming machine in which the first command is not set as predetermined data to be serially transmitted ;

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