JP7106452B2 - Conductor routing in integrated display and detector - Google Patents

Description

TECHNICAL FIELD The disclosed embodiments relate generally to capacitive sensing, and more particularly to routing conductors within an integrated display and sensing device.

Input devices including proximity sensor devices (also commonly referred to as touchpads or touch sensor devices) are widely used in various electronic systems. A proximity sensor device typically includes a detection area, often demarcated by a surface, within which the proximity sensor device determines the presence, position and/or movement of one or more input objects. Proximity sensor devices can be used to provide interfaces for electronic systems. For example, proximity sensor devices are often used as input devices for larger computing systems (such as opaque touchpads embedded in or peripheral to notebook or desktop computers). Proximity sensor devices are also often used within smaller computing systems (such as touch screens built into mobile phones).

Techniques for routing conductors within an integrated display and detector are described. In one embodiment, the input device includes a capacitive sensing device integrated with the display device. The input device further includes a plurality of sensor electrodes of the capacitive sensing device, each of the plurality of sensor electrodes including one or more common electrodes of the display device. The input device also includes a plurality of source lines disposed at least partially within the active portion of the display device. The input device also includes multiple routing traces. The plurality of routing traces includes a first routing trace, at least a first portion of the first routing trace parallel to and representing a first source line of the plurality of source lines in the first metal layer. Located within the active portion of the device. The plurality of routing traces further includes a second routing trace and a first of the second routing trace parallel to the first routing trace in the first metal layer and disposed within the active portion of the display. and a second portion of the second routing trace that intersects the first routing trace in a second metal layer in the non-active portion of the display, the second routing trace crossing the first routing trace. A via is coupled to a first sensor electrode of the plurality of sensor electrodes.

In another embodiment, a display device includes an active portion having multiple display electrodes, an inactive portion, multiple source lines disposed at least partially within the active portion, and multiple routing traces. The plurality of routing traces includes a first routing trace, at least a first portion of the first routing trace parallel to the first source line of the plurality of source lines and an active portion in the first metal layer. placed in The plurality of routing traces further comprises: a second routing trace, a first portion of the second routing trace parallel to the first routing trace in the first metal layer and disposed within the active portion; and a second portion of a second routing trace disposed within a second metal layer of the active portion and intersecting with the first routing trace, the second routing trace extending through the first via to the plurality of metal layers. It is coupled to a first display electrode of the display electrodes.

In another embodiment, a processing system for a capacitive sensing device and a display device includes a source driver configured to drive a plurality of source lines disposed at least partially within an active portion of the display device. The processing system further includes sensor circuitry configured to be coupled to a plurality of sensor electrodes of the capacitive sensing device via a plurality of routing traces, each of the plurality of sensor electrodes being connected to one or more commons of the display device. Including electrodes. The plurality of routing traces includes a first routing trace, at least a first portion of the first routing trace being parallel to the first of the plurality of source lines within the first metal layer and the display device. is placed in the active part of the The plurality of routing traces further comprises a second routing trace and a first portion of the second routing trace disposed within the active portion of the display parallel to the first routing trace within the first metal layer. and a second portion of a second routing trace disposed within a second metal layer within the non-active portion of the display device and intersecting the first routing trace, the second routing trace comprising: vias to a first sensor electrode of the plurality of sensor electrodes.

So that the above features of the invention can be understood in detail, the invention summarized above will now be described in more detail with reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings depict only typical embodiments of the invention and are therefore not intended to limit the scope of the invention, as other equally effective embodiments of the invention are permissible.

1 is a block diagram of an exemplary input device according to one embodiment described herein; FIG. 2 is a block diagram representing a capacitive sensing device of the input device of FIG. 1 according to some embodiments; FIG. 1 is an exploded view of a display device in one embodiment; FIG. 4 is a block diagram representing the display circuitry of the display device of FIG. 3 in one embodiment; FIG. FIG. 4A is a schematic cross-sectional view of a portion of a display stack in one embodiment; 4 is a plan view of a portion of the display device of FIG. 3 in one embodiment; FIG. 4 is a plan view of part of the display of FIG. 3 in another embodiment; FIG.

For ease of understanding, where possible, identical reference numerals have been used to denote identical elements that are common to the figures. Elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. It should be understood that the drawings referred to herein are not drawn to scale unless otherwise noted. Also, the drawings are often simplified and details or components are omitted for clarity of presentation and explanation. The drawings and discussion illustrate the principles set forth below in which like names refer to like elements.

FIG. 1 is a block diagram of a typical input device 100 according to embodiments of the invention. Input device 100 may be configured to provide input to an electronic system (not shown). As used in this document, the term "electronic system" (or "electronic device") broadly refers to any system capable of processing information electronically. Some non-limiting examples of electronic systems include personal computers of all sizes and shapes such as desktop computers, laptop computers, netbook computers, tablets, web browsers, e-book readers, personal digital assistants (PDAs), etc. included. Additional exemplary electronic systems include multiple input devices such as physical keyboards that include input device 100, separate joysticks or key switches. Still other exemplary electronic systems include peripherals such as data input devices (including remote controls and mice) and data output devices (including display screens and printers). Other examples include remote terminals, kiosks, and video game consoles (eg, video game consoles, handheld game consoles, etc.). Other examples include communication devices (including mobile phones such as smart phones) and media devices (including recorders, editors, and playback devices such as televisions, set-top boxes, music players, digital photo frames and digital cameras). included. Further, the electronic system can be either host or slave to the input device.

Input device 100 may be implemented as a physical part of an electronic system or may be physically separate from the electronic system. If desired, input device 100 may communicate with portions of the electronic system using one or more of buses, networks, and other wired or wireless interconnections. Examples include I2C, SPI, PS/ ² , Universal Serial Bus (USB), Bluetooth, RF and IRDA.

In FIG. 1, input device 100 includes a proximity sensor device (often referred to as a “touchpad” or “touch sensor device”) configured to detect input provided by one or more input objects 140 within sensing area 120. called). Exemplary input objects include fingers and styluses as shown in FIG.

Detection region 120 encompasses any space above, around, in, and/or near input device 100 in which input device 100 can detect user input (eg, user input provided by one or more input objects 140). do. The size, shape and location of a particular detection area can vary widely between embodiments. In some embodiments, the detection region 120 extends in one or more directions into space from the surface of the input device 100 until the signal-to-noise ratio prevents sufficiently accurate object detection. The distance that this detection region 120 extends in a particular direction may, in various embodiments, be less than about a millimeter, a few millimeters, a few centimeters or more, and can vary widely depending on the type of detection technology used and the accuracy required. Accordingly, some embodiments include no contact with any surface of the input device 100, no contact with the input surface (e.g., touch surface) of the input device 100, no amount of applied force or pressure coupled with the input device. Detects input including contact with 100 input surfaces and/or combinations thereof. In various embodiments, the input surface may be provided by a surface of the casing in which the sensor electrodes are located, a surface plate affixed over the sensor electrodes or any casing, or the like. In some embodiments, detection area 120 has a rectangular shape when projected onto the input surface of input device 100 .

Input device 100 may utilize any combination of sensor components and detection techniques to detect user input within detection area 120 . The input device 100 has one or more sensing elements for sensing user input. As some non-limiting examples, the input device 100 can use capacitive, elastic, resistive, inductive, magnetic, acoustic, ultrasonic, and/or optical technologies.

Some embodiments are configured to provide images that span one, two, three, or higher dimensional spaces. Some implementations are configured to provide a projection of the input along a particular axis or plane.

In some capacitive implementations of input device 100, a voltage or current is applied to create an electric field. A nearby input object modifies the electric field, producing a detectable change in capacitive coupling that can be detected as a change in voltage, current, or the like.

Some capacitive implementations utilize an array or other regular or irregular pattern of capacitive sensing elements to create an electric field. In some capacitive implementations, individual sensing elements can be ohmically shorted to form a larger sensor electrode. Some capacitive implementations utilize resistive sheets that can be of uniform resistance.

Some capacitive implementations utilize a "self-capacitance" (or "absolute capacitance") sensing method based on changes in capacitive coupling between the sensor electrode and the input object. In various embodiments, an input object near the sensor electrodes changes the electric field near the sensor electrodes, thereby changing the measured capacitive coupling. In one implementation, the absolute capacitance detection method works by modulating the sensor electrode with respect to a reference voltage (eg, grid ground) and detecting capacitive coupling between the sensor electrode and the input object.

Some capacitive implementations utilize "mutual capacitance" (or "transcapacitance") sensing methods based on changes in capacitive coupling between sensor electrodes. In various embodiments, an input object near the sensor electrodes changes the electric field between the sensor electrodes, thus changing the measured capacitive coupling. In one embodiment, the transcapacitive sensing method comprises one or more transmitter sensor electrodes (also "transmitter electrodes" or "transmitter") and one or more receiver sensor electrodes (also "receiver electrodes" or "receiver"). It works by detecting capacitive coupling between The transmitter sensor electrodes transmit transmitter signals modulated with respect to a reference voltage (eg, grid ground). The receiver sensor electrodes can be held substantially constant with respect to a reference voltage to facilitate reception of the resulting signal. The resulting signal may include effects corresponding to one or more transmitter signals and/or one or more sources of environmental interference (eg, other electromagnetic signals). The sensor electrodes may be dedicated transmitters or receivers, and may be configured to both transmit and receive.

In FIG. 1, processing system 110 is shown as part of input device 100 . Processing system 110 is configured to activate the hardware of input device 100 to detect input within detection region 120 . Processing system 110 includes some or all of one or more integrated circuits (ICs) and/or other circuit components. For example, a processing system for a mutual capacitance sensor device may include transmitter circuitry configured to transmit signals via transmitter sensor electrodes and/or receiver circuitry configured to receive signals via receiver sensor electrodes. In some embodiments, processing system 110 also includes electronically readable instructions, such as firmware code, software code, and the like. In some embodiments, the components that make up processing system 110 are placed together, such as near the sensing elements of input device 100 . In other embodiments, the components of processing system 110 are physically separate, with one or more components proximate to sensing elements of input device 100 and one or more components elsewhere. . For example, input device 100 may be a peripheral device coupled to a desktop computer, and processing system 110 may be a central processing unit of the desktop computer and one or more ICs (often associated with firmware) separate from the central processing unit. software configured to operate on a computer). As another example, input device 100 may be physically embedded in a telephone, and processing system 110 may include circuitry and firmware that is part of the telephone's main processor. In some embodiments, processing system 110 is dedicated to implementing input device 100 . In other embodiments, processing system 110 also performs other functions, such as activating a display screen and driving haptic actuators.

Processing system 110 may be implemented as a set of modules that handle various functions of processing system 110 . Each module may include circuitry, firmware, software, or combinations thereof that are part of processing system 110 . Various combinations of modules may be used in various embodiments. Exemplary modules include hardware actuation modules for operating hardware such as sensor electrodes and display screens, data processing modules for processing data such as sensor signals and position information, and reporting modules for reporting information. Contains modules. Still other exemplary modules include a sensor actuation module configured to activate a sensing element that detects input, an identification module configured to identify a gesture such as a mode change gesture, and a Includes a mode change module for

In some embodiments, processing system 110 responds directly to user input (or lack of user input) within detection region 120 by invoking one or more actions. Exemplary actions include changing operating modes and GUI actions such as cursor movement, selection, menu navigation, and other functions. In some embodiments, processing system 110 passes information about the input (or lack of input) to some part of the electronic system (e.g., processing system 110 if there is such a separate central processing system). provided to a separate electronic system central processing system). In some embodiments, some portion of the electronic system processes information received from processing system 110 and acts on user input to facilitate any actions, including, for example, mode change actions and GUI actions.

For example, in some embodiments, processing system 110 actuates sensing elements of input device 100 to generate electrical signals indicative of input (or lack of input) within sensing region 120 . Processing system 110 may perform any suitable amount of processing on the electrical signals in generating information to be provided to the electronic system. For example, processing system 110 digitizes analog electrical signals obtained from the sensor electrodes. As another example, processing system 110 performs filtering and other signal conditioning. As yet another example, processing system 110 may subtract or otherwise account for the baseline so that the information reflects the difference between the electrical signal and the baseline. As yet another example, processing system 110 may determine location information, recognize inputs as commands, recognize handwriting, and the like.

"Positional information" as used herein broadly includes absolute position, relative position, velocity, acceleration and other types of spatial information. Exemplary "zero-dimensional" location information includes near/far or contact/non-contact information. Typical "one-dimensional" positional information includes position along an axis. Typical "two-dimensional" positional information includes in-plane motion. Typical "three-dimensional" position information includes instantaneous or average velocity in space. Still other examples include other representations of spatial information. Also, historical data relating to one or more types of location information may be determined and/or stored, including, for example, historical data tracking position, motion, or instantaneous velocity over time.

In some embodiments, input device 100 is implemented with additional input components operated by processing system 110 or other processing systems. Such additional input components can provide redundant or other functionality for inputs within sensing region 120 . FIG. 1 shows buttons 130 near detection area 120 that may be used to facilitate selection of items using input device 100 . Other types of additional input components include sliders, balls, wheels, switches, and the like. Conversely, in some embodiments, input device 100 may be implemented without other input components.

In some embodiments, input device 100 includes a touch screen interface and sensing area 120 overlaps at least a portion of the active area of the display screen. For example, input device 100 can include substantially transparent sensor electrodes that cover a display screen to provide a touch screen interface for associated electronic systems. The display screen can be any type of dynamic display capable of presenting a visual interface to a user, including any type of light emitting diode (LED), organic LED (OLED), cathode ray tube (CRT), liquid crystal display (LCD). , plasma, electroluminescence (EL) or other display technologies. The input device 100 and the display screen can share physical elements. For example, some embodiments can utilize some of the same electrical components for display and detection. As another example, the display screen may be partially or wholly operated by the processing system 110 .

Although many embodiments of the invention are described in the context of a fully functional device, it should be understood that the features of the invention may be distributed in various forms as a program product (eg, software). For example, mechanisms of the present invention may be implemented by executing software programs on an information-bearing medium readable by an electronic processor (eg, a non-transitory computer-readable and/or recordable/writable information-bearing medium readable by processing system 110). can be implemented and distributed as Moreover, embodiments of the present invention apply equally regardless of the particular type of medium used to carry out the distribution. Examples of non-transitory electronically readable media include various discs, memory sticks, memory cards, memory modules, and the like. Electronically readable media may be based on flash, optical, magnetic, holographic, or other storage technology.

FIG. 2 is a block diagram illustrating a capacitive sensing device 200 of input device 100 according to some embodiments. For clarity of illustration and description, FIG. 2 shows the sensing elements of the capacitive sensing device 200 in a rectangular matrix and does not show various components such as various interconnections between the sensing elements and the processing system 110. Electrode pattern 250 includes a plurality of sensor electrodes 260 arranged in a rectangular matrix with grid electrodes 270 disposed therebetween. The sensor electrodes 260 are arranged in J rows and K columns, where J and K are positive integers, but one of J and K can be zero. Electrode pattern 250 may include other patterns of sensor electrodes 260, such as polar arrays, repeating patterns, non-repeating patterns, non-uniform arrays, single rows or columns, or other suitable arrays. Further, the sensor electrodes 260 can be any shape, such as circular, rectangular, diamond, star, square, non-convex, convex, non-concave, concave, and the like. Further, sensor electrode 260 may be subdivided into a plurality of separate sub-electrodes. The grid electrode 270 may be divided into multiple electrodes. In the example of FIG. 2, electrode pattern 250 includes a plurality of grid electrodes 270-1 through 270-N, where N is a positive integer. Grid electrodes 270-1 through 270-N may be electrically coupled to each other or may be electrically isolated from each other.

Sensor electrodes 260 are typically separated from each other by ohmic resistors. Additionally, if the sensor electrode 260 includes multiple sub-electrodes, the sub-electrodes can be separated from each other by ohmic resistances. Further, in one embodiment, the sensor electrodes 260 may be separated from the grid electrodes 270 between the sensor electrodes 260 with an ohmic resistance. In one example, grid electrode 270 can surround one or more of sensor electrodes 260 positioned within window 216 of grid electrode 270 . Grid electrode 270 may be used as a shield and may be used to carry a guard signal for use when capacitive sensing is performed by sensor electrode 260 . Alternatively or additionally, grid electrode 270 may be used as a sensor electrode when performing capacitive sensing. Additionally, grid electrode 270 may be coplanar with sensor electrode 260, but this is not a requirement. For example, the grid electrode 270 may be placed on a different substrate, and may be placed on a different side of the same substrate than the sensor electrode 260 . Grid electrode 270 is optional and in some embodiments grid electrode 270 is absent. In another embodiment, the sensor electrodes 260 can overlap a portion of the grid electrodes 270 . The overlap occurs in areas where the sensor electrode 260 and grid electrode 270 are isolated from each other (eg, using various layers or jumpers). Sensor electrodes 260 , grid electrodes 270 , or both may be positioned within sensing region 120 . Electrode pattern 250 is coupled to processing system 110 by routing traces (described below).

Processing system 110 may include front end 208 having sensor circuitry 204 . The sensor circuit 204 actuates the electrode pattern 250 and receives result signals from the sensor electrodes using capacitive sensing signals having a sensing frequency. Processing system 110 may include a processing module 220 configured to determine a capacitance measurement from the resulting signal. Processing module 220 may include processor circuitry such as a digital signal processor (DSP), microprocessor, or the like. Processing module 220 may include software and/or firmware configured to be executed by processor circuitry to perform various functions, such as determining object position from result signals. Alternatively, some or all of the functionality of processing module 220 may be implemented entirely in hardware (eg, using integrated circuits). The processing module 220 can track changes in capacitance measurements to detect input objects within the detection region 120 . Although processing system 110 may include other modular configurations, the functions performed by front end 208 and processing modules 220 may generally be performed by one or more modules or circuits within processing system 110 . Processing system 110 may include other modules and circuits and may perform other functions as described below in some embodiments.

The processing system 110 can operate in an absolute capacitance detection mode or a transcapacitance detection mode. In absolute capacitive sensing mode, a receiver in sensor circuit 204 measures voltage, current, or charge on sensor electrodes 260 of electrode pattern 250, which are modulated with an absolute capacitive sensing signal to produce a result signal. do. Processing module 220 produces an absolute capacitance measurement from the resulting signal. Processing module 220 can track changes in absolute capacitance measurements to detect input objects within detection region 120 .

In transcapacitive sensing mode, some electrodes 260 may be transmitter electrodes and other electrodes 260 may be receiver electrodes. Alternatively, grid electrodes 270 can include transmitter electrodes and sensor electrodes 260 can include receiver electrodes. The sensor circuit 204 drives one or more transmitter electrodes with a capacitive sensing signal (also called transmitter signal or modulating signal in transcapacitive sensing mode). A receiver in sensor circuit 204 measures voltage, current or charge at one or more receiver electrodes to generate a result signal. The resulting signal includes the capacitive detection signal and the effect of the input object within the detection area 120 . Processing module 220 produces a transformer capacitance measurement from the resulting signal. The processing module 220 can track changes in transformer capacitance measurements to detect input objects within the detection region 120 .

In some embodiments, processing system 110 "scans" electrode pattern 250 to determine capacitance measurements. In trans-capacitance detection mode, processing system 110 may operate electrode pattern 250 such that one transmitter electrode transmits at a time or multiple transmitter electrodes transmit simultaneously. When multiple transmitter electrodes transmit simultaneously, the multiple transmitter electrodes can transmit the same transmitter signal, creating a substantially larger transmitter electrode, or the multiple transmitter electrodes can transmit different transmitter signals. can. For example, multiple transmitter electrodes can transmit different transmitter signals according to one or more encoding schemes that allow the combined effects on the resulting signal of the receiver electrodes to be determined independently. In the absolute capacitance detection mode, the processing system 110 may receive result signals from one sensor electrode 260 at a time, or from multiple sensor electrodes 260 at a time.

In either detection mode, the processing system 110 can use the resulting signal to determine capacitance measurements at the capacitance pixels. A set of measurements from the capacitive pixels constitutes a "capacitive image" (also called a "capacitive frame") representing the capacitive measurements at the pixels. Processing system 110 can acquire multiple volume images over multiple time periods and determine differences between the volume images to derive information about the input within detection region 120 . For example, processing system 110 can track the motion of one or more input objects into and out of detection region 120 using successive volumetric images acquired over successive periods of time.

The baseline capacity of input device 100 is the capacity image or profile associated with the absence of input objects within detection region 120 . Baseline capacity varies with environmental and operating conditions, and processing system 110 can assess baseline capacity in a variety of ways. For example, in some embodiments, the processing system 110 obtains a "baseline image" or "baseline profile" when it is determined that there are no input objects in the detection area 120, and these baseline images or Use the baseline profile as an assessment of baseline capacity. Processing module 220 can consider the baseline capacity in the capacity measurement, and thus the capacity measurement can be referred to as a "delta capacity measurement." Accordingly, the term "capacity measurements" as used herein includes delta measurements relative to the determined baseline.

In some touch screen embodiments, at least one of the sensor electrodes 260 is connected to the display screen, such as one or more segments of a "Vcom" electrode (common electrode), gate electrode, source electrode, anode electrode and/or cathode electrode. includes one or more display electrodes of the display device 280 used to update the display of the . These display electrodes can be arranged on a suitable display screen substrate. For example, the display electrodes may be connected to a transparent substrate (glass substrate, TFT glass, or other transparent material) in some display screens (e.g., in-plane switching (IPS) or in-plane switching (PLS) organic light emitting diodes (OLED)). It may be placed on top of, on the underside of some display screens (eg, patterned vertically aligned (PVA) or multi-domain vertically aligned (MVA)) color filter glass, on top of the emissive layer (OLED), and the like. Since the display electrodes also perform the functions of display updating and capacitive sensing, the display electrodes may also be referred to as "common electrodes." In some embodiments, at least one of grid electrodes 270 includes one or more common electrodes. In various embodiments, each electrode of sensor electrode 260 and/or grid electrode 270 includes one or more common electrodes. In other embodiments, at least two of the sensor electrodes 260 or at least two of the grid electrodes 270 can share at least one common electrode. Further, in one embodiment, both the sensor electrodes 260 and the grid electrodes 270 are arranged in a display stack on the display screen substrate. An exemplary display stack is described below with respect to FIG. However, in other embodiments, only the sensor electrode 260 or the grid electrode 270 (but not both) are positioned within the display stack and the other sensor electrodes are outside the display stack (eg, on opposite sides of the color filter glass). placed).

In one embodiment, processing system 110 includes a single integrated controller such as an application specific integrated circuit (ASIC) having front end 208, processing module 220, and other modules and/or circuits. In another embodiment, processing system 110 may include multiple integrated circuits, in which case front end 208, processing module 220, and other modules and/or circuits may be divided among the integrated circuits. For example, front end 208 may be on one integrated circuit, and processing module 220 and other modules and/or circuits may be on one or more other integrated circuits. In some embodiments, a first portion of front end 208 may reside on one integrated circuit and a second portion of front end 208 may reside on a second integrated circuit. In such embodiments, at least one of the first and second integrated circuits includes at least a portion of a display driver module and/or other modules such as a display driver module.

FIG. 3 is an exploded view of a display device 280 according to one embodiment. Capacitive sensing device 200 is integrated with display device 280 . Display device 280 generally includes a plurality of transparent substrates positioned over a first substrate, referred to herein as thin film transistor (TFT) glass 302 . Active elements 304 are formed on the TFT glass 302 . Active device 304 includes a TFT layer (described below and referenced using reference numeral 304) that forms a display update circuit configured to update a plurality of pixels. The TFT layer of active device 304 can be electrically coupled to display electrodes, including pixel electrodes (not shown) and Vcom electrode 306 . In one embodiment, Vcom electrode 306 is disposed on TFT glass 302 . In the illustrated embodiment, the Vcom electrode 306 is located on the upper TFT layer of the active device 304 . In some embodiments, the Vcom electrode 306 is split into multiple common electrodes and used for both display updating and capacitive sensing. Vcom electrodes 306 may also include electrodes that are used only for display updating.

Display device 280 includes a second substrate, referred to herein as color filter glass 312 , lens 318 , optional polarizer 316 , and optional anti-shutter film 314 . A display material layer 308 (eg, liquid crystal) is disposed between the color filter glass 312 and the TFT glass 302 . In one embodiment, layer 310 between color filter glass 312 and display material 308 includes one or more color filters and a black mask. The area between and including color filter glass 312 and TFT glass 302 is referred to herein as display stack 350 .

In one embodiment, the sensor electrodes of capacitive sensing device 200 are disposed at least partially within display stack 350 . A first plurality of sensor electrodes (eg, sensor electrodes 260) that may be operated as receiver electrodes may be disposed between color filter glass 312 and display material 322 (eg, within layer 310). Additionally, a second plurality of electrodes (eg, grid electrode 270 and/or sensor electrode 260 ) that may be driven as transmitter electrodes may be the common electrode of Vcom electrode 306 . In other embodiments, the first plurality of sensor electrodes may be positioned external to display stack 350 , such as on color filter glass 312 outside display stack 350 . In another embodiment, all electrodes (eg, sensor electrodes 260 and grid electrodes 270 ) are arranged within display stack 350 . In one such embodiment, a first plurality of electrodes can be operated as receiver electrodes and a second plurality of electrodes can be operated as transmitter electrodes. Further, in such embodiments, the sensor electrodes 260 can be arranged as a plurality of matrix electrodes and operated as absolute capacitive sensing electrodes and/or as transmitter and receiver electrodes.

FIG. 4 is a block diagram illustrating display circuitry 450 of display device 280 in accordance with one embodiment. Display circuitry 450 may be configured within active device 304 of display stack 350 . Display circuitry 450 is coupled to source driver 212 and gate select circuitry 214 . In one embodiment, source driver 212 is part of display diverter circuit 210 in front end 208 of processing system 110, as shown in FIG. That is, front end 208 of processing system 110 may be configured to perform both display updating and capacity detection. In one embodiment, display driver circuitry 210 may also include gate select circuitry 214 . In other embodiments, gate selection circuit 214 may be located external to processing system 110 (eg, a gate-in-panel (GIP) type display).

Returning to FIG. 4, source driver 212 is coupled to source line 408 of display circuit 450 . Gate select circuit 214 is coupled to gate line 406 of display circuit 450 . Display circuitry 450 includes a plurality of pixels 404 , each of which is coupled to one or more TFTs 402 . The source of each TFT 402 is coupled to a respective source line. The gate of each TFT 402 is coupled to a respective gate line. The drain of each TFT 402 is coupled to the pixel electrode of each pixel 404 . Each source line 408 drives a TFT in one column of pixels 404 . Each gate line 406 drives a TFT in a row of pixels 404 . Pixels 404 are used to display an image on the display screen. By adjusting the gate voltage provided by the gate select circuit 214 and the power supply voltage provided by the source driver 212, the display driver circuit 210 can configure the pixels 404 to display an image on the display screen.

FIG. 5 is a schematic cross-sectional view of a portion of display stack 350 according to one embodiment. In an embodiment, active device 304 on TFT glass 320 includes multiple TFT layers 503 . TFT layer 503 includes metal layers M 1 , M 2 and M 3 and layers 512 and 514 . The metal layer M1 is also called "first metal layer", the metal layer M2 is also called "second metal layer", and the metal layer M3 is also called "third metal layer". Display stack 350 includes an active portion 504 and an inactive portion 502 . Active portion 504 includes display circuitry 450 . The non-active portion 502 is a region on the TFT glass 302 that does not include TFTs, pixel electrodes, display materials, etc. that constitute the display circuit 450 . Although three metal layers are shown in this example, in other embodiments, TFT layer 503 may include only two metal layers.

Metal layer M3 may be patterned to form the gate electrode of TFT 402 in active portion 504 . Additionally, metal layer M3 may be patterned to form capacitor electrodes within active portion 504 (not shown). Layer 512 may include one or more insulator layers that electrically isolate metal layer M2 from metal layer M3. Additionally, layer 512 may include one or more semiconductor layers disposed between metal layer M2 and metal layer M3 in active portion 504 . Metal layer M2 can be patterned to form the source and drain electrodes of TFT 402 in active portion 504 . Layer 514 may include one or more insulating layers that electrically isolate metal layer M1 from metal layer M2. Layer 514 may also include a transparent metal layer that may be formed within the pixel electrodes. The drain of each TFT 402 is coupled to a respective pixel electrode. In some two-layer embodiments, layers M1 and M2 are replaced by a single metal layer.

Metal layer M3 may also be patterned to form gate lines 406 electrically coupled to the gate electrodes of TFTs 402 . Metal layer M2 may also be patterned to form source lines 408 that are electrically coupled to the source electrodes of TFTs 402 . Source line 408 may be partially disposed within active portion 504 and partially disposed within inactive portion 502 . In one embodiment, gate line 406 may be partially disposed within active portion 504 and partially disposed within inactive portion 502 . In other embodiments, gate line 406 may be located entirely within active portion 504 (eg, a GIP display).

Metal layer M1 may be patterned to form routing traces electrically coupled to Vcom electrodes 306 . In the example shown, Vcom electrode 306 is electrically isolated from metal layer M1 by insulator layer 516 . Vias 516 may be formed in insulator layer 516 to electrically couple particular routing traces formed in metal layer M1 with particular Vcom electrodes 306 . Routing traces may be located partially within active portion 504 and partially within inactive portion 502 . In one embodiment, metal layer M1 can be patterned to provide routing traces that are electrically coupled to other sensor electrodes, such as receiver electrodes. For example, receiver electrodes can be placed between the color filter glass 312 and the display material 308 . The display stack 350 may include metal pillars or the like (not shown) that electrically couple the metal layer M1 and the routing traces patterned on the receiver electrodes.

Integrated circuit 506 may be electrically and mechanically coupled to TFT layer 304 in non-active portion 502 . Integrated circuit 506 may include processing system 110 . Integrated circuit 506 includes a plurality of pins 508 electrically and mechanically attached to TFT layer 304 . In the example shown, pins 508 of integrated circuit 506 are electrically coupled to bond pads patterned in metal layer M1. The bond pads may be electrically coupled to routing traces patterned on layer M1. The bond pads may also be electrically coupled to metal layer M2, metal layer M3, or both through vias. For example, vias 522 may be formed through layer 514 to electrically couple bond pads on metal layer M1 to conductors patterned on metal layer M2, such as source lines. In layer 512 are vias 520 which, when combined with metal layer M2 and conductors in vias 522, electrically couple bond pads on metal layer M1 to patterned conductors on metal layer M3, such as gate lines. can be formed. In various embodiments described below, the metal layers M1, M2 and M3 in the non-active areas are patterned to include conductors that electrically couple the routing traces to the integrated circuit 506 using non-parallel paths. sell. In some embodiments, a via can extend between metal layer M3 and metal layer M1.

In particular, routing traces electrically coupled to Vcom electrodes 306 are hidden by a black mask. To prevent crosstalk and local imbalance of capacitance within the active portion 504 on a common layer, routing traces cannot cross source lines within the active portion 504 . In one implementation, routing traces may be routed around the active portion 504 within the boundaries of the display device. However, in other implementations, the display device does not include such boundaries. Therefore, within the active portion 504, the routing traces must be routed parallel to and between the source lines. Parallel routing traces and source lines may extend from active portion 504 to couple to integrated circuit 506 located within inactive portion 502 . However, integrated circuit 506 is required to include all pins 508 to allow routing traces and source lines to run parallel to one side adjacent active area 504 . This reduces the layout flexibility of processing system 110 within integrated circuit 506 . For example, sensor circuitry 204 should be placed between source drivers 212 rather than within a separate area of integrated circuit 506 . Running routing traces and source lines parallel to integrated circuit 506 results in inefficient use of packaging area within integrated circuit 506 . Thus, in an embodiment, the metal layer of TFT layer 304 in non-active portion 502 is patterned to allow flexibility in extending routing traces from active portion 504 to integrated circuit 506 . The metal layers of the TFT layer 304 within the non-active portion 502 are patterned to provide non-parallel extensions of routing traces between the active portion 504 and the integrated circuit 506, including intersections of routing traces on different metal layers. can be

FIG. 6 is a plan view of a portion of display device 280 in accordance with one embodiment. FIG. 6 shows a plan view of TFT glass 302 including both active portion 504 and inactive portion 502 . An integrated circuit 506 is mounted within the non-active portion 502 . Source line 408 is disposed at least partially within active portion 504 . In the example, source line 408 A (also referred to as a “first source line”) is patterned on metal layer M 2 and extends partially within active portion 504 and partially within inactive portion 502 . Source line 408 A is electrically coupled to pin 508 B of integrated circuit 506 through via 522 . Source lines 408A are arranged perpendicular to gate lines 406A patterned on metal layer M3. Source line 408A is coupled to the source electrode of TFT 620A and gate line is coupled to the gate electrode of TFT 620A.

Routing traces 608B (also called "first routing traces") are patterned in metal layer M1. Routing trace 608B includes a first portion 622 disposed within active portion 504 parallel to source line 408A. A first portion 622 of routing trace 608B extends into inactive portion 502 . Routing trace 608 B includes a second portion 628 disposed within inactive portion 502 and perpendicular to first portion 622 . In the example shown, the second portion 628 of routing trace 608B is located below integrated circuit 506 . Routing trace 608B may be coupled to common electrode 614B of Vcom layer 306 (also referred to as the “first sensor electrode”) through via 524B. Routing trace 608B may be coupled to pin 508C of integrated circuit 506 via bond pad 604 .

Routing traces 608A (also called "second routing traces") are patterned in metal layer M1 and metal layer M2. Routing trace 608A includes a first portion 624 disposed within active portion 504 parallel to a first portion 622 of routing trace 608B. A first portion 624 of routing trace 608 A extends into inactive portion 502 . A first portion 624 of routing trace 608A is patterned in metal layer M1. Routing trace 608 A includes a second portion 626 disposed within inactive portion 502 perpendicular to first portion 624 . A second portion 626 is patterned in metal layer M2. Second portion 626 is electrically coupled to first portion 624 via via 522A. In the example shown, the second portion 626 of routing trace 608 A is located below integrated circuit 506 . Routing trace 608A may be coupled to common electrode 614A of Vcom layer 306 (also referred to as a "second sensor electrode") through via 524A. Routing trace 608A may be coupled to pin 508A of integrated circuit 506 via via 522 (and corresponding bond pad on M1). In particular, routing trace 608B intersects routing trace 608A within intersection region 602 . Generally, one or more intersection regions 602 may be positioned within the inactive portion 502 . In the example shown, crossover region 602 is located below integrated circuit 506 .

As can be seen from the example of FIG. 6, the source lines 408 can extend parallel to each other between the active portion 504 and the inactive portion 502 . Source lines 408 may be coupled to pins 508 of integrated circuit 506 along the side of integrated circuit 506 adjacent active portion 504 . Source drivers 212 may be placed along this same side of integrated circuit 506 . Sensor circuitry 204 may be located in other areas of integrated circuit 506 . Routing traces 608 may run parallel to source lines 408 within active portion 504 . However, within inactive portion 502 , routing traces 608 may be routed in a non-parallel configuration to reach pins associated with sensor circuit 204 . Non-parallel routes can be implemented using one or more layers of TFT layers 304 within the non-active portion 502 . In addition, multiple metal layers of the TFT layer 304 can be used to achieve crossover of routing traces on different metal layers.

Source lines 408 , gate lines 406 and routing traces 608 may be constructed using different configurations of metal layers within TFT layer 304 . In one embodiment, source line 408 may be disposed on metal layer M1 rather than metal layer M2 as discussed in the example above. In one embodiment, source line 408 may be disposed on metal layer M3. In one embodiment, gate line 406 may be located in metal layer M2 rather than metal layer M3 as discussed in the example above. If the gate line 406 is placed on metal layer M2, the source line may be placed on either metal layer M1 or metal layer M3. In one embodiment, gate line 406 is disposed on metal layer M3 as described in the example above. Source line 408 may then be placed on either metal layer M1 or metal layer M2.

In the illustrated embodiment of FIG. 6, one routing trace 608A includes portions on metal layers M1 and M2, and another routing trace 608B includes portions on metal layer M1. Other configurations are possible. In one embodiment, routing trace 608 may include a portion on metal layer M1, another portion on metal layer M2, and another portion on metal layer M3. Vias can electrically couple the routing traces on layer M3 to portions of the routing traces on layer M2.

FIG. 7 is a plan view showing part of a display device 280 according to another embodiment. Elements of FIG. 7 that are the same or similar to those of FIG. 6 have been described in detail above. In some embodiments, metal layer M1 is patterned to include "dummy" traces. Dummy traces are not used to route signals to the electrodes. Dummy traces cannot be left electrically floating to prevent charge build-up and display artifacts. To prevent display artifacts, dummy traces can be actively driven to Vcom during display and with a guard signal during capacitive sensing. A dummy trace can be electrically coupled to the integrated circuit 506 to receive the guard signal. Dummy traces have the same limitations as routing traces coupled to Vcom electrodes. That is, dummy traces cannot cross source lines on a common layer within active portion 504 .

In the embodiment of FIG. 7, dummy traces 706 are placed on metal layer M1. Although only one dummy trace 706 is shown, display stack 350 may include multiple dummy traces 706 . Dummy trace 706 includes a first portion within active area 504 parallel to source line 408A. Dummy trace 706 includes a second portion perpendicular to the first portion within inactive region 502 . Dummy trace 706 is electrically coupled to pin 508D of integrated circuit 506 via bond pad 704 . Dummy trace 706 intersects second portion 626 of routing trace 608 A within intersection region 702 . In the illustrated embodiment, intersection region 702 underlies integrated circuit 506 .

In the example shown, dummy trace 706 includes a portion located on layer M1. In another example, dummy trace 706 may include a portion located on layer M1 in active portion 504 and another portion located on layer M2 in inactive portion 502. FIG. In another example, dummy trace 706 has a portion located on layer M1 in active portion 504, another portion located on layer M2 in inactive portion 502, and a layer M2 in inactive portion 502. and another portion located on M3. In general, dummy traces 706 may be routed similarly to routing traces 608 . The processing system 110 of the integrated circuit 506 can drive the dummy trace 706 with the guard signal during capacitive sensing and can drive the dummy trace 706 with Vcom during the display update.

The embodiments and examples described in this specification are presented to best describe the embodiments in accordance with the technology and its particular application, and thereby enable any person skilled in the art to make and use the invention. However, those skilled in the art will appreciate that the foregoing description and examples have been presented for illustration and illustration only. The description set forth is neither exhaustive nor intended to limit the invention to the precise forms disclosed.

In view of the above, the scope of the disclosure is determined by the following claims.

110 processing system 200 capacitive detector 204 sensor circuit 208 front end 212 source driver 214 gate selection circuit 216 window 220 processing module 222 pin 250 electrode pattern 260 sensor electrode 270 grid electrode 280 display device

Claims (15)

An input device including a capacitive sensing device integrated with a display device,
a first substrate;
a second substrate provided so as to sandwich a display material layer between itself and the first substrate;
a plurality of sensor electrodes of the capacitive sensing device;
a plurality of source lines provided on the first substrate and disposed at least partially within an active portion of the display device;
a plurality of routing traces provided on the first substrate;
bond pads provided on the first substrate and configured to couple to pins of an integrated circuit ;
each of the plurality of sensor electrodes comprises one or more common electrodes of the display device;
The plurality of routing traces comprises:
a first routing trace;
a second routing trace;
at least a first portion of said first routing trace disposed in a first metal layer parallel to a first of said plurality of source lines and within said active portion of said display;
a first portion of the second routing trace disposed within an active portion of the display parallel to the first routing trace in the first metal layer;
a second portion of the second routing trace disposed within a second metal layer and intersecting the first routing trace within an inactive portion of the display device ; coupled to the first portion via a first via;
the bond pad is coupled within the inactive portion to the second portion of the second routing trace via a second via;
the second routing trace is coupled to a first sensor electrode of the plurality of sensor electrodes via a first pillar;
The input device, wherein the first sensor electrode is provided on the second substrate. 2. The input device of claim 1, wherein the plurality of source lines are arranged within the first metal layer. 2. The input device of claim 1, wherein the plurality of source lines are arranged in the second metal layer. 2. The input device of claim 1, wherein the plurality of source lines are arranged in a third metal layer of the display device. 5. The input device of any one of claims 1, 2 and 4, further comprising a plurality of gate lines disposed within said second metal layer. 4. An input device as claimed in any preceding claim, further comprising a plurality of gate lines arranged in a third metal layer of the display device. the first routing trace and the second routing trace coupled to the integrated circuit;
7. An input device as claimed in any one of claims 1 to 6, wherein the second portion of the second routing trace is within and under the integrated circuit. 8. The input device of any one of claims 1-7, wherein the first routing trace is coupled to a second sensor electrode of the plurality of sensor electrodes via a second pillar. 9. An input according to any one of claims 1 to 8, wherein said second portion of said second routing trace is coupled to said first portion of said second routing trace via a via. Device. at least one routing trace of the plurality of routing traces coupled to the integrated circuit;
10. The input device of any one of claims 1-9, wherein the integrated circuit is configured to drive the at least one routing trace with a guard signal. 11. An input device as claimed in any preceding claim, wherein each of the common electrodes and each of the plurality of routing traces are coupled to respective pins of a plurality of pins of the integrated circuit. in the display device,
a first substrate;
a second substrate provided so as to sandwich a display material layer between itself and the first substrate;
an active portion having a plurality of display electrodes;
an inactive portion;
a plurality of source lines provided on the first substrate and disposed at least partially within the active portion;
a plurality of routing traces provided on the first substrate;
bond pads provided on the first substrate and configured to be coupled to pins of an integrated circuit ;
The plurality of routing traces comprises:
a first routing trace;
a second routing trace;
at least a first portion of said first routing trace disposed in a first metal layer parallel to a first of said plurality of source lines and within said active portion;
a first portion of the second routing trace disposed parallel to the first routing trace in the first metal layer and within the active portion;
a second portion of the second routing trace disposed in a second metal layer within the inactive portion and intersecting the first routing trace, the first portion of the second routing trace; through a first via to
the bond pad is coupled to the second portion of the second routing trace through a second via within the inactive portion;
the second routing trace is coupled via a first pillar to a first display electrode of the plurality of display electrodes;
The display device, wherein the first display electrode is provided on the second substrate. 13. The display device of Claim 12, wherein the plurality of source lines are disposed in one of the first metal layer, the second metal layer and the third metal layer. 13. The display device of Claim 12, further comprising a plurality of gate lines disposed in one of said second metal layer and third metal layer. In a processing system for a capacitive sensing device and display device,
a source driver configured to drive a plurality of source lines arranged at least partially in an active portion of the display device;
sensor circuitry configured to be coupled to a plurality of sensor electrodes of the capacitive sensing device via a plurality of routing traces;
each of the plurality of sensor electrodes includes one or more common electrodes of the display device;
the plurality of routing traces provided on the first substrate,
a first routing trace;
a second routing trace;
at least a first portion of said first routing trace disposed in a first metal layer parallel to a first of said plurality of source lines and within said active portion of said display;
a first portion of the second routing trace disposed parallel to the first routing trace in the first metal layer and within the active portion of the display;
a second portion of the second routing trace disposed within a second metal layer within an inactive portion of the display device and intersecting the first routing trace; coupled to the first portion via a first via and to a bond pad within the inactive portion via a second via;
said bond pads disposed on said first substrate and configured to be coupled to pins of an integrated circuit;
the second routing trace is coupled to a first sensor electrode of the plurality of sensor electrodes via a first pillar;
The processing system, wherein the first sensor electrode is provided on a second substrate provided so as to sandwich a display material layer between itself and the first substrate.

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