JP7101032B2 - Nitride semiconductor light emitting device - Google Patents

Description

The present invention relates to a nitride semiconductor light emitting device.

The nitride semiconductor light emitting element is, for example, a substrate, an n-type nitride semiconductor layer formed on the substrate, and a nitride semiconductor laminate (nitride semiconductor light emitting) formed on a part of the n-type nitride semiconductor layer. A mesa portion including a layer and a p-type nitride semiconductor layer), an n-type electrode formed on the n-type nitride semiconductor layer, and a p-type formed on the p-type nitride semiconductor layer of the nitride semiconductor laminate. It is composed of electrodes.

In Patent Document 1, the shape of the mesa portion (first region) of the nitride semiconductor light emitting device is defined as a shape having recesses surrounding the second region (region other than the first region) from three sides in a plan view. It is described that the shape of the above is a shape in which a concave portion region surrounded by a concave portion of the first region in a plan view and a peripheral region other than the concave portion region are continuously formed. Further, it is described that the n-type electrode is formed on the n-type semiconductor layer in the second region, straddling the recessed region and the peripheral region, and the p-type electrode is formed on the uppermost surface of the p-type semiconductor layer. There is. Further, the n-type electrode is formed so that the outer line of the n-type electrode follows the outer line of the mesa portion at regular intervals in a plan view.

Nitride semiconductor light emitting devices are required to have uniform light emission in the device in order to realize an element having high luminous efficiency on the light emitting surface. One of the causes of the non-uniformity of the amount of emitted light is that the current flowing between the p-type electrode and the n-type electrode is partially concentrated.
As a countermeasure, in Patent Document 2, a p-type electrode is formed so as to cover the p-type semiconductor layer in a planar manner, and a p-type semiconductor layer or a high resistance layer having a higher resistance than the p-type electrode is formed as a p-type semiconductor. It has been proposed that the surface of the layer is formed in a shape close to the n-type electrode and along the shape of the p-type semiconductor layer side of the n-type electrode to suppress current concentration without reducing the light emitting area. There is.

Japanese Patent No. 5985782 Japanese Unexamined Patent Publication No. 2014-96460

The nitride semiconductor light emitting device described in Patent Document 1 does not have a configuration in which suppression of current concentration is taken into consideration.
The nitride semiconductor light emitting device described in Patent Document 2 has a problem that the manufacturing cost is high because a high resistance layer is formed in order to suppress the current concentration.
An object of the present invention is to provide a nitride semiconductor light emitting device in which current concentration is suppressed at low cost.

In order to achieve the above object, the nitride semiconductor light emitting device of one aspect of the present invention has the following constituent requirements (a) and (b).
(a) Includes a first conductive type first nitride semiconductor layer, a nitride semiconductor light emitting layer and a second conductive type second nitride semiconductor layer formed on a part of the first nitride semiconductor layer. On the nitride semiconductor laminate (mesa portion), the first electrode formed on the first nitride semiconductor layer and extending in the first direction, and the second nitride semiconductor layer of the nitride semiconductor laminate. It comprises a second electrode, which is formed and extends in the first direction.
(b) The first electrode and the second electrode are arranged side by side with a space in the second direction perpendicular to the first direction in a plan view.

The nitride semiconductor light emitting device of the present invention is a nitride semiconductor light emitting device that is expected to suppress current concentration and can be provided at low cost.

It is a top view explaining the nitride semiconductor light emitting device of one Embodiment of this invention. It is sectional drawing which shows the nitride semiconductor light emitting device of one Embodiment of this invention, and is the figure corresponding to the sectional view AA of FIG.

[One aspect of a nitride semiconductor light emitting device]
The nitride semiconductor light emitting device of one aspect has the above-mentioned constituent requirements (a) and (b), but has those configurations by having at least one of the following configurations (c) to (i). It is considered that the effect of suppressing current concentration is higher than that in the case without it.
(c) The first electrode is arranged on both sides of the second electrode.
(d) The dimension of the first electrode sandwiched between the second electrodes in the second direction is larger than the dimension of the first electrode sandwiched between the second electrodes in the second direction.
(e) The dimension of the first electrode sandwiched between the second electrodes in the first direction is larger than the dimension of the first electrode sandwiched between the second electrodes in the first direction.
(f) The end of the second electrode in the first direction is rounded.

(g) The first nitride semiconductor layer has a rectangular planar shape, the first direction and the long side of the rectangle are parallel or substantially parallel, and the dimension L1 of the long side of the rectangle and the second electrode The following equation (1) showing the relationship between the dimension L2 in the first direction of the first electrode that is not sandwiched between the rectangles, and the dimension L1 on the long side of the rectangle and the dimension L2 that is not sandwiched between the second electrodes. It satisfies at least one of the following equations (2) showing the relationship with the dimension L3 in the first direction of the second electrode arranged next to the one electrode.
140 μm <L1-L2 <650 μm ... (1)
140 μm <L1-L3 <650 μm ... (2)

(h) The first nitride semiconductor layer has a rectangular planar shape, the first direction and the long side of the rectangle are parallel or substantially parallel, and the first electrode is not sandwiched between the second electrodes. The absolute value of the difference between the dimension L2 in one direction and the dimension L4 in the first direction of the first electrode sandwiched between the second electrodes is greater than 0 and smaller than 500 μm.
(i) The first nitride semiconductor layer has a rectangular planar shape, the first direction and the long side of the rectangle are parallel or substantially parallel, and next to the first electrode which is not sandwiched between the second electrodes. The dimension L3 of the second electrode arranged in the first direction of the second electrode and the second electrode arranged between the first electrode sandwiched between the second electrodes and the first electrode sandwiched between the second electrodes. The absolute value of the difference between the dimension L5 in one direction and the dimension L5 is larger than 0 and smaller than 500 μm.

[Embodiment]
Hereinafter, embodiments of the present invention will be described, but the present invention is not limited to the embodiments shown below. In the embodiments shown below, technically preferable limitations are made for carrying out the present invention, but this limitation is not an essential requirement of the present invention.
In the drawings used in the following description, the dimensional relationship of each part shown may differ from the actual dimensional relationship.

〔overall structure〕
As shown in FIG. 2, the semiconductor chip (nitride semiconductor light emitting element) 1 includes a substrate 11, an n-type nitride semiconductor layer (first conductive type first nitride semiconductor layer) 12, and a nitride semiconductor laminate. 3a to 3d, n-type electrodes 15a to 15e, p-type electrodes 16a to 16d, pad electrodes 150a to 150d on n-type electrodes 15a to 15e, and pad electrodes 160a to 160d on p-type electrodes 16a to 16d. , Has an insulating layer 17.
The n-type nitride semiconductor layer 12 is formed on one surface 110 of the substrate 11. The n-type nitride semiconductor layer 12 has a thick portion 121 and a thin portion 122 other than that.

The nitride semiconductor laminates 3a to 3d are four (N-1) mesa portions formed on the n-type nitride semiconductor layer 2, and are reference planes K of the thick portion 121 of the n-type nitride semiconductor layer 12. It is formed of a higher portion, a nitride semiconductor light emitting layer 13, and a p-type nitride semiconductor layer (second conductive type second nitride semiconductor layer) 14. The reference surface K is the upper surface of the thin portion 122 of the n-type nitride semiconductor layer 12.
In each of the nitride semiconductor laminates 3a to 3d, the nitride semiconductor light emitting layer 13 is formed on the thick portion 121 of the n-type nitride semiconductor layer 12. The p-type nitride semiconductor layer 14 is formed on the nitride semiconductor light emitting layer 13.

The n-type electrodes 15a to 15e are formed on the thin portion 122 of the n-type nitride semiconductor layer 12. The p-type electrodes 16a to 16d are formed on the p-type nitride semiconductor layer 14.
In the mesa etching for forming the nitride semiconductor laminates 3a to 3d, the laminate existing in the portion where the n-type electrodes 15a to 15e are formed is in the thickness direction of the n-type nitride semiconductor layer 12. It has been removed in the middle of. As a result, a thin portion 122 is formed on the n-type nitride semiconductor layer 12.

[Materials, etc.]
The semiconductor chip 1 is an element that emits ultraviolet light having a peak wavelength range of 300 nm or less. The substrate 11 is not particularly limited as long as it can form a nitride semiconductor layer on one surface 110. Specific examples of the material forming the substrate 11 include sapphire, Si, SiC, MgO, Ga ₂ O ₃ , Al ₂ O ₃ , ZnO, GaN, InN, AlN, and mixed crystals thereof. Of these, when a substrate formed of a nitride semiconductor such as GaN, AlN, or AlGaN is used, the difference in lattice constant with each nitride semiconductor layer formed on the substrate 11 is small, and the nitride with few defects is generated. It is preferable because the semiconductor layer can be grown, and it is more preferable to use an AlN substrate. Further, impurities may be mixed in the above-mentioned material forming the substrate 11.

The material for forming the n-type nitride semiconductor layer 12 is preferably a single crystal or a mixed crystal of AlN, GaN, and InN, and specific examples thereof are n—Al _x Ga _(1-x) N (x ≧ 0. 4) can be mentioned. Further, these materials may contain Group V elements other than N such as P, As and Sb, and impurities such as C, H, F, O, Mg and Si.
The nitride semiconductor light emitting layer 13 may be a single layer or a multilayer, and is, for example, a layer having a multiple quantum well structure (MQW) composed of a quantum well layer made of AlGaN and an electron barrier layer made of AlGaN. Further, the nitride semiconductor light emitting layer 13 may contain group V elements other than N such as P, As and Sb, and impurities such as C, H, F, O, Mg and Si.

Examples of the p-type nitride semiconductor layer 14 include a p-GaN layer and a p-AlGaN layer, and a p-GaN layer is preferable. Further, the p-type nitride semiconductor layer 14 may contain impurities such as Mg, Cd, Zn and Be.
The insulating layer 17 includes a portion not covered by the n-type electrodes 15a to 15e of the n-type nitride semiconductor layer 2 and a portion not covered by the p-type electrodes 16a to 16d of the nitride semiconductor laminates 3a to 3d. It is formed on the lower side surface of the pad electrodes 150a to 150d and 160a to 160d of the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d. Examples of the insulating layer 17 include SiN, oxides and nitrides such as SiO _2, SiON, Al ₂ O ₃ , and ZrO layer, but the present invention is not limited to this.

As the material of the n-type electrodes 15a to 15e, for example, Ti, Al, Ni, Au, Cr, V, Zr, Hf, Nb, Ta, Mo, W and their alloys, ITO and the like can be used. As the material of the p-type electrodes 16a to 16d, for example, Ni, Au, Pt, Ag, Rh, Pd, Pt, Cu and an alloy thereof, ITO or the like can be used. Of these, it is preferable to use Ni, Au, alloys thereof, or ITO having a small contact resistance with the nitride semiconductor layer.
Examples of the material of the pad electrodes 150a to 150d and 160a to 160d include Au, Al, Cu, Ag, W and the like, but Au having high conductivity is desirable.

[Plane shape]
In FIG. 1, the pad electrodes 150a to 150d, the pad electrodes 160a to 160d, and the insulating layer 17 are omitted.
As shown in FIG. 1, the substrate 11 of the semiconductor chip 1 is square, and the n-type nitride semiconductor layer 12 is formed on the entire surface thereof. That is, the n-type nitride semiconductor layer 12 has a square (rectangular) planar shape.
As shown in FIG. 1, in a plan view, the semiconductor chip 1 has five (two or more) n-type electrodes 15a to 15e and four (one or more) p-type electrodes 16a to 16d arranged in parallel. .. These n-type electrodes 15a to 15e and p-type electrodes 16a to 16d are alternately arranged in parallel at intervals in a plan view.

Specifically, in the parallel arrangement, the n-type electrodes 15a and 15b are present on both sides of the p-type electrode 16a and sandwich the p-type electrode 16a. The n-type electrodes 15b and 15c exist on both sides of the p-type electrode 16b and sandwich the p-type electrode 16b. The n-type electrodes 15c and 15d are present on both sides of the p-type electrode 16c and sandwich the p-type electrode 16c. The n-type electrodes 15d and 15e exist on both sides of the p-type electrode 16d and sandwich the p-type electrode 16d.
Spacing distance between n-type electrode 15a and p-type electrode 16a K1, spacing between p-type electrode 16a and n-type electrode 15b K2, spacing between n-type electrode 15b and p-type electrode 16b K3, p-type electrode 16b and n-type electrode Spacing between 15c K4, spacing between n-type electrode 15c and p-type electrode 16c K5, spacing between p-type electrode 16c and n-type electrode 15d K6, spacing between n-type electrode 15d and p-type electrode 16d, and p. The distance K8 between the mold electrode 16d and the n-type electrode 15e is preferably, for example, 2 μm to 50 μm, preferably 5 μm to 25 μm.

By setting the interval K1 to K8 to 50 μm or less, the resistance between the pn electrodes can be reduced, and by setting the interval K1 to K8 to 2 μm or more, the risk of short-circuiting between electrodes due to lithography deviation can be suppressed. The intervals K1 to K8 are preferably equal intervals, and when there is a difference, the difference between the maximum value and the minimum value is 5 μm or less, preferably 2 μm or less.
The n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d have a strip-shaped planar shape, and the strip-shaped longitudinal directions are arranged in parallel. The strip-shaped longitudinal directions of the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d are parallel to the first side (long side of the rectangle) 11a extending to the left and right of FIG. 1 among the square sides forming the substrate 11. be. That is, the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d are arranged side by side in the second direction perpendicular to the first direction, which is the stretching direction, in a plan view.

The first side 11a and the strip-shaped longitudinal direction of the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d may not be strictly parallel but may be substantially parallel. Approximately parallel means that the deviation (slope with respect to parallelism) is less than 5 °, and this deviation is preferably less than 3 °.
Specifically, the planar shape of the n-type electrodes 15a to 15e is an elongated rectangle whose long side is parallel to the first side 11a.
Of the n-type electrodes 15a to 15e, the n-type electrodes arranged at the position closest to the edge 125 along the first side 11a (along the longitudinal direction of the band) in the plane of the first nitride semiconductor layer 12. (First electrode at the edge, first electrode not sandwiched between the second electrodes) The width of the rectangle (dimension of the short side) W1 forming 15a and 15e is arranged on the center side (the side away from the edge). It is narrower than the width W2 of the rectangle forming the n-type electrodes (inner first electrode, first electrode sandwiched between the second electrodes) 15b to 15d. The width W1 is preferably 5 μm or more and 50 μm or less. The width ratio (W2 / W1) is preferably 1.2 or more and 3.0 or less.

The n-type electrodes 15a and the n-type electrodes 15e have the same planar shape and dimensions, and the n-type electrodes 15b to 15d have the same planar shape and dimensions. The n-type electrodes 15a to 15e are arranged in a plan view with a straight line L01 passing through the center C of the square forming the substrate 11 and perpendicular to the first side 11a and a straight line L02 passing through the center C and parallel to the first side 11a. It is axisymmetric with respect to both.
Specifically, the planar shape of the p-type electrodes 16a to 16d is a rectangle having a longer short side than the n-type electrodes 15a to 15e, and both ends 161a to 161d in the long side direction (longitudinal direction) are tips. Is a convex semi-arc (curve). The p-type electrodes 16a and 16d are edge-side second electrodes arranged next to the n-type electrodes (edge first electrodes) 15a and 15e, and the p-type electrodes 16b and 16c are more than the p-type electrodes 16a and 16d. It is an inner second electrode arranged on the center side (the side away from the edge).

The p-type electrode 16a and the p-type electrode 16d have the same planar shape and dimensions, and the p-type electrode 16b and the p-type electrode 16c have the same planar shape and dimensions. The arrangement of the p-type electrodes 16a to 16d in a plan view is axisymmetric with respect to both the straight line L01 and the straight line L02. That is, the arrangement of the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d in a plan view is line-symmetrical with respect to both the straight line L01 and the straight line L02.
Further, there are no n-type electrodes and p-type electrodes other than the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d in the plane of the n-type nitride semiconductor 12 of the semiconductor chip 1. That is, there is no p-type electrode (second electrode) that deviates from the parallel arrangement outside the band-shaped longitudinal direction (direction perpendicular to the parallel direction) forming the n-type electrodes 15a to 15e. There is no n-type electrode (first electrode) that deviates from the parallel arrangement outside the strip-shaped longitudinal direction (direction perpendicular to the parallel direction) forming the p-type electrodes 16a to 16d.

The dimension L1 of the first side 11a and the length (longitudinal dimension) L2 of the long side of the n-type electrodes (edge first electrode) 15a and 15e satisfy the following equation (1). The dimension L1 of the first side 11a and the length (longitudinal dimension) L3 of the long side of the p-type electrodes (edge second electrode) 16a and 16d satisfy the following equation (2). The relationship between L1 and L2 preferably satisfies the following equation (11). The relationship between L1 and L3 preferably satisfies the following (21).
140 μm <L1-L2 <650 μm ... (1)
140 μm <L1-L3 <650 μm ... (2)
200 μm <L1-L2 <500 μm ... (11)
200 μm <L1-L3 <500 μm ... (21)

The length of the long side (dimension in the longitudinal direction) L2 of the n-type electrode (edge first electrode) 15a, 15e and the length of the long side (longitudinal dimension) of the n-type electrode (inner first electrode) 15b to 15d. The absolute value (| L4-L2 |) of the difference between (dimension) L4 and L4 is larger than 0 and smaller than 500 μm. | L4-L2 | is preferably 400 μm or more and less than 500 μm.
Difference between the length (longitudinal dimension) L3 of the long side of the p-type electrodes (edge second electrodes) 16a and 16d and the longitudinal dimension L5 of the p-type electrodes (inner second electrodes) 16b and 16c. The absolute value of is greater than 0 and less than 500 μm. | L5-L3 | is preferably 100 μm or more and 300 μm or less.

The semi-arcs (curves) 161a to 161d of the p-type electrodes 16a to 16d are all the same. That is, the p-type electrodes (second edge electrodes) 16a and 16d and the p-type electrodes (inner second electrodes) 16b and 16c have the same radius of curvature R of the "curve with a convex tip" forming both ends in the longitudinal direction. It has become. The radius of curvature R is preferably larger than 0 and smaller than 200 μm, more preferably 20 <R <150 μm, and even more preferably 80 <R <120 μm.

The total number of the first electrode and the second electrode (in this example, the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d) arranged in parallel is the value "t" or "t + 1" described below. , Or "t-1" is preferable. The value t is the dimension of the first nitride semiconductor layer in the direction in which the first electrode and the second electrode are aligned (in this example, the dimension of the side perpendicular to the first side 11a and equal to L1) S1 and the first. Based on T obtained by the following equation (3) using the electrode width (in this example, the average value of W1 and W2) S2 and the second electrode width S3, in the case of an integer, T is t and an integer. If not, the integer obtained by rounding T is taken as t.
T = S1 / (S2 + S3) ... (3)

Further, in the semiconductor chip 1 of this embodiment, the widths W1 of the two n-type electrodes 15a and 15e, which are the edge first electrodes, are the same, but the widths of the two edge first electrodes may be different. .. Further, although the widths W2 of the three n-type electrodes 15b to 15d, which are the inner first electrodes, are the same, the widths of some of the inner first electrodes may be different from the others in the plurality of inner first electrodes. However, the widths of all the inner first electrodes may be different.
Further, in the semiconductor chip 1 of this embodiment, the n-type electrode is the first electrode and the p-type electrode is the second electrode, but in the nitride semiconductor light emitting element of one embodiment, the p-type electrode is the first electrode. It can also be applied when the n-type electrode is the second electrode.

[Action, effect]
The semiconductor chip (nitride semiconductor light emitting device) 1 of the embodiment is a conventional nitride semiconductor because the n-type electrodes 15a to 15e and the p-type electrodes 16a to 16d have the above-mentioned planar shape and arrangement in a plan view. Compared with a light emitting device (a nitride semiconductor light emitting device described in Patent Document 1, for example, the arrangement of the n-type electrode and the p-type electrode in a planar shape and in a plan view is different from that of the semiconductor chip 1), current concentration is suppressed. Will be done. As a result, the semiconductor chip 1 can obtain a high output at a low voltage. That is, the luminous efficiency is high.

Nitride semiconductor A nitride semiconductor used in a light emitting device generally has a higher resistance value than Si or the like used in an LSI, and the current bias becomes remarkable. Therefore, in the nitride semiconductor light emitting device, the effect obtained by increasing the degree of freedom in designing the arrangement of the electrodes is very high.
The nitride semiconductor light emitting device described in Patent Document 1 has one p-type electrode and one n-type electrode. The p-type electrode has a shape in which the longitudinal centers of a plurality of strips arranged in parallel at intervals in a plan view are connected to each other at a connecting portion. The tips of both ends of the plurality of strips in the longitudinal direction are convex.

Then, on the outside of the p-type electrode, there is an n-type electrode having an internal line along the outer line of the p-type electrode. That is, a part of the n-type electrode exists outside in the direction perpendicular to the parallel arrangement of the plurality of strips constituting the p-type electrode. Along with this, the current concentrates on the convex portion of the p-type electrode. Further, between the plurality of strips of the p-type electrode (existing only on both sides of the connecting portion), there are strips of the n-type electrode. That is, a part of the p-type electrode exists outside in the direction perpendicular to the parallel arrangement of the plurality of strips constituting the n-type electrode.
On the other hand, in the semiconductor chip 1 of the embodiment, since the first electrode does not exist outside the direction perpendicular to the parallel direction of the p-type electrodes 16a to 16d arranged in parallel, the p-type electrodes 16a to 16d Concentration of current is suppressed at the ends in the direction perpendicular to the parallel direction of. Further, if there are corners at both ends of the p-type electrodes 16a to 16d, the current concentrates on the corners, but the ends 161a to 161d have a semi-arc (curve) with a convex tip, so that the current concentration is concentrated. It is further suppressed.

Further, by making the width W2 of the n-type electrodes 15b to 15d, which are the inner first electrodes, twice the width W1 of the n-type electrodes 15a, 15e, which are the edge first electrodes, p from the n-type electrodes 15a, 15b. The current flowing through the type electrodes 16a from the n-type electrodes 15b and 15c to the p-type electrode 16b, from the n-type electrodes 15c and 15d to the p-type electrode 16c, and from the n-type electrodes 15d and 15e to the p-type electrode 16d is the same. can do. Therefore, by setting W1 <W2, the current concentration can be suppressed as compared with the case where W1 ≧ W2.
Further, the semiconductor chip 1 of the embodiment can keep the manufacturing cost low as compared with the nitride semiconductor light emitting device described in Patent Document 2.

1 Semiconductor chip (nitride semiconductor light emitting device)
11 Substrate 110 One surface of the substrate (the surface on which the first nitride semiconductor layer is formed)
12 n-type nitride semiconductor layer (first nitride semiconductor layer)
125 Edge 13 Nitride semiconductor light emitting layer 14 p-type nitride semiconductor layer (second nitride semiconductor layer)
15an type electrode (first electrode, edge first electrode, first electrode not sandwiched between second electrodes)
15b n type electrode (first electrode sandwiched between first electrode, inner first electrode, second electrode)
15c n-type electrode (first electrode sandwiched between first electrode, inner first electrode, second electrode)
15dn type electrode (first electrode sandwiched between first electrode, inner first electrode, second electrode)
15en type electrode (first electrode, edge first electrode, first electrode not sandwiched between second electrodes)
16ap type electrode (second electrode, second edge electrode)
16bp type electrode (second electrode, inner second electrode)
16c p-type electrode (second electrode, inner second electrode)
16d p type electrode (second electrode, second edge electrode)
161a to 161d Both ends of the strip-shaped long side direction (longitudinal direction) of the p-type electrode (second electrode) 150a to 150e Pad electrode 160a to 160d Pad electrode 17 Insulation layer 3a to 3d Nitride semiconductor laminate

Claims (6)

The first conductive type first nitride semiconductor layer and
A nitride semiconductor laminate including a nitride semiconductor light emitting layer and a second conductive type second nitride semiconductor layer formed on a part of the first nitride semiconductor layer.
A plurality of first electrodes formed on the first nitride semiconductor layer and extending in the first direction,
A plurality of second electrodes formed on the second nitride semiconductor layer of the nitride semiconductor laminate and extended in the first direction, and
Equipped with
In the arrangement of the first electrode and the second electrode in a plan view, the first electrode and the second electrode are alternately arranged at intervals in the second direction perpendicular to the first direction, and the first electrode is arranged. One electrode exists on both sides of the second electrode and has the first electrode sandwiched between the second electrodes and the first electrode not sandwiched between the second electrodes. The arrangement is such that the first electrode does not exist on the outside in the first direction.
The first electrode sandwiched between the second electrodes emits a nitride semiconductor whose dimension in the second direction is larger than the dimension in the second direction of the first electrode not sandwiched between the second electrodes. element. The first electrode sandwiched between the second electrodes has a dimension in the first direction larger than the dimension in the first direction of the first electrode not sandwiched between the second electrodes. 1. The nitride semiconductor light emitting device according to 1. The nitride semiconductor light emitting device according to claim 1 or 2 , wherein the end portion of the second electrode in the first direction is rounded. The first nitride semiconductor layer has a rectangular planar shape and has a rectangular planar shape.
The first direction and the long side of the rectangle are parallel or substantially parallel.
The following equation (1) showing the relationship between the dimension L1 on the long side of the rectangle and the dimension L2 in the first direction of the first electrode that is not sandwiched between the second electrodes, and the rectangle. The following (2) showing the relationship between the dimension L1 on the long side and the dimension L3 in the first direction of the second electrode arranged next to the first electrode that is not sandwiched between the second electrodes. The nitride semiconductor light emitting element according to any one of claims 1 to 3 , which satisfies at least one of the equations.
140 μm <L1-L2 <650 μm ... (1)
140 μm <L1-L3 <650 μm ... (2) The first nitride semiconductor layer has a rectangular planar shape and has a rectangular planar shape.
The first direction and the long side of the rectangle are parallel or substantially parallel.
The difference between the dimension L2 of the first electrode not sandwiched between the second electrodes in the first direction and the dimension L4 of the first electrode sandwiched between the second electrodes in the first direction. The nitride semiconductor light emitting device according to any one of claims 1 to 4 , wherein the absolute value is larger than 0 and smaller than 500 μm. The first nitride semiconductor layer has a rectangular planar shape and has a rectangular planar shape.
The first direction and the long side of the rectangle are parallel or substantially parallel.
The dimension L3 in the first direction of the second electrode arranged next to the first electrode not sandwiched between the second electrodes, and the first electrode and the second electrode sandwiched between the second electrodes. Any of claims 1 to 5 , wherein the absolute value of the difference between the second electrode and the dimension L5 in the first direction arranged between the first electrode and the first electrode is larger than 0 and smaller than 500 μm. The nitride semiconductor light emitting device according to item 1.

Images