JP7032779B2 - General-purpose bus control method, general-purpose bus control device, and general-purpose bus control program - Google Patents

Description

The present invention relates to a general-purpose bus control method for controlling a general-purpose bus for connecting a drive (device) such as a hard disk drive (HDD) or a memory to a computer main body, a general-purpose bus control device, and a general-purpose bus control program.

Various are known as general-purpose bus interface standards that define general-purpose buses. For example, ATA (advanced technology attachment) is one of the standard of connection method for connecting a storage device (external storage device) such as a hard disk drive (HDD) to a computer main body for communication.

Further, SATA (Serial ATA) is an interface standard for connecting a hard disk drive (HDD), a solid state drive (SSD), or an optical drive to a computer body. SATA is a recording drive connection interface standard that has become the mainstream in place of SCSI (small computer system interface) and parallel ATA. Here, the solid state drive (SSD) is a device that can be treated as a storage (particularly, a disk drive) using a semiconductor element memory as a storage device.

Universal serial bus (USB) is one of the serial bus standards for connecting peripheral devices to information devices such as computers.

Here, the HDD, SSD, optical drive, recording drive, peripheral device, etc. as described above are collectively referred to as a "device".

In a general-purpose bus interface such as SATA / USB as described above, a drive circuit (bus controller or remote control) that controls data input / output according to the line length / signal characteristics of the general-purpose bus and the characteristics of the device such as the hard disk / memory to be connected. The waveform in the driver) changes. The bus controller is also called a bus controller IC (integrated circuit) or a driver chip, and the redriver is also called a redriver IC or a redriver chip.

Therefore, regarding the control value set in the drive circuit that controls the signal strength of the general-purpose bus, the optimum value is determined after measuring the waveform in advance evaluation, and the optimum value for which the control value of the drive circuit is determined is determined. It is common to operate with a certain fixed value. In that case, the optimum value of the drive circuit (bus controller / redriver) may change due to a change in the signal characteristics of the general-purpose bus due to aged deterioration / temperature change, a change in the device used (HDD or SSD), or the like. In such a case, an error may occur.

In other words, in a general-purpose bus interface, when the optimum value of the control value for setting the signal strength of the drive circuit for bus control changes due to some influence during the operation of the device, the control value is fixed as a fixed value. I can't handle it.

Various techniques for overcoming such problems have been proposed.

For example, Patent Document 1 discloses a method of performing access with a plurality of set values at the time of starting the device and selecting a value that does not cause an error by repeating an error in some cases.

Patent Document 2 positively utilizes the fact that the waveform of the output signal on the bus line changes according to the load capacitance component of the bus line, and appropriately controls the drive capability of the output signal based on this. Disclosure of technical ideas. The bus drive circuit unit disclosed in Patent Document 2 is a bus state discriminating means for determining the current bus state based on the voltage level of the feedback signal on the line, and a drive capability of the variable capability drive circuit based on the discrimination result. Includes drive capacity determination means to determine.

Patent Document 3 is a "bus matching method" that can eliminate the restrictions on the number of connected functional expansion devices, transfer speed, and transfer width when matching buses at the time of design, and can minimize the influence of bus inconsistency. And the device "is disclosed.

In Patent Document 3, the waveforms in the transmitting unit and the receiving unit of the card are observed, and it is determined whether or not the waveforms are matched. If it is matched, if it is confirmed that the current impedance value is also matched for data transfer in all other sections, the CPU has access to the slot and termination impedance control of the installed card. Read the ID and termination impedance values. Then, the ID of the card and the value of the termination impedance are stored in the non-volatile memory. The value of the terminal impedance is read from the non-volatile memory, and the read value is sent to the terminal impedance control unit. Then, the switch control unit controls the on / off of the switch so that the value of the termination impedance becomes the transmitted value.

Japanese Unexamined Patent Publication No. 2010-092384 Japanese Unexamined Patent Publication No. 2000-261464 Japanese Unexamined Patent Publication No. 07-264218

However, each of Patent Documents 1 to 3 has the following problems.

In Patent Document 1, it is not possible to avoid the occurrence of an error in the process of selecting the optimum value.

Since Patent Document 2 measures the voltage level (only the voltage value), it is difficult to bring the signal waveform of the general-purpose bus closer to the optimum waveform state. Further, in Patent Document 2, it is necessary to provide a dedicated circuit (drive capacity determining means) for determining the drive capacity of the drive circuit.

Patent Document 3 can only deal with changes due to differences in the bus connection state when the device is started. In other words, Patent Document 3 cannot cope with changes (waveform changes) during operation of the apparatus.

An object of the present invention is to provide a general-purpose bus control method, a general-purpose bus control device, and a general-purpose bus control program that solve the above-mentioned problems.

The general-purpose bus control method of the present invention is a method of controlling a general-purpose bus connected to a device, in which the waveform is checked by measuring the waveform of the general-purpose bus for a certain period of time , and the amplitude information of the checked waveform. The check step of outputting the waveform information recorded as a numerical value ; the acquisition step of acquiring the waveform information of the checked waveform; the waveform information of the acquired waveform and the optimum waveform of the predetermined period stored in advance. A comparison step of comparing the optimum waveform information recorded with amplitude information as a numerical value ; and a change / setting step of setting to change the optimum value of the drive circuit for driving the general-purpose bus when the comparison results do not match. ;including.

The general-purpose bus control device of the present invention is a general-purpose bus control device that controls a general-purpose bus connected to a device, and has a drive circuit for driving the general-purpose bus; With a memory table that stores the optimum waveform information recorded as a numerical value in advance; the waveform is checked by measuring the waveform of the general-purpose bus for a certain period of time , and the waveform information of the checked waveform is recorded as a numerical value. A waveform check circuit that outputs the above; an acquisition means for acquiring the waveform information of the checked waveform; and a comparison means for comparing the waveform information of the acquired waveform with the optimum waveform information of the optimum waveform stored in advance. It is provided with a change / setting means that can be set to change the optimum value of the drive circuit according to the comparison result.

The general-purpose bus control program of the present invention is a general-purpose bus control program that causes a computer to control a general-purpose bus connected to a device, and is described by measuring the waveform of the general-purpose bus on the computer by a waveform check circuit for a certain period of time. The acquisition procedure for acquiring the waveform information in which the waveform is checked and the amplitude information of the checked waveform is recorded as a numerical value ; the waveform information of the acquired waveform and the amplitude information of the optimum waveform for a certain period stored in advance. A comparison procedure for comparing with the optimum waveform information recorded as a numerical value ; and a change / setting procedure for setting the optimum value of the drive circuit for driving the general-purpose bus when the comparison results do not match. Let it run.

According to the present invention, the waveform of a general-purpose bus can be optimized during the operation of the apparatus.

It is a block diagram which shows the structure of the general-purpose bus control apparatus which concerns on 1st Embodiment of this invention. It is a block diagram which shows the internal structure of the bus controller used for the general-purpose bus control apparatus shown in FIG. It is a block diagram which shows the internal structure of the redriver used for the general-purpose bus control apparatus shown in FIG. It is a figure which shows an example of the optimum waveform stored in the memory table in the bus control circuit used for the general-purpose bus control apparatus shown in FIG. It is a table which shows an example of the contents stored in the memory table with the shape of the optimum waveform shown in FIG. 4 as a parameter. FIG. 3 is a block diagram showing a configuration of a CPU (control unit) in a bus control circuit used in the general-purpose bus control device shown in FIG. 1. It is a flowchart for demonstrating the operation of the general-purpose bus control apparatus shown in FIG. It is a block diagram which shows the structure of the general-purpose bus control apparatus which concerns on 2nd Embodiment of this invention. It is a block diagram which shows the structure of the general-purpose bus control apparatus which concerns on 3rd Embodiment of this invention.

First, the features of the present invention will be described.

In the general-purpose bus control device according to the present invention, a waveform check circuit is mounted on the general-purpose bus, and the optimum value for the general-purpose bus is set in each drive circuit from the waveform information collected by this waveform check circuit. As a result, the signal strength of the general-purpose bus is changed to cope with the change of the optimum value.

Hereinafter, embodiments of the present invention will be described.

[First Embodiment]
FIG. 1 is a block diagram showing a configuration of a general-purpose bus control device 1 according to the first embodiment of the present invention.

The illustrated general-purpose bus control device 1 includes a bus control circuit 11, a bus controller 12, a redriver 13, a waveform check circuit 14, and a device 15.

The bus control circuit 11 has a built-in bus controller 12. The illustrated bus control circuit 11 is configured by integrating a CPU (central processing unit) and a chipset into one chip. Therefore, the bus control circuit 11 is also called a CPU / chipset. The bus controller 12 is provided inside the chipset.

As described above, the bus controller 12 is also called a bus controller IC or a driver chip, and the redriver 13 is also called a redriver IC or a redriver chip.

The bus controller 12 and the redriver 13 are connected by a first general-purpose bus B1. The redriver 13 and the device 15 are connected by a second general-purpose bus B2.

Each of the first general-purpose bus B1 and the second general-purpose bus B2 is a serial bus specified by the serial bus interface standard selected from the group of serial advanced technology attachment (SATA) and universal serial bus (USB). good.

Further, the device 15 may be a drive selected from a group of hard disk drives (HDDs), solid state drives (SSDs), optical drives, recording drives, and peripheral devices.

The bus control circuit 11 has a built-in memory table 111 made of non-volatile memory. The CPU (described later), which is the control unit of the bus control circuit 11, is connected to the bus controller 12 by the first local bus B3. Further, the bus control circuit 11 is connected to the redriver 13 by a second local bus B4. Further, the bus control circuit 11 is connected to the waveform check circuit 14 by a third local bus B5.

FIG. 2 is a block diagram showing an internal configuration of the bus controller 12. The bus controller 12 includes a driver / equalizer C1 and a receiver / equalizer C2.

The driver / equalizer C1 adjusts the amplitude / strength of the signal waveform of the input signal from the internal bus according to the instruction from the CPU via the first local bus B3, and transfers the adjusted signal to the first general-purpose bus B1. Send out. Similarly, the receiver / equalizer C2 adjusts the amplitude / strength of the signal waveform of the input signal from the first general-purpose bus B1 according to the instruction from the CPU via the first local bus B3, and internally incorporates the adjusted signal. Tell the bus.

FIG. 3 is a block diagram showing the internal configuration of the redriver 13. The redriver 13 includes a first receiver / equalizer C3, a first driver C4, a second receiver / equalizer C5, and a second driver C6.

The first receiver / equalizer C3 adjusts the amplitude / strength of the signal waveform of the input signal from the first general-purpose bus B1 according to the instruction from the CPU via the second local bus B4. This adjusted signal is sent to the second general-purpose bus B2 after passing through the first driver C4.

Similarly, the second receiver / equalizer C5 adjusts the amplitude / strength of the signal waveform of the input signal from the second general-purpose bus B2 by the instruction from the CPU via the second local bus B4. This adjusted signal is transmitted to the first general-purpose bus B1 after passing through the second driver C6.

The illustrated waveform check circuit 14 measures the waveform of the second general-purpose bus B2 for a certain period of time, collects time and voltage level information, and then collects (checks) the waveform information of the third local bus. Transfer to the bus control circuit 11 via B5. In this way, the waveform check circuit 14 sends the waveform information of the checked waveform to the bus control circuit 11 via the third local bus B5.

Next, the memory table 111 incorporated in the bus control circuit 11 will be described with reference to FIGS. 4 and 5.

As shown in FIG. 4, the bus control circuit 11 measures the optimum waveform in the general-purpose bus control device 1 in advance. In FIG. 4, the horizontal axis represents the time axis and the vertical axis represents the voltage level.

Then, the bus control circuit 11 stores the contents as shown in FIG. 5 as a parameter indicating the shape of the optimum waveform in the memory table 111. The voltage value shown in FIG. 5 may have a certain range. As described above, the memory table 111 stores the optimum waveform information indicating the optimum waveform in advance.

FIG. 6 is a block diagram showing an internal configuration of a CPU (control unit) 110 included in the bus control circuit 11.

As shown in FIG. 6, the CPU (control unit) 110 includes an acquisition unit 113, a comparison unit 115, and a change / setting unit 117.

The acquisition unit 113 acquires the waveform information of the waveform checked by the waveform check circuit 14 via the third local bus B5.

The comparison unit 115 compares the waveform information of the waveform acquired by the acquisition unit 113 with the optimum waveform information indicating the optimum waveform stored in advance in the memory table 111.

The change / setting unit 117 can be set to change the optimum values of the bus controller 12 and the redriver 13 according to the comparison result of the comparison unit 115, as will be described later.

More specifically, when the comparison results in the comparison unit 115 do not match, the change / setting unit 117 is set to change the optimum values of the bus controller 12 and the redriver 13. The change / setting unit 117 includes a register 119 that holds the changed drive strength setting value.

The acquisition unit 113, the comparison unit 115, and the change / setting unit 117 repeat the operation until the comparison results of the comparison unit 115 match.

As described above, in the first embodiment, the state of the waveforms of the general-purpose buses B1 and B2 is confirmed with respect to the general-purpose bus control device 1 in which the device 15 is connected to the general-purpose buses B1 and B2 such as SATA / USB. It has a built-in waveform check circuit 14 that can be used. As a result, the signal strengths of the general-purpose buses B1 and B2 are changed to cope with the change in the optimum value.

Next, the operation of the general-purpose bus control device 1 according to the first embodiment of the present invention will be described with reference to FIG. 7.

First, the waveform check circuit 14 records the amplitude information of the waveform of the second general-purpose bus B2 as a numerical value, and transmits it to the bus control circuit 11 as "waveform information" via the third local bus B5.

In the bus control circuit 11, the acquisition unit 113 acquires this “waveform information” (step S1).

Next, in the bus control circuit 11, the comparison unit 115 compares the acquired “waveform information” with the “optimal waveform information” stored in advance in the memory table 111 (step S2).

When the acquired "waveform information" and "optimal waveform information" match as a result of comparison by the comparison unit 115 (step S3; YES), the change / setting unit 117 does not change the setting, and the operation is performed. It will be the end.

Here, the fact that the acquired "waveform information" and "optimal waveform information" match is not only when both information exactly match (without error), but also within a predetermined tolerance. Note that this includes cases where both pieces of information match.

On the other hand, when the acquired "waveform information" and "optimal waveform information" do not match as a result of comparison by the comparison unit 115 (step S3; NO), the change / setting unit 117 changes and sets the "drive strength setting" of the register 119. By changing and rewriting the value of "value", the amplitude / intensity of the signal waveform in the bus controller 12 is adjusted via the first local bus B3. Further, the change / setting unit 117 performs the same processing on the redriver 13 via the second local bus B4 (step S4).

The bus controller 12 and the redriver 13 whose "drive strength set value" is rewritten in step S4 change the drive waveforms of the first general-purpose bus B1 and the second general-purpose bus B2, respectively (step S5). ..

After step S5, the bus control circuit 11 performs processing again in the order of step S1, step S2, and step S3. If the acquired "waveform information" and "optimal waveform information" match in step S3 (step S3; YES), the operation ends. If the acquired "waveform information" and "optimal waveform information" do not match in step S3 (step S3; NO), the bus control circuit 11 again performs step S4, step S5, step S1, step S2, and step S3. And repeats a series of processes until the acquired "waveform information" and "optimum waveform information" match.

The operation of the general-purpose bus control device 1 described above is always performed when the device 15 is replaced. Further, the operation of the general-purpose bus control device 1 is periodically performed even during the operation of the device. However, the operation of the general-purpose bus control device 1 may be performed irregularly during the operation of the device.

Next, the effect of the first embodiment will be described.

The first effect is that the first embodiment is not a method of determining the optimization of the waveform with or without an error, so that it is periodically general-purpose not only at the time of starting the device but also during the operation of the device. It is possible to optimize the setting of the waveform of the bus.

The second effect is that, in the first embodiment, adjustment is performed until the waveform value matches the optimum waveform value, so that an ideal waveform state with a larger margin can always be maintained.

In the first embodiment, an example including a bus controller 12 and a redriver 13 as a drive circuit will be described, but the present invention is not limited thereto. That is, the present invention may include only the bus controller 12 as the drive circuit.

As described above, each part of the bus control circuit 11 can be realized by using a combination of hardware and software. In the form of combining hardware and software, a general-purpose bus control program is developed in a RAM (random access memory), and hardware such as a control unit (CPU) 110 is operated based on the general-purpose bus control program. Realize each part as various means. Further, the general-purpose bus control program may be recorded on a recording medium and distributed. The general-purpose bus control program recorded on the recording medium is read into the memory via wire, wireless, or the recording medium itself, and operates the control unit and the like. Examples of recording media include optical disks, magnetic disks, semiconductor memory devices, hard disks, and the like.

To explain the first embodiment in another expression, the computer (CPU 110) operated as the bus control circuit 11 is modified by the acquisition unit 113, the comparison unit 115, and the modification unit based on the general-purpose bus control program developed in the RAM. -It can be realized by operating as the setting unit 117.

[Second Embodiment]
FIG. 8 is a block diagram showing a configuration of a general-purpose bus control device 1A according to a second embodiment of the present invention.

The illustrated general-purpose bus control device 1A has and operates in the same configuration as the general-purpose bus control circuit 1 shown in FIG. 1, except that it further includes another waveform check circuit 16. Therefore, those having the same function are designated by the same reference numerals, and the description thereof will be omitted for the sake of simplification of the description. In the following, only the differences will be described.

The waveform check circuit 16 is a circuit for checking the waveform of the first general-purpose bus B1. The waveform information indicating the waveform checked by the waveform check circuit 16 is sent to the bus control circuit 11 via the fourth local bus B6.

The bus control circuit 11 includes a switch (switching circuit) (not shown), and selects the optimum value for each of the first general-purpose bus B1 and the second general-purpose bus B2 in order. Further, the bus control circuit 11 includes two registers 119 (FIG. 6) for each of the first general-purpose bus B1 and the second general-purpose bus B2.

For example, first, in order to set an optimum value for the first general-purpose bus B1, the bus control circuit 11 acquires the waveform information of the waveform checked by the waveform check circuit 16 via the fourth local bus B6. .. Then, the bus control circuit 11 controls the bus controller 12 by the above-mentioned operation to adjust the amplitude / intensity of the signal waveform of the first general-purpose bus B1.

After the adjustment is completed, in order to set the optimum value for the second general-purpose bus B2, the bus control circuit 11 transfers the waveform information of the waveform checked by the waveform check circuit 14 to the third local bus B5. Get through. Then, the bus control circuit 11 controls the redriver 13 by the above-mentioned operation to adjust the amplitude / intensity of the signal waveform of the second general-purpose bus B2.

The order of selecting the optimum values is not limited to this, and it goes without saying that the second general-purpose bus B2 may be selected first, and then the first general-purpose bus B1 may be selected.

As described above, in the second embodiment, since the two waveform check circuits 14 and 16 are arranged, it is possible to confirm the waveform state of the general-purpose bus in more detail.

Of course, the number of waveform check circuits is not limited to two, and may be three or more.

[Third Embodiment]
FIG. 9 is a block diagram showing a configuration of a general-purpose bus control device 1B according to a third embodiment of the present invention.

The illustrated general-purpose bus control device 1B includes a bus controller 12, a redriver 13, a waveform check device 14A, and a device 15.

That is, the general-purpose bus control circuit 1B according to the third embodiment omits the bus control circuit 11 from the general-purpose bus control device 1 according to the first embodiment, and replaces the waveform check circuit 14 with the waveform check device 14A. It has a similar configuration. Hereinafter, only the differences from the first embodiment will be described.

The waveform check device 14A has a built-in memory table 111, and also includes a waveform check circuit 14, an acquisition unit 113, a comparison unit 115, and a change / setting unit 115.

By adopting such a configuration, in the third embodiment, it is possible to directly change the settings of the bus controller 12 and the redriver 13 from the waveform check device 14A.

Although the present invention has been described above with reference to the embodiments, the present invention is not limited to the above embodiments. Various modifications that can be understood by those skilled in the art can be made to the structure and details of the present invention within the scope of the present invention.

Some or all of the above embodiments may also be described, but not limited to:

(Appendix 1) A method of controlling a general-purpose bus connected to a device.
The check process for checking the waveform of the general-purpose bus and
The acquisition process for acquiring the checked waveform and
A comparison step of comparing the acquired waveform with the optimum waveform stored in advance,
When the comparison results do not match, the change / setting process for setting to change the optimum value of the drive circuit for driving the general-purpose bus, and the change / setting process.
General-purpose bus control method including.

(Supplementary note 2) The general-purpose bus control method according to Supplementary note 1, wherein the acquisition step, the comparison step, and the change / setting step are repeated until the comparison results match.

(Appendix 3) A general-purpose bus control device that controls a general-purpose bus connected to a device.
The drive circuit that drives the general-purpose bus and
A memory table that stores the optimum waveform on the general-purpose bus in advance,
A waveform check circuit that checks the waveform of the general-purpose bus, and
An acquisition means for acquiring the checked waveform, and
A comparison means for comparing the acquired waveform with the optimum waveform stored in advance, and
A change / setting means that can be set to change the optimum value of the drive circuit according to the comparison result, and
A general-purpose bus control device equipped with.

(Supplementary note 4) The general-purpose bus control device according to Supplementary note 3, further comprising a control unit having the acquisition means, the comparison means, and the change / setting means.

(Supplementary Note 5) The general-purpose bus control device according to Supplementary Note 3, further comprising a waveform check device having the waveform check circuit, the acquisition means, the comparison means, and the change / setting means.

(Supplementary note 6) The general-purpose bus control device according to Supplementary note 3, further comprising a plurality of the waveform check circuits.

(Appendix 7) The device is one of Appendix 3 to 6, which comprises a hard disk drive (HDD), a solid state drive (SSD), an optical drive, a recording drive, and a drive selected from the group of peripheral devices. The general-purpose bus control device described.

(Appendix 8) The general-purpose bus consists of a serial bus specified by a serial bus interface standard selected from the group of serial advanced technology attachment (SATA) and universal serial bus (USB), and is any one of appendices 3 to 7. The general-purpose bus control device described in 1.

(Supplementary Note 9) The general-purpose bus control device according to any one of Supplementary note 3 to 8, wherein the drive circuit includes a bus controller for adjusting the amplitude and intensity of a signal waveform of the general-purpose bus.

(Appendix 10) The general-purpose bus control according to Appendix 9, wherein the drive circuit is provided between the device and the bus controller and further includes a driver for adjusting the amplitude and intensity of the signal waveform of the general-purpose bus. Device.

(Appendix 11) A general-purpose bus control program that causes a computer to control a general-purpose bus connected to a device.
The acquisition procedure for acquiring the waveform of the general-purpose bus checked by the waveform check circuit, and
A comparison procedure for comparing the acquired waveform with the optimum waveform stored in advance, and
When the comparison results do not match, the change / setting procedure for setting to change the optimum value of the drive circuit for driving the general-purpose bus and the setting procedure.
A general-purpose bus control program for executing.

(Appendix 12) The general-purpose bus control program according to Annex 11, which causes the computer to repeatedly execute the acquisition procedure, the comparison procedure, and the change / setting procedure until the comparison results match.

The present invention can be applied to improve the reliability of a computer device in general.

1, 1A, 1B General-purpose bus control device 11 Bus control circuit (CPU / chipset)
110 CPU (control unit)
111 Memory table 113 Acquisition unit 115 Comparison unit 117 Change / setting unit 119 Register 12 Bus controller (driver chip)
13 Redriver (redriver chip)
14 Waveform check circuit 14A Waveform check device 15 device 16 Waveform check circuit B1, B2 General-purpose bus B3 to B6 Local bus C1 driver / equalizer C2 receiver / equalizer C3 receiver / equalizer C4 driver C5 receiver / equalizer C6 driver

Claims (10)

A method of controlling a general-purpose bus connected to a device,
A check step of checking the waveform by measuring the waveform of the general-purpose bus for a certain period of time and outputting waveform information obtained by recording the amplitude information of the checked waveform as a numerical value .
The acquisition process for acquiring the waveform information of the checked waveform, and
A comparison step of comparing the waveform information of the acquired waveform with the optimum waveform information in which the amplitude information of the optimum waveform stored in advance for a certain period is recorded as a numerical value.
When the comparison results do not match, the change / setting process for setting to change the optimum value of the drive circuit for driving the general-purpose bus, and the change / setting process.
General-purpose bus control method including. The general-purpose bus control method according to claim 1, wherein the check step, the acquisition step, the comparison step, and the change / setting step are repeated until the comparison results match. A general-purpose bus control device that controls a general-purpose bus connected to a device.
The drive circuit that drives the general-purpose bus and
A memory table that stores in advance the optimum waveform information in which the amplitude information of the optimum waveform for a certain period on the general-purpose bus is recorded as a numerical value , and
A waveform check circuit that checks the waveform by measuring the waveform of the general-purpose bus for a certain period of time , records the amplitude information of the checked waveform as a numerical value, and outputs waveform information .
An acquisition means for acquiring the waveform information of the checked waveform, and
A comparison means for comparing the waveform information of the acquired waveform with the optimum waveform information of the optimum waveform stored in advance, and
A change / setting means that can be set to change the optimum value of the drive circuit according to the comparison result, and
A general-purpose bus control device equipped with. The general-purpose bus control device according to claim 3, further comprising a control unit having the acquisition means, the comparison means, and the change / setting means. The general-purpose bus control device according to claim 3, further comprising a waveform check device having the waveform check circuit, the acquisition means, the comparison means, and the change / setting means. The general purpose according to any one of claims 3 to 5, wherein the device comprises a hard disk drive (HDD), a solid state drive (SSD), an optical drive, a recording drive, and a drive selected from the group of peripheral devices. Bus control device. The general-purpose bus according to any one of claims 3 to 6, wherein the general-purpose bus comprises a serial bus specified by a serial bus interface standard selected from the group of serial advanced technology attachment (SATA) and universal serial bus (USB). General-purpose bus control device. The general-purpose bus control device according to any one of claims 3 to 7, wherein the drive circuit includes a bus controller that adjusts the amplitude and intensity of the signal waveform of the general-purpose bus. The general-purpose bus control device according to claim 8, wherein the drive circuit is provided between the device and the bus controller, and further includes a redriver that adjusts the amplitude and intensity of the signal waveform of the general-purpose bus. A general-purpose bus control program that causes a computer to control a general-purpose bus connected to a device.
The waveform is checked by measuring the waveform of the general-purpose bus for a certain period of time by the waveform check circuit, and the acquisition procedure of acquiring the waveform information in which the amplitude information of the checked waveform is recorded as a numerical value, and the acquisition procedure.
A comparison procedure for comparing the waveform information of the acquired waveform with the optimum waveform information in which the amplitude information of the optimum waveform stored in advance for a certain period is recorded as a numerical value.
When the comparison results do not match, the change / setting procedure for setting to change the optimum value of the drive circuit for driving the general-purpose bus and the setting procedure.
A general-purpose bus control program for executing.

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