JP6823407B2 - Image display device and image display method - Google Patents

Description

The present invention relates to an image display device and an image display method.

In a conventional image display device using a single LCD panel, a visual gradation linearity characteristic is realized by correcting an input image with a polygonal line gamma with a panel driver.

However, in reality, since the brightness is expressed by transmitting the illumination of the backlight through the liquid crystal panel, the gradation characteristics in the black region are particularly poor, and the brightness is observed in a brighter direction than the ideal brightness. The so-called black floating phenomenon occurs.

This phenomenon occurs because the LCD panel is not completely shielded from light when displaying a dark area on the LCD panel, and the illumination light of the backlight leaks. A contrast ratio of about 10000: 1 is realized in a conventional CRT, and a contrast ratio of about 1,000,000: 1 is realized in an organic EL panel. However, due to this phenomenon, a contrast ratio of only about 1500: 1 can be realized in a conventional image display device using a single LCD panel.

Therefore, in order to improve the contrast ratio of such a single LCD image display device, an image display device using two LCD panels has been proposed (see, for example, Patent Documents 1 and 2). Each image display device uses two LCD panels, adjusts the amount of backlight transmission on the rear LCD, and displays RGB on the front LCD panel to improve the contrast ratio. There is.

FIG. 14 shows a conventional image display device 100 using two LCD panels. The LCD panel on the rear backlight 103 side is referred to as an LV panel (Light Valve Panel) 102, and the front LCD panel on the side closer to the person viewing the image is referred to as an RGB panel 101. The RGB panel 101 is composed of R, G, and B sub-pixels. On the other hand, in the LV panel 102, the sub-pixels of R, G, and B are combined into one pixel. That is, one pixel of the LV panel 102 is common to one pixel of the sub-pixels of the RGB panel 101, and there is a one-to-one correspondence.

As described above, in the conventional configuration using two LCD panels, the pixels of the RGB panel 101 and the pixels of the LV panel 102 have a one-to-one correspondence, so that when the two panels are overlapped, they are minute. Moire may be visible when the image is displayed due to the inevitable deviation. In order to solve this, the shape of the pixels of the LV panel is made into a diamond shape larger than the pixels of the RGB panel, and the pixels are arranged in an oblique grid pattern, thereby trying to eliminate the minute deviation that causes moire. ing.

Japanese Unexamined Patent Publication No. 5-88197 International Publication No. 2007/108183

As described above, when the shape of the pixels of the LV panel is a diamond shape larger than the pixels of the RGB panel and the pixels are arranged in an oblique grid pattern, the pixels of the RGB panel and the pixels of the LV panel are 1: 1. Since it does not correspond and the number of pixels is different, it is not easy to generate an image signal to be displayed on the LV panel so that there is no image distortion.

The problem to be solved by the present invention is that when an LCD panel in which pixels are arranged in an oblique grid pattern is used in a plurality of LCD panels, an image signal capable of generating an image signal without image distortion can be generated. It is to provide a display device and an image display method.

The image display device according to the present invention is configured by superimposing a front side LCD panel in which pixels are arranged in a grid pattern and a rear surface side LCD panel in which pixels are arranged in an oblique grid pattern, and the backlight light is emitted from the rear surface. A first controller that displays an image by transmitting the side LCD panel and the front LCD panel in this order, and generates an output RGB image signal from the RGB image signal and supplies it to the front LCD panel. A second controller that generates an output gray image signal in which pixels are arranged in an oblique grid pattern from the RGB image signal and supplies the output gray image signal to the rear side LCD panel, which is a gray scale image signal, is provided. The two controllers calculate the positional correspondence between each of the pixels arranged in an oblique grid pattern and each of the pixels arranged in a grid pattern, and generate the output gray image signal based on the positional correspondence relationship. It is provided with a resolution conversion processing unit to generate.

Further, the image display method according to the present invention is configured by superimposing a front side LCD panel in which pixels are arranged in a grid pattern and a rear surface side LCD panel in which pixels are arranged in an oblique grid pattern, and the backlight light is emitted. It is an image display method executed by an image display device that displays an image by transmitting the rear side LCD panel and the front side LCD panel in this order, and generates an output RGB image signal from the RGB image signal to generate the front side. It is supplied to the side LCD panel, the positional correspondence between each of the pixels arranged in an oblique grid pattern and each of the pixels arranged in a grid pattern is calculated, and the positional correspondence relationship is obtained from the RGB image signal. Based on this, an output gray image signal in which pixels are arranged in an oblique grid pattern, which is a gray scale image signal, is generated and supplied to the rear side LCD panel.

According to the present invention, an image display device and an image capable of generating an image signal without image distortion when an LCD panel in which pixels are arranged in an oblique grid pattern are used in a plurality of LCD panels. A display method can be provided.

It is a signal processing block diagram of the image display device in embodiment of this invention. It is the schematic sectional drawing of the image display device in the said embodiment. It is a partially enlarged view of (a) schematic plan view and (b) schematic plan view of the image display device in the said embodiment. It is a more detailed signal processing block diagram by the RGB controller and the LV controller included in the image display device in the said embodiment. It is explanatory drawing of the bit expansion processing by the bit expansion circuit in the said embodiment. It is explanatory drawing of the local edge hold processing by the edge hold circuit in the said embodiment. It is explanatory drawing about the pixel of the LV panel in the said embodiment. It is explanatory drawing concerning the calculation of the position correspondence relation in the said embodiment. It is a signal processing block diagram of the resolution conversion processing unit in the said embodiment. It is a signal processing block diagram of the pixel correspondence relation calculation circuit in the said embodiment. It is a signal processing block diagram of the output gray image luminance calculation circuit in the said embodiment. It is explanatory drawing of the resolution conversion processing part in the said embodiment. It is a signal processing block diagram of the output gray image luminance calculation circuit in the 1st modification of the said embodiment. It is explanatory drawing of the conventional image display apparatus using two LCD panels.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

The image display device according to the present embodiment is configured by superimposing a front side LCD panel in which pixels are arranged in a grid pattern and a rear side LCD panel in which pixels are arranged in an oblique grid pattern, and the backlight light is on the rear side. An image display device that displays an image by transmitting the LCD panel and the front LCD panel in this order, and the first controller that generates an output RGB image signal from the RGB image signal and supplies it to the front LCD panel, and RGB. The second controller includes a second controller that generates an output gray image signal in which pixels are arranged in an oblique grid pattern from the image signal and supplies the output gray image signal to the rear LCD panel. A resolution conversion processing unit that calculates the positional correspondence between each of the pixels arranged in a grid pattern and each of the pixels arranged in a grid pattern and generates an output gray image signal based on the positional correspondence relationship is provided.

FIG. 1 is a signal processing block diagram of the image display device 10 according to the present embodiment. The image display device 10 includes an image display device main body 20 and an LCD module 30.

The image display device main body 20 includes an image processing engine 21. On the other hand, the LCD module 30 includes an I / F (interface) 31, a bit expansion circuit 32, an RGB controller (first controller) 33, an LV (light valve) controller (second controller) 34, and an RGB panel (front LCD panel). It includes 35 and an LV panel (rear side LCD panel) 36.

The image processing engine 21 in the image display device main body 20 generates an RGB image and transmits it to the LCD module 30. The I / F 31 in the LCD module 30 receives the RGB image generated by the image processing engine 21 and transmits the luminance values of the sub-pixels R, G, and B in each pixel to the bit expansion circuit 32. The bit expansion circuit 32 performs bit expansion processing as described later on the RGB image, and transmits the bit-expanded RGB image signal to the RGB controller 33 and the LV controller 34.

The RGB controller 33 generates an output RGB image signal from the RGB image signal received from the bit expansion circuit 32 and supplies it to the RGB panel 35. The LV controller 34 generates an output gray image signal, which is a gray scale image signal expressed only by light and dark from white to black, from the RGB image signal received from the bit expansion circuit 32, and supplies the output gray image signal to the LV panel 36.

The RGB panel 35 receives and displays the output RGB image signal. Further, the LV panel 36 receives and displays the output gray image signal.

FIG. 2 is a schematic cross-sectional view of the image display device 10 shown in FIG. In addition to the RGB panel 35 and the LV panel 36, the image display device 10 includes a backlight unit 37 and a lamination 38 for joining the RGB panel 35 and the LV panel 36.

The RGB panel 35 includes a color filter substrate 35b, a TFT substrate 35c, a polarizing film 35a, and a drive IC 35d. The color filter substrate 35b is a substrate on which a black matrix, R, G, and B color filters are arranged and a common electrode or the like is formed. The TFT substrate 35c is a substrate on which a TFT, electrodes, and the like are formed on the liquid crystal side.

The polarizing film 35a polarizes the light emitted from the backlight unit 37. The drive IC 35d displays the RGB image processed by the RGB controller 33 on the RGB panel 35 by driving the TFT substrate 35c.

On the other hand, the LV panel 36 includes a glass substrate 36a, a TFT substrate 36b, a polarizing film 36c, and a drive IC 36d. The glass substrate 36a corresponds to the color filter substrate 35b in the RGB panel 35, but unlike the color filter substrate 35b, it does not have a black matrix or a color filter. This is based on the LV panel 36 displaying a grayscale output gray image signal.

The TFT substrate 36b and the polarizing film 36c are the same as the TFT substrate 35c and the polarizing film 35a of the RGB panel 35. The drive IC 36d displays the output gray image signal processed by the LV controller 34 on the LV panel 36 by driving the TFT substrate 36b.

The backlight unit 37 includes an optical guide panel 37a and a light source 37b. The light source 37b irradiates the light guide panel 37a with light. The light guide panel 37a refracts the light emitted from the light source 37b and irradiates the LV panel 36. The light emitted from the light guide panel 37a passes through the stacked LV panel 36 and the RGB panel 35 in order, and reaches the human eye viewing the image display device.

The contrast ratios of the RGB panel 35 and the LV panel 36 are 1500: 1, which is the same as that of the conventional single LCD panel. However, by adopting the two-panel LCD panel structure as shown in FIG. 2, the contrast ratio is improved to 2,250,000: 1.

FIG. 3A is a schematic plan view of the image display device 10, and FIG. 3B is an enlarged view of a portion seen by an arrow A in FIG. 3A. The RGB panel 35 and the LV panel 36 are arranged so as to be overlapped with each other as shown in FIG. 3A when viewed from the front.

As shown in FIG. 3B, in the RGB panel 35, the pixels 41 are arranged in a grid pattern. On the other hand, in the LV panel 36, each pixel 45 is formed in a diamond shape, and the diamond-shaped pixels 45 are arranged diagonally. That is, focusing only on the aspect of pixel arrangement, the pixels 45 in the LV panel 36 are provided so that the pixels arranged in a grid pattern are rotated by 45 °, that is, they are arranged in a diagonal grid pattern. .. Hereinafter, the pixels 41 arranged in a grid pattern on the RGB panel 35 are referred to as the first pixel 41, and the pixels 45 arranged in an oblique grid pattern on the LV panel 36 are referred to as the second pixel 45, respectively. ..

As shown in FIG. 3, the area of the LV panel 36 is larger than the area of the RGB panel 35. This is due to the following reasons. The RGB panel 35 displays an RGB image, and the LV panel 36 adjusts the brightness of the RGB image displayed on the RGB panel 35 for each second pixel 45. Since the second pixel 45 of the LV panel 36 has a diamond shape, the outer circumference 36e of the LV panel 36 is formed in a wavy shape. Therefore, if the sizes of the RGB panel 35 and the LV panel 36 are the same, the outer circumference 35e of the RGB panel 35, which should be displayed in a straight line, is displayed in a wavy shape. In order to solve this problem, when the RGB panel 35 and the LV panel 36 are overlapped as shown in FIG. 3A, the outer circumference 36e of the LV panel 36 is located sufficiently outside the outer circumference 35e of the RGB panel 35. Two panels are provided.

The second pixel 45 of the LV panel 36 is larger than the first pixel 41 of the RGB panel 35 in order to surely eliminate moire.

FIG. 4 is a more detailed signal processing block diagram by the bit expansion circuit 32, the RGB controller 33, and the LV controller 34 included in the image display device 10 of the present embodiment.

The RGB controller 33 includes a delay circuit 331, an RGB gradation conversion circuit 332 having six LUTs (Look Up Tables) 3321, 3322, 3323, 3324, 3325, and 3326, and a color balance controller 333.

The LV controller 34 includes a gray image luminance calculation unit 341 and a resolution conversion processing unit 342. The gray image luminance calculation unit 341 includes a gray converter 3411, an LV gradation conversion circuit (gray gradation conversion circuit) 3412 having one LUT 3412, an edge hold circuit 3413, and an LPF (low pass filter) circuit 3414. The resolution conversion processing unit 342 includes a pixel correspondence calculation circuit 3421 and an output gray image luminance calculation circuit 3422.

Hereinafter, each component of the bit expansion circuit 32, the RGB controller 33, and the LV controller 34 will be described in the order of signal flow.

The bit expansion circuit 32 receives the RGB image signals R, G, and B transmitted by the I / F 31 shown in FIG. 1, and bit-extends the brightness values of each subpixel of the RGB image signals R, G, and B. The processing is performed to generate RGB image signals (RGB image signals) R1, G1 and B1 after bit expansion. In the RGB image signals R, G, and B input to the bit expansion circuit 32, the pixels are arranged in a grid pattern corresponding to the first pixel 41 of the RGB panel 35. The bit expansion circuit 32 includes corresponding bit expansion circuits 321, 322, and 323 for each of the RGB image signals R, G, and B. Here, the bit expansion circuit 321 corresponding to the image signal R will be described. The bit expansion circuits 322 and 323 corresponding to the image signals G and B are also configured in the same manner as the bit expansion circuits 321 corresponding to the image signals R.

The bit expansion circuit 321 performs bit expansion processing to 12 bits for each of the input RGB 8-bit images. This bit expansion process expands the bit length with high accuracy in advance so as not to reduce the bit accuracy in the subsequent processing.

In the bit expansion circuit 321 of the present embodiment, as shown in FIG. 5A, it is assumed that the 8-bit data 50, that is, the 8-bit image signal is expanded to, for example, 12 bits to become the 12-bit data 52. To do. When an analog image signal is quantized into 8 bits, changes below the bit resolution are rounded and discarded. However, since the image has a high correlation between adjacent pixels, it can be restored to some extent by introducing the following method.

FIG. 5B is an explanatory diagram of a pixel to be processed, that is, a pixel of interest X5, and FIG. 5C is an example in which the procedure of bit expansion processing is expressed in a program format. As shown in FIG. 5, the bit expansion circuit 321 has the brightness of the pixel of interest X5 with respect to the adjacent eight pixels (X1 to X4, X6 to X9) around the pixel of interest X5 with respect to the variable dc initialized to 0. When the value is smaller than the brightness value of each adjacent pixel, +1 is calculated, and when the brightness value of the pixel of interest X5 is larger than the brightness value of each adjacent pixel, -1 is calculated.

Further, the bit expansion circuit 321 adds the total value, that is, the value obtained by dividing the dc by 8 as the weight 51 after the decimal point to the pixel of interest X5, multiplies it by 16, and performs rounding processing to perform 8 bits to 12 bits. Extend to.

In general, adjacent pixels of an image have a property of having similar brightness values. For example, when the brightness values of peripheral pixels are all larger than the brightness value of the pixel of interest X5, the brightness value of each pixel is high. The waveform at the analog value, which is the original value before being rounded to 8 bits, has a continuous concave shape, and the analog value, which is the original value of the brightness value of the pixel of interest X5, is the data rounded to 8 bits. It is estimated that it will be larger than.

On the other hand, on the contrary, when the brightness values of the surrounding pixels are all smaller than the brightness value of the pixel of interest X5, the waveform in the analog value, which is the original value before the brightness value of each pixel is rounded to 8 bits, is It has a continuous convex shape, and it is estimated that the analog value, which is the original value of the brightness value of the pixel of interest X5, will be smaller than the data rounded to 8 bits. Therefore, the bit expansion circuit 321 will perform the bit expansion process as shown in FIG. 5 described above based on such a basis.

In the RGB image signals R1, G1, and B1 after bit expansion, which have been bit-expanded by the bit expansion circuit 32, the pixels are arranged in a grid pattern corresponding to the first pixel 41 of the RGB panel 35.

The bit expansion circuit 32 transmits the bit-expanded RGB image signals R1, G1, and B1 to the delay circuit 331 of the RGB controller 33 and the gray image luminance calculation unit 341 of the LV controller 34, and more specifically to the gray converter 3411. To do.

The RGB controller 33 receives the bit-expanded RGB image signals R1, G1, and B1, generates output RGB image signals R3, G3, and B3, and supplies them to the RGB panel 35. In all the image signals handled by the internal processing of the RGB controller 33, the pixels are arranged in a grid pattern corresponding to the first pixel 41 of the RGB panel 35. That is, in the output RGB image signals R3, G3, and B3 output by the RGB controller 33, the pixels are arranged in a grid pattern corresponding to the first pixel 41 of the RGB panel 35.

The delay circuit 331 of the RGB controller 33 receives the RGB image signals R1, G1, and B1 after bit expansion. The delay circuit 331 applies an appropriate delay to the received RGB image signals R1, G1, and B1. This "appropriate delay" means that the delay circuit 331 and the RGB gradation conversion circuit 332 are provided by compensating for the delay in processing by the gray converter 3411, the edge hold circuit 3413, and the LPF circuit 3414 in the LV controller 34. This is for synchronizing the RGB image signals R2, G2, and B2 after gradation conversion transmitted to the color balance controller 333 via the LV controller 34 with the intermediate gray image signal W3 transmitted from the LV controller 34.

The delay circuit 331 transmits the delayed RGB image signals R1, G1, and B1 to the RGB gradation conversion circuit 332.

The gray image luminance calculation unit 341 of the LV controller 34 generates an intermediate gray image signal W3 from the RGB image signals R1, G1, and B1 after bit expansion. In the intermediate gray image signal W3, the pixels are arranged in a grid pattern corresponding to the first pixel 41 of the RGB panel 35. The gray image brightness calculation unit 341 determines the brightness value of each pixel in the intermediate gray image signal W3 having a pixel configuration corresponding to the first pixel 41 of the RGB panel 35, and is a resolution conversion processing unit 342 described later. However, the intermediate gray image signal W3 having a pixel configuration corresponding to the first pixel 41 is converted into an output gray image signal W4 in which pixels are arranged in an oblique grid pattern corresponding to the second pixel 45 of the LV panel 36. It is converted and the output gray image signal W4 is supplied to the LV panel 36.

The pixel configuration corresponding to the first pixel 41 of the RGB panel 35 in each image signal handled by the gray image luminance calculation unit 341, including the intermediate gray image signal W3, is determined by the resolution conversion processing unit 342 in the subsequent stage of the LV panel 36. Since it is converted into a pixel configuration corresponding to the second pixel 45 of the above, it is a virtual one that is not actually output to the LV panel 36. Therefore, thereafter, in the LV controller 34, the pixels in each image signal having the pixel configuration corresponding to the first pixel 41 of the RGB panel 35 before being converted into the pixel configuration corresponding to the second pixel 45 of the LV panel 36 are used. , Called a virtual pixel.

The gray converter 3411, which is the circuit in the front stage of the gray image luminance calculation unit 341, receives the RGB image signals R1, G1, and B1 after bit expansion from the bit expansion circuit 32.

The gray converter 3411 generates an initial gray image signal W1 which is a gray scale image signal from the RGB image signals R1, G1 and B1. That is, the gray converter 3411 selects the luminance value of each of the RGB sub-pixels, that is, the maximum value among the RGB image signals R1, G1, and B1 for each virtual pixel for the RGB image signals R1, G1, and B1. Then, by setting this as the representative value W1, it is converted into a gray image.

The gray converter 3411 transmits the brightness value of each virtual pixel of the generated gray image as the initial gray image signal W1 to the LV gradation conversion circuit 3412.

The RGB gradation conversion circuit 332 of the RGB controller 33 receives the RGB image signals R1, G1, and B1 from the delay circuit 331, gradation-converts the RGB image signals R1, G1, and B1, and the RGB image signal after the gradation conversion. Generates R2, G2, and B2. Further, the LV gradation conversion circuit 3412 of the LV controller 34 receives the initial gray image signal W1 from the gray converter 3411 and performs gradation conversion of the initial gray image signal W1 to generate the gray image signal W2 after the gradation conversion. ..

In the present embodiment, there are four types of LUTs, that is, a LUT (R) which is a LUT for the subpixel R, a LUT (G) which is a LUT for the subpixel G, and a LUT (B) which is a LUT for the subpixel B. ) And LUT (W) which is a LUT for a gray image are used. The RGB gradation conversion circuit 332 in the RGB controller 33 includes one LUT (R) 3321, LUT (G) 3322, LUT (B) 3323, and three LUTs (W) 3324, 3325, and 3326, respectively. .. The LV gradation conversion circuit 3412 in the LV controller 34 includes a LUT (W) 3412.

The gradation conversion characteristics of the LUT (R) 3321, the LUT (G) 3322, and the LUT (B) 3323 are realized by, for example, a gamma curve (Y = X ^γ ) of γ = 0.5. On the other hand, the gradation conversion characteristic of the LUT (W) 3412 measures the transmitted light of the two LCD panels while changing the LV value with respect to the RGB value, and the final synthesis result is a person. The input / output characteristics of the LV are determined so that γ = 2.2, which matches the visual characteristics of.

The RGB gradation conversion circuit 332 of the RGB controller 33 transmits the RGB image signals R2, G2, and B2 after the gradation conversion to the color balance controller 333. Further, the RGB gradation conversion circuit 332 of the RGB controller 33 performs gradation conversion on each of the RGB image signals R1, G1 and B1 by each of the LUT (W) 3324, 3325 and 3326, and the gradation conversion RGB signal L _{R, L} G, generates an _{L B,} and transmits to the color balance controller 333. Further, the LV gradation conversion circuit 3412 of the LV controller 34 transmits the gray image signal W2 after the gradation conversion to the edge hold circuit 3413.

The edge hold circuit 3413 applies the local edge hold process to the gray image signal W2 after the gradation conversion, and generates the gray image signal after the edge hold process. The edge hold circuit 3413 performs local enlargement processing of the edge region of the image. There is no problem in front view with respect to two LCD panels, but when viewed from an oblique direction, the positions of the front and rear display images shift according to the angle due to the thickness of the panel. There is a problem that double images and color shifts are visible. In order to solve this problem, the edge hold circuit 3413 corrects the viewing angle of the LV image and widens the edge, which is a portion having a large brightness difference, in the dark direction to widen the area displayed brightly.

FIG. 6 is a waveform diagram showing the operation result of the local edge hold process by the edge hold circuit 3413. FIG. 6A is an input waveform to the edge hold circuit 3413, and FIG. 6B is an output waveform with respect to the input waveform of FIG. 6A. Each white circle in FIG. 6 corresponds to the brightness value of each virtual pixel in the gray image signal W2 after gradation conversion. On the other hand, the black circle in FIG. 6B corresponds to the brightness value of the virtual pixel subjected to the edge hold processing.

As shown in FIG. 6, the edge hold circuit 3413 replaces the brightness value of the virtual pixel before or after the brightness value of the edge pixel. By performing the correction for increasing the brightness of the adjacent virtual pixels in this way, it is possible to prevent the image from becoming dark when the image display device 10 is viewed from an angle.

The edge hold circuit 3413 performs such a local edge hold process in each of the horizontal and vertical directions of the gray image signal W2 after the gradation conversion, and generates a gray image signal after the edge hold process. Then, it is transmitted to the LPF circuit 3414 shown in FIG.

The LPF circuit 3414 receives the gray image signal after the edge hold processing, applies a low-pass filter to the gray image signal after the edge hold processing, and generates an intermediate gray image signal W3. In the image in which the viewing angle is corrected by performing edge hold processing, the brightness value of each virtual pixel is adjusted as described above, but the LPF is adjusted so that the brightness value after this adjustment looks natural as the whole image. By multiplying, the change between adjacent brightness values is smoothed.

The LPF circuit 3414 transmits the intermediate gray image signal W3 to the color balance controller 333 of the RGB controller 33 and the resolution conversion processing unit 342.

Color balance controller 333, as shown in FIG. 4, RGB image signal of a gradation-converted R2, G2, B2, tone conversion RGB signals _{L R, L G, L B} , and the intermediate gray image signal W3 Output RGB image signals R3, G3, B3 are generated by performing color balance correction processing on the received RGB image signals R2, G2, and B2 after gradation conversion.

More specifically, the color balance controller 333, as in the following Equation 1, by dividing gradation conversion RGB signals _{L R,} L G, each of _{L B} in the intermediate gray image signal W3, calculates a luminance ratio Then, the output RGB image signals R3, G3, and B3 are generated by multiplying each of the RGB image signals R2, G2, and B2 after the gradation conversion by this luminance ratio.

(Number 1)
R3 = R2 × ( _LR / W3)… (1)
_{G3 = G2 × (L G /} W3)
_{B3 = B2 × (L B /} W3)

For example, consider a case where pixels representing mixed colors (R> G> B) in which RGB is not 0 are displayed. As described above, the gray converter 3411 generates a gray image with respect to the RGB image so as to be represented by the maximum value of the brightness value of each of the RGB sub-pixels for each pixel. Therefore, the intermediate gray image signal W3 having the same brightness value as R, which is the subpixel having the maximum brightness value, is generated.

When the RGB image signals R2, G2, B2 after gradation conversion and the intermediate gray image signal W3 are combined and transmitted using the RGB panel 35 and the LV panel 36, the R2 after the combined transmission is obtained. Although the desired brightness can be obtained, the color balance of G2 and B2 is lost because the intermediate gray image signal W3 is larger than the brightness value of the gray image signal originally required for the expression of G2 and B2. ..

The RGB image signal after color balance correction originally requires the luminance value of the LV image to obtain the original RGB luminance. The signals R1, G1 and B1 are converted into three LUTs in the RGB gradation conversion circuit 332, respectively. generated by the gradation conversion W) 3324,3325,3326, it should tone conversion RGB signals _{L R, L G,} is _{L B.} That is, in order to obtain the original luminance of G and B, it is necessary to change the luminance value in the LV image for each color of RGB. However, since one pixel of the LV panel is larger than each subpixel of the RGB panel, each pixel of the LV image cannot be changed for each color of RGB. Therefore, the gradation on the RGB panel side is adjusted in order to obtain the desired composite transmittance for all colors.

Therefore, it is considered to derive the adjusted luminance value by adjusting the gradation on the RGB panel side so that the combined transmittance of the RGB panel and the LV panel before and after the adjustment is equal. For this purpose, for each of the RGB image signals R2, G2, B2 of the _{tone-converted,} the _{L R / W3, L G /} W3, L B / W3 multiplied as a luminance ratio, i.e., the above equation 1 It can be seen that R3, G3, and B3 should be derived. As a result, when R3, G3, and B3 are displayed on the RGB panel 35, W3 is displayed on the LV panel 36, and these are compositely transparent, so that the color balance can be adjusted.

The color balance controller 333 transmits the output RGB image signals R3, G3, and B3 generated as described above to the RGB panel 35.

The resolution conversion processing unit 342 of the LV controller 34 receives the intermediate gray image signal W3 from the LPF circuit 3414, and has a positional correspondence relationship between each of the pixels arranged in an oblique grid pattern and each of the pixels arranged in a grid pattern. Is calculated, and the output gray image signal W4 is generated based on the positional correspondence relationship. That is, the resolution conversion processing unit 342 has a pixel configuration in which the pixels are arranged in a grid pattern corresponding to the first pixel 41 as described above through the calculation of the positional correspondence relationship and the generation of the output gray image signal W4. The provided intermediate gray image signal W3 is converted into an output gray image signal W4 having a pixel configuration in which pixels are arranged in an oblique grid pattern corresponding to the second pixel 45 of the LV panel 36. Here, first, the relationship between the pixel configuration of the intermediate gray image signal W3, that is, the pixel configuration of the virtual pixel and the pixel configuration of the second pixel 45 of the LV panel 36 is explained, and then the pixel correspondence calculation circuit 3421 and the output gray image. The brightness calculation circuit 3422 will be described.

FIG. 7 is an explanatory diagram relating to the coordinate values of the pixels of the LV panel. In FIG. 7, the relationship between the virtual pixels 44 of the intermediate gray image signal W3 arranged in a grid pattern and the second pixels 45 of the LV panel 36 is shown. The virtual pixel 44 is conceptually formed by being vertically and horizontally separated by a plurality of vertical boundary lines 44a and horizontal boundary lines 44b. In FIG. 7, the virtual pixel 44 has a rectangular shape, but since the vertical boundary line 44a and the horizontal boundary line 44b are conceptual as described above, the virtual pixel 44 is actually strict. It does not have to be rectangular, and may have a shape close to it.

As described with reference to FIG. 3, the LV panel 36 has a larger shape than the RGB panel 35. The active area 42, which is separated by the active boundary line 44c shown by the thick line in FIG. 7 and is located inside the active boundary line 44c, that is, at the lower right in FIG. 7, corresponds to the actual RGB panel 35. This is the area where the output RGB image signals R3, G3, and B3 are displayed. In FIG. 7, the vertical boundary line 44a and the horizontal boundary line 44b are also drawn by a two-dot chain line in the region opposite to the active region 42 with respect to the active boundary line 44c, that is, in the inactive region 43. In the inactive region 43, the RGB panel 35 is not actually provided with the first pixel 41, but in the calculation of the positional correspondence relationship described later, the virtual pixel 44 is assumed to be present.

Among all the virtual pixels 44 located in the entire area including the inactive area 43, the virtual pixel 44A located at the upper leftmost position on FIG. 7 is referred to as an origin pixel 44A. Further, when the virtual pixel 44 is the i-th row from the origin pixel 44A in the vertical direction and the j-th column from the origin pixel 44A in the horizontal direction, the virtual pixel 44 is assumed to be located at the (i, j) th position. It is assumed that the coordinate value of the upper left end of the virtual pixel 44 is expressed as (y _i , x _j ). For example, the origin pixel 44A is located at the (0, 0) th position, and the coordinate value (y ₀ , x ₀ ) of the upper left end O thereof is (0, 0). In FIG. 7, the virtual pixel 44B located to the right of the origin pixel 44A is located at the (0, 1) th position, and the coordinate value of the upper left end B thereof is represented as (y ₀ , x ₁ ). Further, in FIG. 7, the virtual pixel 44 represented as 44C is located at the (5, 7) th position, and the coordinate value of the upper left end C thereof is represented as (y ₅ , x ₇ ).

Next, the second pixels 45 arranged in an oblique grid pattern are formed by being diagonally separated by a plurality of oblique boundary lines 45a conceptually in FIG. 7. In FIG. 7, since the second pixel 45 is separated by the diagonal boundary line 45a, it has a rhombic shape. However, since the diagonal boundary line 45a is only conceptual as described above, it is actually The second pixel 45 does not have to have a strict rhombus shape, and may have a shape close to that.

Needless to say, the second pixel 45 is provided in an area corresponding to the active area 42 of the RGB panel 35. As described above, since the LV panel 36 has a larger shape than the RGB panel 35, the RGB panel 35 It is also provided in an area corresponding to the inactive area 43 of the above.

The second pixel 45A located at the upper leftmost position on FIG. 7 is referred to as an origin pixel 45A. Further, when the second pixel 45 is the mth row from the origin pixel 45A in the vertical direction and the nth column from the origin pixel 45A in the horizontal direction, the second pixel 45 is assumed to be located at the (m, n) th position. denote the center coordinates of the second pixel 45 with _{(y'm, x'n).}

Here, the plurality of second pixels 45, the center coordinate values y _'m in the vertical direction when the same, the plurality of second pixels 45 are intended to be on the same line. Similarly, when the center coordinates _x'n in the horizontal direction the same, the plurality of second pixels 45 are intended to be in the same column. For example, the origin pixel 45A is located at (0,0) th coordinate values of the center _{D A} is expressed as _{(y '0, x'0).} In Figure 7, the second pixel 45B located in the lower right of the origin pixel 45A is located at (1,1) th, the coordinate values of the center _{D B,} expressed as _(y 1, _{x 1).} The origin pixel 45A and the second pixel 45B are located in different rows and different columns. In Figure 7, the second pixel 45C located below the origin pixel 45A is located at (2,0) th, the coordinate values of the center _{D C,} expressed as _(y 2, _{x 0).} The origin pixel 45A and the second pixel 45C are located in different rows and in the same column. In FIG. 7, the second pixel 45E located to the right of the origin pixel 45A is located at the (0, 2) th position, and the coordinate value of the center _DE is represented as (y ₀ , x ₂ ). The origin pixel 45A and the second pixel 45E are located in the same row and in different columns. In FIG. 7, the row number m of the second pixel 45 is shown at the right end, and the column number n of the second pixel 45 is shown at the lower end.

Since the second pixel 45 is counted as described above, for example, in FIG. 7, one of the row and column numbers such as the (0, 1) th, (1, 0) th is an odd number, and the other is an even number. The second pixel 45 is not located in such a place.

FIG. 8 is a partially enlarged view of FIG. 7, focusing on the second pixel 45L, which is one second pixel 45. The operating principle of the pixel correspondence calculation circuit 3421 will be described with reference to this figure. In this figure, the second pixel 45L overlaps with a plurality of virtual pixels 44F, 44G, 44H, 44K arranged in a grid pattern. Center of the second pixel 45L is represented in FIG. _{8 D L (y'm, x'} n) and. The upper left corners of the virtual pixels 44F, 44G, 44H, 44K are F (y _i , x _j ), G (y _i , x _{j + 1} ), H (y _{i + 1} , x _j ), K (y _{i + 1} , x). _{j + 1} ). The brightness values of the corresponding pixels of the intermediate gray image signal W3 input to the resolution conversion processing unit 342 in each of the virtual pixels 44F, 44G, 44H, and 44K are d _f , d _g , d _h , and d _k. ing.

Pixel correspondence calculation circuit 3421, first, by the following equation 2, the horizontal direction, the vertical direction each offset value _x'0, calculates the y _'0.

(Number 2)
_{x'0 = (RGB_H_Size / LV_H_Size)} ... (2)
_y'0 = (RGB_V_Size / LV_V_Size)

In the above equation, RGB_H_Size and RGB_V_Size are the horizontal and vertical resolutions of the RGB panel 35, respectively, and LV_H_Size and LV_V_Size are the horizontal and vertical resolutions of the LV panel 36, respectively. RGB_H_Size is a value such as 1920, and LV_H_Size is a value such as 1771. In this case, x ′ ₀ is a value close to 1.084.

Then, the pixel correspondence calculation circuit 3421, the following equation 3, the center coordinates _{D L (y'm, x'n} ) of the second pixel 45L seek.

(Number 3)
_{x'n = x'0 + n ×} (RGB_H_Size / LV_H_Size) ... (3)
_{y'm = y'0 + m ×} (RGB_V_Size / LV_V_Size)

As described above, Equation 3 is the row number of the second pixel 45L, m is a column number, n, after it has been multiplied by the ratio of the resolution, by adding the coordinate values of the origin pixel 45A, the center coordinates D _{L (y'm, x'n)} are determined.

Pixel correspondence calculation circuit 3421, further, _{y 'm} calculated using Equation 3, each of the _x'n, separated into an integer part and a fraction part. y _'m, the integer portion of each of the _x'n, a plurality of virtual pixels 44F, 44G, 44H, among 44K, coordinate value becomes the smallest integer, the upper left corner of the virtual pixel 44F located at the upper left It corresponds to the coordinates y _i and x _j of the point F. Hereinafter, the fractional portion of the _x'n, i.e. a value obtained by subtracting the _{x j} from the _x'n, the fractional part of y _'m, i.e. the value obtained by subtracting the _{y i} from y' _m and b. In this way, that the virtual pixel 44 in which the center D _L of the second pixel 45L is positioned is a virtual pixel 44F, and, if the center D _L is in which position on the virtual pixel 44F, determined by calculation.

As described above, the pixel correspondence calculation circuit 3421 calculates a center position D _L of the second pixel 45L, the positional relationship between the virtual pixels 44 corresponding to the center position D _L. The positional correspondence relationship is calculated based on the ratio of the resolutions of the RGB panel 35 and the LV panel 36 as in the above equation 3.

The output gray image brightness calculation circuit 3422 corresponds to the brightness value of each second pixel 45L of the output gray image signal W4 and the position correspondence of the intermediate gray image signal W3 based on the position correspondence relationship calculated by the pixel correspondence calculation circuit 3421. It is calculated based on the brightness value of the corresponding virtual pixel 44F in the relationship. In the present embodiment, the brightness value of the second pixel 45L of the output gray image signal W4 is output gray between the virtual pixel 44F corresponding to the position correspondence relationship of the intermediate gray image signal W3 and the pixel in the vicinity of the virtual pixel 44F. the distance from the center position D _L of the second pixel 45L of the image signal W4, determined by calculating a weighted average of the luminance values of the virtual pixels 44.

In the present embodiment, in particular, the brightness value D of the second pixel 45L is set to the corresponding virtual pixel 44F, the virtual pixels 44G and 44H adjacent to the right and below the virtual pixel 44F, and the lower right of the virtual pixel 44F. It is calculated by the following equation from the brightness values d _f , d _g , d _h , and d _{k of the} located virtual pixel 44K.

(Number 4)
D = (2-b) × (2-a) × d _f + (2-b) × a × d _g
+ B x (2-a) x d _h + b x a x d _k ... (4)

The output gray image luminance calculation circuit 3422 calculates the luminance value D for all the second pixels 45 in this way, and outputs the result as the output gray image signal W4 to the LV panel 36.

Next, a more detailed configuration of the resolution conversion processing unit 342 will be described with reference to FIGS. 9 to 11. 9, 10, and 11 are signal processing block diagrams of the resolution conversion processing unit 342, the pixel correspondence calculation circuit 3421, and the output gray image luminance calculation circuit 3422, respectively.

The resolution conversion processing unit 342 includes six line memories 60 in order to receive the intermediate gray image signal W3. The gray image luminance calculation unit 341 shown in FIG. 4 transmits an intermediate gray image signal W3 in units of lines of virtual pixels 44 as shown in FIG. 7. In each of the line memories 60, the luminance value of the virtual pixel 44 for one line of the received intermediate gray image signal W3 is stored. When the brightness value of a new line of the intermediate gray image signal W3 is received, the first memory address calculation circuit 62 is a free line memory 60 in which no data is stored, or a value already calculated as a brightness value. Allocates the line memory 60 corresponding to the row in which is used. The allocation information of the line memory 60 is supplied as a selector signal to the selector 61a located in front of the line memory 60 and directly receiving the intermediate gray image signal W3. The selector 61a selects the line memory 60 based on the selector signal, and stores the luminance value data of the received line of the intermediate gray image signal W3 in the selected line memory 60.

A selector 61b is connected to the subsequent stage of the line memory 60, and the line memory 60 is connected to the pixel correspondence calculation circuit 3421 and the output gray image luminance calculation circuit 3422 via the selector 61b. As shown in FIG. 7, any one row of the second pixel 45, which is a set with the same vertical coordinates of the center, that is, the same row number m, extends approximately two rows of the virtual pixel 44. .. Therefore, basically, in order to calculate the luminance value corresponding to one line of the second pixel 45, it is preferable that the two line memories 60 are simultaneously accessiblely selected by the selector 61b in the subsequent stage.

However, in the present embodiment, the selector 61b in the subsequent stage is connected to the pixel correspondence calculation circuit 3421 and the output gray image luminance calculation circuit 3422 by three lines so that the three line memories 60 can be accessed at the same time. Has been done. This is because one gate line of the LV panel 36 is provided so as to straddle the two rows of the second pixel 45 as follows.

FIG. 12 shows the allocation of the second pixels 45 arranged in an oblique grid pattern to each gate line of the LV panel 36 in the present embodiment. In FIG. 12, each gate line 47 is shown separated by a thick line. In the present embodiment, only the second pixel 45 having the line number m of 0 is assigned to the first gate line 47a, but the line is assigned to the second gate line 47b. The second pixel 45 having the number m of 1 and the second pixel 45 having the line number m of 2 are assigned. As described above, in the second and subsequent gate lines 47b, 47c, 47d, 47e, 47f, 47g, the second pixel 45 corresponding to the two types of line numbers having the line number m different by 1 is one gate. It is assigned to line 47. As a result, each of the second and subsequent gate lines 47b, 47c, 47d, 47e, 47f, and 47g has a wavy shape.

Here, the output gray image signal W4 needs to be output from the LV controller 34 to the LV panel 36 in units of gate lines 47. Therefore, except for the first gate line 47a, the pixel correspondence calculation circuit 3421 and the output gray image luminance calculation circuit 3422 refer to the three consecutive rows of the virtual pixel 44 at the same time, and the row of the second pixel 45. The brightness values of two rows with different numbers m by 1 are calculated at the same time to generate a signal corresponding to one gate line 47. Therefore, in the present embodiment, there are three connection lines between the selector 61b in the subsequent stage of the line memory 60, the pixel correspondence calculation circuit 3421, and the output gray image luminance calculation circuit 3422.

FIG. 10A shows the integer part, that is, x _j , of the pixel correspondence calculation circuit 3421 from the column number n to the horizontal center coordinates x ′ _n of the second pixel 45 corresponding to the column number n. It is a block diagram of the circuit which calculates the decimal part, that is, a. A column number n stored in the register 71a, the constant RGB_H_Size / LV_H_Size stored in the memory 70a is multiplied by the multiplier 72a, as a result and an offset value stored in the memory 70b _x'0 is, It is added by the adder 73a. As a result, the above mathematical formula 3 is realized.

Output, that is, the center coordinates _x'n adder 73a is input to the separator 74a, is separated into an integer part and a fraction part, each of which is stored in the register 71c and the register 71d.

FIG. 10 (b), the pixel correspondence calculation circuit 3421, the row number m, the center coordinates y _'m in the vertical direction of the second pixel 45 corresponding to the row number m, an integer part, i.e. _{y i,} It is a block diagram of the circuit which calculates the decimal part, that is, b. Also in the center coordinates y _'m, like the center coordinates _x'n described with reference to FIG. 10 (a), the has a configuration in which Equation 3 above is realized. Center coordinate y _'m are input to the separator 74b, it is separated into an integer part and a fraction part, each of which is stored in the register 71e and the register 71f.

FIG. 10 (c), FIG. 10 (a), is calculated by the block diagram shown in FIG. 10 (b), an integer part _{x j} of the _x'n stored in the register 71c, is stored in the register 71e the integer part _{y i} of which y _'m, a virtual pixel 44F center coordinates _{D L} of the second pixel 45L shown in FIG. 8 is positioned, right virtual pixel 44F, bottom, and lower right of the virtual pixel 44G, 44H , 44K, is a block diagram of a circuit for acquiring the respective brightness values d _f , d _g , d _h , d _k . In FIG. 10C, the selector 61b located after the line memory 60 in FIG. 9 and the first memory address calculation circuit 62 for supplying the address signal to the line memory 60 are omitted, and the selector 61b omits the selector 61b. from selected three line memories 60 and are depicted as read values directly to the integer part x _j of the _x'n stored in the register 71c to the group.

In FIG. 10C, first, the luminance value corresponding to the j-th column of the virtual pixel 44 is read from each of the three line memories 60. These three values are supplied to the selector 75. The selector 75, as a selector signal, based on the integer part y _i of y _'m, generated by the Y-direction address control circuit 76, the value i, the two values of i + 1 is supplied, these Based on the values, the selector 75 selects the values d _f and d _h corresponding to the j-th column of the i-th and i + 1-th rows of the virtual pixel 44 from the three values supplied from the line memory 60. It is stored in the registers 77a and 77c directly connected to the selector 75.

Subsequently, the luminance values corresponding to the j + 1th column of the virtual pixel 44 are read from each of the three line memories 60. Two values, a value i and a value i + 1, are still supplied to the selector 75, and the selector 75 is the i-th of the virtual pixel 44 from the three values supplied from the line memory 60 in the same manner as described above. Select the values d _g and d _k corresponding to the j + 1th column of the i + 1st row. At this time, the values d _f and d _h stored in the registers 77a and 77c are moved to the registers 77b and 77d in the subsequent stage of the registers 77a and 77c by the previous calculation, and the values d _g and d _k are the registers. By being stored in 77a, 77c, all related luminance values d _f , d _g , d _h , d _k are stored in registers 77b, 77a, 77d, 77c, respectively.

FIG. 11 is a block diagram corresponding to the process of calculating the luminance value by the mathematical formula 4 in the output gray image luminance calculation circuit 3422. Weight generation circuit 78, FIG. 10 (a), the register 71d in the block diagram shown in FIG. 10 (b), are stored in 71f, decimal value a and the center coordinates y _'m of the center coordinates _x'n Based on the decimal value b, the weight values (2-b) × (2-a), (2-b) × a, b × (2-a), and b × a are applied to each of the four multipliers 79. Supply. In the four multipliers 79, the four virtual pixels 44F corresponding to the second pixel 45L in FIG. 8 acquired in the registers 77b, 77a, 77d, 77c according to FIG. 10C corresponding to each weight value. , 44G, 44H, 44K brightness values d _f , d _g , d _h , d _k are supplied. Each of the four multipliers 79 multiplies the corresponding weight value and the luminance value and supplies the adder 80. The adder 80 adds the four values supplied from each multiplier 79 to calculate the luminance value D of the second pixel 45L and stores it in the register 81.

In this way, the pixel correspondence calculation circuit 3421 and the output gray image brightness calculation circuit 3422 have the corresponding virtual pixels 44F and virtual pixels in the vicinity of the virtual pixels 44F for each of the second pixels 45L arranged in an oblique grid pattern. Pixels 44G, 44H, 44K are calculated, and the brightness value D of the second pixel 45 is calculated from the brightness values of these virtual pixels 44F, 44G, 44H, 44K. In the above description, the brightness value of the second pixel 45L corresponding to the position is calculated for an arbitrary row number m and column number n, but in actual processing, the brightness value of this brightness value is calculated. The calculation is performed sequentially from the gate line 47a located at the top in the vertical direction among the gate lines 47 shown in FIG. 12 in the downward direction. Further, even within the same gate line 47, processing is sequentially performed from the second pixel 45 located on the far left toward the right.

As described above, the pixel correspondence calculation circuit 3421 and the output gray image luminance calculation circuit 3422 calculate the luminance values of all the second pixels 45 belonging to the gate line 47 for one gate line 47. This luminance value is stored in the line memory 63 located at the subsequent stage shown in FIG. Four line memories 63 are provided after the pixel correspondence calculation circuit 3421 and the output gray image brightness calculation circuit 3422, and the second memory address calculation circuit 65 is a vacant line in which data is not stored. The memory 63 or the line memory 63 corresponding to the gate line 47 whose brightness value has already been transmitted to the LV panel 36 is allocated. The allocation information of the line memory 63 is supplied as a selector signal to the selector 64a located in front of the line memory 63 and directly receiving the luminance value of the second pixel 45. The selector 64a selects the line memory 63 based on the selector signal, and stores the luminance value data of the second pixel 45 of the gate line 47 being processed in the selected line memory 63.

As shown in FIG. 12, the two data lines 47a and 47b from the top correspond to the inactive region 43, and the luminance value of the virtual pixel 44 corresponding to the intermediate gray image signal W3 does not exist. In the same manner as above, the brightness value of the second pixel 45 cannot be calculated. Therefore, these two data lines 47a and 47b are set to have the same value as the value of the gate line 47c after calculating the value of the third gate line 47c from the top. That is, when the brightness value of the second pixel 45 of the gate line 47c is calculated and output to the line memory 63, the same value is stored in the other two line memories 63 as data for the data lines 47a and 47b. Will be done. In this way, three line memories 63 may be used for writing values at the same time.

Further, while the brightness values of the gate lines 47a, 47b, and 47c stored as described above are transmitted to the LV panel 36, the brightness values of the second pixel 45 of the next gate line 47d are calculated. Therefore, another line memory 63 for storing this is required. For this reason, four line memories 63 are provided.

The luminance value data stored in the line memory 63 is supplied to the LV panel 36 as an output gray image signal W4 via the selector 64b.

The RGB panel 35 receives and displays the output RGB image signals R3, G3, and B3. Further, the LV panel 36 receives and displays the output gray image signal W4.

Next, an image display method using the image display device 10 will be described with reference to FIGS. 1 to 12.

This image display method is configured by superimposing a front side LCD panel in which pixels are arranged in a grid pattern and a rear surface side LCD panel in which pixels are arranged in an oblique grid pattern, and the backlight light is emitted from the rear side LCD panel. This is an image display method executed by an image display device that displays an image by transmitting the images in the order of the front side LCD panel, and generates an output RGB image signal from the RGB image signal and supplies it to the front side LCD panel. The positional correspondence between each of the pixels arranged in a diagonal grid pattern and each of the pixels arranged in a grid pattern is calculated, and the pixel, which is a gray scale image signal based on the positional correspondence relationship, is obtained from the RGB image signal. Generates output gray image signals arranged in a diagonal grid and supplies them to the rear LCD panel.

Further, the output gray image signal is generated by generating an intermediate gray image signal having the same pixel arrangement as the front side LCD panel from the RGB image signal, and the center position of the pixels arranged in an oblique grid pattern on the rear side LCD panel. Includes calculating the positional correspondence of the intermediate gray image signal corresponding to the center position with the pixels arranged in a grid pattern.
Further, the generation of the output gray image signal includes calculating the luminance value of each pixel of the output gray image signal based on the luminance value of the corresponding pixel in the positional correspondence relationship of the intermediate gray image signal.

First, the image processing engine 21 in the image display device main body 20 generates an RGB image and transmits it to the LCD module 30. The I / F 31 in the LCD module 30 receives the RGB image generated by the image processing engine 21 and transmits the luminance values of the sub-pixels R, G, and B in each pixel to the bit expansion circuit 32.

The bit expansion circuit 32 receives the RGB image signals R, G, and B transmitted by the I / F 31, and performs bit expansion processing on the brightness values of the RGB image signal R, G, and B subpixels. The RGB image signals R1, G1, and B1 after bit expansion are generated. The bit expansion circuit 32 transmits the bit-expanded RGB image signals R1, G1, and B1 to the delay circuit 331 of the RGB controller 33 and the gray image luminance calculation unit 341 of the LV controller 34, and more specifically to the gray converter 3411. To do.

The gray converter 3411 receives the RGB image signals R1, G1, and B1 after bit expansion from the bit expansion circuit 32. The gray converter 3411 generates a gray image and transmits the brightness value of each virtual pixel of the generated gray image as the initial gray image signal W1 to the LV gradation conversion circuit 3412.

The LV gradation conversion circuit 3412 receives the initial gray image signal W1 from the gray converter 3411, converts the initial gray image signal W1 into gradations to generate the gray image signal W2 after gradation conversion, and causes the edge hold circuit 3413. Send to.

The edge hold circuit 3413 receives the gray image signal W2 after the gradation conversion, applies local edge hold processing to the gray image signal W2 after the gradation conversion, and generates the gray image signal after the edge hold processing. To do. The edge hold circuit 3413 transmits the gray image signal after the edge hold process to the LPF circuit 3414.

The LPF circuit 3414 receives the gray image signal after the edge hold process and applies a low-pass filter to generate the intermediate gray image signal W3. The LPF circuit 3414 transmits the intermediate gray image signal W3 to the color balance controller 333 of the RGB controller 33 and the resolution conversion processing unit 342.

The RGB gradation conversion circuit 332 of the RGB controller 33 receives the RGB image signals R1, G1 and B1 via the delay circuit 331, performs gradation conversion, and generates the RGB image signals R2, G2 and B2 after the gradation conversion. .. The RGB gradation conversion circuit 332 transmits the RGB image signals R2, G2, and B2 after the gradation conversion to the color balance controller 333. RGB grayscale conversion circuit 332, also, the RGB image signals R1, G1, B1, performs tone conversion on each of the LUT (W) 3324,3325,3326, tone conversion RGB signals _L R, _{L G} It generates an _{L B,} and transmits to the color balance controller 333.

Color balance controller 333, RGB image signal of a gradation-converted R2, G2, B2, tone conversion RGB signals _{L R, L G, L B} , and receives the intermediate gray image signal W3, the tone-converted Output RGB image signals R3, G3, B3 are generated by performing color balance correction processing on the RGB image signals R2, G2, and B2. The color balance controller 333 transmits the output RGB image signals R3, G3, and B3 to the RGB panel 35.

The resolution conversion processing unit 342 of the LV controller 34 receives the intermediate gray image signal W3 from the LPF circuit 3414. Pixel correspondence calculation circuit 3421, for each second pixel 45L, the center coordinates _{D L (y'm, x'n} ) a, Equation 2 described above, after determining the equation 3, y _'m , each of the _x'n, separated into an integer part and a fraction part.

The output gray image luminance calculation circuit 3422 sets the luminance value D for each second pixel 45L to the corresponding virtual pixel 44F, the virtual pixels 44G and 44H adjacent to the right and lower of the virtual pixel 44F, and the pixel 44F. From the brightness values d _f , d _g , d _h , and d _{k of} the pixel 44K located at the lower right of the above, it is _calculated by the above formula 4. The output gray image luminance calculation circuit 3422 generates the output gray image signal W4 in this way and supplies it to the LV panel 36 as the output gray image signal W4.

The RGB panel 35 receives and displays the output RGB image signals R3, G3, and B3. Further, the LV panel 36 receives and displays the output gray image signal W4.

Next, the effects of the above image display device and image display method will be described.

According to the above configuration, the pixel correspondence calculation circuit 3421 includes the virtual pixels 44 of the intermediate gray image signal W3 and the LV panel, which have the same arrangement as the first pixels arranged in a grid pattern in the RGB panel 35. By calculating the positional correspondence relationship of 36 with the second pixel 45 by the above equations 2 and 3, when the RGB panel 35 and the LV panel 36 are overlapped, each of the second pixels 45 of the LV panel 36 The first pixel 41 corresponding to the center position of is sought. Further, the output gray image luminance calculation circuit 3422 determines the luminance value of the second pixel 45 based on the luminance value of the virtual pixel 44 corresponding to the center position of each second pixel 45.

As a result, when a human looks at the image display device 10 from the front, the backlight light is the second pixel 45 and the first pixel 41 of the LV panel 36 and the RGB panel 35, which are related by the positional correspondence relationship. , The second pixel 45 and the first pixel 41, in which the brightness value of the second pixel 45 is determined based on the brightness value of the virtual pixel 44 corresponding to the first pixel 41, are transmitted in order. That is, the light that reaches the human eye is obliquely transmitted because the second pixel 45 and the first pixel 41, which are correctly associated with each other and whose brightness values are appropriately set, are combined and transmitted. Even if the LCD panels 36 arranged in a grid pattern are used, image distortion does not occur.

Further, the output gray image luminance calculation circuit 3422 sets the luminance values of the second pixels 45 of the LV panel 36 between the virtual pixels 44 corresponding to each other in the positional correspondence relationship and the virtual pixels 44 in the vicinity thereof, and the second pixels 45L. the distance from the center position D _L, are determined by calculating a weighted average of the luminance values of the virtual pixels 44. Therefore, each of the second pixels 45 is displayed with a luminance value very close to the corresponding virtual pixel 44 in the positional correspondence relationship before the luminance value is converted by the resolution conversion processing unit 342. Therefore, even if the LCD panels 36 arranged in an oblique grid pattern are used, the image quality is not significantly impaired.

Further, the gray image brightness calculation unit 341 of the LV controller 34 generates an intermediate gray image signal W3 having the same pixel array as the first pixel 41 of the RGB panel 35 from the RGB image signals R1, G1 and B1 after bit expansion. The resolution conversion processing unit 342 has the center position of the second pixel 45 arranged in an oblique grid pattern of the LV panel 36 and the virtual pixel 44 arranged in a grid pattern of the intermediate gray image signal W3 corresponding to the center position. It is configured to calculate the positional correspondence. That is, the resolution conversion processing unit 342 corresponds to the second pixel 45 of the LV panel 36 with respect to the intermediate gray image signal W3 having the same pixel arrangement as the first pixel 41 of the RGB panel 35 generated by the gray image luminance calculation unit 341. The pixels are converted into an output gray image signal W4 in which the pixels are arranged in an oblique grid pattern. As described above, the processing in the resolution conversion processing unit 342 corresponds to the gray image luminance calculation unit 341 in the present embodiment, and the conversion processing in which the processing result in the previous stage of the resolution conversion processing unit 342 is significantly impaired. Do not do. Therefore, no matter what the processing in the previous stage is, it is possible to perform an appropriate conversion processing without depending on it, and the versatility is high.

Further, as described using the mathematical formulas 2 and 3, the positional correspondence relationship is calculated based on the ratio of the resolutions of the RGB panel 35 and the LV panel 36. That is, since the positional correspondence can be calculated by a simple calculation, the circuit scale can be suppressed and the processing speed can be increased.

[First modification]
Next, a first modification of the image display device 10 and the image display method shown as the above embodiment will be described. FIG. 13 is a block diagram of a circuit used when calculating the luminance value D of the second pixel 45L in the output gray image luminance calculation circuit of the first modification. This first modification is different from the image display device 10 shown in the above embodiment in the circuit for calculating the luminance value D of the second pixel 45L in the output gray image luminance calculation circuit and the method for calculating the luminance value D.

In the first modification, the brightness value D of the second pixel 45L as shown in FIG. 8 is set to the corresponding virtual pixel 44F, the virtual pixels 44G and 44H adjacent to the right and below the virtual pixel 44F, and It is calculated by the following equation from the brightness values d _f , d _g , d _h , and d _{k of} the virtual pixel 44K located at the lower right of the virtual pixel 44F.

(Number 5)
_{D L = Max (d f,} d g, d h, d k) ... (5)

That is, in the first modification, the luminance value of the second pixel 45 of the output gray image signal W4 is the virtual pixel 44 corresponding to the position correspondence relationship of the intermediate gray image signal W3, and the virtual pixel 44 in the vicinity of the virtual pixel 44. It is determined by calculating the maximum value of the brightness value of each virtual pixel 44 among the pixels 44.

Needless to say, according to the above configuration, the effect of not causing image distortion is obtained as in the above embodiment.

In the first modification, in particular, the virtual pixels 44 corresponding to the luminance values of the second pixel 45 of the output gray image signal W4 in the positional correspondence relationship of the intermediate gray image signal W3 and the virtual pixels in the vicinity of the virtual pixels 44 are virtual. Since it is determined by calculating the maximum value of the brightness value of each virtual pixel 44 between the pixels 44, it is possible to prevent the displayed image from becoming dark as a whole.

Further, as shown in FIG. 13, a circuit for determining the maximum values of the four luminance values d _f , d _g , d _h , and d _k can be realized by one comparator 90. That is, the circuit configuration can be made smaller than that of the above embodiment.

[Second modification]
Next, a second modification of the image display device 10 and the image display method shown as the above embodiment will be described. This second modification is different from the image display device 10 shown in the above embodiment in the circuit for calculating the luminance value D of the second pixel 45L in the output gray image luminance calculation circuit and the method for calculating the luminance value D.

In the second modification, the luminance value of the second pixel 45L of the output gray image signal W4 as shown in FIG. 8 matches the luminance value of the corresponding virtual pixel 44F in the positional correspondence relationship of the intermediate gray image signal W3. It is decided by letting.

Needless to say, according to the above configuration, the effect of not causing image distortion is obtained as in the above embodiment.

In the second modification, the circuit configuration can be made smaller than that of the above embodiment.

The image display device and the image display method of the present invention are not limited to the above-described embodiment and each modification described with reference to the drawings, and various other modifications can be considered within the technical scope thereof. Be done.

For example, in the above embodiment, as shown in FIG. 8, the brightness value D of the second pixel 45L is set to the corresponding virtual pixel 44F, the virtual pixels 44G and 44H adjacent to the right and below the virtual pixel 44F, and , The brightness values d _f , d _g , d _h , d _{k of} the virtual pixel 44K located at the lower right of the virtual pixel 44F, but are not limited to this. For example, the center position _{D L} of the second pixel 45L is the right lower end _K of the corresponding virtual pixel _{44F (y i + 1, x} j + 1) than the upper left end _{F (y} i, _{x j)} in the case close to the virtual pixel and 44F, the virtual pixels adjacent to the left and above the virtual pixel 44F, and the like obtained from the luminance value of the virtual pixel located in the upper left of the virtual pixel 44, the position of the center position D _L in the corresponding virtual pixel 44, The virtual pixel 44 based on the calculation of the brightness value may be changed.

In the above embodiment and the modifications, the offset value _x'0 and constants RGB_H_Size / LV_H_Size like in FIG. 10 has been stored in the memory, it may be stored in the LUT.

Further, in the above embodiment and each modification, the RGB controller 33 and the gray image luminance calculation unit 341 are not limited to the above configuration. For example, the gray image luminance calculation unit 341 does not change the pixel configuration from the RGB image signal even if it is not configured as shown in FIG. 4, that is, corresponds to the first pixel 41 of the RGB panel 35. , Anything can be used as long as it generates the intermediate gray image signal W3 in which the pixels are arranged in a grid pattern.

In addition to this, as long as the gist of the present invention is not deviated, the configurations given in the above-described embodiment and each modification can be selected or changed to other configurations as appropriate.

10 Image display device 30 LCD module 32-bit expansion circuit 33 RGB controller (first controller)
331 Delay circuit 332 RGB gradation conversion circuit 333 Color balance controller 34 LV controller (second controller)
341 Gray image brightness calculation unit 3411 Gray converter 3412 LV gradation conversion circuit (gray gradation conversion circuit)
3413 Edge hold circuit 3414 LPF circuit 342 Resolution conversion processing unit 3421 Pixel correspondence calculation circuit 3422 Output gray image Brightness calculation circuit 35 RGB panel (front side LCD panel)
36 LV panel (rear LCD panel)
41 First pixel (pixel)
44 virtual pixels (pixels)
45 Second pixel (pixel)
RGB image signal after R1, G1, B1 bit expansion (RGB image signal)
R2, G2, B2 RGB image signal after gradation conversion R3, G3, B3 Output RGB image signal W1 Initial gray image signal W2 Gray image signal after gradation conversion W3 Intermediate gray image signal W4 Output gray image signal

Claims (12)

The front side LCD panel in which the pixels are arranged in a grid pattern and the rear side LCD panel in which the pixels are arranged in an oblique grid pattern are overlapped, and the backlight light is the rear side LCD panel and the front side LCD panel. An image display device that displays an image by transmitting in the order of
A first controller that generates an output RGB image signal from an RGB image signal and supplies it to the front LCD panel.
A second controller that generates an output gray image signal, which is a gray scale image signal, in which pixels are arranged in an oblique grid pattern from the RGB image signal and supplies the output gray image signal to the rear LCD panel.
With
The second controller calculates the positional correspondence between each of the pixels arranged in an oblique grid pattern and each of the pixels arranged in a grid pattern, and the output gray image is based on the positional correspondence relationship. e Bei resolution conversion processing unit for generating a signal,
The second controller includes a gray image luminance calculation unit that generates an intermediate gray image signal having the same pixel arrangement as the front LCD panel from the RGB image signal.
The resolution conversion processing unit corresponds to the position of the center position of the pixels arranged in an oblique grid pattern on the rear LCD panel and the pixels arranged in a grid pattern of the intermediate gray image signal corresponding to the center position. An image display device including a pixel-corresponding relationship calculation circuit for calculating relationships . The resolution conversion processing unit includes an output gray image luminance calculation circuit that calculates the luminance value of each pixel of the output gray image signal based on the luminance value of the corresponding pixel in the positional correspondence relationship of the intermediate gray image signal. , The image display device according to claim 1 . The output gray image luminance calculation circuit outputs the luminance value of the pixel of the output gray image signal between the pixel corresponding to the position correspondence relationship of the intermediate gray image signal and the pixel in the vicinity of the pixel. The image display device according to claim 2 , wherein the gray image signal is determined by calculating a weighted average of the luminance values of the pixels according to the distance from the center position of the pixels. The output gray image luminance calculation circuit sets the luminance value of the pixel of the output gray image signal between the pixel corresponding to the position correspondence relationship of the intermediate gray image signal and the pixel in the vicinity of the pixel. The image display device according to claim 2, which is determined by calculating the maximum value of the brightness value of. The output gray image brightness calculation circuit determines by matching the brightness value of the pixel of the output gray image signal with the brightness value of the corresponding pixel in the position correspondence relationship of the intermediate gray image signal. the image display apparatus according to 2. The gray image luminance calculation unit
A gray converter that generates an initial gray image signal, which is a gray scale image signal, from the RGB image signal.
A gray gradation conversion circuit that converts the initial gray image signal into gradations and generates a gray image signal after gradation conversion.
An edge hold circuit that applies local edge hold processing to the gray image signal after gradation conversion and generates a gray image signal after edge hold processing.
The image according to any one of claims 1 to 5 , further comprising a low-pass filter circuit that applies a low-pass filter to the gray image signal after the edge hold process and generates the intermediate gray image signal. Display device. The first controller is
An RGB gradation conversion circuit that converts the RGB image signal into gradations and generates an RGB image signal after the gradation conversion.
The method according to any one of claims 1 to 6 , further comprising a color balance controller that generates the output RGB image signal by performing color balance correction processing on the RGB image signal after gradation conversion. Image display device. The image display device according to any one of claims 1 to 7 , wherein the positional correspondence relationship is calculated based on the ratio of the resolutions of the front side LCD panel and the rear side LCD panel. The image display device according to any one of claims 1 to 8 , wherein the area of the rear side LCD panel is larger than the area of the front side LCD panel. The image display device according to any one of claims 1 to 9 , wherein the pixels of the rear LCD panel are larger than the pixels of the front LCD panel. The front LCD panel in which the pixels are arranged in a grid pattern and the rear LCD panel in which the pixels are arranged in an oblique grid pattern are superposed, and the backlight light is emitted from the rear LCD panel and the front LCD panel. It is an image display method executed by an image display device that displays an image by transmitting in the order of.
An output RGB image signal is generated from the RGB image signal and supplied to the front LCD panel.
The positional correspondence between each of the pixels arranged in an oblique grid pattern and each of the pixels arranged in a grid pattern is calculated, and from the RGB image signal, a grayscale image signal based on the positional correspondence relationship. An output gray image signal in which pixels are arranged in an oblique grid pattern is generated and supplied to the rear LCD panel.
The generation of the output gray image signal is
To generate an intermediate gray image signal having the same pixel arrangement as that of the front LCD panel from the RGB image signal.
Includes calculating the positional correspondence between the center positions of the pixels arranged in an oblique grid pattern on the rear LCD panel and the pixels arranged in a grid pattern of the intermediate gray image signal corresponding to the center position. , Image display method. The generation of the output gray image signal includes calculating the luminance value of each pixel of the output gray image signal based on the luminance value of the corresponding pixel in the positional correspondence relationship of the intermediate gray image signal. The image display method according to 11 .