JP6648895B2 - Output circuit - Google Patents

Description

  The present invention relates to an output circuit having a short-to-power protection function formed of a MOS FET.

  Conventionally, from the viewpoint of quality improvement and safety, in a semiconductor integrated circuit having an output terminal, when the output terminal is short-circuited, overcurrent may flow from the output terminal or a semiconductor element may be damaged. . Here, short-to-power means a short circuit with a high voltage equal to or higher than the power supply voltage of a semiconductor product having an output terminal.

  Patent Document 1 discloses a technique capable of protecting an output circuit when an overcurrent due to an overload flows. In Patent Literature 1, a protection control circuit and an opening / closing means using a relay contact are provided between an output terminal of a power amplifier composed of a semiconductor element and a load, and the relay contact is opened when an overcurrent is detected by the protection control circuit. As a result, the overcurrent is interrupted to protect the semiconductor element inside the power amplifier. Here, the relay contact is constituted by a discrete element.

JP 2009-77356 A

  By the way, a protection switch such as a relay or a switch may be incorporated in the output circuit to provide a short-to-power protection function instead of using the protection means disclosed in Patent Document 1 with a discrete element. However, when using discrete elements, the on-resistance of relays and switches can be easily selected to be 1 Ω or less or several Ω. However, if a protection switch having the same on-resistance is to be configured in a semiconductor integrated circuit, the chip area is reduced. Leads to an increase in In addition, if the protection switch has a high short-to-supply voltage, the protection switch needs to be configured with a high withstand voltage element, which further increases the chip area. Furthermore, since the on-resistance of the protection switch is added in series to the on-resistance of the output stage element, it is necessary to design the on-resistance of the output stage element and the protection switch low to secure a large dynamic range. Therefore, the chip area is further increased.

  SUMMARY OF THE INVENTION It is an object of the present invention to solve the above problems, to provide an output circuit having a short-to-power protection function constituted by a semiconductor integrated circuit while securing a dynamic range while suppressing an increase in chip area.

In order to achieve the above object , the invention according to claim 1 is an output circuit including an output stage in which a P-channel first MOS transistor and an N-channel second MOS transistor are connected in series, A short-to-power detection circuit that detects a short-to-power condition of an output terminal and outputs a control signal; a gate connected to an output of the short-to-power detection circuit; a source or a drain connected to a gate of the first MOS transistor; Alternatively, a third P-channel MOS transistor having a source connected to the preceding circuit element, a gate connected to the output of the short-to-power detection circuit, a drain connected to the gate of the second MOS transistor, and a source connected to An N-channel fourth MOS transistor connected to a ground terminal; an anode connected to the output of the short-to-power detection circuit; A first diode connected to a gate of the MOS transistor, an anode connected to a power supply terminal, a second diode connected to a back gate of the first MOS transistor, and an anode connected to a power supply terminal; And a third diode having a cathode connected to the back gate of the third MOS transistor.

The invention according to claim 2, the load resistor is connected to the output terminal of the first MOS transistor and the N output circuit and a second MOS transistor and an output stage connected in series in the channel of the P-channel, the output circuit An output circuit to which a high voltage equal to or higher than the power supply voltage is applied via a load resistor, wherein a short-to-power detection circuit that detects a short-to-power condition and outputs a control signal, and a gate connected to an output of the short-to-power detection circuit And a P-channel third MOS transistor having a source or drain connected to the gate of the first MOS transistor, a drain or source connected to a circuit element in a preceding stage, and a gate connected to an output of the short-to-power detection circuit. A fourth N-channel MOS transistor having a drain connected to the gate of the second MOS transistor and a source connected to the ground terminal; A node is connected to the output of the short-to-power detection circuit, a first diode having a cathode connected to the gate of the first MOS transistor, an anode connected to a power supply terminal, and a cathode connected to the first MOS transistor. A protection circuit comprising: a second diode connected to the back gate; and a third diode having an anode connected to the power supply terminal and a cathode connected to the back gate of the third MOS transistor. An input of the short-to-power detection circuit is connected to a terminal to which a high voltage is applied.

According to a third aspect of the present invention, a load resistor is connected to an output terminal of an output circuit composed of an output stage in which a P-channel first MOS transistor and an N-channel second MOS transistor are connected in series. An output circuit to which a high voltage equal to or higher than the power supply voltage is applied via a load resistor, wherein a short-to-power detection circuit that detects a short-to-power condition and outputs a control signal, and a gate connected to an output of the short-to-power detection circuit And a P-channel third MOS transistor having a source or drain connected to the gate of the first MOS transistor, a drain or source connected to a circuit element in a preceding stage, and a gate connected to an output of the short-to-power detection circuit. A fourth N-channel MOS transistor having a drain connected to the gate of the second MOS transistor and a source connected to the ground terminal; A node is connected to the output of the short-to-power detection circuit, a first diode having a cathode connected to the gate of the first MOS transistor, an anode connected to a power supply terminal, and a cathode connected to the first MOS transistor. A protection circuit comprising: a second diode connected to the back gate; and a third diode having an anode connected to the power supply terminal and a cathode connected to the back gate of the third MOS transistor. Two inputs of the short-to-power detection circuit are an output terminal of the output circuit and a gate node of the second MOS transistor.

  According to the present invention, it is possible to configure an output circuit having a short-to-power protection function without providing a protection switch composed of a discrete element. In addition, since it is not necessary to provide a protection switch having a low on-resistance inside the integrated circuit, it is possible to prevent an increase in the chip area and to secure the dynamic range without increasing the on-resistance, thereby providing an output circuit having a short-to-power protection function. Can be configured.

FIG. 3 is an explanatory diagram of an output circuit having a short-to-power protection function according to the present invention. FIG. 2 is a circuit diagram of the first embodiment of the present invention. FIG. 6 is a circuit diagram of a second embodiment of the present invention. FIG. 9 is a circuit diagram of a third embodiment of the present invention.

  Hereinafter, the present invention will be described in detail. FIG. 1 is a circuit diagram of an output circuit having a short-to-power protection function according to the present invention. FIG. 1 is a circuit diagram in which a short-to-power detection circuit and a protection circuit are connected to an output stage of an output circuit constituted by MOS FETs. The output transistor is composed of a P-channel first MOS transistor M1 and an N-channel second MOS transistor M2, and a connection point between the drains is connected to the output terminal VOUT. The source of the first MOS transistor M1 is connected to the power supply terminal V +, and the source of the second MOS transistor M2 is connected to the ground terminal GND. The P-channel third MOS transistor M3 has a source connected to the gate of the first MOS transistor M1, a drain connected to the previous circuit element, and a gate connected to the output of the short-to-power detection circuit. It operates as a switch that separates the gate of the MOS transistor M1 from the preceding circuit element. The N-channel fourth MOS transistor M4 has a drain connected to the gate of the second MOS transistor M2, a source connected to the ground terminal GND, and a gate connected to the output of the short-to-power detection circuit. The transistor M2 operates as a switch that sets the gate of the transistor M2 to the ground voltage and turns off the second MOS transistor M2. Each MOS transistor is composed of a high withstand voltage element having a withstand voltage equal to or higher than a short-to-supply voltage applied to the output terminal VOUT. The first diode D1 has an anode connected to the output of the short-to-power detection circuit, a cathode connected to the gate of the first MOS transistor M1, and applies the voltage of the output terminal VOUT to the gate of the first MOS transistor M1 at the time of short-to-power. Behave as if it were. The second diode D2 has an anode connected to the power supply terminal V + of the power supply voltage VDD, a cathode connected to the back gate of the first MOS transistor M1, and a current flowing in from the output terminal flowing back to the power supply terminal V + at the time of short-to-power. To prevent The third diode D3 has an anode connected to the power supply terminal V + and a cathode connected to the back gate of the third MOS transistor M3, and prevents a current flowing from the output terminal from flowing back to the power supply terminal V + at the time of short-to-power. The short-to-power detection circuit detects the short-to-power condition of the output terminal VOUT, and outputs a control signal of H level (= voltage of the output terminal VOUT) or L level (= ground voltage).

  First, a normal operation will be described. Normally, the control signal of the short-to-supply detection circuit outputs a ground voltage at L level. With this control signal, the third MOS transistor M3 is turned on, the fourth MOS transistor M4 and the first diode D1 are turned off, and an output signal is output from the first MOS transistor M1 and the second MOS transistor M2. Output to the output terminal VOUT.

  Next, the operation at the time of short-to-power will be described. At the time of short-to-power, the control signal of the short-to-power detection circuit outputs the voltage of the output terminal VOUT (= short-to-power voltage) at H level. With this control signal, the first diode D1 becomes conductive. The cathode of the first diode D1 is connected to a node having a high impedance, so that no current flows. Therefore, there is almost no voltage drop in the first diode D1, and the gate of the first MOS transistor M1 is connected to the short-to-power voltage. Becomes Although the drain and the source of the first MOS transistor M1 are switched, the gate and the source are at the short-to-supply voltage, so that the first MOS transistor M1 is in a non-conductive state. The drain and the source of the third MOS transistor M3 are also switched, but the gate and the source become the short-to-power voltage, so that the third MOS transistor M3 is turned off, thereby disconnecting the gate of the first MOS transistor M1 from the preceding circuit element. At the same time, the fourth MOS transistor M4 is turned on, and the gate of the second MOS transistor M2 is set to the ground voltage to turn off the second MOS transistor M2.

  In a normal output circuit, the back gates of the first MOS transistor M1 and the third MOS transistor M3 are connected to the power supply terminal V + of the power supply voltage VDD which has the highest potential during normal operation. D2 and the third diode D3 are connected respectively. With these diodes, the output terminal VOUT and the gate of the first MOS transistor M1 become equal to or higher than the power supply voltage VDD at the time of short-to-supply, and the source (drain during normal operation), the back gate, and the third MOS transistor M1 of the first MOS transistor M1. The PN junction between the source (drain during normal operation) and the back gate of the transistor M3 is forward-biased, preventing the inflow current from the output terminal VOUT from flowing back to the power supply terminal V +. During normal operation, there is almost no voltage drop due to the second diode D2 and the third diode D3, and the power supply voltage VDD is applied to the back gates of the first MOS transistor M1 and the third MOS transistor M3.

  When the short-to-supply is released, the control signal of the short-to-supply detection circuit outputs the ground voltage at L level. With this control signal, the third MOS transistor M3 is turned on, the fourth MOS transistor M4 and the first diode D1 are turned off, and an output signal is output from the first MOS transistor M1 and the second MOS transistor M2. The operation returns to the normal operation output to the output terminal VOUT.

  By the above operation, the first MOS transistor M1 and the second MOS transistor M2 become non-conductive at the time of short-to-power, and the parasitic PN junction does not become forward biased, so that an excessive current flows from the output terminal VOUT. This can prevent the output circuit elements from being protected, and can return to normal operation when the power supply is released. As described above, since there is no need to provide a protection switch having a low on-resistance inside the integrated circuit, an increase in the chip area can be suppressed, and an on-resistance does not increase. Can be configured.

  FIG. 2 is a specific configuration example for simply implementing the short-to-power detection circuit according to the first embodiment of the present invention. An inverter between the output terminal VOUT and the ground terminal GND, which is composed of a P-channel MOS transistor M5 and an N-channel transistor M6, which are high breakdown voltage elements having a withstand voltage higher than the short-to-power voltage applied to the output terminal VOUT, detects a short-to-power. Functions as a circuit. The power supply terminal V + is connected to the input of the inverter, and the control signal of the short-to-power detection circuit is output to the output of the inverter.

  Next, the operation of the circuit shown in FIG. 2 will be described. Normally, the voltage of the output terminal VOUT is lower than the power supply voltage VDD, so that the P-channel MOS transistor M5 is turned off, the N-channel MOS transistor M6 is turned on, and the control signal output from the short-to-power detection circuit is at L level. A certain ground voltage is output, and an output signal is output from the first MOS transistor M1 and the second MOS transistor M2 to the output terminal VOUT.

  At the time of short-to-power, when the voltage of the output terminal VOUT becomes higher than the power supply voltage VDD + Vth_M5, the P-channel MOS transistor M5 is turned on, and the control signal output from the short-to-power detection circuit outputs the H level. Here, Vth_M5 is a threshold voltage of the P-channel MOS transistor M5. At the time of short-to-supply, the N-channel MOS transistor M6 is also conductive, so that the H-level voltage is determined by the ratio of the ON resistances of the P-channel MOS transistor M5 and the N-channel MOS transistor M6. By appropriately designing the on-resistance of the P-channel MOS transistor M5 and the N-channel MOS transistor M6, the H level voltage of the control signal becomes the short-to-power voltage which is the voltage of the output terminal VOUT, and the same operation as that of FIG. It is possible to prevent an excessive current from flowing from the output terminal VOUT and protect elements of the output circuit.

  When the voltage of the output terminal VOUT becomes lower than the power supply voltage VDD + Vth_M5, the P-channel MOS transistor M5 is turned off, and the control signal output from the short-to-power detection circuit outputs the ground voltage of L level, and the first MOS transistor M1 The operation returns to the normal operation in which the output signal is output from the second MOS transistor M2 to the output terminal VOUT.

  FIG. 3 is a circuit diagram of a second embodiment of the present invention, in which an output stage of an output circuit for outputting a video signal has a short-to-power protection function. A load resistor R1 is connected in series to an output terminal VOUT in an output circuit for outputting a video signal. FIG. 3 shows an embodiment in which a short-to-power short of the video signal output terminal VIDEOOUT is detected via the load resistor R1, and a short-to-power short detection input terminal DET newly provided in the video signal output circuit is connected to the video signal output terminal VIDEOOUT. In this way, the presence or absence of a short to power is detected. The short-to-power detection circuit is a comparator 1 that compares the voltage of the short-to-power detection input terminal DET with the threshold voltage Vth1, and a high withstand voltage element having a withstand voltage equal to or higher than the short-to-power voltage applied to the video signal output terminal VIDEOOUT. It is composed of an inverter between an output terminal VOUT composed of a P-channel MOS transistor M5 and an N-channel transistor M6 and a ground terminal GND.

  Next, the operation of the circuit shown in FIG. 3 will be described. Normally, the voltage of the short-to-power detection input terminal DET is lower than the threshold voltage Vth1, so that the output of the comparator 1 becomes the power supply voltage VDD at the H level, the P-channel MOS transistor M5 is turned off, and the N-channel MOS transistor M6 is turned off. In the conductive state, the control signal output from the short-to-power detection circuit outputs the ground voltage at L level, and the output signal is output to the output terminal VOUT from the first MOS transistor M1 and the second MOS transistor M2.

  At the time of short-to-power, the voltage of the short-to-power detection input terminal DET becomes higher than the threshold voltage Vth1, the output of the comparator 1 becomes the ground voltage at L level, the P-channel MOS transistor M5 is conductive, and the N-channel MOS transistor M6 is non-conductive. In the conductive state, the control signal as the output of the short-to-power detection circuit outputs the voltage of the output terminal VOUT which is at the H level, and prevents the excessive inflow current from the output terminal VOUT by the same operation as that of FIG. The elements of the circuit can be protected.

  When the short-to-power is released, the control signal, which is the output of the short-to-power detection circuit, outputs an L level ground voltage, and the output signal from the first MOS transistor M1 and the second MOS transistor M2 is output to the output terminal VOUT. It returns to the output normal operation.

  FIG. 4 is a circuit diagram of a third embodiment of the present invention. Similar to the second embodiment shown in FIG. 3, the output stage of the output circuit for video signal output is provided with a short-to-power protection function. It is. The difference from FIG. 3 is that the presence / absence of short-to-power can be detected without newly providing a short-to-power detection input terminal DET in the video signal output circuit. The output terminal VOUT and the gate of the second MOS transistor M2 are input to the short-to-power detection circuit, and the presence or absence of short-to-power is detected by monitoring the voltages of these two nodes. The short-to-power detection circuit includes a comparator 2 for comparing the voltage of the output terminal VOUT with the threshold voltage Vth2, a comparator 3 for comparing the voltage of the gate of the second MOS transistor M2 with the threshold voltage Vth3, and a logic circuit NOR. And an inverter between an output terminal VOUT and a ground terminal GND, which are composed of a P-channel MOS transistor M5 and an N-channel transistor M6, which are high breakdown voltage elements having a withstand voltage equal to or higher than a short-to-power voltage applied to the video signal output terminal VIDEOOUT. Be composed.

  Next, the operation of the circuit shown in FIG. 4 will be described. Normally, the voltage of the output terminal VOUT is lower than the threshold voltage Vth2, so that the output of the comparator 2 becomes the ground voltage at L level. Further, since the voltage of the gate of the second MOS transistor M2 is lower than the threshold voltage Vth3, the output of the comparator 3 also becomes the ground voltage at L level. In response to the outputs of the comparators 2 and 3, the output of the logic circuit NOR becomes the power supply voltage VDD at H level, the P-channel MOS transistor M5 is turned off, the N-channel MOS transistor M6 is turned on, and the As the control signal, which is an output, a ground voltage of L level is output, and an output signal is output from the first MOS transistor M1 and the second MOS transistor M2 to the output terminal VOUT.

  At the time of short-to-power, when the voltage of the output terminal VOUT becomes higher than the threshold voltage Vth2, the output of the comparator 2 becomes the power supply voltage VDD which is at the H level. Alternatively, when the voltage of the gate of the second MOS transistor M2 becomes higher than the threshold voltage Vth3, the output of the comparator 3 becomes H. It becomes the power supply voltage VDD which is the level. When the output of either the comparator 2 or the comparator 3 becomes the power supply voltage VDD of the H level, the output of the logic circuit NOR becomes the ground voltage of the L level, and the control signal which is the output of the short-to-power detection circuit is the output of the H level. It becomes the voltage of the terminal VOUT. With this control signal, the first diode D1 becomes conductive, and the gate of the first MOS transistor M1 becomes the voltage of the output terminal VOUT, so that the first MOS transistor M1 and the third MOS transistor M3 become nonconductive. Then, the gate of the first MOS transistor M1 is separated from the preceding circuit element. At the same time, the fourth MOS transistor M4 is turned on, and the gate of the second MOS transistor M2 is set to the ground voltage to turn off the second MOS transistor M2.

  At this time, since the gate of the second MOS transistor M2 is at the ground voltage, the output of the comparator 3 is at the ground voltage of L level, but the inflow current from the output terminal VOUT is cut off, and the voltage of the video signal output terminal VIDEOOUT ( = Power supply voltage) and the voltage of the output terminal VOUT become equal, the power supply can be detected by the comparator 2 monitoring the voltage of the output terminal VOUT, and the control signal which is the output of the power supply detection circuit is at the H level. Is maintained at the output terminal VOUT. With the above operation, an excessive inflow current from the output terminal VOUT can be prevented, and elements of the output circuit can be protected.

  When the short-to-supply is released, the voltage of the output terminal VOUT drops, so that the output of the comparator 2 becomes the ground voltage at the L level, the output of the logic circuit NOR becomes the power supply voltage VDD at the H level, and the output of the short-to-power detection circuit The control signal is returned to the normal operation in which the ground voltage at L level is output, and the output signal is output from the first MOS transistor M1 and the second MOS transistor M2 to the output terminal VOUT.

  As described above, according to the present invention, it is not necessary to provide a protection switch having a low on-resistance inside the integrated circuit, so that it is possible to suppress an increase in the chip area and to secure a dynamic range because the on-resistance does not increase. An output circuit having a short-circuit protection function can be configured. In addition, since a protection switch formed of a discrete element is not required, the effect of reducing the number of components in the electronic device can be obtained. Note that the short-to-power detection circuit in the above embodiment is a specific example of the present invention, and it goes without saying that the present invention is not limited to the embodiment.

M1: first MOS transistor M2: second MOS transistor M3: third MOS transistor M4: fourth MOS transistor D1 to D3: diode V +: power supply terminal GND: ground terminal VOUT: output terminal VIDEOOUT: video signal output Terminal DET: Short-to-power detection input terminal

Claims (3)

An output circuit comprising an output stage in which a P-channel first MOS transistor and an N-channel second MOS transistor are connected in series,
A short-to-power detection circuit that detects a short-to-power condition of the output terminal and outputs a control signal;
A P-channel third MOS transistor having a gate connected to the output of the short-to-supply detection circuit, a source or drain connected to the gate of the first MOS transistor, and a drain or source connected to the preceding circuit element; An N-channel fourth MOS transistor having a gate connected to the output of the short-to-supply detection circuit, a drain connected to the gate of the second MOS transistor, and a source connected to the ground terminal; A first diode having a cathode connected to the output of the short detection circuit, a cathode connected to the gate of the first MOS transistor, an anode connected to the power supply terminal, and a cathode connected to the back gate of the first MOS transistor; A second diode, an anode connected to the power supply terminal, and a cathode connected to the third MOS transistor. A protection circuit comprising a third diode connected to the static of the back gate,
An output circuit comprising: A load resistor is connected to an output terminal of an output circuit composed of an output stage in which a P-channel first MOS transistor and an N-channel second MOS transistor are connected in series, and a high voltage higher than a power supply voltage of the output circuit is applied. An output circuit applied via a load resistor ,
A short-to-power detection circuit that detects a short-to-power condition and outputs a control signal;
A P-channel third MOS transistor having a gate connected to the output of the short-to-supply detection circuit, a source or drain connected to the gate of the first MOS transistor, and a drain or source connected to the preceding circuit element; An N-channel fourth MOS transistor having a gate connected to the output of the short-to-supply detection circuit, a drain connected to the gate of the second MOS transistor, and a source connected to the ground terminal; A first diode having a cathode connected to the output of the short detection circuit, a cathode connected to the gate of the first MOS transistor, an anode connected to the power supply terminal, and a cathode connected to the back gate of the first MOS transistor; A second diode, an anode connected to the power supply terminal, and a cathode connected to the third MOS transistor. A protection circuit comprising a third diode connected to the static of the back gate,
The provided output circuit inputs of the top fault detection circuit to the terminal to which the high voltage is applied to said Rukoto connected. A load resistor is connected to an output terminal of an output circuit composed of an output stage in which a P-channel first MOS transistor and an N-channel second MOS transistor are connected in series, and a high voltage higher than a power supply voltage of the output circuit is applied. An output circuit applied via a load resistor,
A short-to-power detection circuit that detects a short-to-power condition and outputs a control signal;
A P-channel third MOS transistor having a gate connected to the output of the short-to-supply detection circuit, a source or drain connected to the gate of the first MOS transistor, and a drain or source connected to the preceding circuit element; An N-channel fourth MOS transistor having a gate connected to the output of the short-to-supply detection circuit, a drain connected to the gate of the second MOS transistor, and a source connected to the ground terminal; A first diode having a cathode connected to the output of the short detection circuit, a cathode connected to the gate of the first MOS transistor, an anode connected to the power supply terminal, and a cathode connected to the back gate of the first MOS transistor; A second diode, an anode connected to the power supply terminal, and a cathode connected to the third MOS transistor. A protection circuit comprising a third diode connected to the static of the back gate,
Wherein the top fault detecting output circuit in which two inputs to said Oh Rukoto gate node of the output terminal and the second MOS transistor of the output circuit of the circuit.

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