JP6599968B2 - Piezoelectric ultrasonic transducer and process - Google Patents

Description

[Cross-reference of related applications]
This disclosure is related to US Provisional Application No. 62/022140 (Attorney Docket No. QUALP264PUS /) filed Jul. 8, 2014, entitled “PIEZOELECTRIC ULTRASONIC TRANSDUCER AND PROCESS”, which is incorporated herein by reference. No. 145636P1), US patent application No. 14/559256 entitled “PIEZOELECTRIC ULTRASONIC TRANSDUCER AND PROCESS”, and “MICROME CHANCIAL ULTRASONIC TRANSIVALS US Provisional Application” on December 12, 2013. The priority of 915361 is claimed.

  The present disclosure relates to piezoelectric transducers and techniques for manufacturing piezoelectric transducers, and more particularly in use in electronic sensor arrays or in interactive displays for biometric information sensing, imaging, and touch recognition or gesture recognition. The present invention relates to a piezoelectric ultrasonic transducer suitable for use.

  Thin film piezoelectric ultrasonic transducers are attractive candidates for many applications, including biometric sensors, such as fingerprint sensors, gesture detection, microphones and speakers, ultrasonic imaging, and chemical sensors. The transducer typically includes a piezoelectric stack suspended over a cavity. The piezoelectric stack may include a layer of piezoelectric material and a patterned or unpatterned layer of electrodes on each side of the piezoelectric layer.

  FIG. 1 is an elevational view of a piezoelectric ultrasonic transducer. As shown in FIG. 1, a piezoelectric ultrasonic transducer 100 includes, for example, a piezoelectric layer stack 110 disposed on a mechanical layer 130 and a cavity 120 that can be formed, for example, in a silicon-on-insulator (SOI) wafer. Thus, it is known to constitute the piezoelectric ultrasonic transducer 100. Piezoelectric layer stack 110 includes a piezoelectric layer 115 having an associated lower electrode 112 and upper electrode 114 disposed below and above piezoelectric layer 115, respectively. The cavity 120 may be formed in a semiconductor substrate 160, such as a silicon wafer or, in some implementations, a silicon on insulator (SOI) wafer. The mechanical layer 130 can be formed from an active silicon layer of an SOI wafer.

  Part of this disclosure relates to micromechanical ultrasonic transducers, aspects of the micromechanical ultrasonic transducer being assigned to the assignee of the present invention and incorporated herein by reference in their entirety for all purposes. No. 61/915361, filed on December 12, 2013, entitled “MICROMECHANICAL ULTRASONIC TRANSDUCERS AND DISPLAY”, and “MICROME CHANCEL ULTRASONIC AND TRANSTRANSAND US patent filed simultaneously with this specification”. And the agent reference number QUALP228 US / 141202.

  Each of the disclosed systems, methods, and devices has several innovative aspects, one of which is not solely responsible for the desired attributes disclosed herein.

  One innovative aspect of the subject matter described in this disclosure relates to a piezoelectric micromechanical ultrasonic transducer (PMUT) that includes a multilayer stack disposed on a substrate. The multilayer stack includes an anchor structure disposed on the substrate, a piezoelectric layer stack disposed on the anchor structure, and a mechanical layer disposed proximate to the piezoelectric layer stack. The piezoelectric layer stack is disposed on the cavity. The mechanical layer seals the cavity and, together with the piezoelectric layer stack, is supported by the anchor structure to form a film on the cavity, and the film flexes when the PMUT receives or transmits an acoustic or ultrasonic signal. Configured to receive one or both of motion and vibration. In some examples, the mechanical layer has a thickness such that the neutral axis of the multilayer stack is displaced toward the mechanical layer relative to the neutral axis of the piezoelectric layer stack to allow an out-of-plane bending mode. obtain. In some examples, the mechanical layer may be substantially thicker than the piezoelectric layer stack. In some examples, the neutral axis may pass through the mechanical layer.

  In some examples, the cavity can be formed by removing the sacrificial material through at least one discharge hole, the mechanical layer can be formed after removing the sacrificial material, and forming the mechanical layer is at least 1 The cavity can be sealed by sealing one discharge hole.

  In some examples, the piezoelectric layer stack may include a piezoelectric layer, a lower electrode disposed below the piezoelectric layer, and an upper electrode disposed above the piezoelectric layer.

  In some examples, the mechanical layer may include a recess in which the mechanical layer is locally thinned.

  In some examples, the mechanical layer may be disposed on the side of the piezoelectric stack opposite the substrate.

  In some examples, the mechanical layer may be disposed under the side of the piezoelectric stack that faces the substrate.

  In some examples, the PMUT may further include an acoustic coupling medium disposed on the piezoelectric layer stack, and the PMUT is configured to receive or transmit an ultrasonic signal via the coupling medium.

  According to some implementations, the PMUT includes a multi-layer stack disposed on a substrate. The multilayer stack includes an anchor structure disposed on the substrate, a piezoelectric layer stack disposed on the anchor structure, and a mechanical layer disposed proximate to the piezoelectric layer stack. A thinned recess. The piezoelectric layer stack is placed over the cavity and the mechanical layer is supported by the anchor structure along with the piezoelectric layer stack to form a film on the cavity, which is when the PMUT receives or transmits an ultrasonic signal , Configured to receive one or both of flexural motion and vibration.

  In some examples, the cavity can be formed by removing the sacrificial material through at least one discharge hole, the mechanical layer can be formed after removing the sacrificial material, and forming the mechanical layer is at least 1 The cavity can be sealed by sealing one discharge hole.

  According to some implementations, a method of fabricating a PMUT includes forming an anchor structure on a substrate, the anchor structure being disposed proximate to a region of a sacrificial material; Forming a piezoelectric layer stack, removing sacrificial material to form a cavity under the piezoelectric layer stack, and placing a mechanical layer proximate to the piezoelectric layer stack, the piezoelectric layer stack comprising: And the mechanical layer forms part of a multi-layer stack, the mechanical layer seals the cavity and is supported by the anchor structure together with the piezoelectric layer stack to form a film over the cavity, When receiving or transmitting an ultrasonic signal, the ultrasonic signal is configured to receive one or both of a bending motion and a vibration.

  In some examples, removing the sacrificial material can form a cavity under the piezoelectric layer stack.

  In some examples, removing the sacrificial material can include removing the sacrificial material through the at least one discharge hole, and the mechanical layer seals the at least one discharge hole.

  In some examples, the anchor structure may be disposed in a lower layer, the lower layer being parallel to the piezoelectric stack layer and including a region of sacrificial material.

  In some examples, the mechanical layer has a thickness such that the neutral axis of the multilayer stack is displaced toward the mechanical layer relative to the neutral axis of the piezoelectric layer stack to allow out-of-plane bending mode. Can do. In some examples, the mechanical layer is substantially thicker than the piezoelectric layer stack. In some examples, the neutral axis may pass through the mechanical layer.

  According to some implementations, the apparatus includes an array of PMUT sensors and an acoustic coupling medium. At least one PMUT includes a multilayer stack disposed on a substrate. The multilayer stack includes an anchor structure disposed on the substrate, a piezoelectric layer stack disposed on the anchor structure and the cavity, and a mechanical layer disposed proximate to the piezoelectric layer stack, wherein the mechanical layer includes the cavity Is sealed. An acoustic coupling medium is disposed on the piezoelectric layer stack and the PMUT is configured to receive or transmit an ultrasonic signal through the coupling medium.

  The details of one or more embodiments of the subject matter described in this specification are set forth in the disclosure and the accompanying drawings. Other features, aspects, and advantages will become apparent upon reviewing the present disclosure. Note that the relative dimensions of the drawings and other figures of this disclosure may not be drawn to scale. The dimensions, thicknesses, arrangements, materials, etc. illustrated and described in this disclosure are provided as examples only and should not be construed as limiting. Like reference numbers and designations in the various drawings indicate like elements.

It is an elevation view of a piezoelectric ultrasonic transducer. FIG. 3 illustrates an example implementation of a PMUT stack configured in accordance with the techniques of this disclosure. FIG. 3 illustrates an example implementation of a PMUT stack configured in accordance with the techniques of this disclosure. FIG. 3 illustrates an example implementation of a PMUT stack configured in accordance with the techniques of this disclosure. FIG. 3 illustrates an example implementation of a PMUT stack configured in accordance with the techniques of this disclosure. FIG. 3 illustrates an example implementation of a PMUT. It is a figure which shows an example of the process flow for manufacturing PMUT. It is a figure which shows an example of the process flow for manufacturing PMUT. It is sectional explanatory drawing of another mounting form of PMUT which has a mechanical layer. It is a cross-sectional explanatory drawing of another mounting form of the PMUT stack having a mechanical layer. It is a section explanatory view of PMUT which has the upper mechanical layer and acoustic port which were formed on the substrate. FIG. 6 is a plan view of an array of PMUTs according to some implementations. FIG. 3 is an exemplary cross-sectional elevation view of a PMUT array in various configurations. FIG. 3 is an exemplary cross-sectional elevation view of a PMUT array in various configurations. FIG. 3 is an exemplary cross-sectional elevation view of a PMUT array in various configurations. FIG. 3 is an exemplary cross-sectional elevation view of a PMUT array in various configurations. 2 is a cross-sectional elevation view of various anchor structure configurations for PMUT. FIG. 2 is a cross-sectional elevation view of various anchor structure configurations for PMUT. FIG. 2 is a cross-sectional elevation view of various anchor structure configurations for PMUT. FIG. 2 is a cross-sectional elevation view of various anchor structure configurations for PMUT. FIG. 2 is a cross-sectional elevation view of various anchor structure configurations for PMUT. FIG. 2 is a cross-sectional elevation view of various anchor structure configurations for PMUT. FIG. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 2 is a top view of various geometric configurations of PMUT and anchor structures. FIG. 5 shows a further example of a process flow for manufacturing a PMUT. FIG. 6 is a diagram illustrating a process flow for integrating an electronic circuit with the PMUT described above. FIG. 6 is a diagram illustrating a process flow for integrating an electronic circuit with the PMUT described above. FIG. 6 is a diagram illustrating a process flow for integrating an electronic circuit with the PMUT described above. 3 is a cross-sectional view of various configurations of a PMUT ultrasonic sensor array. FIG. 3 is a cross-sectional view of various configurations of a PMUT ultrasonic sensor array. FIG. 3 is a cross-sectional view of various configurations of a PMUT ultrasonic sensor array. FIG. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT. It is a figure which shows another example of the process flow for manufacturing PMUT.

  The following description is directed to specific implementations for purposes of describing the innovative aspects of the disclosure. However, one of ordinary skill in the art will readily recognize that the teachings herein apply in a number of different ways. The described embodiments may be implemented in any device, apparatus, or system that includes an ultrasonic sensor. For example, the described embodiments include, but are not limited to, mobile phones, multimedia internet enabled mobile phones, mobile television receivers, wireless devices, smartphones, Bluetooth® devices, personal digital assistants (PDAs) ), Wireless email receivers, handheld or portable computers, netbooks, notebooks, smart books, tablets, printers, copiers, scanners, facsimile devices, global positioning system (GPS) receivers / navigators, cameras, digital A media player (such as an MP3 player), a camcorder, a game machine, a watch, a clock, a calculator, a television monitor, a flat panel display, an electronic reading device (for example, an electronic book reader), Vail health device, computer monitor, car display (including odometer and speedometer display, etc.), cockpit controller and / or display, camera view display (such as vehicle rear view camera display), electronic photograph, electronic bulletin board or Marking, projector, architecture structure, microwave, refrigerator, stereo system, cassette recorder or player, DVD player, CD player, VCR, radio, portable memory chip, washing machine, dryer, washing machine / dryer, parking meter, Packaging (such as electromechanical system (EMS) applications, including microelectromechanical system (MEMS) applications, as well as non-EMS applications), aesthetic structures (such as displaying an image on one of a jewel or garment), and various E Such as S device, it is contemplated that various included in the electronic device, or may be associated. The teachings herein also include, but are not limited to, electronic switching devices, radio frequency filters, sensors, accelerometers, gyroscopes, motion sensing devices, magnetometers, inertial components for consumer electronics, consumer electronics It can be used in applications such as equipment product parts, varactors, liquid crystal devices, electrophoretic devices, drive systems, manufacturing processes, and electronic test equipment. Accordingly, these teachings are not intended to be limited solely to the embodiments shown in the drawings, but instead have a wide range of applicability, as will be readily apparent to those skilled in the art. is doing.

  The systems, methods and devices of the present disclosure each have several innovative aspects, one of which is not solely responsible for the desired attributes disclosed herein. One innovative aspect of the subject matter described in this disclosure is implemented in a piezoelectric micromechanical ultrasonic transducer (PMUT) configured as a multilayer stack including a piezoelectric layer stack and a mechanical layer disposed on a cavity. . The cavity can be formed in the lower layer of the multilayer stack, on which the piezoelectric layer stack is formed. The mechanical layer is disposed proximate to the piezoelectric layer stack. The mechanical layer seals the cavity and is supported by the anchor structure along with the piezoelectric layer stack to form a film over the cavity. The membrane may be configured to receive one or both of flexing motion and vibration when the PMUT receives or transmits an acoustic or ultrasonic signal. The anchor structure may be disposed on the substrate in the lower layer, the lower layer being parallel to the piezoelectric stack layer and including one or more regions of sacrificial material. The sacrificial material can be sacrificially removed to form one or more cavities under the piezoelectric layer stack.

  In some implementations, the mechanical layer has a thickness such that the neutral axis of the multilayer stack is displaced toward the mechanical layer with respect to the neutral axis of the piezoelectric layer stack to allow out-of-plane bending modes. Have. As a result, the neutral axis of the PMUT stack can be a distance away from the piezoelectric layer in the direction opposite the substrate. More specifically, the neutral axis may pass through the mechanical layer in a plane that is above the piezoelectric layer stack and the cavity and is substantially parallel to the piezoelectric layer stack. In some implementations, the neutral axis of the PMUT stack can be a distance away from the piezoelectric layer in the direction toward the substrate. More specifically, the neutral axis may pass through the mechanical layer in a plane below the piezoelectric layer stack and substantially parallel to the piezoelectric layer stack.

  One innovative aspect of the subject matter described in this disclosure is a piezoelectric micromechanical ultrasonic transducer below, by, with, on, or above the back of a display or ultrasonic fingerprint sensor array. (PMUT) may be implemented in an apparatus including a one-dimensional array or a two-dimensional array of elements.

  In some implementations, the PMUT array may be configurable to operate in modes that correspond to multiple frequency ranges. In some implementations, for example, the PMUT array operates in a low frequency mode corresponding to a low frequency range (eg, 50 kHz to 200 kHz) or in a high frequency mode corresponding to a high frequency range (eg, 1 MHz to 25 MHz). May be configurable. When operating in high frequency mode, the device may be able to image at a relatively higher resolution. Thus, the device may be able to detect touch, fingerprints, stylus, and biometric information from an object such as a finger placed on the surface of the display or sensor array. Such a high frequency mode is sometimes referred to herein as a fingerprint sensor mode, a touch mode, and a stylus mode.

  When operating in the low frequency mode, the device may be able to emit sound waves that allow a relatively greater penetration into the air than when the device is operating in the high frequency mode. Such low frequency sound waves can be applied to various upper layers, including cover glass, touch screens, display arrays, backlights, or other layers disposed between the ultrasound transmitter and the display or sensor surface. Can be sent via. In some implementations, the ports may be opened through one or more of the upper layers to optimize acoustic coupling from the PMUT array into the air. Low frequency sound waves are transmitted in the air above the display or sensor surface, reflected from one or more objects near the surface, transmitted in the air, returned through the upper layer, an ultrasonic receiver Can be detected. Thus, when operating in the low frequency mode, the device may be able to operate in a gesture detection mode, where a free space gesture near the display may be detected.

  Alternatively or additionally, in some implementations, the PMUT array operates in a medium frequency mode corresponding to a frequency range between a low frequency range and a high frequency range (eg, about 200 kHz to about 1 MHz). It may be configurable. When operating in the medium frequency mode, the device may have a somewhat lower resolution than the high frequency mode, but may be able to provide touch sensor functionality.

  The PMUT array may be addressable for wavefront beamforming, beam manipulation, receiver beamforming, and / or selective readout of the returned signal. For example, individual columns, rows, sensor pixels, and / or groups of sensor pixels may be individually addressable. The control system may control the array of transmitters to generate a specific shaped wavefront, such as a planar, circular, or cylindrical wavefront. The control system may control the amplitude and / or phase of the array of transmitters to generate constructive or destructive interference at the desired location. For example, the control system may control the amplitude and / or phase of the array of transmitters to generate constructive interference at one or more locations where a touch or gesture is detected.

  In some implementations, the PMUT device can be co-fabricated with thin film transistor (TFT) circuits on the same substrate, which in some examples is a glass substrate or a plastic substrate. The TFT substrate may include row and column addressing electrodes, a multiplexer, a local amplification stage, and a control circuit. In some implementations, an interface circuit that includes a driver stage and a sensing stage can be used to excite the PMUT device and detect a response from the same device. In other implementations, the first PMUT device may function as an acoustic transmitter or ultrasound transmitter, and the second PMUT device may function as an acoustic receiver or ultrasound receiver. In some configurations, different PMUT devices may be capable of low frequency operation and high frequency operation (eg, for gesture detection and fingerprint detection). In other configurations, the same PMUT device may be used for low frequency operation and high frequency operation. In some implementations, the PMUT can be manufactured using a silicon wafer having active silicon circuits manufactured in the silicon wafer. The active silicon circuit may include electronic devices for functioning the PMUT or PMUT array.

  2A-2D illustrate an example implementation of a PMUT stack configured in accordance with the techniques of this disclosure. In the illustrated implementation, the PMUT 200A includes a mechanical layer 230 disposed on the piezoelectric layer stack 210. Piezoelectric layer stack 210 includes a piezoelectric layer 215 having an associated lower electrode 212 and upper electrode 214 disposed below and above piezoelectric layer 115, respectively. The mechanical layer 230 is disposed on the side of the piezoelectric stack opposite the substrate.

  The mechanical layer 230 may be disposed above the piezoelectric layer stack 210 side opposite to the cavity 220, and together with the piezoelectric layer stack 210, a drum-like film may be formed above the cavity 220. The membrane may be configured to undergo flexing motion and / or vibration when the PMUT receives or transmits an acoustic or ultrasonic signal. In the implementation shown in FIG. 2A, the piezoelectric layer stack 210 is between the cavity 220 and the mechanical layer 230, but in the configuration shown in FIG. 1, the mechanical layer 130 of the PMUT 100 is between the piezoelectric layer stack 110 and the cavity 120. between. In some implementations, the mechanical layer 230 may be substantially thicker than the piezoelectric layer stack.

  The mechanical layer 230 may be fabricated from an electrically insulating material and at the end of the microfabrication process, i.e. after formation and patterning of the piezoelectric layer stack 210 and the cavity 220 on which the piezoelectric layer stack 210 is disposed. Can be deposited. The mechanical layer 230 may be configured to have dimensions and mechanical properties such that the neutral axis 250 of the PMUT stack is at a distance above the piezoelectric layer stack 210. More specifically, the neutral axis 250 is disposed in a plane that includes the mechanical layer 230 above the piezoelectric layer stack 210. It can be seen that the mechanical layer 230 is proximate to the side of the piezoelectric layer stack 210 opposite the cavity 220 and the substrate 260. In some implementations, the neutral axis 250 is a plane that passes through the piezoelectric layer stack 210 at a distance from the neutral axis of the piezoelectric layer stack 210 in a direction toward the mechanical layer 230 that is substantially parallel to the piezoelectric layer stack 210. Can be placed within.

For many multilayer microstructured devices that include a piezoelectric layer, it is preferred that the neutral axis of the multilayer stack is separated from the neutral axis of the piezoelectric layer. For example, the PMUT mechanical layer 230 of the present disclosure causes the neutral axis 250 of the multilayer stack to be a distance away from the neutral axis of the piezoelectric layer 210. The distance can be determined by the thickness of the various layers and their elastic properties, which can be determined by the resonant frequency and the property factor requirements of the transducer. In some implementations, the neutral axis 250 can be at a distance away from the neutral axis of the piezoelectric layer 210 and can be displaced toward the mechanical layer 230, while the neutral axis 250 is within the piezoelectric layer or the piezoelectric stack. Can still exist. For example, the mechanical layer 230 may have a thickness that allows an out-of-plane bending mode of the multilayer stack. In some implementations, the mechanical layer 230 may be configured to allow the multilayer stack to be primarily excited in an out-of-plane mode, such as a piston mode or a fundamental mode. The out-of-plane mode may cause displacement of a portion of the multilayer stack (sometimes referred to herein as a “release portion”) proximate to the cavity 220, for example, in the center of a circular, square, or rectangular PMUT. In some implementations, the displacement of the neutral axis 250 allows transducer operation in the d ₃₁ or e ₃₁ mode, in which the neutral axis of the multilayer stack of membranes in the conversion region is the active piezoelectric in the stack. It can be offset from the neutral axis of the material.

  As described in more detail below, the mechanical layer 230 may be configured to provide an encapsulation layer that seals the cavity 220. In addition, the mechanical layer 230 can function as a passivation layer for the electrodes of the piezoelectric layer stack 210. By judicious selection of the material properties, thickness, and internal stress of the mechanical layer 230, certain transducer parameters can be improved. For example, the resonant frequency, static and dynamic deflection, acoustic pressure output, and membrane shape (bow) that can result from residual stresses in the various layers can be adjusted by appropriately configuring the mechanical layer 230 Can be done.

  In some implementations, the mechanical layer 230 provides a planarization for attachment of an acoustic coupling layer to build an electrical circuit after manufacture of the transducer and / or capacitive decoupling to the piezoelectric layer stack 210. It can be configured to provide an insulating layer to create an additional routing layer on top of the mechanical layer 230 for the ring.

  In some implementations, the mechanical layer 230 may include a recess that reduces the total thickness of a portion of the PMUT stack. The size and geometry of the recesses and recess features depends on the transducer parameters such as resonant frequency, static and dynamic deflection, acoustic pressure output, mechanical property factor (Q), and membrane shape (bow). Can be designed to influence. FIG. 2B shows a cross-sectional view of a PMUT structure having a recess 232 formed in the upper portion of the mechanical layer 230, where the mechanical layer is locally thinned. In the illustrated implementation, the recess 232 is formed in the central region of the mechanical layer 230 of the PMUT 200B.

  It can be observed that the neutral shaft 250 moves downward toward the cavity 220 proximate the recess 232. The recess 232 may be a circle or ring partially formed in a circular PMUT diaphragm near the center of the diaphragm, or a cornered trench or part of a cornered trench formed near the periphery of the circular diaphragm, etc. Of substantially contrasting features. In some implementations, the recess 232 may include a square or rectangular feature formed in the mechanical layer 230 near the center of the square or rectangular PMUT diaphragm. In some implementations, the recess 232 may include features such as narrow rectangles, local trenches, or slots formed near the periphery of a square, rectangular, or circular diaphragm. In some implementations, a series of radial slots can be combined with a central or peripheral recess feature. In some implementations, the recesses or recess features may be formed by partially or substantially etching through the mechanical layer 230 and stopping on the underlying piezoelectric layer stack 210. In some implementations, the recess 232 and / or its features may be formed in the mechanical layer 230 based on, for example, etching time. In some implementations, the mechanical layer 230 may include two or more deposited layers, one of the deposited layers allowing precise definition of the recesses and recess features during manufacture. It can function as an etch stop layer or a barrier layer.

  FIG. 2C illustrates another example of an implementation of a PMUT stack configured in accordance with the techniques of this disclosure. In the illustrated implementation, the mechanical layer 230 of the PMUT 200C is disposed above the cavity 220 and below the piezoelectric layer stack 210. Accordingly, the mechanical layer 230 is disposed under the side of the piezoelectric layer stack 210 facing the cavity 220 and the substrate 260. Along with the piezoelectric layer stack 210, the mechanical layer 230 may form a drum-like film or diaphragm above the cavity 220, where the drum-like film or diaphragm receives or transmits an acoustic or ultrasonic signal. Sometimes configured to undergo flexing motion and / or vibration. In some implementations, the mechanical layer 230 may be substantially thicker than the piezoelectric layer stack.

  As described in more detail below, the mechanical layer 230 may be configured to provide an encapsulation layer that seals the cavity 220. By judicious selection of the material properties, thickness, and internal stress of the mechanical layer 230, certain transducer parameters can be improved. For example, the resonant frequency, static and dynamic deflection, acoustic pressure output, and membrane shape (bow) that can result from residual stresses in the various layers can be adjusted by appropriately configuring the mechanical layer 230 Can be done.

  In some implementations, the mechanical layer 230 may include a recess that reduces the total thickness of a portion of the PMUT stack. The size and geometry of the recesses and recess features depends on the transducer parameters such as resonant frequency, static and dynamic deflection, acoustic pressure output, mechanical property factor (Q), and membrane shape (bow). Can be designed to influence. FIG. 2D shows a cross-sectional view of a PMUT structure having a recess 232 formed in the lower portion of the mechanical layer 230, where the mechanical layer 230 is locally thinned. In the illustrated implementation, the recess 232 is formed in the central region of the mechanical layer 230 of the PMUT 200D.

  The recess 232 may be a circle or ring partially formed in a circular PMUT diaphragm near the center of the diaphragm, or a cornered trench or part of a cornered trench formed near the periphery of the circular diaphragm, etc. Of substantially contrasting features. In some implementations, the recess 232 may include a square or rectangular feature formed in the mechanical layer 230 near the center of the square or rectangular PMUT diaphragm. In some implementations, the recess 232 may include features such as narrow rectangles, local trenches, or slots formed near the periphery of a square, rectangular, or circular diaphragm. In some implementations, a series of radial slots can be combined with a central or peripheral recess feature. In some implementations, the recess or recess feature is formed by partial etching through an underlying sacrificial layer (not shown) prior to deposition of the mechanical layer 230 and the piezoelectric layer stack 210. obtain. In some implementations, the recess 232 and / or its features may be formed by partially etching into the underlying sacrificial layer based on the etch time. In some implementations, the sacrificial layer may include a stack of two or more deposited layers, one of the deposited layers being a local ridge of the sacrificial layer that is a mechanical layer 230 and a piezoelectric. An etch stop layer or barrier layer that can be formed prior to deposition of the layer stack 210, one of the deposited layers allowing precise definition of the recesses and recess features during manufacture Can function as. In some implementations, the top surface of the mechanical layer 230 can be planarized prior to forming the piezoelectric layer stack 210. For example, the mechanical layer 230 may be planarized with chemical mechanical polishing (CMP), also referred to as chemical mechanical planarization.

  A better understanding of the techniques of this disclosure may be obtained by referring now to FIG. FIG. 3 shows an exemplary implementation of a PMUT. The illustrated PMUT 300 includes a piezoelectric layer stack 310 disposed over a cavity 320i. As will be described in more detail below, the cavity 320i may be formed by removal of a sacrificial layer formed in the anchor structure 370 via one or more discharge holes 320o. Anchor structure 370 may be deposited on substrate 360, as described in more detail below. For scalability, these structures are preferably fabricated using processes common in the IC, MEMS, and LCD industries.

  In the illustrated implementation, the piezoelectric layer stack 310 includes a piezoelectric layer 315 disposed between the lower electrode 312 and the upper electrode 314. The mechanical layer 330 is disposed above the piezoelectric layer stack 310 opposite the cavity 320i, and together with the piezoelectric layer stack 310 may form a drum-like film or diaphragm above the cavity 320i. The diaphragm is configured to undergo flexing motion and / or vibration when the PMUT receives or transmits an acoustic signal or an ultrasonic signal. In some implementations, the mechanical layer 330 may be configured such that the neutral axis 350 is disposed substantially outside (above) the piezoelectric layer stack 310. Advantageously, the mechanical layer 330 seals one or more discharge holes 320o as shown in cross-section BB of FIG. 3 while providing additional structural support for the PMUT 300, and external It may function as an encapsulation layer that isolates the cavities 320i from liquids and gases.

4A and 4B show an example of a process flow for manufacturing a PMUT. In the illustrated example, the first layer portion 472 of the anchor structure 470 is deposited on the substrate 360 in step S401. The first layer portion 472 may be referred to as an oxide buffer layer. In some implementations, the oxide buffer layer 472 may be a silicon (SiO ₂₎ layer dioxide having a thickness in the range of about 500Å~ about 30000 Å. For example, in one implementation, the thickness of the oxide buffer layer 472 is about 5000 mm. The substrate 360 can be a glass substrate, a silicon wafer, or other suitable substrate material.

In the illustrated example, in step S402, sacrificial regions 425i and 425o may be formed by first depositing a sacrificial layer 425 of sacrificial material on the oxide buffer layer 472, the sacrificial material being amorphous silicon (a-Si). ), Polycrystalline silicon (poly-Si), or a combination of a-Si and poly-Si. Alternatively, other sacrificial layer materials such as molybdenum (Mo), tungsten (W), polyethylene carbonate (PEC), polypropylene carbonate (PPC), or polynorbornene (PNB) can be used. Step S402 may also include patterning and etching sacrificial layer 425 to form sacrificial regions 425i and 425o. The inner sacrificial region 425i may be disposed at an entrance corresponding to the cavity 320i of FIG. 3, and the outer sacrificial region 425o may be disposed at a position corresponding to the discharge hole 320o. One or more emission channels or emission vias in a sacrificial material layer (not shown) may connect the outer sacrificial region 425o to the inner sacrificial region 425i. In some implementations using PEC, PPC, or PNB, these sacrificial materials can diffuse through a layer that is somewhat permeable, carbon dioxide (CO ₂ ), monoatomic hydrogen or diatomic If it can be pyrolyzed to produce hydrogen or gaseous by-products such as mono- or diatomic oxygen, an emission channel or via is needed to form the underlying cavity in the PMUT. It may not be. In some implementations, the sacrificial layer 425 has a thickness in the range of about 500 mm to about 20000 mm. For example, in one implementation, the sacrificial layer 425 has a thickness of about 10,000 mm.

In the illustrated example, in step S403, the anchor portion 474 of the anchor structure 470 is deposited on the oxide buffer layer 472 so as to surround the sacrificial regions 425i and 425o. In some implementations, anchor portion 474 may be a SiO ₂ layer having a thickness in the range of about 750A～22000A. For example, in one implementation, anchor portion 474 has a thickness of about 12000 mm. Following deposition, the anchor portion 474 can optionally undergo chemical mechanical planarization (CMP) to planarize the top of the deposited layer. Alternatively or additionally, the anchor portion 474 can be thinned by a chemical method, a plasma method, or other material removal method.

In the illustrated example, a piezoelectric layer stack 410 is formed on the anchor structure 470 in step S404. More specifically, in some implementations, the series of deposition processes results in aluminum nitride (AlN), silicon dioxide (SiO ₂ ), or deposited on anchor structure 470 and sacrificial regions 425i and 425o, or A first layer (or “barrier layer”) 411 of other suitable etch resistant layers and a lower portion of molybdenum (Mo), platinum (Pt), or other suitable conductive material deposited on the barrier layer 411 An electrode layer 412, a piezoelectric layer 415 such as AlN, zinc oxide (ZnO), zirconate titanate (PZT), or other suitable piezoelectric material deposited on the lower electrode layer 412; Resulting in an upper electrode layer 414 of deposited Mo, Pt, or other suitable conductive layer. In some implementations, the barrier layer 411 can have a thickness in the range of about 300 to 1000 inches. For example, in one implementation, the thickness of the barrier layer 411 is about 500 mm. In some implementations, the bottom electrode layer 412 can have a thickness in the range of about 1000 to 30000 inches. For example, in one implementation, the thickness of the lower electrode layer 412 is about 1000 mm. In some implementations, the piezoelectric layer 415 may have a thickness in the range of about 1000 to 30000 inches. For example, in one implementation, the thickness of the active piezoelectric layer 415 is about 10,000 mm. In some implementations, the top electrode layer 414 may have a thickness in the range of about 1000 to 30000 inches. For example, in one implementation, the thickness of the top electrode layer 414 is about 1000 mm. The first layer or barrier layer 411 may function as a seed layer for subsequent bottom electrode layer and / or piezoelectric layer deposition in some implementations.

  Following step S404, a series of patterning and forming operations may be performed to selectively expose the various layers included in the piezoelectric layer stack 410 with a desired geometric configuration. In the illustrated example, in step S405, the molybdenum top electrode layer 414 may be patterned and etched to expose selected regions of the piezoelectric layer 415. In step S406, the piezoelectric layer 415 of AlN or other piezoelectric material may be patterned and etched to expose selected regions of the bottom electrode layer 412. In step S407, the molybdenum lower electrode layer 412 may be patterned and etched to expose selected regions of the barrier layer 411.

In the illustrated example, in step S408, an insulating layer 416 may be deposited on the top electrode layer 414 and other surfaces exposed during the masking and etching operations prior to steps S404-S407. In some implementations, the insulating layer 416 can be, for example, SiO ₂ and can have a thickness in the range of about 300 to 5000 inches. For example, in one implementation, the thickness of the insulating layer 416 is about 750 mm. Step S408 may also include patterning and etching the insulating layer 416 to expose selected regions of the upper electrode layer 414, the lower electrode layer 412, and the outer sacrificial region 425o. In some implementations using thermally decomposable sacrificial materials such as PEC, PPC, or PNB, the step of patterning and etching the insulating layer 416 need not expose any outer sacrificial regions 425o. .

  In the illustrated example, in step S409, a metal interconnect layer 418 may be deposited on the surface exposed during the masking and etching operations prior to step S408. Interconnect layer 418 can be, for example, aluminum and can have a thickness in the range of about 1000 to 50000 inches. For example, in one implementation, the thickness of the interconnect layer 418 is about 1000 mm. Step S409 may also include patterning and etching interconnect layer 418 to expose selected regions of insulating layer 416 and outer sacrificial region 425o. In implementations that use thermally decomposable sacrificial materials, the steps of patterning and etching interconnect layer 418 need not expose any outer sacrificial region 425o.

In the illustrated example, in step S410, the sacrificial material deposited in step S402 to form inner sacrificial region 425i and outer sacrificial region 425o can be removed, thereby forming discharge hole 420o and cavity 420i. Removal of the sacrificial material from the inner sacrificial region 425i, the outer sacrificial region 425o, and the one or more connected release channels that connect the emission channel between the outer sacrificial region 425i and the outer sacrificial region 425o, results in an emission hole 420o. Can be done through. For example, the a-Si / PolySi sacrificial layer 425 can be removed by exposing the sacrificial material to an etchant, eg, xenon difluoride (XeF ₂ ). By providing an emission channel or via that couples the outer sacrificial region 425o to the inner sacrificial region 425i, substantially all of the sacrificial material in the inner sacrificial region 425i can be removed through one or more emission holes 420o. In some implementations using thermally decomposable sacrificial material, raising the temperature of the substrate to the decomposition temperature (eg, about 200 degrees for PEC and about 425 degrees for PNB) selectively removes the sacrificial material. And during decomposition, gaseous by-products diffuse through the overlying layers or diverge through any exposed emission channels or vias.

In the illustrated example, in step S411, a mechanical layer 430 may be deposited on the surface exposed during the masking and etching operations prior to step 409. Mechanical layer ^430, SiO 2, SiON, silicon nitride (SiN), may comprise a combination of other dielectric materials or dielectric material or layer. The mechanical layer 430 may have a thickness in the range of about 1000 to 50000 inches. For example, in one implementation, the thickness of the mechanical layer 430 is about 20000 mm. Step S409 may also include patterning and etching the mechanical layer 430 to achieve a desired profile. As shown in FIGS. 4A-4B, the mechanical layer 430 may be configured to mechanically encapsulate the release hole 420o. As a result, the deposition of the mechanical layer 430 in step S411 can provide a substantial degree of isolation between the encapsulated cavity 420i and the surrounding environment. The mechanical layer 430 may also function as a passivation layer over the top electrode layer 414 and other exposed layers. In implementations that use a thermally decomposable sacrificial material, deposition of the mechanical layer 430 may not be required to seal or otherwise encapsulate the underlying cavity 420i.

  FIG. 5A shows a cross-sectional illustration of another implementation of a PMUT having a mechanical layer. In the illustrated implementation, the PMUT 500A is formed by forming an anchor structure 570 on a substrate 560, such as a silicon wafer or a glass substrate. A piezoelectric layer stack 510 including a lower electrode layer 512, a piezoelectric layer 515, and an upper electrode layer 514 is formed on the anchor structure 570. A portion of the piezoelectric layer stack 510 uses, for example, a sacrificial etchant to selectively remove the sacrificial layer (not shown) and form a cavity 520 between the piezoelectric layer stack 510 and the substrate 560. Can be removed from the substrate 560. The portion of the sacrificial layer within the cavity region may be accessed through a central ejection hole 522 that extends through the central portion of the piezoelectric layer stack 510 of PMUT 500A. Alternatively, one or more discharge holes and discharge channels as described above can be used for sacrificial material removal to form the cavity 520. The mechanical layer 530 may be disposed on the piezoelectric layer stack 510 or may be deposited on the piezoelectric layer stack 510 in other ways. The mechanical layer 530 can function as a sealing layer for the discharge hole 522. The mechanical layer 530, together with the piezoelectric layer stack 510, is configured as a drum above the cavity 520 that is configured to undergo flexing motion and / or vibration when the PMUT receives or transmits an acoustic or ultrasonic signal. A film may be formed. A neutral axis 550 passes through the mechanical layer 530 and is disposed on the piezoelectric layer stack 510 on the opposite side of the cavity 520. In some implementations, the neutral axis 550 is a plane that passes through the piezoelectric layer stack 510 at a distance from the neutral axis of the piezoelectric layer stack 510 in a direction toward the mechanical layer 530 that is substantially parallel to the piezoelectric layer stack 510. Can be placed within.

  In some implementations, the mechanical layer 530 may be attached by laminating, sticking, or otherwise bonding the mechanical layer 530 to the exposed top surface of the piezoelectric layer stack 510. For example, the mechanical layer 530 may comprise a thick patternable film such as SU8, polyimide, photosensitive silicone dielectric film, cycloten polymer film such as benzocyclobutene or BCB, dry resist film, or photosensitive material. Alternatively, the mechanical layer 530 is a laminated layer of plastic such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), polycarbonate (PC), silicone, elastomeric material, or other suitable material. Can be included. The mechanical layer 530 may be laminated or otherwise bonded with an adhesive layer or other connection layer. Examples of adhesives are silicone, polyurethane, thermoplastic resins, elastomeric adhesives, thermosetting adhesives, UV curable adhesives, thermosetting adhesives, hot melt adhesives, phenol resins, one-part epoxies and two-part epoxies. Includes type epoxy, cyanoacrylate, acrylic, acrylate, polyamide, contact adhesive, and pressure sensitive adhesive (PSA). The mechanical layer 530 can be deposited, coated, laminated, glued, or otherwise bonded directly or indirectly to the piezoelectric layer stack, for example, with a wide range of thicknesses from less than 2 microns to more than 500 microns. Can have.

  FIG. 5B shows a cross-sectional illustration of yet another implementation of a PMUT stack having a mechanical layer. In the illustrated implementation, the mechanical layer 530 of the PMUT 500B is stacked or otherwise attached to a deposited lower mechanical layer 530a disposed on the piezoelectric layer stack 510 opposite the cavity 520 and the substrate 560. A mechanical layer 530b is included. The lower mechanical layer 530a may include one or more deposited layers as described above. One or more ejection holes 522 may be formed in the lower mechanical layer 530a and in the underlying piezoelectric layer stack 510 to allow removal of the sacrificial material to form the cavity 520. In the illustrated implementation, the discharge hole 522 may be sealed upon attachment of the upper mechanical layer 530b onto the exposed upper surface of the lower mechanical layer 530a. As a result, the upper mechanical layer 530b can function as a sealing layer for the discharge hole 522. The neutral axis 550 can pass through either the lower mechanical layer 530a or the upper mechanical layer 530b, depending on the thickness and modulus of the individual layers. In the region near the discharge hole 522, the central portion of the neutral shaft 550 can be located farther from the cavity 520 than the rest of the neutral shaft.

  FIG. 5C shows a cross-sectional illustration of a PMUT having an upper mechanical layer and an acoustic port formed in the substrate. The acoustic port 580 can be formed in the substrate 560 under the piezoelectric layer stack 510. The acoustic port 580 may be configured to provide acoustic coupling between the PMUT 500C and the backside of the substrate 560. The cross-sectional dimension of the acoustic port 580 may be substantially the same as, larger than, or smaller than the dimension of the cavity 520 between the piezoelectric layer stack 510 and the acoustic port 580. Good. Cavity 520 may be formed before or after formation of acoustic port 580 by removal of sacrificial material in the cavity region. The mechanical layer 530 can be disposed on the piezoelectric layer stack 510. The neutral axis 550 of the multilayer stack can pass through the mechanical layer 530 and can be separated by a distance from the piezoelectric layer stack 510 in a direction opposite to the cavity 520 and the acoustic port 580. The acoustic port 580 may allow transmission of ultrasound or sound waves from the PMUT 500C to a region outside the substrate 560. Similarly, the acoustic port 580 allows the PMUT 500C to receive ultrasound or sound waves from a region outside the substrate 560.

  Although FIGS. 5A-5C illustrate individual PMUT and PMUT stack implementations, the mechanical layer 530 may extend beyond an individual PMUT stack and may cover one or more adjacent PMUTs. FIG. 6A shows a top view of an array of PMUTs according to some implementations. Each PMUT 600 is configured on a common substrate 660 having a bonding mechanical layer 630 extending over and between two or more PMUTs 600 in the PMUT array 600A. The coupling portion of the mechanical layer 630 can function as an acoustic coupling layer. In one mode of operation, the PMUTs 600 in the array can be operated simultaneously to generate and transmit quasi-plane waves from the top surface of the mechanical layer 630. In some implementations, the mechanical layer 630 is continuous between adjacent PMUTs. In some implementations, the mechanical layer 630 aligns with the periphery of the PMUT 600 or selectively exposes portions of one or more layers underlying the mechanical layer 630, such as a metal bond pad. As such, it can be patterned, diced, sliced, cut, or otherwise formed. The implementation shown in FIG. 6A includes an array of circular PMUTs 600, but other shapes such as square PMUTs or rectangular PMUTs are within the contemplation of the present disclosure. For example, in some implementations, hexagonal PMUTs can be contemplated, which can result in increased packing density in terms of the number of pixels per unit area. The array of PMUTs 600 may be configured as a square array or a rectangular array, as shown in FIG. 6A. In some implementations, the array may include alternating rows or columns of PMUT 600, such as a triangular array or a hexagonal array.

  6B-6E illustrate exemplary cross-sectional elevation views of PMUT arrays in various configurations. PMUT array 600B includes an array of PMUTs 600 disposed on a substrate 660. The top mechanical layer 630 may be laminated, bonded, or otherwise attached to the top surface of the PMUT 600 array, such as an adhesive layer 632. The flexing motion and / or vibration of each PMUT 600 may cause a portion of the mechanical layer 630 to bend, bend, compress, or expand. In some implementations, the synchronized vibration of the PMUT 600 in the PMUT array 600B may fire a substantially planar ultrasound wave up and through the mechanical layer 630. In some implementations, the mechanical layer 630 is bent with controlled actuation of the underlying PMUT 600 to emit sound waves or ultrasound waves with a controlled wavefront that may be useful for transmit side beam shaping applications. Get bent. In some implementations, the ultrasound returning through the mechanical layer 630 can cause the underlying PMUT 600 to deflect and / or vibrate and be detected accordingly. In some implementations, the mechanical layer 630 may function as an acoustic coupling medium. In some implementations, the mechanical layer 630 may function as an encapsulation layer that may mechanically encapsulate or otherwise seal the cavities in the PMUT 600. The mechanical layer 630 may comprise a layer of polymer or plastic, such as, for example, polycarbonate (PC), polyimide (PI), or polyethylene terephthalate (PET). Adhesive layer 632 includes a thin layer of epoxy, UV curable material, pressure sensitive adhesive (PSA), or other suitable adhesive material that bonds mechanical layer 630 to PMUT 600 in PMUT array 600B.

  FIG. 6C shows a PMUT array 600C comprised of a portion of a cover glass, housing, enclosure, button cover, or platen 690 that covers a mechanical layer 630 disposed on the substrate 660 and the array of PMUTs 600. FIG. Adhesive layers 632 and 634 may mechanically connect mechanical layer 630 to PMUT 600 and overlying platen 690. In some implementations, the mechanical layer 630 is overlaid with an array of PMUTs 600 for use with an ultrasonic fingerprint sensor, touch sensor, ultrasonic touchpad, stylus detection, biometric sensor, or other ultrasonic device. Acoustic coupling with the platen 690 may be provided. An acoustic impedance matching layer 692 such as a polymer coating may be deposited, screened, applied, glued, or otherwise disposed on the outer surface of the cover glass or platen 690. The acoustic matching layer 692 can function as a scratch-resistant coating. A further description of the mechanical layer 630 is provided with respect to FIG. 6B above.

  FIG. 6D shows a PMUT array 600D having a mechanical layer 630 coupled to the array of PMUTs 600 via an array of micropillars 636. FIG. The micropillar 636 provides mechanical and acoustic coupling between the PMUT 600 and the overlying mechanical layer 630. Micropillar 636 may function as an acoustic waveguide that allows sound waves or ultrasound generated by PMUT 600 to travel through the waveguide with some level of acoustic separation between adjacent PMUTs 600. Similarly, the micropillar 636 can function as an acoustic waveguide that can guide the ultrasound back into the PMUT 600, which can function as either an ultrasound transmitter or an ultrasound receiver. In some implementations, the micropillars 636 can be substantially square, rectangular, or circular cross-sections that are substantially aligned with the periphery of each PMUT 600 in the PMUT array 600D, and each micropillar 636 is adjacent to each other. Is separated from the micropillar 636 by a gap. In some implementations, the micropillar 636 is a light such as a photoresist or photoimageable polymer laminate (eg, a layer of SU-8 negative working photoresist, photosensitive silicone dielectric film, or cycloten polymer film). It can be formed from a patternable polymer. For example, to form micropillar 636, a relatively thick layer of negative photoresist or positive photoresist is applied to the top surface of PMUT 600 on substrate 660, dried, patterned with a suitable photomask, and developed. Can be fired. In some implementations, a dry resist photopatternable film, also known as a dry resist film, can be pre-patterned prior to being aligned with the PMUT 600 array and attached to the PMUT 600 array. The dry resist film can have a layer of photosensitive material on a relatively inert backing layer, such as acetate, PC, PI, or PET. In some implementations, an adhesion promoter layer or adhesive layer 632 can be disposed between the micropillar 636 and the underlying PMUT 600 to provide mechanical and acoustic coupling. In some implementations, the backing layer for the dry resist film can be removed. Alternatively, the backing layer for the dry resist film can be retained and function as the mechanical layer 630. Acoustic waveguides (eg, micropillars 636) formed by photolithography on one or more PMUTs 600 are closely aligned and geometric for PMUTs placed on a substrate or configured in a PMUT array. It can provide a low cost batch process with the ability to define. In some implementations, the polymer laminate may be used as a tent that covers a plurality of emission holes associated with the PMUT 600 while planarizing the PMUT topology prior to attaching the cover glass or platen.

  FIG. 6E shows a PMUT array 600E having an array of micropillars 636 and a platen 690 that functions as a fingerprint sensor array. The acoustic matching layer 692 can be disposed on the outer surface of the cover glass or platen 690. The PMUT 600 in the PMUT array 600E on the substrate 660 may generate and transmit ultrasound 664 that propagates through the micropillar 636, through the optional mechanical layer 630, and into the platen 690. A portion of the ultrasound 664 is between the platen 690 or acoustic matching layer 692 and the objects above it, such as the ridges and valleys of the fingerprint of the user's finger placed in contact with the outer surface of the platen 690. It can reflect back from the outer surface of the platen 690 or the outer surface of the acoustic matching layer 692 with an amplitude that depends in part on the acoustic mismatch. The reflected wave travels back through the acoustic matching layer 692 and platen 690, through the optional mechanical layer 630 and micropillar 636, and can be detected by the underlying PMUT 600. Adhesive layers 632 and 634 may function to mechanically and acoustically couple the various layers of PMUT array 600E to each other.

  7A-7F show cross-sectional elevation views of various anchor structure configurations for PMUT 700. FIG. FIG. 7A shows a peripheral anchor structure 770 disposed between a substrate 760 and a piezoelectric layer stack 710 having a mechanical layer 730 formed thereon. The mechanical layer 730, together with the piezoelectric layer stack 710, may form a drum-like film or diaphragm above the cavity 720, and the flexural motion and / or vibration when the PMUT receives or transmits an acoustic or ultrasonic signal. Can be configured to receive. In the illustrated implementation, the mechanical neutral shaft 750 passes through the mechanical layer 730 and over the piezoelectric layer stack 710 and the cavity 720. In some implementations, the neutral axis 750 is directed toward the mechanical layer 730 disposed above the piezoelectric layer stack 710 relative to the neutral axis of the piezoelectric layer stack 710 to allow an out-of-plane bending mode. Can be displaced.

  FIG. 7B shows a central anchor structure 770 disposed between the piezoelectric layer stack 710 and the substrate 760. FIG. 7C shows a variation of the peripheral anchor structure 770 having a central discharge hole 722. The configuration shown in FIG. 7C may alternatively represent a pair of cantilevered PMUTs 700. A vertical double arrow in FIGS. 7A-7F is one such as an out-of-plane bending mode where the open portion of PMUT 700 can be driven to vibrate or otherwise deform in the direction indicated by the corresponding arrow. Indicates the operation mode. FIG. 7D shows a PMUT 700 having a peripheral anchor structure 770 with a mechanical layer 730 disposed between the piezoelectric layer stack 710 and the cavity 720 and disposed between the substrate 760 and the piezoelectric layer stack 710. The mechanical neutral axis 750 of the multilayer stack is displaced relative to the neutral axis of the piezoelectric layer stack 710 in a direction toward the underlying cavity 720 and substrate 760 to allow one or more out-of-plane bending modes. obtain. FIG. 7E shows a PMUT 700 having a central anchor structure 770 with a mechanical layer 730 disposed between the piezoelectric layer stack 710 and the cavity 720 and disposed between the piezoelectric layer stack 710 and the substrate 760. Similar to the PMUT 700 in FIG. 7D, the mechanical neutral axis 750 of the multilayer stack can be displaced from the neutral axis of the piezoelectric layer stack 710 toward the cavity 720 and the substrate 760. FIG. 7F shows a PMUT 700 having a peripheral anchor structure 770 with a central discharge hole 722. Alternatively, the configuration shown in FIG. 7F may represent a pair of cantilever PMUTs 700. The mechanical layer 730 is disposed between the piezoelectric layer stack 710 and the cavity 720. The mechanical neutral axis 750 of the multilayer stack can be displaced from the center of the piezoelectric layer stack 710 towards the cavity 720 and the substrate 760.

  8A-8H show top views of various geometric configurations of the PMUT and anchor structure. A circular PMUT 800 having a circular mechanical layer 830 and a peripheral anchor structure 870 is shown in FIG. 8A. A circular PMUT 800 having a circular mechanical layer 830 and a central anchor structure 870 is shown in FIG. 8B. 8C and 8D show a square PMUT 800 having a peripheral anchor structure 870 and a central anchor structure 870, respectively. 8E and 8F show a long rectangular PMUT 800 having a peripheral anchor structure 870 and a central anchor structure 870, respectively. FIG. 8G shows a rectangular PMUT 800 having a pair of side anchor structures 870. FIG. 8H shows a pair of rectangular PMUTs 800, also referred to as ribbon PMUTs or PMUT strips, having side anchor structures 870a and 870b. The PMUT 800 shown in FIGS. 8A-8H is exemplary, and connection electrodes, pads, traces, etch holes, and other features are omitted for clarity. In some implementations, particularly those having a central anchor structure or other centrally anchored structure, the anchor structure may be referred to as an anchor post, or simply a “post”. The PMUT shown in FIGS. 8A-8H can be configured with a substantial portion of the mechanical layer positioned above the piezoelectric layer stack, as shown in FIG. 2A, or as shown in FIG. 2C. A substantial part may be arranged below the piezoelectric layer stack.

  The PMUT described in this disclosure may or may not be sealed overall. A sealed PMUT has at least a portion of an associated cavity that is sealed from the outside environment. In some implementations, the sealed PMUT may have a sealed vacuum inside the cavity region. In some implementations, the sealed PMUT can cause a gas, such as argon, nitrogen, or air, to pass a reference pressure in the cavity that is below atmospheric pressure, above atmospheric pressure, or substantially atmospheric pressure. Can have. The acoustic performance of a sealed PMUT may exceed the acoustic performance of an unsealed PMUT in that the attenuation of the PMUT structure may be higher than that of an unsealed PMUT. In some implementations, an unsealed PMUT may be utilized. For example, a PMUT with a central anchor or post structure may not be sealed or may otherwise be considered to be an open structure. An unsealed PMUT may allow liquid, gas, or other viscous media to enter the cavity region. The PMUT associated with the acoustic port can be sealed on one or both sides of the PMUT, for example, to allow transmission and reception of sonic or ultrasonic waves. One or more acoustic ports, such as holes etched or otherwise formed in the substrate under the PMUT, may be included in various implementations of the PMUT and manufacturing methods described above. In some implementations, an unsealed PMUT or an array of unsealed PMUTs can serve as a top mechanical layer, such as the top mechanical layer 530b shown in FIG. 5B, or a supplement to the top mechanical layer. Can be covered with. The cover layer extends over one or more discharge holes associated with the PMUT to seal the PMUT cavity and provide separation from surrounding gases and liquids, for example, the adhesive layer with the PMUT Can be attached to a membrane.

  FIG. 9 shows a further example of a process flow for manufacturing a PMUT. Method 900 includes step 910 for forming an anchor structure above the substrate. The substrate may include a glass substrate such as a glass plate, panel, subpanel, or wafer. In some implementations, the substrate can be plastic or flexible. The substrate can include a TFT circuit. Alternatively, the substrate may include a semiconductor substrate, such as a silicon wafer, with or without prefabricated integrated circuits. The anchor structure may include one or more layers of deposited dielectric material such as silicon dioxide, silicon nitride, or silicon oxynitride. The anchor structure can include a silicide, such as nickel silicide. The anchor structure may be placed proximate to the region of sacrificial material that is patterned to allow the final formation of one or more cavities, emission holes, vias, and channels. The sacrificial material can include amorphous silicon (a-Si), polycrystalline silicon (poly-Si), or a combination of a-Si and poly-Si. A planarization sequence such as CMP or chemical thinning may be used to planarize the anchor structure and sacrificial layer.

  In step 920, a piezoelectric layer stack is formed over the anchor structure. The piezoelectric layer stack may include a piezoelectric layer such as AlN, ZnO, or PZT, with one or more electrode layers electrically coupled to the piezoelectric layer. The piezoelectric layer stack can be patterned and etched to form vias or emission holes and other features. In step 930, the sacrificial material is removed. Removing the sacrificial material can be accomplished by removing the sacrificial material from the cavity region through the discharge hole. In some implementations, removing the sacrificial material includes one or more emission vias or holes, and one or more emission channels that can connect the one or more outer emission holes to the cavity region. It can be achieved by etching sacrificial material through. In step 940, the mechanical layer is placed at a distance from the neutral axis of the resulting assembly toward the mechanical layer and away from the substrate so that the neutral axis passes through the mechanical layer and not through the piezoelectric layer stack. Is disposed on the piezoelectric layer stack. In some implementations, the mechanical layer has a thickness such that the resulting neutral axis of the multilayer stack is displaced toward the mechanical layer relative to the neutral axis of the piezoelectric layer stack so as to allow an out-of-plane bending mode. Now it can be placed on top of the piezoelectric layer stack. In some implementations, the mechanical layer may include a deposition layer, a composite of one or more layers, a bonding layer, or a bonding layer over a deposition layer or set of layers. The mechanical layer may be patterned to form features such as an upper recess where the mechanical layer is locally thinned. As shown in step 950, depending on the implementation, the one or more ejection holes may be sealed when the mechanical layer is placed over the piezoelectric layer stack.

  10A-10C illustrate a process flow for integrating an electronic circuit with a PMUT as described above. FIG. 10A shows a “TFT First” process 1000a in which a TFT or other integrated circuit is formed on / in a substrate in step 1010, as shown in step 1020, at or near the top of the circuit. Followed by the formation of one or more PMUTs on the substrate. This approach allows a first manufacturing facility to form an active circuit on a substrate, and allows a second manufacturing facility to receive a substrate having an active circuit and form a PMUT on the substrate. FIG. 10B shows a “TFT is last” process 1000b, where the TFT or other integrated circuit is formed on / in the substrate after the PMUT is formed, as shown in steps 1040 and 1050. The planarization step and the thick dielectric layer can serve to provide a surface on which the TFT circuit can be formed, as described above. FIG. 10C shows a composite or co-manufacturing process 1000c where the PMUT and active circuitry are formed on the substrate, as shown in steps 1060 and 1070. Because this approach utilizes a common layer for the formation of both the active circuit and the PMUT, the PMUT may reduce the total number of masking steps and deposition processes required compared to the first process or the PMUT compared to the last process. You can make a profit. For example, metal interconnect layers for TFT or silicon-based transistors can be used for the upper or lower electrode layer for PMUT. In another example, a dielectric layer between metal layers for an active circuit is used for a buffer or barrier layer in a PMUT, or for use in a mechanical layer, or for sealing. obtain. Etch sequences for metal or dielectric layers can be commonly used to form portions of active circuitry and portions of PMUT on the substrate. In another example, a passivation layer for a TFT or active circuit can be used for passivation of PMUT devices. In some implementations, the TFT or active circuit may include row and column address electrodes, multiplexers, local amplification stages, or control circuitry. In some implementations, an interface circuit that includes a driver stage and a sensing stage may be used to excite a PMUT device and detect a response from the same or another PMUT device. In some implementations, the active silicon circuit may include electronic devices for functioning the PMUT or PMUT array.

  11A-11C show cross-sectional views of various configurations of the PMUT ultrasonic sensor array. FIG. 11A illustrates an ultrasonic sensor array 1100A having a PMUT as a transmitting element and a receiving element that may be used, for example, as an ultrasonic fingerprint sensor, an ultrasonic touchpad, or an ultrasonic imager. The PMUT sensor element 1162 on the PMUT sensor array substrate 1160 can emit and detect ultrasound. As shown, ultrasound 1164 may be transmitted from PMUT sensor element 1162. The ultrasound 1164 may travel through the acoustic coupling medium 1165 and the platen 1190a toward an object 1102 such as a finger or stylus placed on the outer surface of the platen 1190a. A portion of the outgoing ultrasound 1164 may be transmitted into the object 1102 via the platen 1190a, while the second portion is reflected from the surface of the platen 1190a toward the sensor element 1162. The amplitude of the reflected wave depends in part on the acoustic properties of the object 1102. The reflected wave can be detected by sensor element 1162 from which an image of object 1102 can be obtained. For example, in a sensor array having a pitch of about 50 microns (about 500 pixels per inch), fingerprint ridges and valleys can be detected. An acoustic coupling medium 1165, such as an adhesive, gel, compliant layer, or other acoustic coupling material, improves the coupling between the array of PMUT sensor elements 1162 disposed on the sensor array substrate 1160 and the platen 1190a. Can be provided for. The acoustic coupling medium 1165 may aid in the transmission of ultrasonic waves to and from the sensor element 1162. The platen 1190a may include, for example, a layer of glass, plastic, sapphire, or other platen material. An acoustic impedance matching layer (not shown) may be disposed on the outer surface of the platen 1190a.

  FIG. 11B shows an ultrasonic sensor and display array 1100B having PMUT sensor elements 1162 and display pixels 1166 fabricated on the sensor and display substrate 1160 at the same time. Sensor element 1162 and display pixel 1166 may be placed together within each cell of the array of cells. In some implementations, the sensor element 1162 and the display pixel 1166 can be manufactured side by side in the same cell. In some implementations, some or all of the sensor elements 1162 can be fabricated above or below the display pixels 1166. Platen 1190b may be disposed over sensor element 1162 and display pixel 1166, may function as a cover lens or cover glass, or may include a cover lens or cover glass. The cover glass may include one or more layers of materials such as glass, plastic, or sapphire and may include equipment for a capacitive touch screen. An acoustic impedance matching layer (not shown) may be disposed on the outer surface of the platen 1190b. Ultrasound 1164 may be transmitted to and received from one or more sensor elements 1162 to provide imaging capability for an object 1102 such as a stylus or finger placed on the cover glass 1190b. Cover glass 1190b is substantially transparent to allow optical light from the array of display pixels 1166 to be viewed by the user through cover glass 1190b. The user can choose to touch a portion of cover glass 1190b, which can be detected by the ultrasonic sensor array. Biometric information such as fingerprint information can be obtained, for example, when the user touches the surface of the cover glass 1190b. An acoustic coupling medium 1165, such as an adhesive, gel, or other acoustic coupling material, may be provided to improve acoustic coupling, optical coupling, and mechanical coupling between the sensor array substrate 1160 and the cover glass. In some implementations, the binding medium 1165 can be a liquid crystal material that can function as part of a liquid crystal display (LCD). In an LCD implementation, a backlight (not shown) can be optically coupled to the sensor and display substrate 1160. In some implementations, the display pixel 1166 may be part of an amorphous light emitting diode (AMOLED) display having light emitting display pixels. In some implementations, the ultrasonic sensor and display array 1100B may be used for display purposes and for touch detection, stylus detection, or fingerprint detection.

  FIG. 11C shows an ultrasonic sensor and display array 1100C having a sensor array substrate 1160a disposed behind the display array substrate 1160b. The acoustic coupling medium 1165a may be used to acoustically couple the sensor array substrate 1160a to the display array substrate 1160b. Optical coupling and acoustic coupling medium 1165b is used to optically and acoustically couple sensor array substrate 1160a and display array substrate 1160b to a cover lens or cover glass 1190c that may also function as a platen for fingerprint detection. obtain. An acoustic impedance matching layer (not shown) may be disposed on the outer surface of the platen 1190c. Ultrasound 1164 transmitted from one or more sensor elements 1162 may travel through display array substrate 1160b and cover glass 1190c, be reflected from the outer surface of cover glass 1190c, and return toward sensor array substrate 1160a, In the array substrate 1160a, the reflected ultrasonic sensor can be detected, and image information can be acquired. In some implementations, the ultrasonic sensor and display array 1100C may be used to provide visual information to the user and for touch, stylus, or fingerprint detection from the user. Alternatively, the PMUT sensor array can be formed on the back surface of the display array substrate 1160b. Alternatively, the sensor array substrate 1160a having a PMUT sensor array can be attached to the back side of the display array substrate 1160b, which is, for example, an adhesive layer or adhesive material (not shown). It is directly attached to the back surface of the display array substrate 1160b.

  As described above in connection with FIGS. 4A and 4B, the process flow for forming a PMUT stack according to the techniques of this disclosure includes a series of microfabrication processes, including deposition, patterning, etching, and CMP. May be included. In addition to the process flows shown in FIGS. 4A and 4B, several alternative process flows are within the scope of the present disclosure.

  FIG. 12 shows another example of a process flow for manufacturing a PMUT. In the illustrated example, process 1200 incorporates a silicide formation process that can planarize the top of the anchor structure and the top of the sacrificial layer. As a result, the CMP sequence included in step S403 (FIG. 4A) can be avoided. The silicide may form at least part of the anchor structure for the PMUT and may function as an etch resistant layer during removal of the sacrificial material to form the PMUT cavity.

  Process 1200 may begin at step S401. Step S401 may include depositing a first layer portion 472 of the anchor structure 470 on the substrate 360 as described above in connection with FIG. 4A.

  In step S1202, a sacrificial layer of sacrificial material where sacrificial regions 425i and 425o (FIG. 4A) may include amorphous silicon (a-Si), polycrystalline silicon (poly-Si), or a combination of a-Si and poly-Si. 425 is formed by first depositing on the oxide buffer layer 472. Alternatively, other sacrificial layer materials such as molybdenum (Mo) or tungsten (W) can be used. In some implementations, the sacrificial layer 425 has a thickness in the range of about 500 to 20000 inches. For example, in one implementation, the sacrificial layer 425 has a thickness of about 10,000 mm.

  In step S1203, a nickel layer 1275 may be deposited on the sacrificial layer 425. Nickel layer 1275 may have a thickness in the range of about 250 to 10,000 inches. For example, in one implementation, the thickness of the nickel layer 1275 is about 5000 mm. Step S1203 may also include patterning and etching the nickel layer 1275 to expose the sacrificial layer 425 in the selected region.

In step S1204, a silicide formation process is contemplated whereby a layer of metal such as nickel can be deposited and patterned on top of the sacrificial layer 425 of polycrystalline or amorphous silicon. Silicide can be formed by interacting metal with the silicon of the sacrificial layer 425. Nickel silicide can be formed, for example, by interacting the patterned nickel layer 1275 with the silicon of the sacrificial layer 425. The formation of silicide in the portion 1276 of the sacrificial layer 425 diffuses the metal locally into the sacrificial layer, consuming the deposited metal and down to the underlying buffer layer (such as SiO ₂ or SiN on the silicon substrate). Or by forming a silicide down to an insulating substrate (such as glass). Metal diffusion into the underlying sacrificial layer can be achieved, for example, by raising the process temperature of the substrate and the deposited layer to the silicide formation temperature for a predetermined period of time. Alternatively, a rapid thermal anneal (RTA) process can be used to rapidly raise the temperature to allow intermetallic diffusion and silicide formation. Alternatively, application of focused laser light of the appropriate wavelength, energy, and time can be used to locally form the silicide, which allows the laser light to be applied from either above or below the substrate. Can be particularly attractive by the use of transparent substrates.

  Subsequent steps of process 1200 may be substantially the same as steps S404-S411 described above in connection with FIGS. 4A and 4B.

  13A and 13B show another example process flow for manufacturing a PMUT. Process flow 1300 provides three layers of metal interconnect for a PMUT having a mechanical layer substantially disposed between the piezoelectric layer stack and the underlying substrate. In a first step S1301, a substrate 360 such as a glass substrate, a plastic substrate, or a semiconductor (eg, silicon) substrate for manufacturing a PMUT is provided thereon. A first layer portion 472 such as an oxide buffer layer may be deposited on the substrate 360. A sacrificial layer 425 of sacrificial material may be deposited on the buffer layer. The sacrificial layer 425 is patterned and etched to form one or more inner sacrificial regions 425i and outer sacrificial regions 425o (not shown) with an etchant that stops on the underlying buffer layer or substrate. obtain. In step S1302, an anchor portion 474 of an anchor structure 470, such as a silicon dioxide layer, can be deposited over the buffer layer and sacrificial region 425i, and then substantially maintained while maintaining a small portion 474i of the silicon dioxide layer above the sacrificial layer 425i. Can be thinned using CMP to form a substantially flat surface. In step S1303, a multilayer stack including a mechanical layer 430, a first layer 411 of a piezoelectric stack 410 that can function as a seed layer, a lower electrode layer 412, a piezoelectric layer 415, and an upper electrode layer 414 can be deposited. . The upper electrode layer can be patterned and etched to form upper electrodes 414a and 414b in electrical contact with the piezoelectric layer 415. In step S 1304, the piezoelectric layer 415 can be patterned and etched and stops at the lower electrode layer 412. In step S1305, the bottom electrode layer 412 can be patterned and etched with the underlying seed layer 411, stopping at the mechanical layer 430. In step S1306, a dielectric insulating layer 416 can be deposited, patterned, and etched to form electrical vias 416a and 416b that expose portions of the upper electrode layer 414 and portions of the lower electrode layer 412 respectively. .

  Process flow 1300 continues with deposition, patterning, and etching of metal interconnect layer 418 in step S1307 in FIG. 13B. Metal interconnect layer 418 may provide electrical traces and electrical contacts 418a to portions of upper electrode layer 414 and electrical contacts 418b to portions of lower electrode layer 412 via electrical vias 416a and 416b, respectively.

  In step S1308, one or more recesses 422 may be formed in the mechanical layer 430. For example, the recess 422a can be formed outside the PMUT membrane to provide mechanical separation or to increase sensitivity. The recess 422b can be formed inside the PMUT film, for example, to increase sensitivity by allowing the PMUT film to flex or vibrate with greater mechanical amplitude compared to a flat PMUT film. . Recess 422 is a substantially axisymmetric feature such as a circle or ring partially formed in the circular PMUT diaphragm near the center of the diaphragm, or an angular trench formed near the periphery of the circular diaphragm. Alternatively, it may include a part of a cornered trench. In some implementations, the recess 422 may include a square or rectangular feature formed in the mechanical layer 430 near the center of the square or rectangular PMUT diaphragm. In some implementations, the recesses 422 can include features such as narrow rectangles formed near or outside the periphery of a square, rectangular, or circular diaphragm, local trenches, or slots. In some implementations, a series of radial slots can be combined with a central recess feature or a peripheral recess feature. In some implementations, the recess or recess feature may be formed by etching partially or substantially through the mechanical layer 430. In some implementations, the recess 422 and / or its features can be formed in the mechanical layer 430 based on, for example, etching time. In some implementations, the mechanical layer 430 can include two or more deposited layers, one of the two or more deposited layers being capable of accurately defining the recess 422 and the recess feature during manufacture. It can function as an etch stop layer or barrier layer. The formation of the recess 422 is optional and the associated process sequence may be omitted as appropriate. The dashed lines in step S1308 for the recesses 422a and 422b indicate that when those portions are used, the first layer 411, the lower electrode layer 412, the piezoelectric layer 415, the upper electrode layer 414, the dielectric insulating layer 416, and FIG. 5 illustrates that the metal interconnect layer 418 can be formed under an etched portion of the piezoelectric layer stack 410, such as where the metal interconnect layer 418 is removed.

  In step S1309, a portion of the mechanical layer 430 and a portion of the other layer can be patterned and etched to provide access to the sacrificial regions 425i and 425o (not shown) Allows selective removal of exposed sacrificial material in layer 425, resulting in the formation of one or more cavities 420. Further details of emission holes, emission channels, and sacrificial etching processes can be found with respect to FIGS. 4A-4B above (not shown here for clarity). Implementations using pyrolyzable sacrificial materials do not require direct access to the cavity 420 via the discharge holes and discharge channels as described above with respect to FIGS. 4A-4B.

  In step S1310, a passivation layer 432 may be deposited over the interconnect layer 418 and the exposed portions of the lower electrode layer 412 and the upper electrode layer 414. Optionally, one or more upper recesses 432a may be formed in the passivation layer 432. For example, the recess 432a can be formed outside the PMUT membrane to provide mechanical isolation or to increase sensitivity. The recess 432a can be formed inside the PMUT film, for example, to increase sensitivity by allowing the PMUT film to flex or vibrate with greater mechanical amplitude compared to a flat PMUT film. . The recess 432a is a substantially axisymmetric feature such as a circle or ring partially formed near the center of the diaphragm in the circular PMUT diaphragm, or an angular trench formed near the periphery of the circular diaphragm. Alternatively, it may include a part of a cornered trench. In some implementations, the recess 432a may include a square or rectangular feature formed in the passivation layer 432 near the center of the square or rectangular PMUT diaphragm. In some implementations, the recess 432a may include features such as a narrow rectangle formed near or outside the periphery of a square, rectangular, or circular diaphragm, local trenches, or slots. In some implementations, a series of radial slots can be combined with a central recess feature or a peripheral recess feature. In some implementations, the recess or recess feature may be formed by etching partially or substantially through the passivation layer 432. In some implementations, the recess 432a and / or its features may be formed in the passivation layer 432 based on, for example, etching time. In some implementations, the passivation layer 432 may include more than one deposition layer, one of the two or more deposition layers being an accurate definition of the recess 432a and other recess features during manufacture. Can function as an etch stop layer or barrier layer. The formation of the recess 432a is optional and the associated process sequence may be omitted as appropriate. In step S1311, one or more contact pad openings or vias 434a and 434b are patterned through the passivation layer 432 to provide access to the underlying metal features, such as bond pads. It can be etched.

  14A and 14B show another example of a process flow for manufacturing a PMUT. The process flow 1400 utilizes a silicide-based planarization method as described above with respect to steps S1202-S1204 of FIG. 12, and a mechanical layer substantially disposed between the piezoelectric layer stack and the underlying substrate. Provides three layers of metal interconnects for PMUTs having In the first step S1401, a substrate 360 for manufacturing a PMUT is provided thereon. A first layer portion 472, such as an oxide buffer layer or a barrier layer, may be deposited on the substrate 360. A sacrificial layer 425 of amorphous silicon or polycrystalline silicon can be deposited on the buffer layer, followed by deposition of a metal layer such as a nickel layer 1275. The nickel layer 425 can be patterned and etched to expose one or more inner sacrificial regions 425 i and outer sacrificial regions 425 o (not shown), with the etchant stopping at the sacrificial layer 425. In step S1402, the nickel layer 1275 and the underlying sacrificial layer 425 can be reacted in a high temperature environment to locally form a silicide layer 1276, such as nickel silicide. A portion of the silicide layer 1276 may form an anchor portion 474 of the anchor structure 470. In step S1403, the thin barrier layer 476, the mechanical layer 430, the first layer 411 of the piezoelectric stack 410 that can function as a seed layer, the lower electrode layer 412, the piezoelectric layer 415, and the upper electrode layer 414 are included. Multilayer stacks can be deposited. The upper electrode layer 414 can be patterned and etched to form upper electrodes 414a and 414b in electrical contact with the piezoelectric layer 415. In step S1404, the piezoelectric layer 415 can be patterned and etched, stopping at the lower electrode layer 412. In step S1405, the lower electrode layer 412 can be patterned and etched with the underlying seed layer 411, stopping at the mechanical layer 430. In step S1406, a dielectric insulating layer 416 can be deposited, patterned, and etched to form electrical vias 416a and 416b that expose portions of the upper electrode layer 414 and portions of the lower electrode layer 412 respectively. .

  Process flow 1400 continues in FIG. 14B with deposition, patterning, and etching of metal interconnect layer 418 in step S1407. Metal interconnect layer 418 may provide electrical traces and electrical contacts 418a to portions of upper electrode layer 414 and electrical contacts 418b to portions of lower electrode layer 412 via electrical vias 416a and 416b, respectively. In step S1408, one or more recesses 422 may optionally be formed in the mechanical layer 430. The dashed lines in FIG. 14B for the recesses 422a and 422b indicate that those portions, when used, can be formed in a region that is not directly under the unetched portion of the piezoelectric layer stack 410. In step S1409, a portion of the mechanical layer 430 and a portion of the other layers can be patterned and etched (not shown) to provide access to the sacrificial regions 425i and 425o. Selective removal of the exposed sacrificial material in the sacrificial layer 425 results in the formation of one or more cavities 420. Details of emission holes, emission channels, and sacrificial etching processes can be found with respect to FIGS. 4A-4B above. Implementations using a thermally decomposable sacrificial material may not require direct access to the cavity 420 via the discharge holes and discharge channels as described above with respect to FIGS. 4A-4B. In step S1410, a passivation layer 432 may be deposited over the interconnect layer 418 and the exposed portions of the lower electrode layer 412 and the upper electrode layer 414. Optionally, one or more upper recesses 432a may be formed in the passivation layer 432. In step S1411, one or more contact pad openings or vias 434a and 434b define the passivation layer 432 to provide access to underlying metal features such as bond pads in the metal interconnect layer 418. It can be patterned and etched through.

  15A and 15B show another example of a process flow for manufacturing a PMUT. Process flow 1500 utilizes two layers of metal interconnects for a PMUT having a mechanical layer substantially disposed between the piezoelectric layer stack and the underlying substrate. In the first step S1501, a substrate 360 for manufacturing a PMUT is provided thereon. A first layer portion 472 such as an oxide buffer layer may be deposited on the substrate 360. A sacrificial layer 425 of sacrificial material may be deposited on the buffer layer. The sacrificial layer 425 can be patterned and etched to form one or more inner sacrificial regions 425i and outer sacrificial regions 425o (not shown), where the etchant stops at the underlying buffer layer or substrate. To do. In step S1502a, the anchor portion 474 of the anchor structure 470 can be deposited over the buffer layer and the sacrificial region, and then substantially flat while maintaining a small portion 474i above the sacrificial region, as shown in step S1502b. It can be thinned using CMP to form the surface. In step S1504, a multilayer stack including a mechanical layer 430, a first layer 411 of a piezoelectric stack 410 that can function as a seed layer, a lower electrode layer 412, and a piezoelectric layer 415 can be deposited. The piezoelectric layer stack 415 can be patterned and etched and stops on the lower electrode layer 412. In step S1505, the bottom electrode layer 412 and the underlying seed layer 411 can be patterned and etched, stopping on the mechanical layer 430. In step S1506, a dielectric insulating layer 416 can be deposited, patterned, and etched to form electrical vias 416a and 416b that expose a portion of the piezoelectric layer 415 and a portion of the lower electrode layer 412, respectively. Alternatively, electrical coupling between the upper electrode layer 414 and the portion underlying the piezoelectric layer 415 can be achieved capacitively via the dielectric insulating layer 416, as described below with respect to step S1507. In addition, it enables excitation and detection of ultrasonic waves from the flexing motion and vibration of the piezoelectric layer 415 without direct electrical contact. In this implementation, one or more electrical vias 416a may be omitted and the dielectric insulating layer 416 is not etched in the via region (not shown).

  Process flow 1500 continues in FIG. 15B with deposition, patterning, and etching of metal interconnect layer 418 in step S1507. Metal interconnect layer 418 may provide electrical traces and contacts 418a to portions of piezoelectric layer 415 and electrical contacts 418b to portions of lower electrode layer 412 via electrical vias 416a and 416b, respectively. In the capacitively coupled implementation described with respect to step S1506, the metal interconnect layer 418 can be dielectrically isolated from the piezoelectric layer 415 and one or more electrical vias 416a can be omitted. In step S 1508, one or more recesses 422 may be formed in the mechanical layer 430. The dashed lines in step S1508 for the recesses 422a and 422b indicate that those portions can be formed under the etched portion of the piezoelectric layer stack 410 when used. In step S1509, a portion of the mechanical layer 430 and a portion of the other layer can be patterned and etched to provide access to the sacrificial region 425i (not shown), which is the sacrificial layer 425. Allows selective removal of the exposed sacrificial material within, resulting in the formation of one or more cavities 420. Implementations using thermally decomposable sacrificial material may not require direct access to the cavity 420 via the emission holes and emission channels, as described above with respect to FIGS. 4A-4B. In step S1510, a passivation layer 432 may be deposited over the interconnect layer 418 and the exposed portions of the lower electrode layer 412 and the upper electrode layer 414. Optionally, one or more upper recesses 432a may be formed in the passivation layer 432. In step S1511, one or more contact pad openings or vias 434a and 434b open the passivation layer 432 to provide access to underlying metal features such as bond pads in the metal interconnect layer 418. It can be patterned and etched through.

  16A and 16B show another example of a process flow for manufacturing a PMUT. The process flow 1600 utilizes a silicide-based planarization method as described above with respect to steps S1202-S1204 of FIG. 12, and a mechanical layer disposed substantially between the piezoelectric layer stack and the underlying substrate. Utilizes two layers of metal interconnects for PMUTs with In step S1601, a substrate 360 for manufacturing a PMUT is provided thereon. A first layer portion 472, such as an oxide buffer layer or a barrier layer, may be deposited on the substrate 360. A sacrificial layer 425 of amorphous silicon or polycrystalline silicon can be deposited on the buffer layer, followed by deposition of a metal layer such as a nickel layer 1275. The nickel layer 425 can be patterned and etched to expose one or more inner sacrificial regions 425 i and outer sacrificial regions 425 o (not shown), with the etchant stopping at the sacrificial layer 425. In step S1602a, the nickel layer 1275 and the underlying sacrificial layer 425 can be reacted in a high temperature environment to locally form a silicide layer 1276 such as nickel silicide. A portion of the silicide layer 1276 may form an anchor portion 474 of the anchor structure 470. In step S1602b, a thin barrier layer 476 may be deposited. A portion 476i of the thin barrier layer 476 may be over the sacrificial regions 425i and 425o. In step S1604, a multilayer stack including a mechanical layer 430, a first layer 411 of a piezoelectric stack 410 that can function as a seed layer, a lower electrode layer 412, and a piezoelectric layer 415 can be deposited. The piezoelectric layer stack 415 can be patterned and etched and stops on the lower electrode layer 412. In step S1605, the bottom electrode layer 412 and the underlying seed layer 411 can be patterned and etched, stopping on the mechanical layer 430. In step S1606, a dielectric insulating layer 416 can be deposited, patterned, and etched to form electrical vias 416a and 416b that expose a portion of the piezoelectric layer 415 and a portion of the lower electrode layer 412, respectively. Alternatively, electrical coupling between the upper electrode layer 414 and the portion underlying the piezoelectric layer 415 can be achieved capacitively via the dielectric insulating layer 416, as described below with respect to step S1607. In addition, it enables excitation and detection of ultrasonic waves from the flexing motion and vibration of the piezoelectric layer 415 without direct electrical contact. In this implementation, one or more electrical vias 416a may be omitted and the dielectric insulating layer 416 is not etched in the via region (not shown).

  Process flow 1600 continues in FIG. 16B with deposition, patterning, and etching of metal interconnect layer 418 in step S1607. Metal interconnect layer 418 may provide electrical traces and contacts 418a to portions of piezoelectric layer 415 and electrical contacts 418b to portions of lower electrode layer 412 via electrical vias 416a and 416b, respectively. In the capacitively coupled implementation described with respect to step S1606, the metal interconnect layer 418 can be dielectrically isolated from the piezoelectric layer 415 and one or more electrical vias 416a can be omitted. In step S1608, one or more recesses 422 may be formed in the mechanical layer 430. The dashed lines in step S1608 for the recesses 422a and 422b indicate that those portions can be formed under the etched portion of the piezoelectric layer stack 410 when used. In step S1609, a portion of the mechanical layer 430 and a portion of the other layers can be patterned and etched to provide access (not shown) to the sacrificial region 425i, which is the sacrificial layer 425. Allows selective removal of the exposed sacrificial material within, resulting in the formation of one or more cavities 420. Implementations using thermally decomposable sacrificial material may not require direct access to the cavity 420 via the emission holes and emission channels, as described above with respect to FIGS. 4A-4B. In step S1610, a passivation layer 432 may be deposited over the interconnect layer 418 and the exposed portions of the lower electrode layer 412 and the upper electrode layer 414. Optionally, one or more upper recesses 432a may be formed in the passivation layer 432. In step S1611, one or more contact pad openings or vias 434a and 434b open the passivation layer 432 to provide access to underlying metal features such as bond pads in the metal interconnect layer 418. It can be patterned and etched through.

  17A and 17B show another example of a process flow for manufacturing a PMUT. Process flow 1700 provides three layers of metal interconnect for a PMUT having a mechanical layer substantially disposed between a piezoelectric layer stack and an underlying substrate, and then stacked or bonded upper machine An unsealed PMUT is provided that can be sealed with a layer (not shown here but described above with respect to FIGS. 6A-6E). In the first step S1701, a substrate 360 for manufacturing a PMUT is provided thereon. A first layer portion 472 such as an oxide buffer layer may be deposited on the substrate 360. A sacrificial layer 425 of sacrificial material may be deposited on the buffer layer. The sacrificial layer 425 can be patterned and etched to form one or more inner sacrificial regions 425i, with the etchant stopping at the underlying buffer layer or substrate. In step S1702, the anchor portion 474 of the anchor structure 470, such as a silicon dioxide layer, can be deposited over the buffer layer and the sacrificial region, and then substantially maintained while maintaining a small portion 474i of the silicon dioxide layer above the sacrificial region 425i. Can be thinned using CMP to form a flat surface. In step S1703, a multilayer stack including a mechanical layer 430, a first layer 411 of a piezoelectric stack 410 that can function as a seed layer, a lower electrode layer 412, a piezoelectric layer 415, and an upper electrode layer 414 can be deposited. . The upper electrode layer can be patterned and etched to form an upper electrode 414a that is in electrical contact with the piezoelectric layer 415. In step S 1704, the piezoelectric layer 415 can be patterned and etched, stopping at the lower electrode layer 412. In step S1705, the lower electrode layer 412 can be patterned and etched with the underlying seed layer 411, stopping at the mechanical layer 430. In step S1706, a dielectric insulating layer 416 can be deposited, patterned, and etched to form electrical vias 416a and 416b that expose portions of the upper electrode layer 414 and portions of the lower electrode layer 412 respectively. .

  Process flow 1700 continues in FIG. 17B with deposition, patterning, and etching of metal interconnect layer 418 in step S1707. Metal interconnect layer 418 may provide electrical traces and electrical contacts 418a to portions of upper electrode layer 414 and electrical contacts 418b to portions of lower electrode layer 412 via electrical vias 416a and 416b, respectively. In step S1708, one or more recesses 422 may be formed in the mechanical layer 430. The dashed lines in step S1708 for the recesses 422a and 422b indicate that those portions can be formed under the etched portion of the piezoelectric layer stack 410 when used. In step S1709, a passivation layer 432 may be deposited over the interconnect layer 418 and the exposed portion of the lower electrode layer 412 and the exposed portion of the upper electrode layer 414. Optionally, one or more upper recesses 432a may be formed in the passivation layer 432. In step S1710, a portion of mechanical layer 430, and a portion of other layers, such as dielectric insulating layer 416, can be patterned and etched to provide access to sacrificial region 425i, which Allows selective removal of exposed sacrificial material in the sacrificial layer 425, resulting in the formation of one or more cavities 420. Also, in step S1710, one or more contact pad openings or vias 434a and 434b are patterned through the passivation layer 432 to provide access to underlying metal features such as bond pads. And can be etched. In step S1711, the exposed portion of the sacrificial material 425 in the sacrificial region 425i is selectively etched to expose the exposed surface of the anchor portion 474, the exposed surface of the first layer portion 472, and Stops on the exposed surface of the substrate 360, resulting in the formation of one or more cavities 420. In some implementations, an upper mechanical layer 630 (not shown) can be laminated to the top surface of the PMUT, or otherwise coupled, as described with respect to FIG. 6B. In some implementations, the top mechanical layer 630 can be coupled to an array of micropillars 636 (not shown) as described with respect to FIG. 6D.

  FIG. 18 shows another example of a process flow for manufacturing a PMUT. Process flow 1800 provides two layers of metal interconnect for a PMUT having a mechanical layer substantially disposed between a piezoelectric layer stack and an underlying substrate, and then stacked or bonded upper machine An unsealed PMUT is provided that can be sealed with a layer (not shown here but described above with respect to FIGS. 6A-6E). In the first step S1801, a substrate 360 for manufacturing a PMUT is provided thereon. A first layer portion 472 such as an oxide buffer layer may be deposited on the substrate 360. A sacrificial layer 425 of sacrificial material may be deposited on the buffer layer. The sacrificial layer 425 can be patterned and etched to form one or more inner sacrificial regions 425i, with the etchant stopping at the underlying buffer layer or substrate. Also, in step S1801, the anchor portion 474 of the anchor structure 470, such as a silicon dioxide layer, can be deposited over the buffer layer and the sacrificial region, and then maintaining a small portion 474i of the silicon dioxide layer above the sacrificial region 425i. It can be thinned using CMP to form a substantially flat surface. In step S1802, a multilayer stack including a mechanical layer 430, a first layer 411 of a piezoelectric stack 410 that can function as a seed layer, a lower electrode layer 412, a piezoelectric layer 415, and an upper electrode layer 414 can be deposited. . The upper electrode layer 414 can be patterned and etched to form an upper electrode 414a that is in electrical contact with the piezoelectric layer 415. In step S1802, the piezoelectric layer 415 may be etched and stops at the lower electrode layer 412. In step S1803, the lower electrode layer 412 removes the upper electrode layer 414 and the lower electrode layer 412 portions 435a and 435b, respectively, to allow subsequent wire bonding or inclusion of additional interconnect layers (not shown). To be exposed, it can be patterned and etched with the underlying seed layer 411, stopping at the mechanical layer 430. In step S1804, the portion of the mechanical layer 430 and any portion of the underlying layer can be patterned and etched to form one or more emission holes 430a, providing access to the sacrificial region 425i. Can do. In step S1805, the exposed portion of the sacrificial layer 425 in the sacrificial region 425i can be selectively etched, resulting in the formation of one or more cavities 420. In some implementations, the upper mechanical layer 630 (not shown) can be stacked on the top surface of the PMUT, or otherwise coupled, as described with respect to FIG. 6B. In some implementations, the top mechanical layer 630 can be coupled to an array of micropillars 636 (not shown) as described with respect to FIG. 6D.

  Accordingly, a PMUT having a mechanical layer disposed above or below the piezoelectric layer stack and providing a seal for the underlying cavity and techniques for manufacturing such a PMUT are disclosed. It will be appreciated that a number of alternative configurations and manufacturing techniques may be contemplated.

  As used herein, a phrase referring to “at least one of” a list of items refers to any combination of those items including a single member. By way of example, “at least one of a, b or c” is intended to encompass a, b, c, ab, ac, bc, and abc. Yes.

  Various exemplary logic, logic blocks, modules, circuits, and algorithmic processes described in connection with the implementations disclosed herein may be implemented as electronic hardware, computer software, or a combination of both. Hardware and software compatibility is generally described in terms of functionality and illustrated in the various exemplary components, blocks, modules, circuits and processes described above. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.

  The hardware and data processing apparatus used to implement the various exemplary logic, logic blocks, modules, and circuits described in connection with the aspects disclosed herein may be general purpose single chip processors or general purpose processors. A multi-chip processor, digital signal processor (DSP), application specific integrated circuit (ASIC), field programmable gate array (FPGA) or other programmable logic device, individual gate or transistor logic, individual hardware components, or It may be implemented or performed with any combination thereof configured to perform the functions described herein. A general purpose processor may be a microprocessor or any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, eg, a DSP and microprocessor combination, multiple microprocessors, one or more microprocessors in combination with a DSP core, or any other such configuration. . In some implementations, certain processes and methods can be performed by circuitry that is specific to a given function.

  In one or more aspects, the functions described can be in hardware, digital electronic circuitry, computer software, firmware, or any combination thereof, including the structures disclosed herein or their structural equivalents. Can be implemented. Implementations of the subject matter described in this specification can also be performed by the operation of a data processing device or one or more computers encoded on a computer storage medium to control the operation of the data processing device. It may be implemented as a program, i.e. as one or more modules of computer program instructions.

  If implemented in software, the functions may be stored or transmitted as one or more instructions or code on a computer-readable medium, such as a non-transitory medium. The methods or algorithmic processes disclosed herein may be implemented in processor-executable software modules that may reside on computer-readable media. Computer-readable media includes both computer storage media and communication media including any medium that may allow a computer program to be transferred from one place to another. A storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, non-transitory media may include any desired data in the form of RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage device, or instructions or data structures Any other medium that can be used to store program code and that can be accessed by a computer can be included. Also, any connection can be properly termed a computer-readable medium. As used herein, a disc and a disc are a compact disc (CD) (disc), a laser disc (disc), an optical disc (disc), and a digital versatile disc (DVD). (Disc), floppy disk (disk), and Blu-ray disc (disc), where the disk (disk) normally reproduces data magnetically, and the disk (disc) optically reproduces data with a laser. . Combinations of the above should also be included within the scope of computer-readable media. In addition, the operations of the method or algorithm may exist as one or any combination or set of machine-readable media and code and instructions on the computer-readable medium that may be incorporated into a computer program product.

  Various modifications to the implementations described in this disclosure may be readily apparent to those skilled in the art, and the general principles defined herein may be used in other ways without departing from the spirit or scope of this disclosure. It can be applied to an implementation. Accordingly, the claims are not intended to be limited to the implementations shown herein, but are to be accorded the widest scope consistent with the present disclosure, the principles and novel features disclosed herein. Should be given. In addition, as those skilled in the art will readily understand, “above” and “below”, “top” and “bottom”, “front” and “rear”, and “cover”, “overlap” The terms “above”, “below”, and “below” are sometimes used to facilitate the description of the drawings and indicate relative positions corresponding to the orientation of the drawing on an appropriately oriented page. May not reflect the proper orientation of the mounted device.

  Certain features that are described in this specification in the context of separate implementations can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination. Moreover, while features are described above as acting in a particular combination, and may be initially claimed as such, one or more from the claimed combination Features may be deleted from the combination in some cases, and the claimed combination may be directed to sub-combinations or variations of sub-combinations.

  Similarly, operations are shown in the drawings in a particular order, as long as such operations are performed in the particular order shown or in sequence, or all illustrated operations are performed. It should not be understood as requiring execution to achieve the desired result. Moreover, the drawings may schematically illustrate one or more exemplary processes in the form of a flow diagram. However, other operations not shown may be incorporated into the exemplary process shown schematically. For example, one or more additional operations may be performed before, after, simultaneously with, or during any of the illustrated operations. In certain situations, multitasking and parallel processing may be advantageous. Further, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and the program components and systems described are generally It should be understood that they can be integrated together in a single software product or packaged into multiple software products. Furthermore, other implementations are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and achieve previously desirable results.

DESCRIPTION OF SYMBOLS 100 Piezoelectric ultrasonic transducer 110 Piezoelectric layer stack 112 Lower electrode 114 Upper electrode 115 Piezoelectric layer 120 Cavity 130 Mechanical layer 160 Semiconductor substrate 200A PMUT
200B PMUT
200C PMUT
200D PMUT
210 Piezoelectric layer stack 212 Lower electrode 214 Upper electrode 215 Piezoelectric layer 220 Cavity 230 Mechanical layer 232 Recessed portion 250 Neutral axis 260 Substrate 300 PMUT
310 Piezoelectric layer stack 312 Lower electrode 314 Upper electrode 315 Piezoelectric layer 320i Cavity 320o Release hole 330 Mechanical layer 350 Neutral axis 360 Substrate 370 Anchor structure 410 Piezoelectric layer stack 411 Barrier layer 412 Lower electrode 414 Upper electrode 414a Upper electrode 414b Upper electrode 415 b Layer 416 insulating layer 416a electrical via 416b electrical via 418 interconnect layer 418a electrical trace and electrical contact 418b electrical contact 420 cavity 420i cavity 420o discharge hole 422a recess 422b recess 425 sacrificial layer 425i inner sacrificial region 425o outer sacrificial region 430 mechanical layer 430a Hole 432 Passivation layer 432a Top recess, recess 434a Contact pad opening or via 434b Contact pad opening or via 435a Upper electrode layer portion 435b Lower electrode layer 412 portion 470 Anchor structure 472 First layer portion, oxide buffer layer 474 Anchor portion 474i Small portion 476 Thin barrier layer 476i Thin barrier layer 476 portion 500A PMUT
500B PMUT
500C PMUT
510 Piezoelectric layer stack 512 Lower electrode layer 514 Upper electrode layer 515 Piezoelectric layer 520 Cavity 522 Central discharge hole 530 Mechanical layer 530a Lower mechanical layer 530b Upper mechanical layer 550 Neutral axis 560 Substrate 570 Anchor structure 580 Acoustic port 600 PMUT
600A PMUT array 600B PMUT array 600C PMUT array 600D PMUT array 600E PMUT array 630 Bonding mechanical layer 632 Adhesive layer 634 Adhesive layer 636 Micro pillar 660 Common substrate 690 Platen 692 Acoustic impedance matching layer 700 PMUT
710 Piezoelectric layer stack 720 Cavity 722 Central exit hole 730 Mechanical layer 750 Mechanical neutral axis 760 Substrate 770 Anchor structure 800 PMUT, circular PMUT, square PMUT, rectangular PMUT
830 Circular mechanical layer 870 Central anchor structure, peripheral anchor structure 870a Side anchor structure 870b Side anchor structure 1100A Ultrasonic sensor array 1100B Display array 1100C Ultrasonic sensor and display array 1102 Object 1160 PMUT sensor array substrate 1160a Sensor array substrate 1160b Display array substrate 1162 PMUT sensor element 1164 Ultrasound 1165 Acoustic coupling medium 1165a Acoustic coupling medium 1165b Optical coupling and acoustic coupling medium 1166 Display pixel 1190a Platen 1190b Platen, cover glass 1190c Cover glass 1275 Nickel layer 1276 Part of sacrificial layer 425, silicide layer 1300 Process flow 1400 Process flow 150 Process flow 1600 process flow 1700 process flow

Claims (15)

A substrate,
A piezoelectric micromechanical ultrasonic transducer comprising a multilayer stack disposed on the substrate, the multilayer stack comprising:
An anchor structure disposed on the substrate;
A piezoelectric layer stack disposed on the anchor structure;
A mechanical layer disposed proximate to the piezoelectric layer stack,
The piezoelectric layer stack is disposed on a cavity, the cavity is formed by removing sacrificial material through at least one discharge hole, and the mechanical layer removes the sacrificial material Formed,
The mechanical layer seals the cavity by sealing the at least one discharge hole and is supported by the anchor structure together with the piezoelectric layer stack to form a film on the cavity A piezoelectric micromechanical ultrasonic transducer, wherein the membrane is configured to receive one or both of flexural motion and vibration when the piezoelectric micromechanical ultrasonic transducer receives or transmits an ultrasonic signal.   The mechanical layer has a thickness such that a neutral axis of the multilayer stack is displaced toward the mechanical layer relative to a neutral axis of the piezoelectric layer stack to allow an out-of-plane bending mode. 2. The piezoelectric micromechanical ultrasonic transducer according to 1.   The piezoelectric micromechanical ultrasonic transducer of claim 2, wherein the mechanical layer is thicker than the piezoelectric layer stack. The piezoelectric micromechanical ultrasonic transducer of claim 2, wherein a neutral axis of the multilayer stack passes through the mechanical layer.   The piezoelectric micromechanical ultrasonic transducer according to claim 1, wherein the piezoelectric layer stack includes a piezoelectric layer, a lower electrode disposed below the piezoelectric layer, and an upper electrode disposed on the piezoelectric layer. .   The piezoelectric micromechanical ultrasonic transducer of claim 1, wherein the mechanical layer includes a recess in which the mechanical layer is locally thinned.   The piezoelectric micromechanical ultrasonic transducer of claim 1, wherein the mechanical layer is disposed on the side of the piezoelectric layer stack opposite the substrate.   The piezoelectric micromechanical ultrasonic transducer of claim 1, wherein the mechanical layer is disposed below the side of the piezoelectric layer stack facing the substrate.   The acoustic coupling medium further disposed on the piezoelectric layer stack, wherein the piezoelectric micromechanical ultrasonic transducer is configured to receive or transmit an ultrasonic signal via the acoustic coupling medium. A piezoelectric micromechanical ultrasonic transducer according to 1. A method of manufacturing a piezoelectric micromechanical ultrasonic transducer,
Forming an anchor structure on a substrate, the anchor structure being disposed proximate to a region of sacrificial material;
Forming a piezoelectric layer stack on the anchor structure;
Removing the sacrificial material to form a cavity under the piezoelectric layer stack;
And a step of disposing a mechanical layer adjacent to the piezoelectric layer stack, the piezoelectric layer stack and the mechanical layer forms a part of a multilayer stack, wherein the mechanical layer is, sealing the cavity, wherein Supported by the anchor structure together with a piezoelectric layer stack and forming a film over the cavity, the film being deflected and vibrated when the piezoelectric micromechanical ultrasonic transducer receives or transmits an ultrasonic signal. Configured to receive one or both,
The method of removing the sacrificial material comprises removing sacrificial material through at least one discharge hole, and the mechanical layer seals the at least one discharge hole.   The method of claim 10, wherein the anchor structure is disposed in a lower layer, the lower layer being parallel to the piezoelectric layer stack and including a region of the sacrificial material.   The mechanical layer has a thickness such that a neutral axis of the multilayer stack is displaced toward the mechanical layer with respect to a neutral axis of the piezoelectric layer stack to enable an out-of-plane bending mode. Item 11. The method according to Item 10.   The method of claim 12, wherein the mechanical layer is thicker than the piezoelectric layer stack. The method of claim 12, wherein a neutral axis of the multilayer stack passes through the mechanical layer. An array of piezoelectric micromechanical ultrasonic transducer sensors;
An apparatus comprising an acoustic coupling medium,
The at least one piezoelectric micromechanical ultrasonic transducer is the piezoelectric micromechanical ultrasonic transducer according to any one of claims 1 to 9,
The acoustic coupling medium is disposed on the piezoelectric layer stack;
The apparatus, wherein the piezoelectric micromechanical ultrasonic transducer is configured to receive or transmit an ultrasonic signal via the acoustic coupling medium.