JP6516738B2 - Electronic device using group III nitride semiconductor, method of manufacturing the same, and epitaxial multilayer wafer for manufacturing the electronic device - Google Patents

Description

(Citation of related application)
This application claims the benefit of priority to US application Ser. No. 61 / 845,043 filed by the inventor Tadao Hashimoto, filed on Jul. 11, 2013, entitled “ELECTRONIC DEVICE USING GROUP III NITRIDE SEMICONDUCTOR AND ITS FABRATION METHOD” It is claimed that the application is hereby incorporated by reference in its entirety as if fully disclosed infra.

The present application is also related to the following patent applications:
PCT General Patent Application No. US 2005/024239 by Kenji Fujito, Tadao Hashimoto and Shuji Nakamura, filed on July 8, 2005, entitled “METHOD FOR GROWING GROUP III-NITRIDE CRYSTALS IN SUPERCRITICAL AMMONIA USING AN AUTOCLAVE, No. (Agent Management No. 30794.0129-WO-01 (2005-339-1));

  Tadao Hashimoto, Makoto Saito, and Shuji Nakamura, entitled “METHOD FOR GROWING LARGE SURFACE AREA GALLIUM NITRIDE CRYSTALS IN SUPERCRITICAL AMMONIA AND LARGE SURFACE AREA GALLIUM NITRIDE CRYSTALS,” filed on April 6, 2007 and filed on April 6, 2007 Patent Application No. 11/784, 339 (Attorney Docket No. 30794.179-US-U1 (2006-204)), which application is entitled "A METHOD FOR GROWING LARGE SURFACE AREA GALLIUM NITRIDE CRYSTALS IN SU" U.S. Provisional Patent Application No. 60 / 790,310, filed on April 7, 2006, filed by Tadao Hashimoto, Makoto Saito, and Shuji Nakamura, entitled ERCRITICAL AMMONIA AND LARGE SURFACE AREA GALLIUM NITRIDE CRYSTALS, No. 30794.179-US-P1 (2006-204)) 35 U.S. S. C. Claiming interests under Section 119 (e);

  No. 60 / 973,602 filed on Sep. 19, 2007, entitled “GALLIUM NITRIDE BULK CRYSTALS AND THEIR GROWTH METHOD,” filed on Sep. 19, 2007, and entitled “GALLIUM NITRIDE BULK CRYSTALS AND THEIR GROWTH METHOD,” US patent application Ser. 244-US-P1 (2007-809-1));

  Tadao Hashimoto, US General Patent, filed Oct. 25, 2007, entitled “METHOD FOR GROWING GROUP III-NITRIDE CRYSTALS IN A MIXTURE OF SUPERCRITICAL AMMONIA AND NITROGEN, AND GROUP III-NITRIDE CRYSTALS GROWN THE REBY,” filed October 25, 2007 Application No. 11 / 977,661 (agent management number 30794.253-US-U1 (2007-774-2));

  Tadao Hashimoto, Edward Letts, Masanori Ikari, US Patent Application No. 12/392, filed on February 25, 2009, entitled "METHOD FOR PRODUCING GROUP III-NITRIDE WAFERS AND GROUP III-NITRIDE WAFERS," , 960 (agent management number SIXPOI-003US);

  Edward Letts, Tadao Hashimoto, Masanori Ikari, filed on June 4, 2009, entitled “METHODS FOR PRODUCING IMPROVED CRYSTALLINITY GROUP III-NITRIDE CRYSTALS FROM INITIAL GROUP III-NITRIDE SEED BY AMMONOTHERMAL GROWTH,” and filed on June 4, 2009; Patent Application No. 12 / 455,760 (agent management number SIXPOI-002 US);

  Tadao Hashimoto, Edward, entitled "HIGH-PRESSURE VESSEL FOR GROWING GROUP III NITRIDE CRYSTALS AND METHOD OF GROWING GROUP III NITRIDE CRYSTALS USING HIGH-PRESSURE VESSEL AND GROUP III NITRIDE CRYSTAL," filed on June 4, 2009, US Patent Application Serial No. 12 / 455,683 (Attorney Docket No. SIXPOI-005US) by Letts, Masanori Ikari ,;

  Tadao Hashimoto, Masanori Ikari, Edward Letts, filed on June 12, 2009, entitled "METHOD FOR TESTING III-NITRIDE WAFERS AND III-NITRIDE WAFERS WITH TEST DATA,", US Patent Application No. 12 / 455, 181 (agent management number SIXPOI-001US);

  Tadao Hashimoto, Masanori Ikari, Edward Letts, filed on October 16, 2009, entitled “REACTOR DESIGN FOR GROWING GROUP III NITRIDE CRYSTALS AND METHOD OF GROWING GROUP III NITRIDE CRYSTALS,” filed on October 16, 2009, and filed with the United States Patent Application No. 12 / 580, 849 (agent management number SIXPOI-004US);

  Tadao Hashimoto, filed on Feb. 28, 2013, entitled "COMPOSITE SUBSTRATE OF GALLIUM NITRIDE AND METAL OXIDE," filed by the United States Patent Application Serial No. 13 / 781,509 (agent management number SIXPOI-012US) );

  Tadao Hashimoto, Edward Letts, Sierra Hoff, filed on February 28, 2013, entitled "A BISMUTH-DOPED SEMI-INSULATING GROUP III NITRIDE WAFER,", filed US Ser. No. 13 / 781,543, filed on Feb. 28, 2013 (Agent management number SIXPOI-013US);

  Tadao Hashimoto, Edward Letts, Sierra Hoff, filed on March 15, 2013, entitled “METHOD OF GROWING GROUP III NITRIDE CRYSTALS,” filed under US Ser. No. 13 / 833,443 (Agent Management (Agent Management) No. SIXPOI-014US1));

  Tadao Hashimoto, Edward Letts, Sierra Hoff, filed on March 15, 2013, entitled “METHOD OF GROWING GROUP III NITRIDE CRYSTALS,” filed under US Ser. No. 13 / 834,015 (Agent management No. SIXPOI-014US2);

  Tadao Hashimoto, Edward Letts, Sierra Hoff, filed on March 15, 2013, entitled “GROUP III NITRIDE WAFER AND ITS PRODUCTION METHOD,” filed US Ser. No. 13 / 834,871 (agent Control number SIXPOI-015US1);

  Tadao Hashimoto, Edward Letts, Sierra Hoff, filed on March 15, 2013, entitled “GROUP III NITRIDE WAFER AND ITS PRODUCTION METHOD,” filed US Ser. No. 13 / 835,636 (agent Control number SIXPOI-015US2);

  No. 13 / 798,530, filed on March 13, 2013, entitled “GROUP III NITRIDE WAFERS AND FABRICATION METHOD AND TESTING METHOD,” filed by Tadao Hashimoto on March 13, 2013 (agent management number SIXPOI— 016US).

  These applications are incorporated herein by reference in their entirety as if fully disclosed in the following.

  The present invention relates to semiconductor electronic devices mainly used for high power and / or high frequency electrical / electronic circuits. More specifically, the present invention relates to, for example, a Schottky diode using a group III nitride semiconductor, a metal semiconductor field effect transistor (MESFET), a metal insulator semiconductor field effect transistor (MISFET), a bipolar transistor, and a heterobipolar It relates to a diode or a transistor such as a transistor (HBT).

  The invention also relates to a method of making such an electronic device.

  The invention also relates to an epitaxial multilayer wafer used to manufacture electronic devices.

  (Note: this application refers to a number of publications and patents indicated, for example, by bracketed numbers such as [x]. A list of these publications and patents can be found in the section entitled "References" Can be found.)

Gallium nitride (GaN) and related III-nitride alloys are the main semiconductor materials of various electronic devices such as power switching transistors. Despite the fact that the maximum performance of GaN theoretically predicted by Baliga's Figure of Merit (BFOM) exceeds that of silicon carbide (SiC) by about five times, the lack of low cost GaN wafers , Hamper the development of GaN-based power switching transistors that can quickly switch between two voltage levels with minimal loss. Currently, most of these devices are fabricated using III-nitride films heteroepitaxially grown on dissimilar wafers such as silicon, SiC, and sapphire. However, heteroepitaxial growth of group III nitrides results in highly defective or even cracked films. Typical defects in III-nitride heteroepitaxial films are 10 ⁹ cm ^-2 levels of threading dislocations along the growth direction. Thus, vertical defects can be leakage current paths when high voltage is applied in the vertical direction (ie, along the growth direction). At the present time, GaN-based electronic devices are substantially limited to horizontal devices such as high electron mobility transistors (HEMTs) that utilize the current flowing along the lateral direction near the surface. Because current flows through thin films in such horizontal devices, the thin films need to have a large area to provide high current (i.e., high power) devices. In addition, all the contacts are located on one side of the device, which makes the device much larger than a device with a vertical configuration. Due to these limitations, it is very difficult to achieve high power devices in horizontal configurations of III-nitride semiconductors.

A homoepitaxial wafer or substrate such as GaN or AlN is required to provide a GaN based electronic device in a vertical configuration. The lack of low cost, high crystallinity GaN substrates is due to the difficulty of growing bulk crystals of GaN and other III-nitride compounds. At present, most of the commercially available GaN wafers are manufactured by hydride vapor phase epitaxy (HVPE). HVPE is a difficult gas phase process to make GaN with dislocation density below 10 ⁵ cm ⁻² when GaN is grown on heteroepitaxial wafers (eg, sapphire). Furthermore, the manufacturing process requires removing the heteroepitaxial wafer after growing a thick (above 0.1 mm) GaN layer, which is very labor intensive and results in low yield .

Ammonothermal growth has been developed in order to obtain a low cost and highly crystalline GaN substrate with a dislocation and / or grain boundary density below 10 ⁵ cm ⁻² [1 to 6]. The ammonothermal method is one of the bulk growth methods of Group III nitride crystals using supercritical ammonia. The growth rate of crystals in supercritical ammonia is typically low. To grow bulk GaN crystals at a rate that is practically useful for producing substrates, chemical additives called mineralizers are added to supercritical ammonia. The mineralizer is typically potassium, sodium, lithium, potassium amide, sodium amide, lithium amide, ammonium fluoride, ammonium chloride, ammonium chloride, ammonium bromide, ammonium iodide and gallium iodide, etc., Group I element or It is an element or compound of a group VII element. Sometimes, more than two mineralizers are mixed to achieve good growth conditions. While most of the alkaline mineralizers are compatible, sodium is the most preferred mineralizer in terms of growth rate, purity, and handling. GaN substrates with dislocation densities below 10 ⁵ cm ^-2 are produced using sodium mineralizer in an ammonothermal growth process. However, ammonothermal (one electrode is on one side or surface of the substrate and its corresponding electrode is formed on the opposite side or surface of the substrate, such that the substrate is between two electrodes) Innovative device structures and fabrication methods are needed to achieve high power electronic devices with vertical configurations on III-nitride substrates.

The present invention provides, in one example, an electronic device using a III-nitride substrate fabricated via an ammonothermal process. The high electron concentration of an ammonothermally grown substrate having a dislocation density below 10 ⁵ cm ⁻² can be obtained, for example, by using a vapor phase grown Ga _{1 -x-y} Al _x In _y N Low resistance (“on-resistance”) when the device is in the “on” state with high breakdown voltage by utilizing in combination with the high purity, low carrier concentration active layer (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) ") Can be made. A transition layer is optionally introduced to achieve a better match between the amonothermally grown substrate and the high purity, low carrier concentration active layer. Electronic devices operate by changing the depletion region in the active layer. The high purity low carrier concentration active layer is preferably thick enough such that the depletion region in the active layer does not extend through the entire thickness of the active layer, preferably the active layer is a high purity low carrier concentration active layer Are thick enough to prevent the depletion region from extending into the interface and / or the substrate where the

Thus, in one example, the present invention provides an epitaxial multilayer wafer for manufacturing electronic devices. (I) The wafer has a first side and a second side opposite to the first side. Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) The activity of Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) on the first side of the group III nitride substrate of It may contain layers. The dislocation density of a III-nitride substrate can be below 10 ⁵ cm ^-2 . III-nitride substrate may ^also have electron concentration and / or oxygen concentration greater than 10 18 ^{cm -3.} III-nitride substrate may be made from a bulk crystal was grown in supercritical ammonia _{Ga 1-x1-y1 Al x1} In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1). The active layer may be a layer which is epitaxially deposited with electronic and / or oxygen concentration below 10 ¹⁸ cm ^-3. An active layer is a depletion region formed in the active layer after fabricating an electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. May have a thickness sufficient to be outside the substrate.

  The invention also provides an electronic device comprising a wafer as described above or elsewhere herein. One of the electrodes may be on the first side of the wafer and another electrode may be on the second opposite side of the wafer. These electrodes may, for example, cooperate to form a transistor or a diode as an electronic device.

The present invention, in another example, provides a new method of making a multilayer wafer. The _{method, Ga 1-x1-y1 Al} x1 In y1 to N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) on a first side of the _{substrate, Ga 1-x2-y2 Al} x2 In y2 N (0 The step of epitaxially depositing from the vapor phase an active layer of ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1), the substrate was formed by ammonothermal method. An active layer is a depletion region formed in the active layer after fabricating an electronic device with a first electrode on the first side of the wafer and a second electrode on the second opposite side of the wafer. May have a sufficient thickness to be outside the substrate. The substrate may have an oxygen concentration and / or an electron concentration greater than 10 ¹⁸ cm ⁻³ , and the gas phase is sufficient to provide an oxygen concentration and / or an electron concentration less than 10 ¹⁸ cm ⁻³ in the active layer. Can have a low oxygen concentration and / or electron donor concentration.

The invention further provides a new electronic device. The _{device, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) and the substrate, _{Ga 1-x2-y2} Al on the first side of the substrate x2 _{an In y2} An active layer of N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) and a back side ohmic contact on the second side of the substrate opposite to the first side of the substrate may be included.

  The contacts of the device may form a depletion region in the active layer having a depth, and the active layer may have a thickness that exceeds the depth of the depletion region for any applied voltage within the operating range of the device. Additionally or alternatively, the active and transition layers may have a total thickness that exceeds the depth of the depletion region for any applied voltage within the operating range of the device.

The substrates of the devices described above or elsewhere herein may have dislocation densities below 10 ⁵ cm ⁻² . This substrate ^may have an electron concentration and / or oxygen concentration greater than 10 18 ^{cm -3.} Active layer of the devices described elsewhere above or herein may have an electron concentration and / or oxygen concentration below 10 ¹⁸ cm ^-3.

The invention also provides a new method of making an electronic device. The method supercritical _{ammonia-Ga 1-x1-y1} grown in _{Al x1 In y1 N (0 ≦} x1 ≦ 1,0 ≦ y1 ≦ 1) Ga 1-x1-y1 sliced from bulk crystals of On the first side of the substrate of Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1), Ga _{1−x 2 −y 2} Al _{x 2} In _{y 2} N (0 ≦ x 2 ≦ 1 0 ≦ y 2 ≦ 1) The step of growing the active layer of 1) by vapor phase epitaxy may be included. The method may include forming an ohmic contact on the second side of the substrate and / or forming a Schottky contact, a metal-insulator-semiconductor structure, or a p-type semiconductor on the active layer. The depletion region may be exclusively in the active layer, such that the depth of the depletion region is less than the thickness of the active layer, for any applied voltage within the operating range of the device. Alternatively, the depletion region may extend through the active layer into the transition layer. In the latter example, the depth of the depletion region may exceed the thickness of the active layer but less than the sum of the thickness of the active layer and the thickness of the transition layer. Of course, when the transition layer is provided in the present method, the depth of the depletion region need not exceed the thickness of the active layer and be less than the combined thickness of the active layer and the transition layer. The substrate may have a dislocation density below 10 ⁵ cm ⁻² . This substrate ^may have an electron concentration and / or oxygen concentration greater than 10 18 ^{cm -3.} The active layer ^may have an electron concentration and / or oxygen concentration below 10 18 ^{cm -3.}

These substrates, wafers, devices, and methods are provided as examples and are not limiting.
This specification provides, for example, the following.
(Item 1)
An epitaxial multilayer wafer for manufacturing an electronic device, comprising: (i) a Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N ( ₁₎ having a _first side and a second side opposite to the first side Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (wherein 0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) and (ii) the first side of the group III nitride substrate An active layer of 0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1),
(A) The dislocation density of the group III nitride substrate is less than 10 ⁵ cm ⁻² ,
(B) the group III nitride substrate ^has an electron density greater than 10 18 ^{cm -3,}
(C) the III-nitride substrate is made from bulk crystals grown in supercritical ammonia _{Ga 1-x1-y1 Al x1} In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) ,
(D) The active layer is an epitaxially deposited layer having an electron concentration below 10 ¹⁸ cm ⁻³ ,
(E) The active layer is fabricated after fabricating the electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. The depletion region formed in the active layer has a thickness large enough to be outside the substrate
Epitaxial multilayer wafer.
(Item 2)
The epitaxial multilayer wafer according to claim 1, wherein the active layer has an electron concentration of ^less than 10 ¹⁶ cm ⁻³ .
(Item 3)
An epitaxial multilayer wafer for manufacturing an electronic device, comprising: (i) a Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N ( ₁₎ having a _first side and a second side opposite to the first side Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (wherein 0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) and (ii) the first side of the group III nitride substrate An active layer of 0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1),
(A) The dislocation density of the group III nitride substrate is less than 10 ⁵ cm ⁻² ,
(B) the group III nitride substrate ^has an electron density greater than 10 18 ^{cm -3,}
(C) the III-nitride substrate is made from bulk crystals grown in supercritical ammonia _{Ga 1-x1-y1 Al x1} In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) ,
(D) The active layer is an epitaxially deposited layer having an oxygen concentration below 10 ¹⁸ cm ⁻³ ,
(E) The active layer is fabricated after fabricating the electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. The depletion region formed in the active layer has a sufficient thickness to be outside the substrate
Epitaxial multilayer wafer.
(Item 4)
The epitaxial multilayer wafer according to claim ³ , wherein the active layer has an oxygen concentration of ^less than 10 ¹⁶ cm ⁻³ .
(Item 5)
5. An epitaxial multilayer wafer according to any of items 1 to 4, wherein the thickness of the active layer is greater than 5 microns.
(Item 6)
Further comprising a transition layer of _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) between the substrate and the active layer, a first side of the transition layer A crystal lattice matching the crystal lattice on the first side of the substrate, and a second side of the transition layer having a crystal lattice matching the crystal lattice on the first side of the active layer, The epitaxial multilayer wafer according to any one of Items 1 to 5.
(Item 7)
7. An epitaxial multilayer wafer according to item 6, wherein the transition layer is grown by vapor phase epitaxy.
(Item 8)
An epitaxial multilayer wafer according to item 6 or 7, wherein said transition layer is of sufficient thickness to fill the cracks formed at the interface between said substrate and said transition layer.
(Item 9)
The epitaxial multilayer wafer according to any one of Items 6 to 8, wherein the depletion zone extends into the transition layer.
(Item 10)
9. The epitaxial multilayer wafer according to any one of Items 6 to 8, wherein the active layer is thicker than the depletion zone.
(Item 11)
11. The epitaxial multilayer wafer according to any one of items 6 to 10, wherein the transition layer is doped with an impurity that prevents diffusion of an impurity contained in the substrate.
(Item 12)
12. The epitaxial multilayer wafer according to any one of items 1 to 11, further comprising a current blocking layer between the group III nitride substrate and the active layer.
(Item 13)
The epitaxial multilayer wafer according to any one of items 1 to 12 , wherein the active layer has a dislocation density of less than 10 ⁵ cm ⁻² .
(Item 14)
The substrate ^has a sodium concentration greater than 10 16 ^{cm -3,} the active layer contains at least 100 times less sodium than the substrate, an epitaxial multilayer wafer according to any of items 1 to 13.
(Item 15)
15. The epitaxial multilayer wafer of any of items 1-14, wherein the substrate is c-plane with a miscut greater than 0.1 degrees and less than 5 degrees.
(Item 16)
An electronic device, comprising: the multilayer wafer according to any one of items 1 to 15; and the electrode forming the depletion region outside the group III nitride wafer above the operating range of the electronic device. device.
(Item 17)
A method of making a multilayer wafer, which is formed by ammonothermal method and has a second side opposite to the first side Ga _1-x1-y1 Al _x1 In _y1 N (0 ≦ x1 ≦ 1, 0) a ≦ y1 ≦ 1) of the substrate of the first side _on, epitaxially deposited an active layer of _{Ga 1-x2-y2 Al x2} in y2 N (0 ≦ x2 ≦ 1,0 ≦ y2 ≦ 1) from the gas phase After making the electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. in the depletion region formed in said active layer has a thickness large enough to be outside of the substrate, the substrate has an oxygen concentration greater than 10 ¹⁸ cm ^-3, the gas-phase It is to provide an oxygen concentration below ¹⁰ 18 ^{cm -3} in the active layer It has a sufficiently low concentration of oxygen, methods.
(Item 18)
The gas phase has a sufficiently low concentration of oxygen to provide oxygen concentrations below 10 ¹⁶ cm ^-3 in the active layer, The method of claim 17.
(Item 19)
A method of making a multilayer wafer, which is formed by ammonothermal method and has a second side on the opposite side of the first side Ga ₁ -x _{1 -y 1} Al _{x 1} In _{y 1} N (0 ≦ x 1 ≦ 1, 0 a ≦ y1 ≦ 1) of the substrate of the first side _on, epitaxially deposited an active layer of _{Ga 1-x2-y2 Al x2} in y2 N (0 ≦ x2 ≦ 1,0 ≦ y2 ≦ 1) from the gas phase After making the electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. in the depletion region formed in said active layer has a sufficient thickness that the outer side of the substrate, the substrate has an oxygen concentration greater than 10 ¹⁸ cm ^-3, the active layer 10 sufficient electron density below ¹⁸ cm ^-3 to provide the active layer Low density has an electron donor, a method.
(Item 20)
The active layer, the electron concentration below 10 ¹⁶ cm ^-3 with an electron donor sufficiently low concentration to provide the active layer, The method of claim 19.
(Item 21)
21. The method of any of items 17-20, wherein the active layer is deposited to a thickness of at least about 5 microns.
(Item 22)
The first surface of the transition layer is aligned with the crystal lattice of the first side of the substrate during the deposition step, and the second opposite surface of the transition layer is activated upon completion of the transition layer deposition step. to be consistent with the first side the crystal lattice of the layer, while varying the concentration and / or deposition conditions of the _{reactants, Ga 1-x3-y3 Al} x3 in y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 22. A method according to any of items 17-21, further comprising epitaxially depositing a transition layer of ≦ 1).
(Item 23)
An additional amount of the transition layer such that the transition layer cracks during the deposition step and the method fills the cracks in the transition layer such that the second surface of the transition layer does not have a crack. A method according to item 22, further comprising the step of depositing
(Item 24)
22. A method according to item 22 or 23, wherein the active layer is deposited to a thickness such that the depletion zone extends in part of the transition layer.
(Item 25)
25. A method according to item 24, wherein the depletion zone ends before reaching a crack in the transition layer.
(Item 26)
26. A method according to any of items 22-25, wherein the transition layer is doped with an impurity which prevents the diffusion of impurities contained in the substrate.
(Item 27)
27. A method according to any of items 17 to 26, further comprising the step of depositing a current blocking layer between said III-nitride substrate and said active layer.
(Item 28)
The active layer has a sodium concentration sufficiently low that the active layer contains at least 100 times less sodium than the substrate, and the substrate contains sodium at a concentration greater than 10 ¹⁶ cm ^−3. The method in any one of 17-27.
(Item 29)
A method according to any of items 17 to 28, wherein the first side of the substrate is miscut by more than 0.1 degrees and less than 5 degrees with respect to the c-plane.
(Item 30)
30. A method according to any of items 17-29, further comprising the step of providing the electrode.
(Item 31)
An electronic _{device, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) and the substrate, _{Ga 1-x2-y2} Al on the first side of the substrate An active layer of _{x 2} In _{y 2} N (0 ≦ x 2 ≦ 1, 0 ≦ y 2 ≦ 1), a back side ohmic contact on the second side opposite to the first side of the substrate, and the active layer And a depletion region having a depth
(A) The substrate has a dislocation density of ^less than 10 ⁵ cm ^-2
(B) the substrate has an electron concentration greater than 10 ¹⁸ cm ⁻³ ,
(C) The active layer has an electron concentration below 10 ¹⁸ cm ⁻³ ,
(D) the active layer has a thickness which exceeds the depth of the depletion region for any applied voltage within the operating range of the device;
Electronic device.
(Item 32)
The electronic device according to Item 31, wherein the electron concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
(Item 33)
An electronic _{device, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) and the substrate, _{Ga 1-x2-y2} Al on the first side of the substrate An active layer of _{x 2} In _{y 2} N (0 ≦ x 2 ≦ 1, 0 ≦ y 2 ≦ 1), a back side ohmic contact on the second side opposite to the first side of the substrate, and the active layer And a depletion region having a depth of
(A) The substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(B) The substrate ^has an oxygen concentration greater than 10 18 ^{cm -3}
(C) the active layer has an oxygen concentration below 10 ¹⁸ cm ⁻³ ,
(D) the active layer has a thickness which exceeds the depth of the depletion region for any applied voltage within the operating range of the device;
Electronic device.
(Item 34)
34. The electronic device according to item 33, wherein the oxygen concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
(Item 35)
Further comprising a transition layer of _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) between the substrate and the active layer, the transition layer by vapor phase epitaxy The electronic device according to any of items 31 to 34, which is grown.
(Item 36)
An electronic _{device, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) and the substrate, _{Ga 1-x2-y2} Al on the first side of the substrate An active layer of _{x 2} In _{y 2} N (0 ≦ x 2 ≦ 1, 0 ≦ y 2 ≦ 1), a back side ohmic contact on the second side opposite to the first side of the substrate, and the active layer wherein the a depletion region having a _depth, a transition layer of _{Ga 1-x3-y3 Al x3} in y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1), a,
(A) The substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(B) the substrate has an oxygen concentration or an electron concentration of more than 10 ¹⁸ cm ⁻³ ;
(C) the active layer has an oxygen concentration or an electron concentration below 10 ¹⁸ cm ⁻³ ,
(D) the active layer and the transition layer have a total thickness which exceeds the depth of the depletion region for any applied voltage within the operating range of the device
Electronic device.
(Item 37)
The electronic device according to Item 36, wherein the oxygen concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
(Item 38)
The electronic device according to Item 36 or 37, wherein the electron concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
(Item 39)
The electronic device according to any one of items 36 to 38, wherein the active layer is thicker than the depth of the depletion region.
(Item 40)
39. Electronic device according to any of items 36 to 38, wherein the depletion region extends into the transition layer.
(Item 41)
The transition layer has a varying impurity concentration or alloy composition along the growth direction such that lattice matching is achieved at the interface between the transition layer and the substrate and at the interface between the transition layer and the active layer. The electronic device according to any one of Items 35 to 40.
(Item 42)
42. An electronic device according to any of items 35-41, wherein the transition layer is thick enough to fill in the cracks made at the interface between the substrate and the transition layer.
(Item 43)
44. Electronic device according to any of items 35 to 42, wherein the transition layer is doped with an impurity which prevents the diffusion of the impurities comprised in the substrate.
(Item 44)
The substrate is made of a wafer made of bulk crystals of Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) grown in supercritical ammonia. The electronic device in any one of 31-43.
(Item 45)
The substrate contains a sodium concentration greater than about ¹⁰ 16 ^{cm -3,} the active layer has at least 100-fold less sodium concentration of the substrate, an electronic device according to any of items 31 to 44.
(Item 46)
46. An electronic device according to any of items 31 to 45, wherein the active layer is grown by vapor phase epitaxy.
(Item 47)
36. The electronic device of any of items 31-46, wherein the wafer is a c-plane wafer with a miscut greater than 0.1 degrees and less than 5 degrees.
(Item 48)
46. An electronic device according to any of items 31 to 47, wherein the depletion region comprises an adjacent Schottky contact or an adjacent pn junction.
(Item 49)
The depletion region has a Schottky contact or a metal-insulator-semiconductor structure,
(A) a current blocking layer between the substrate and the active layer, the current blocking layer having a current opening;
(B) further comprising a front side ohmic contact adjacent to the Schottky contact or the metal-insulator-semiconductor structure;
The front ohmic contact and the Schottky contact or the metal-insulator-semiconductor structure regulate the current passing from the front ohmic contact to the back ohmic contact by the voltage applied across the front ohmic contact and the Schottky contact. Be arranged to
The electronic device according to any one of items 31 to 47.
(Item 50)
The electronic device according to item 49, wherein the current blocking layer comprises silicon dioxide.
(Item 51)
The electronic device according to item 49, wherein the current blocking layer comprises a gas.
(Item 52)
The electronic device according to item 51, wherein the gas is air.
(Item 53)
The electronic device according to the current blocking layer, the p-type or semi-insulating _{Ga 1-x-y Al x} In y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1) including, item 49.
(Item 54)
54. An electronic device according to any of the items 49-53, further comprising a high electron concentration region under the front side ohmic contact.
(Item 55)
60. An electronic device according to any of items 31 to 47, wherein the depletion region comprises a pn junction and further comprising an additional n-type semiconductor on the pn junction forming a bipolar transistor.
(Item 56)
A method of making an electronic device, comprising
(A) the supercritical _{ammonia-Ga 1-x1-y1} grown in _{Al x1 In y1 N (0 ≦} x1 ≦ 1,0 ≦ y1 ≦ 1) was sliced from the bulk crystal _{Ga 1-x1-y1} Al Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) on the first side of the substrate of _x1 In _y1 N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) Growing the active layer of Si by vapor phase epitaxy;
(B) forming an ohmic contact on the second side of the substrate;
(C) forming a Schottky contact, a metal-insulator-semiconductor structure, or a p-type semiconductor on the active layer;
Including
(D) The substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(E) the substrate has an electron concentration greater than 10 ¹⁸ cm ^-3 ,
(F) the active layer has an electron concentration below 10 ¹⁸ cm ⁻³ ,
(G) The method wherein the active layer has a thickness that exceeds the thickness of the depletion region for any applied voltage within the operating range of the device.
(Item 57)
56. The method according to item 56, wherein the electron concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
(Item 58)
A method of manufacturing an electronic device,
(A) the supercritical _{ammonia-Ga 1-x1-y1} grown in _{Al x1 In y1 N (0 ≦} x1 ≦ 1,0 ≦ y1 ≦ 1) was sliced from the bulk crystal _{Ga 1-x1-y1} Al Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) on the first side of the substrate of _x1 In _y1 N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) Growing the active layer of Si by vapor phase epitaxy;
(B) forming an ohmic contact on the second side of the substrate;
(C) forming a Schottky contact, a metal-insulator-semiconductor structure, or a p-type semiconductor on the active layer;
Including
(D) The substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(E) The substrate has an oxygen concentration of more than 10 ¹⁸ cm ⁻³ ,
(F) the active layer has an oxygen concentration below 10 ¹⁸ cm ⁻³ ,
(G) The method wherein the active layer has a thickness that exceeds the thickness of the depletion region for any applied voltage within the operating range of the device.
(Item 59)
59. The method according to item 58, wherein the oxygen concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
(Item 60)
Step (a) comprises the growth of the transition layer of _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) between the substrate and the active layer, item 56 The manufacturing method of the electronic device in any one of -59.
(Item 61)
Before the step of growing the active layer
(A) forming a dielectric layer on the first side of the substrate;
(B) forming a hole in the dielectric layer to expose a portion of the first side of the substrate;
And the Schottky contact, metal-insulator-semiconductor structure, or p-type semiconductor is formed over the holes of the dielectric layer,
The manufacturing method of the electronic device in any one of claim 56-60.
(Item 62)
76. A method of making an electronic device according to item 61, wherein the dielectric layer comprises silicon dioxide.
(Item 63)
Item 61 or 62, wherein the transition layer and / or the active layer is formed using vapor phase epitaxy which selectively deposits the material of the layer into the pores and to the side of the dielectric layer. The manufacturing method of the electronic device as described.
(Item 64)
63. A method of making an electronic device according to item 63, wherein the laterally deposited material extends to adjacent devices on the substrate such that the active layer forms a continuous film.
(Item 65)
63. A method of making an electronic device according to item 63, wherein the material deposited laterally does not extend to adjacent devices on the substrate such that the active layer forms a discontinuous film.
(Item 66)
The invention according to any of the above items, wherein x1 = x2 = x3 = 0 and y1 = y2 = y3 = 0.

  Reference is now made to the drawings, where like reference numerals indicate corresponding parts throughout.

FIG. 1 is an example of an electronic device using group III nitrides. In the figure, each number represents the following. 1. Backside ohmic contact 2. Substrate 3. Active layer 4. Schottky contact FIG. 2 is an example of an electronic device using a group III nitride. In the figure, each number represents the following. 1. Backside ohmic contact 2. Substrate 3. Active layer 4. Schottky contact 5. Transition layer FIG. 3 is an example of an electronic device using a group III nitride. In the figure, each number represents the following. 1. Backside ohmic contact 2. Substrate 3. High purity, low carrier concentration active layer 4. Schottky contact 5. Transition layer 6. Current blocking layer 7. High electron concentration region Front side ohmic contact FIG. 4 is an example of an electronic device using a group III nitride. In the figure, each number represents the following. 1. Backside ohmic contact 2. Substrate 3. High purity, low carrier concentration active layer 4. Schottky contact 5. Transition layer 6. Current blocking layer 7. High electron concentration region Front side ohmic contact 5A-5G are one example of a process of making an electronic device using a group III nitride. In the figure, each number represents the following. 9. _Ga grown in supercritical ammonia _{1-x-y Al x In} y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1) Ga 1-x-y Al were sliced from bulk crystals of x In _y Substrate of N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) Current blocking layer 10a. Holes in current blocking layer 11. Transition layer grown in the holes of the current blocking layer High purity, low carrier concentration active layer 13. High electron concentration layer 13a. Window in high electron concentration layer 14. Backside ohmic contact 15. Front side ohmic contact 16. Schottky contact 17. Individual electronic devices after die cutting 6A-6G are one example of a process for making an electronic device using III-nitrides. In the figure, each number represents the following. 9. Grown in supercritical _{ammonia, Ga 1-x-y Al} x In y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1) Ga 1-x-y Al were sliced from bulk crystals of x _{an In} y N Substrate of (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) Current blocking layer 10a. Holes in current blocking layer 11. Transition layer grown in the holes of the current blocking layer High purity, low carrier concentration active layer 13. High electron concentration layer 13a. Window in high electron concentration layer 14. Backside ohmic contact 15. Front side ohmic contact 16. Schottky contact 17. Individual electronic devices after die cutting

(Overview)
In order to obtain high breakdown voltage with low on-resistance, the present invention provides a bulk of Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) grown by ammonothermal method utilizing a group III nitride substrate sliced from a crystal _{Ga 1-x1-y1 Al x1} in y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1). In a typical semiconductor device fabrication method, many devices are fabricated on one wafer and then separated into each device by dicing, cleaving or other methods. In any case, one device is fabricated from one wafer, and the substrate can be the entire wafer. In one example, the dislocation density of the III-nitride substrate is below 10 ⁵ cm ⁻² and the electron concentration of the substrate is above 10 ¹⁸ cm ⁻³ . In another example, the dislocation density of the substrate is below 10 ⁵ cm ^-2 and the oxygen or silicon concentration of the substrate is above 1 atom per 10 ¹⁸ cm ^-3 . In this case, oxygen or silicon may be the main donor of electrons. Low on-resistance can be achieved by utilizing the high electron concentration of the Ga _{1 -xy} Al _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) substrate by ammonothermal growth.

III nitride substrate using the ammonothermal _{method, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) 1 or the growth of bulk crystals above that of It can be formed by The crystals can be grown under acidic, basic or neutral conditions in a high pressure reactor as described in any of the generally related patent applications known to the person skilled in the art or listed above. Electron donors such as oxygen and / or silicon have placed enough oxygen and / or silicon in the growth chamber of the high pressure reactor, in the nutrient, mineralizer, seeds, ammonia, and in the reactor By incorporation as any other desired material, it is incorporated into the bulk crystal during ammonothermal growth. Oxygen exhausts the atmosphere from the reactor after feed input, but from the air into the chamber by leaving a sufficient amount of air in the reactor to provide the desired level of oxygen into the chamber. It can be introduced. Oxygen may also, or alternatively, be introduced into the reactor chamber in the form of oxides of the elements used for mineralizers. For example, sodium and / or potassium can be used as a mineralizer, often the sodium and / or potassium added to the reactor has an oxidized amount. Oxygen from the mineralizer can supply sufficient amount of oxygen to provide a specific level of oxygen concentration in the bulk crystal. Silicon can be introduced, for example, by adding a certain amount of silane gas to the reactor to provide a specific concentration of silicon in the bulk crystal or using other methods known to those skilled in the art.

A high purity, low carrier concentration active layer may be formed by vapor phase epitaxy on the first side of the substrate such that the impurity level and electron concentration in the active layer are low. The growth conditions of the active layer can be optimized such that no dislocations are newly generated at the interface between the substrate and the active layer. Optimization may include adjusting the growth temperature, temperature ramp profile, introduction timing of the reaction gas or source, and other techniques known to those skilled in the art. Thus, the dislocation density of the Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) active layer is the same as that of the substrate (ie ^less than 10 ⁵ cm ⁻² ) Can be. Thus, the dislocation density of the active layer is determined by heteroepitaxy (where all electrodes of the electrical devices on the wafer are found on only one side or surface of the wafer and there are no electrodes of the device on the opposite side of the wafer). It may be lower than the dislocation density of the active layer of a comparable horizontal device formed on (10 ⁹ cm ⁻² level). In addition, vapor phase epitaxy can achieve lower impurity concentrations than that of ammonothermal substrates. Therefore, the electron concentration of the active layer is lower than 10 ¹⁶ cm ⁻³ . The high structural quality and high purity properties of the active layer allow for fast electron mobility and high breakdown voltage.

  In order to achieve a sufficient breakdown voltage, the high purity, low carrier concentration active layer has, for example, a sufficient thickness of 5 microns, typically more than 10 microns.

The active layer may have a much lower concentration of sodium or other mineralizer than the III-nitride substrate. The active layer may, for example, have a concentration that is less than one tenth or one hundredth of sodium or other mineralizer present in the substrate. The substrate can have a mineralizing agent such as sodium at a concentration greater than about 10 ^{< 16} > cm ^<"3 >.

A transition layer may optionally be grown on the substrate prior to growth of the active layer to maximize structural quality and purity of the active layer. The lattice constant of GaN or other III-nitride substrate formed using ammonothermal growth may be slightly larger than the lattice constant of vapor-grown GaN or III-nitride substrate . This can be attributed to the high concentration of impurities and / or electrons in the substrate formed by ammonothermal growth. Thus, it may be useful to grow a transition layer having a lattice constant that is initially matched to the substrate. The alloy composition of the Ga _{1-x 3-y 3} Al _{x 3} In _{y 3} N (0 ≦ x3 ≦ 1, 0 ≦ y3 ≦ 1) transition layer is the lattice constant of the transition layer at the transition layer surface that will contact the active layer. It can be gradually changed to be suitable for the subsequent active layer. The composition, for example, the flow rate of reactant gases during growth so that the crystal structure of the transition layer is well matched to the substrate on one surface of the transition layer and to the active layer on the opposite surface of the transition layer. It can be changed by changing it. In this way, the structural quality of the active layer is maximized.

When the lattice constant or lattice curvature of the ammonothermal substrate is excessive, the Ga _1-x3-y3 Al _x3 In _y3 N (0 ≦ x3 ≦ 1, 0 ≦ y3 ≦ 1) transition layer grown by vapor phase epitaxy Break as time. However, these cracks are based on the observations during layer growth or from the observation of the transition layer formed during the previous step, to promote growth and fill the cracks, growth temperature, temperature gradient profile, and / or Alternatively, the material can be buried by further growing the material by changing the introduction timing of the reaction gas or source. The active layer can be grown after all the fracture damage has been repaired.

  The transition layer can also be used to prevent the potential diffusion of impurities from the III-nitride substrate to the active layer. In particular, sodium in the substrate can diffuse into the active layer during the fabrication process or device operation. Suitable dopants such as silicon and magnesium in the transition layer can block such diffusion.

  Instead of using a III-nitride substrate having a transition layer, use the template-type wafer disclosed in US Patent Application No. 2006/0057749 A1, the contents of which are incorporated by reference as described fully below. You can also. The purpose of the template is to maintain the crystal quality (ie dislocation / defect density) of the wafer during epitaxial growth of high purity, low carrier concentration active layers.

  It is worth noting that the transition layer can be part of the active layer. If the active layer is grown in two or more steps, such as, for example, changing the growth temperature, pressure, and / or reactant flow rates, the portion of the active layer closer to the substrate is a portion of the active layer Will have a lattice constant that more closely matches the lattice constant of the substrate to function as a transition layer.

The device has a depletion region in the active layer. Structures such as Schottky contacts, metal insulator semiconductor structures, or pn junctions deplete charge carriers from the depletion region in the active layer so that the device functions as an electronic device. The structure may be a Schottky contact, a metal-insulator-semiconductor structure or a pn junction. In any case, the formation of such a structure requires that the surface of the semiconductor active layer have a high quality. The device can function as a Schottky diode when a Schottky contact is made on the active layer and one ohmic contact is made on the back side of the substrate. The device may be a metal-semiconductor field effect transistor (MESFET) if an additional ohmic contact is made on the active layer with a current blocking region and a low resistance contact region. The Schottky contact of the MESFET can be replaced by a metal-insulator-semiconductor structure. When a p-type semiconductor is formed on the active layer, the device may be a pn diode. With an additional n-type semiconductor on the p-type semiconductor, the device may be a bipolar transistor. Heterojunctions can be used for these npn structures (heterobipolar transistors: HBTs). Because these devices all have vertical configurations, they are suitable for high current operation.
(Technical Description of the Invention)

Several exemplary structures of electronic devices in the present invention will be described using the drawings. FIG. 1 illustrates one embodiment of an electronic device. This device consists of Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) substrate 2 made by ammonothermal growth and on one side of the substrate by vapor phase epitaxy It has the grown Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) active layer 3. Typical vapor phase epitaxy such as metal organic chemical vapor deposition (MOCVD), HVPE, and / or molecular beam epitaxy (MBE) may be used to deposit the active layer. The ohmic contact is formed, for example, by depositing a Ti / Al layer 1 on the other side of the substrate, and the Schottky contact 4 is a portion of the active layer by depositing and depositing one or more metals. Formed on. The shape of the Schottky contacts may be circular, square, rectangular or other polygons such as triangles, pentagons or hexagons. The Schottky contacts can be, for example, several hundred microns in size, depending on the rated current of the device. If higher currents are required, the size of the contacts can be several millimeters or more. The device is configured as a Schottky diode.

The Schottky contact can be replaced by p-type Ga _1-x4-y4 Al _{x 4} In _{y 4} N (0 ≦ x4 ≦ 1, 0 ≦ y4 ≦ 1) having an ohmic contact on the p-type layer. In this case, the device may function as a pn diode. Ohmic contact of the p-n diode, when replaced with n-type _{Ga 1-x5-y5 Al x5} In y5 N (0 ≦ x5 ≦ 1,0 ≦ y5 ≦ 1), the device functions as a bipolar transistor obtain. The device may function as a heterobipolar transistor (HBT) if the active layer, p-type layer and n-type layer have different alloy compositions. For example, the active layer can be undoped GaN, the p-type layer can be pGaN, and the top n-type layer can be, for example, n-AlGaN containing 10% aluminum. To form the additional _{Ga 1-x-y Al x} In y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1) layer, MOCVD, HVPE, MBE or other vapor phase process, can be used. The Schottky contacts and ohmic contacts can be formed by metal evaporation, sputtering, or other typical metallization processes used in semiconductor processes.

FIG. 2 shows one embodiment of the electronic device. In addition to the layers 1 to 4 shown in FIG. 1, the device is characterized in that Ga _1−xy Al _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) between the substrate and the active layer. A transition layer 5 is provided. The purpose of the transition layer is to achieve the highest structural quality and purity in the active layer. Both transition and active layers are grown in the vapor phase process, but different methods can be used to grow each layer. For example, the transition layer can be grown by HVPE and the active layer can be grown by MOCVD. With this combination, the growth rate of HVPE much higher than MOCVD makes it easy to grow a sufficiently thick transition layer. On the other hand, it is also possible to use the reverse combination, ie growing the transition layer by MOCVD and the active layer by HVPE. In that case, precise control of the lattice constant and / or impurity concentration is possible due to the slower growth rate of MOCVD. Instead of using MOCVD, MBE can also be utilized. As explained above, the alloy composition or impurity concentration of the transition layer can be optimized to maximize the structural quality and purity of the active layer. For example, a transition layer of InGaN in which the indium composition gradually changes can be grown by MBE so as to gradually change the lattice constant along the growth direction. In addition, the doping level of Si in the GaN transition layer can also be gradually changed by MBE so that the lattice constant narrows along the growth direction.

  FIG. 3 illustrates one embodiment of an electronic device having three terminals. (Figure 3 shows two sets of high electron concentration regions 7 and front ohmic contact 8, but note that these sets are connected.) The other layers are as shown in Figure 2 is there. An appropriate current blocking layer 6 is inserted to make the device function as a transistor. The current blocking layer 6 restricts the current path mainly below the Schottky contact 4. The current blocking layer 6 may be an insulator such as silicon dioxide or an insulating gas such as air. Also, the current blocking layer 6 may be a p-type or semi-insulating semiconductor such as p-GaN, p-AlGaN or semi-insulating GaN. The Schottky contact 4 creates a depletion region inside the active layer 3. Since the size of the depletion region can be changed by the voltage applied to the Schottky contact 4, the current between the back side ohmic contact 1 and the front side ohmic contact 8 can be regulated. When the depletion region reaches the current blocking layer, the current is cut off. Depending on the device parameters, such as the thickness of the active layer 3 and the carrier concentration, the device can operate in the always off or always on mode. In the always-off mode, the current through the two ohmic contacts is zero and the voltage across the Schottky contact 4 is zero.

The Schottky contact can be replaced by a metal-insulator-semiconductor structure. In this case, a suitable insulator such as SiO ₂ , Al ₂ O ₃ or AlN may be used. The device can operate as a MISFET.

  The thickness and properties of the insulator layer, such as composition and resistance, can be adjusted. A current blocking layer may optionally be formed on the transition layer.

  FIG. 4 shows an example of an electronic device having the same set of layers as the device of FIG. If selective growth methods such as laser assisted epitaxy, diffusion enhanced epitaxy, foreign body encapsulation, and / or step edge encapsulation are used to grow the transition layer 5 and the active layer 3, sometimes the active layer 3 Do not form a continuous film). In such case, the device may have the structure illustrated in FIG.

One example of the fabrication process of the electronic device of FIG. 3 is depicted in FIGS. 5A-5G. First, y _1-x-Ga grown in supercritical ammonia _{Al x In y N (0 ≦} x ≦ 1,0 ≦ y ≦ 1) Ga sliced from bulk crystals of _1-x-y Al _x A substrate 9 of In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) is prepared (FIG. 5A). The first surface on which the active layer is grown is preferably polished by chemical mechanical polishing (CMP) to achieve an atomically flat surface. This surface can also be miscut by up to 5 degrees to maximize the crystallinity of the active layer. A current blocking layer 10 is formed on the first surface of the substrate (FIG. 5B). Holes 10a are formed in the current blocking layer using lithographic methods commonly used in semiconductor processes (FIG. 5C). If silicon dioxide is used as the current blocking layer, wet etching with hydrofluoric acid may be used after proper patterning with photoresist. If the semiconductor layer is used as a current blocking layer, dry etching such as reactive ion etching may be used. In any case, appropriate treatment of the exposed substrate surface is preferably performed to ensure epitaxial growth of the active layer and / or the transition layer. Thereafter, the transition layer 11 is grown on the substrate, and then the active layer 12 is grown. In addition, in the present embodiment, a high electron concentration layer 13 such as Si doped with GaN is simultaneously grown (FIG. 5D). These layers can be grown in the same gas phase process, such as MOCVD, HVPE, or MBE. Also, different gas phase methods may be used for each layer. The windows 13a on the high electron concentration layer are formed using photoresist patterning and dry etching commonly used in semiconductor processes (FIG. 5E). A back side ohmic contact 14 such as Ti / Al and a front side ohmic contact 15 such as Ti / Al are formed using standard semiconductor metallization processes. These contacts are preferably annealed to ensure the ohmic properties of the contacts. The Schottky contacts 16 are formed after appropriate treatment of the exposed surface of the active layer, such as with 5 minutes of hydrofluoric acid etching and then rinsing with deionized water (FIG. 5F). Finally, individual devices 17 are cut from the epitaxial multilayer wafer using a wafer dicing apparatus (FIG. 5G).

FIG. 6 illustrates one example of a process of making an electronic device having the layers described above for FIG. Similar to the embodiment of FIG. 5 above, a current blocking layer with holes is fabricated on the ammonothermal substrate. In this case, the current blocking layer is preferably silicon dioxide or other dielectric material that ensures selective growth of the active layer 12 and / or the transition layer 11. A transition layer 11 of Ga _{1 -xy} Al _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) can be selectively grown on the exposed surface of the substrate 9. This means that the dielectric current blocking layer 10 acts as a mask for the growth of Ga _{1 -xy} Al _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). Once the height of the transition layer 11 or the active layer 12 exceeds the height of the current blocking layer, Ga _{1 -xy} Al _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) becomes Ga _{1-x-y Al x in} y to lateral growth surface of the N (0 ≦ x ≦ 1,0 ≦ y ≦ 1) reaches the growth surface of the adjacent device, the upper of the current blocking layer 10 on the side Start to grow. If the growth is stopped prior to coalescence, the epitaxial multilayer wafer structure will be as shown in FIG. 6D. The layer 13 with high electron concentration is then patterned to open the window 13a to the active layer (FIG. 6E), each contact 14, 15, and 16 being a process similar to the process described for FIG. (FIG. 6F). After wafer dicing, the electronic device 17 of FIG. 6G or FIG. 4 is completed. By this selective growth method that does not coalesce the active layer, the stress in the transition layer and / or the active layer can be reduced and the device performance can be improved.

The bulk crystal of GaN is 127 cc using polycrystalline GaN (15 g) as a base material, supercritical ammonia (53% of reactor volume filled) as solvent, and sodium (5 mol% to ammonia) as mineralizer In a pressure reactor with an internal volume of <RTIgt; a </ RTI> basic ammonothermal method. The growth temperature was 500-600 ° C., and the growth extended to 181 days. Bulk crystals of GaN were grown on c-plane GaN seed crystals. The size of the crystals was approximately 10 mm ² . The crystals were then sliced into substrates using a multiple wire saw. Nine substrates were cut out of one bulk GaN crystal. These substrates were lapped with diamond slurry and polished using CMP. The defect density of one of these substrates was evaluated by X-ray topography. The dislocation density was 4 × 10 ⁴ cm ⁻² . The oxygen concentration was 3.2 × 10 ¹⁹ cm ⁻³ . From the oxygen concentration, the electron concentration was in the middle to high range of 10 ¹⁸ cm ⁻³ .

Using a pressure reactor with a similar internal volume, bulk GaN crystals consist of polycrystalline GaN matrix (1-500 g), ammonia (30-60% loading), and sodium (1-10% with respect to ammonia) It can be grown under similar conditions. Thus grown are bulk GaN crystal is ^typically exhibits n-type conductivity of the electron concentration in excess of 10 18 ^{cm -3.}

  A GaN layer was grown by HVPE using a GaN substrate prepared by ammonothermal growth. The resulting epitaxial multilayer wafer can be used to fabricate electronic devices as presented in Examples 3 and 4. In each run, one substrate of approximately 10 mm × 10 mm in size was used. Inside the HVPE reactor, hydrogen chloride gas was passed over the heated Ga, and the resulting gallium chloride was then mixed with ammonia and then brought into contact with the heated substrate. The temperature of Ga was in the range of 800 to 1000 ° C., and the temperature of the substrate was in the range of 900 to 1150 ° C. In this example, GaN with thicknesses of 11 microns, 24 microns, 56 microns and 164 microns was grown on the Ga polar surface of an ammonothermal c-plane GaN substrate. The growth rate was in the range of 50 to 400 microns per hour. The surface of the 11 micron thick GaN film had cracks originating from the interface between the ammonothermal substrate and the HVPE film, while the remaining three films had no cracks on their surface . This confirmed that the cracks originating from the interface between the ammonothermal substrate and the active layer formed by HVPE can be filled by growing a thicker layer.

  For a 56 micron thick film, a GaN transition layer was grown for 4 minutes before the active layer was grown for 5 minutes. The growth temperature of the transition layer was approximately 100 degrees lower than that of the active layer. Also, in that case, the upper surface of the active layer exhibited a high quality surface without cracking.

The carrier concentration of the active layer of the 24 micron, 56 micron, and 164 micron thick films was less than 10 ¹⁶ cm ^-2 and characterized by high purity and low carrier concentration.

  Using other gas phase methods such as MOCVD and MBE to grow the transition and / or active layers should have the same advantages as the crack reduction presented in this example.

  Although the transition layer is optional, the device may, for example, have composition and from one side to the other side of the layer to provide a surface matched to the active layer to maximize its crystallinity and purity. Preferably, it has a separate transition layer in which the impurity concentration changes.

  The Schottky diode uses an epitaxial multilayer wafer having a GaN high purity, low carrier concentration active layer, and forms an ohmic contact of aluminum on the back surface of the wafer and a Schottky contact of Ni on the surface of the active layer. It can be made. First, the wafer with the active layer is cleaned with hydrofluoric acid to remove surface oxide. Then, approximately 1 micron of nickel is deposited on the surface of the active layer. Photoresist patterning is performed using standard semiconductor processes, and the nickel is etched with nitric acid. The photoresist is then removed with acetone. After forming the Schottky contacts, approximately 1 micron of Ti / Al ohmic contact is deposited on the backside of the wafer. Each device is then separated by a wafer dicing apparatus.

This structure has the advantage of high breakdown voltage due to high substrate (10 ¹⁸ cm above the ^-3) high resistivity low on-resistance and the active layer by the electric conductivity. High resistivity of the active layer ^is achieved by a low carrier concentrations below 10 16 ^{cm -3.} The combination of vapor deposition and ammonothermal GaN substrate is useful to achieve both low on-resistance and high breakdown voltage. Also, an optional transition layer by vapor deposition can achieve high performance by ensuring high crystallinity and purity of the active layer.

  By growing an additional layer of p-type GaN by vapor phase epitaxy and then forming an ohmic contact of Ni / Au, the pn diode is an epitaxial multilayer wafer with a high purity, low carrier concentration active layer of GaN. Can be made using The thickness of p-type GaN can be greater than 0.1 micron. The thickness of Ni / Au is approximately 1 micron. The backside ohmic contact is formed as described in Example 3. The device can operate as a pn diode.

The process in Example 3 can be incorporated into the process of processing MESFETs. In addition to the two electrodes (one ohmic backside drain contact and one Schottky gate contact), the MESFET has one more ohmic source contact next to the Schottky gate contact. Since the active layer has a low electron concentration, a heavily doped suitable contact area is used to ensure a low contact resistance of the ohmic source contact. To achieve this structure, an additional layer of high electron concentration GaN is grown on the active layer, followed by reactive ion etching to create windows for Schottky gate contacts. A 1 micron thick Ti / Al ohmic contact is used for the source and drain contacts.

  With proper device design, such as the distance to the Schottky gate contact of the current blocking layer, the MESFET can always operate in the off mode. It reduces the electron concentration of the active layer, and the distance to the Schottky gate contact of the current blocking layer so that the depletion region created by the Schottky barrier closes the current channel between the gate and the current blocking layer. Achieved by reducing. By varying the voltage applied to the gate, the channel width can be controlled, and thus the amount of current through the source and drain contacts can be controlled. The active layer and / or the transition layer, alone or in combination, causes damage (i.e., cracking) of the depletion region at the interface between the ammonothermal substrate or substrate and the transition / active layer under appropriate bias conditions of the gate contact. Preferably, it has a thickness large enough so as not to reach the area).

The Schottky gate contact may be replaced by a metal-insulator-semiconductor structure. In such cases, an insulator layer of SiO ₂ , Al ₂ O ₃ , or AlN is deposited on the active layer by sputtering. Thereafter, Ti / Al contacts are deposited on the insulator layer with appropriate patterning. The device can operate as a MISFET.

By additionally growing n-GaN or n-AlGaN on the pn diode of Example 4, the device can operate as a bipolar transistor or a heterobipolar transistor (HBT). In that case, the p-type Ga _1-xy Al _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) layer should be thinner than the other layers. The growth of these layers is done by MOCVD, MBE, HVPE or other gas phase processes. Ni / Au may be used for p-type contacts and Ti / Al may be used for n-type contacts.
(Possible fix)

  Although the preferred embodiment describes a GaN substrate, the substrate can be a III-nitride alloy of various compositions, such as AlN, AlGaN, InN, InGaN, or GaAlInN. The scope of the invention is also maintained for those substrates.

  Although the preferred embodiment describes Ga-face c-plane GaN, other orientations such as N-face c-plane, a-plane, m-plane, and various semipolar planes may also be used. In addition, the surface may be slightly miscut (off-sliced) from these orientations. The scope of the invention is maintained for these orientations and miscuts. In particular, the use of N-plane c-plane GaN, nonpolar a-plane and m-plane, semipolar plane can modulate the energy band structure of the electronic device and thus control the turn on voltage of the MESFET or MISFET.

  Although the preferred embodiment utilizes HVPE, other methods such as MOCVD, MBE, reactive sputtering, ion beam deposition, etc. may be used to grow the active layer and / or transition layer of the present invention.

Preferred embodiments use Ni for Schottky contacts and Ti / Al for ohmic contacts, but other metals may also be used. Examples of Schottky contacts are Pt, Pd, Co, Au, Mg, and examples of ohmic contacts are Cr, In, Ag.

Further examples of the invention include the subject matter summarized in the following paragraphs, but they are provided as examples and, of course, do not limit the scope of the invention.
1. An epitaxial multilayer wafer for manufacturing an electronic device, comprising: (i) Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0) having a _first side and a second side opposite to the first side A group III nitride substrate of ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1), and (ii) Ga _{1−x 2 −y 2} Al _{x 2} In _{y 2} N (0 ≦ x 2) on the first side of the group III nitride substrate An active layer of ≦ 1, 0 ≦ y 2 ≦ 1),
(A) The dislocation density of the group III nitride substrate is less than 10 ⁵ cm ⁻² ,
(B) III nitride substrate ^has an electron density greater than 10 18 ^{cm -3,}
(C) III-nitride substrate is made from bulk crystals grown in supercritical ammonia _{Ga 1-x1-y1 Al x1} In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1),
(D) The active layer is an epitaxially deposited layer having an electron concentration below 10 ¹⁸ cm ⁻³ ,
(E) The active layer is formed in the active layer after producing an electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. An epitaxial multilayer wafer, wherein the depletion region has a sufficient thickness to be outside the substrate.
2. The epitaxial multilayer wafer according to paragraph 1, wherein the active layer has an electron concentration of ^less than 10 ¹⁶ cm ⁻³ .
3. An epitaxial multilayer wafer for manufacturing an electronic device, comprising: (i) Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0) having a _first side and a second side opposite to the first side A group III nitride substrate of ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1), and (ii) Ga _{1−x 2 −y 2} Al _{x 2} In _{y 2} N (0 ≦ x 2) on the first side of the group III nitride substrate An active layer of ≦ 1, 0 ≦ y 2 ≦ 1),
(A) The dislocation density of the group III nitride substrate is less than 10 ⁵ cm ⁻² ,
(B) III nitride substrate ^has an electron density greater than 10 18 ^{cm -3,}
(C) III-nitride substrate is made from bulk crystals grown in supercritical ammonia _{Ga 1-x1-y1 Al x1} In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1),
(D) The active layer is an epitaxially deposited layer having an oxygen concentration below 10 ¹⁸ cm ⁻³ ,
(E) The active layer is formed in the active layer after producing an electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. An epitaxial multilayer wafer, wherein the depletion region has a sufficiently large thickness to be outside the substrate.
4. The epitaxial multilayer wafer according to paragraph 3, wherein the active layer has an oxygen concentration of ^less than 10 ¹⁶ cm ⁻³ .
5. An epitaxial multilayer wafer according to any of paragraphs 1 to 4, wherein the thickness of the active layer is greater than 5 microns.
6. Further comprising a transition layer of _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) between the substrate and the active layer, a first side of the transition layer, the substrate It has a crystal lattice matched to the crystal lattice on the first side, the second side of the transition layer has a crystal lattice matched to the crystal lattice on the first side of the active layer, and the lattice constant of the transition layer is The epitaxial multilayer wafer according to any of paragraphs 1 to 5, wherein the lattice alignment changes along the growth direction to achieve at the interface between the substrate and the transition layer and the interface between the transition layer and the active layer. .
7. The epitaxial multilayer wafer according to paragraph 6, wherein the transition layer is grown by vapor phase epitaxy.
8. The epitaxial multilayer wafer according to paragraph 6 or 7, wherein the transition layer is of sufficient thickness to fill the cracks formed at the interface between the substrate and the transition layer.
9. The epitaxial multilayer wafer according to any of paragraphs 6-8, wherein the depletion zone extends into the transition layer.
10. The epitaxial multilayer wafer according to any one of paragraphs 6 to 8, wherein the active layer is thicker than the depletion zone.
11. 11. The epitaxial multilayer wafer according to any of paragraphs 6 to 10, wherein the transition layer is doped with an impurity that prevents the diffusion of impurities contained in the substrate.
12. 12. The epitaxial multilayer wafer according to any of paragraphs 1-11, further comprising a current blocking layer between the III-nitride substrate and the active layer.
13. The epitaxial multilayer wafer according to any one of paragraphs 1 to 12, wherein the active layer has a dislocation density of less than 10 ⁵ cm ⁻² .
14. ^Substrate has a sodium concentration greater than 10 16 ^{cm -3,} the active layer contains at least 100 times less sodium than the substrate, an epitaxial multilayer wafer of any of paragraphs 1-13.
15. 15. An epitaxial multilayer wafer according to any of paragraphs 1-14, wherein the substrate is a c-plane with a miscut greater than 0.1 degrees and less than 5 degrees.
16. An electronic device, comprising: a multilayer wafer according to any of paragraphs 1 to 15; and an electrode forming a depletion region outside the group III nitride wafer above the operating range of the electronic device.
17. A method of making a multilayer wafer, which is formed by ammonothermal method and has a second side opposite to the first side Ga _1-x1-y1 Al _x1 In _y1 N (0 ≦ x1 ≦ 1, 0) a first side on the substrate of ≦ y1 ≦ _1), epitaxially deposited from the vapor phase of the active layer of _{Ga 1-x2-y2 Al x2} in y2 N (0 ≦ x2 ≦ 1,0 ≦ y2 ≦ 1) Forming an electronic device in the active layer after producing an electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. The depletion region formed has a sufficient thickness to be outside the substrate, the substrate has an oxygen concentration of more than 10 ¹⁸ cm ⁻³ , and the gas phase has 10 ¹⁸ cm ⁻³ in the active layer. A method having a concentration of oxygen sufficiently low to provide a lower concentration of oxygen.
18. Gas phase has an oxygen sufficiently low concentration to provide an oxygen concentration below 10 ¹⁶ cm ^-3 in the active layer, the method described in paragraph 17.
19. A method of making a multilayer wafer, which is formed by ammonothermal method and has a second side on the opposite side of the first side Ga ₁ -x _{1 -y 1} Al _{x 1} In _{y 1} N (0 ≦ x 1 ≦ 1, 0 a first side on the substrate of ≦ y1 ≦ _1), epitaxially deposited from the vapor phase of the active layer of _{Ga 1-x2-y2 Al x2} in y2 N (0 ≦ x2 ≦ 1,0 ≦ y2 ≦ 1) Forming an electronic device in the active layer after producing an electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer. The depletion region formed has a sufficient thickness to be outside the substrate, the substrate has an oxygen concentration of more than 10 ¹⁸ cm ⁻³ , and the active layer has an electron concentration of less than 10 ¹⁸ cm ^−3. A method having a sufficiently low concentration of electron donors to provide in the active layer.
20. Active layer has a sufficiently low concentration electron donor to provide an electron concentration less than 10 ¹⁶ cm ^-3 in the active layer, the method described in paragraph 19.
21. 21. The method of any of paragraphs 17-20, wherein the active layer is deposited to a thickness of at least about 5 microns.
22. The first surface of the transition layer is aligned with the crystal lattice of the first side of the substrate during the deposition step, and upon completion of the transition layer deposition step, the second opposite surface of the transition layer is the first side of the active layer. to align with the crystal lattice, while changing the concentration and / or deposition conditions of the _reactants, the transition layer of _{Ga 1-x3-y3 Al x3} in y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) A method according to any of paragraphs 17-21, further comprising the step of epitaxially depositing
23. The method further includes depositing an additional amount of transition layer such that the transition layer cracks during the deposition step so that the second surface of the transition layer has no cracks. , The method according to paragraph 22.
24. The method according to paragraph 22 or 23, wherein the active layer is deposited to a thickness such that a depletion zone extends in part of the transition layer.
25. The method according to paragraph 24, wherein the depletion zone ends before reaching a crack in the transition layer.
26. 26. A method according to any of paragraphs 22-25, wherein the transition layer is doped with an impurity which prevents the diffusion of impurities contained in the substrate.
27. A method according to any of paragraphs 17 to 26, further comprising the step of depositing a current blocking layer between the III-nitride substrate and the active layer.
28. The active layer has a sufficiently low sodium concentration in the active layer contains at least 100 times less sodium than the substrate, the substrate contains sodium concentrations above 10 ¹⁶ cm ^-3, paragraphs 17 to 27 The method described in either.
29. The method according to any of paragraphs 17-28, wherein the first side of the substrate is miscut by more than 0.1 degrees and less than 5 degrees with respect to the c-plane.
30. 30. The method of any of paragraphs 17-29, further comprising the step of providing an electrode.
31. An electronic _{device, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) and the _{substrate, Ga 1-x2-y2 Al} x2 on the first side of the substrate The active layer of In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1), the back side ohmic contact on the second side opposite to the first side of the substrate, and the depth in the active layer And having a depletion region,
(A) The substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(B) the substrate has an electron concentration greater than 10 ¹⁸ cm ⁻³ ,
(C) The active layer has an electron concentration below 10 ¹⁸ cm ⁻³ ,
(D) An electronic device, wherein the active layer has a thickness that exceeds the depth of the depletion region for any applied voltage within the operating range of the device.
32. Electron concentration of the active ^layer, below 10 16 ^{cm -3,} an electron device according to paragraph 31.
33. An electronic _{device, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) and the _{substrate, Ga 1-x2-y2 Al} x2 on the first side of the substrate The active layer of In _y2 N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1), the back side ohmic contact on the second side opposite to the first side of the substrate, and the depth in the active layer And having a depletion region,
(A) The substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(B) the substrate has an oxygen concentration greater than 10 ¹⁸ cm ^-3 ,
(C) the active layer has an oxygen concentration below 10 ¹⁸ cm ⁻³ ,
(D) An electronic device, wherein the active layer has a thickness that exceeds the depth of the depletion region for any applied voltage within the operating range of the device.
34. Oxygen concentration in the active layer ^is less than 10 16 ^{cm -3,} an electron device according to paragraph 33.
35. Wherein between the substrate and the active layer _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) of the transition layer a further transition layer is grown by vapor phase epitaxy The electronic device according to any of paragraphs 31 to 34.
36. An electronic _{device, Ga 1-x1-y1 Al} x1 In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) and the _{substrate, Ga 1-x2-y2 Al} x2 on the first side of the substrate The active layer of In _y2 N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1), the back side ohmic contact on the second side opposite to the first side of the substrate, and the depth in the active layer It includes a depletion _region, and a transition layer of _{Ga 1-x3-y3 Al x3} in y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1), the having,
(A) The substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(B) the substrate has an oxygen concentration or electron concentration greater than 10 ¹⁸ cm ⁻³ ,
(C) The active layer has an oxygen concentration or electron concentration below 10 ¹⁸ cm ⁻³ ,
(D) An electronic device, wherein the active layer and the transition layer have a total thickness that exceeds the depth of the depletion region for any applied voltage within the operating range of the device.
37. Oxygen concentration in the active layer ^is less than 10 16 ^{cm -3,} an electron device according to paragraph 36.
38. The electronic device according to paragraph 36 or 37, wherein the electron concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
39. The electronic device according to any of paragraphs 36 to 38, wherein the active layer is thicker than the depth of the depletion region.
40. The electronic device according to any of paragraphs 36 to 38, wherein the depletion region extends into the transition layer.
41. The transition layer has an impurity concentration or alloy composition which changes along the growth direction such that lattice matching is realized at the interface between the substrate and the transition layer and the interface between the transition layer and the active layer. The electronic device according to any of 40.
42. The electronic device according to paragraphs 35-41, wherein the transition layer is thick enough to fill the cracks made at the interface between the substrate and the transition layer.
43. The electronic device according to paragraphs 35 to 42, wherein the transition layer is doped with an impurity that prevents the diffusion of the impurity contained in the substrate.
44. The substrate is made of a wafer made of bulk crystals of Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) grown in supercritical ammonia, paragraph 31 The electronic device in any one of -43.
45. Substrate contains a sodium concentration greater than about ¹⁰ 16 ^{cm -3,} the active layer has at least 100-fold less sodium concentration of the substrate, an electronic device according to any one of paragraphs 31 to 44.
46. The electronic device of any of paragraphs 31-45, wherein the active layer is grown by vapor phase epitaxy.
47. The electronic device according to any of paragraphs 31 to 46, wherein the wafer is a c-plane wafer having a miscut greater than 0.1 degrees and less than 5 degrees.
48. An electronic device according to any of paragraphs 31 to 47, wherein the depletion region has an adjacent Schottky contact or an adjacent pn junction.
49. The depletion region has a Schottky contact or a metal-insulator-semiconductor structure,
(A) a current blocking layer between the substrate and the active layer, the current blocking layer having a current aperture;
(B) further comprising a Schottky contact or a front ohmic contact adjacent to the metal-insulator-semiconductor structure;
The front ohmic contact and the Schottky contact or metal-insulator-semiconductor structure are arranged such that the voltage applied across the front ohmic contact and the Schottky contact regulates the current passing from the front ohmic contact to the back ohmic contact. The electronic device according to any one of paragraphs 31 to 47.
50. The electronic device according to paragraph 49, wherein the current blocking layer comprises silicon dioxide.
51. The electronic device according to paragraph 49, wherein the current blocking layer comprises a gas.
52. The electronic device according to paragraph 51, wherein the gas is air.
53. The electronic device according to paragraph 49, wherein the current blocking layer comprises p-type or semi-insulating Ga _{1 -xy} Al _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1).
54. The electronic device according to any of paragraphs 49-53, further comprising a high electron concentration region under the front side ohmic contact.
55. The electronic device of any of paragraphs 31-47, wherein the depletion region comprises a pn junction and further comprising an additional n-type semiconductor on the pn junction forming a bipolar transistor.
56. A method of making an electronic device, comprising
(A) the supercritical _{ammonia-Ga 1-x1-y1} grown in _{Al x1 In y1 N (0 ≦} x1 ≦ 1,0 ≦ y1 ≦ 1) was sliced from the bulk crystal _{Ga 1-x1-y1} Al Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) on the first side of the substrate of _x1 In _y1 N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) Growing the active layer of Si by vapor phase epitaxy;
(B) forming an ohmic contact on the second side of the substrate;
(C) forming a Schottky contact, a metal-insulator-semiconductor structure, or a p-type semiconductor on the active layer;
Including
(D) the substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(E) the substrate has an electron concentration greater than 10 ¹⁸ cm ⁻³ ,
(F) the active layer has an electron concentration below 10 ¹⁸ cm ⁻³ ,
(G) The active layer has a thickness which exceeds the thickness of the depletion region for any applied voltage within the operating range of the device.
57. The method according to paragraph 56, wherein the electron concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
58. A method of manufacturing an electronic device,
(A) the supercritical _{ammonia-Ga 1-x1-y1} grown in _{Al x1 In y1 N (0 ≦} x1 ≦ 1,0 ≦ y1 ≦ 1) was sliced from the bulk crystal _{Ga 1-x1-y1} Al Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) on the first side of the substrate of _x1 In _y1 N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) Growing the active layer of Si by vapor phase epitaxy;
(B) forming an ohmic contact on the second side of the substrate;
(C) forming a Schottky contact, a metal-insulator-semiconductor structure, or a p-type semiconductor on the active layer;
Including
(D) the substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(E) the substrate has an oxygen concentration of more than 10 ¹⁸ cm ⁻³ ;
(F) the active layer has an oxygen concentration below 10 ¹⁸ cm ⁻³ ,
(G) The active layer has a thickness which exceeds the thickness of the depletion region for any applied voltage within the operating range of the device.
59. The method according to paragraph 58, wherein the oxygen concentration of the active layer is ^less than 10 ¹⁶ cm ⁻³ .
60. Step (a) comprises the growth of the transition layer of _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) between the substrate and the active layer, paragraphs 56-59 The manufacturing method of the electronic device in any one of-.
61. Before the step of growing the active layer
(A) forming a dielectric layer on the first side of the substrate;
(B) forming a hole in the dielectric layer to expose a portion of the first side of the substrate;
A method of manufacturing an electronic device according to any of paragraphs 56 to 60, further comprising a Schottky contact, a metal-insulator-semiconductor structure or a p-type semiconductor is formed on the holes of the dielectric layer.
62. A method of producing an electronic device according to paragraph 61, wherein the dielectric layer comprises silicon dioxide.
63. The electronic device according to paragraph 61 or paragraph 62, wherein the transition layer and / or the active layer is formed using vapor phase epitaxy which selectively deposits the material of the layer in and on the side of the pores of the dielectric layer. How to make it.
64. The method for producing an electronic device according to paragraph 63, wherein the material to be laterally deposited extends to adjacent devices on the substrate such that the active layer forms a continuous film.
65. The method of making an electronic device according to paragraph 63, wherein the material deposited laterally does not extend to adjacent devices on the substrate such that the active layer forms a discontinuous film.
66. The invention according to any of the paragraphs above wherein x1 = x2 = x3 = 0 and y1 = y2 = y3 = 0.

The foregoing description of the preferred embodiments of the present invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the present invention be limited not by this detailed description, but rather by the claims appended hereto.
(References)

The following references are incorporated herein by reference.
[1] R. Dwilinski, R. Doradzinski, J.M. Garczynski, L. Sierzputowski, Y. Kanbara, U.S. Patent No. 6,656,615.
[2] R. Dwilinski, R. Doradzinski, J.M. Garczynski, L. Sierzputowski, Y. Kanbara, U.S. Patent No. 7,132,730.
[3] R. Dwilinski, R. Doradzinski, J.M. Garczynski, L. Sierzputowski, Y. Kanbara, U.S. Patent No. 7,160,388.
[4] K. Fujito, T .; Hashimoto, S. Nakamura, International Patent Application Nos. PCT / US2005 / 024239, WO07008198.
[5] T. Hashimoto, M. Saito, S. Nakamura, International Patent Application No. PCT / US2007 / 008743, WO07117689. See also US Patent Application Serial No. 11 / 784,339, filed US Patent Application No. 20070234946, filed April 6, 2007.
[6] D 'Eyelyn, U.S. Patent No. 7,078,731.

  Each of the above references is incorporated by reference in its entirety as if fully set forth herein, particularly with reference to fabrication methods using fabrication amonothermal methods and methods using these gallium nitride substrates. Be incorporated.

Claims (54)

An epitaxial multilayer wafer for producing electronic devices, the epitaxial multilayer wafer, Ga _1-x1-y1 having (i) a second side opposite to the first side and the first side A group III nitride substrate of Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1), and (ii) Ga _{1-x2-y 2} on the first side of the group III nitride substrate And an active layer of Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1),
(A) The dislocation density of the group III nitride substrate is less than 10 ⁵ cm ⁻² ,
(B) the group III nitride substrate has an electron concentration of more than 10 ¹⁸ cm ⁻³ ;
(C) said group III nitride substrate is made from bulk crystals grown in supercritical ammonia _{Ga 1-x1-y1 Al x1} In y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1) ,
(D) the active layer is an epitaxially deposited layer having an oxygen concentration below 10 ¹⁶ cm ⁻³ ,
(E) the active layer is fabricated after the electronic device is fabricated with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer An epitaxial multilayer wafer, wherein the depletion region formed in the active layer has a sufficient thickness to be outside the group III nitride substrate.   The epitaxial multilayer wafer of claim 1, wherein the thickness of the active layer is greater than 5 microns. A transition layer of Ga _{1 -x 3 -y 3} Al _{x 3} In _{y 3} N (0 ≦ x 3 ≦ 1, 0 ≦ y 3 ≦ 1) between the group III nitride substrate and the active layer; The first side has a crystal lattice that matches the crystal lattice of the first side of the group III nitride substrate, and the second side of the transition layer has a crystal lattice of the first side of the active layer An epitaxial multilayer wafer according to claim 1 or claim 2 having a crystal lattice matched to.   The epitaxial multilayer wafer of claim 3, wherein the transition layer is grown by vapor phase epitaxy.   The epitaxial multilayer wafer according to claim 3 or 4, wherein the transition layer is thick enough to fill a crack formed at an interface between the group III nitride substrate and the transition layer.   The epitaxial multilayer wafer according to any of claims 3 to 5, wherein the depletion region extends into the transition layer.   The epitaxial multilayer wafer according to any one of claims 3 to 5, wherein the active layer is thicker than the depletion region.   The epitaxial multilayer wafer according to any one of claims 3 to 7, wherein the transition layer is doped with an impurity that prevents diffusion of an impurity contained in the group III nitride substrate.   The epitaxial multilayer wafer according to any one of claims 1 to 8, further comprising a current blocking layer between the group III nitride substrate and the active layer. The epitaxial multilayer wafer according to any one of claims 1 to 9, wherein the active layer has a dislocation density below 10 ⁵ cm ^-2 . The III-nitride substrate ^is 10 16 ^cm has a sodium concentration greater than ^-3, the active layer, the containing group III least 100 times less sodium than nitride substrate, any one of claims 1 to 10, The epitaxial multilayer wafer according to claim 1.   The epitaxial multilayer wafer according to any of the preceding claims, wherein said III-nitride substrate is a c-plane with a miscut of more than 0.1 degrees and less than 5 degrees.   An electronic device, comprising the epitaxial multilayer wafer according to any of claims 1 to 12, wherein the first electrode and the second electrode are optional over the operating range of the electronic device. An electronic device, wherein the depletion region is formed outside the group III nitride substrate with respect to an applied voltage. A method of making a multilayer wafer, said method being formed by ammonothermal method and having a second side on the opposite side of the first side Ga ₁ -x _{1 -y 1} Al _{x 1} In _{y 1} N (0 ≦ x 1 On the first side of the substrate of ≦ 1, 0 ≦ y1 ≦ 1), an active layer of Ga _{1−x 2 −y 2} Al _{x 2} In _{y 2} N (0 ≦ x 2 ≦ 1, 0 ≦ y 2 ≦ 1) is vapor phase Epitaxially depositing from the substrate, the active layer comprising an electronic device with a first electrode on the first side of the wafer and a second electrode on the second side of the wafer depletion region formed in the active layer after prepared has a thickness large enough to be outside of the substrate, the substrate has an oxygen concentration greater than 10 ¹⁸ cm ^-3 the gas phase oxygen concentrations below ¹⁰ 16 ^{cm -3} in the active layer An oxygen sufficiently low concentration to provide a method.   15. The method of claim 14, wherein the active layer is deposited to a thickness of at least about 5 microns. Before depositing the active layer epitaxially, while changing the concentration and / or deposition conditions of the _{reactants, Ga 1-x3-y3 Al} x3 In y3 N of (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) The method further includes epitaxially depositing a transition layer, whereby the first surface of the transition layer is aligned with the crystalline lattice of the first side of the substrate during the step of epitaxially depositing the transition layer. The method according to claim 14 or 15, wherein upon completion of the step of epitaxially depositing the transition layer, the second opposite surface of the transition layer is aligned with the crystal lattice on the first side of the active layer.   The transition such that the transition layer breaks during the step of epitaxially depositing the transition layer, and the method fills the cracks in the transition layer so that the second surface of the transition layer does not have a crack. 17. The method of claim 16, further comprising depositing an additional amount of layer.   The method according to claim 16 or 17, wherein the active layer is deposited to a thickness such that the depletion region extends over a portion of the transition layer.   19. The method of claim 18, wherein the depletion region ends before reaching a crack in the transition layer.   20. The method according to any of claims 16-19, wherein the transition layer is doped with an impurity that prevents diffusion of impurities contained in the substrate.   21. A method according to any of claims 14-20, further comprising the step of depositing a current blocking layer between the substrate and the active layer. The active layer has a sodium concentration sufficiently low that the active layer contains at least 100 times less sodium than the substrate, and the substrate contains sodium at a concentration greater than 10 ¹⁶ cm ^−3. The method according to any one of Items 14 to 21.   23. The method of any of claims 14-22, wherein the first side of the substrate is miscut by more than 0.1 degrees and less than 5 degrees with respect to the c-plane.   24. The method of any of claims 14-23, further comprising the step of providing the first electrode and the second electrode. An electronic device, said electronic _{device, Ga 1-x1-y1 Al} x1 In y1 and the substrate N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1), Ga 1 on the first side of the substrate an active layer _{-x2-y2 Al x2 in y2 N} (0 ≦ x2 ≦ 1,0 ≦ y2 ≦ 1), and said first side of said substrate and backside ohmic contact on a second side opposite to A depletion region having a depth in the active layer,
(A) The substrate has a dislocation density below 10 ⁵ cm ^-2 ,
(B) the substrate has an oxygen concentration greater than 10 ¹⁸ cm ^-3 ;
(C) the active layer has an oxygen concentration below 10 ¹⁶ cm ⁻³ ,
(D) The electronic device, wherein the active layer has a thickness that exceeds the depth of the depletion region for any applied voltage within the operating range of the device. Further comprising a transition layer of _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) between the substrate and the active layer, the transition layer by vapor phase epitaxy 26. The electronic device of claim 25, grown. An electronic device, said electronic _{device, Ga 1-x1-y1 Al} x1 In y1 and the substrate N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1), Ga 1 on the first side of the substrate an active layer _{-x2-y2 Al x2 in y2 N} (0 ≦ x2 ≦ 1,0 ≦ y2 ≦ 1), and said first side of said substrate and backside ohmic contact on a second side opposite to A depletion region having a depth in the active layer, and a transition layer of Ga _{1 -x 3 -y 3} Al _{x 3} In _{y 3} N (0 ≦ x 3 ≦ 1, 0 ≦ y 3 ≦ 1),
(A) The substrate has a dislocation density below 10 ⁵ cm ^-2 ,
(B) the substrate has an oxygen concentration or an electron concentration greater than 10 ¹⁸ cm ⁻³ ,
(C) the active layer has an oxygen concentration or an electron concentration less than 10 ¹⁸ cm ⁻³ ,
(D) the active layer and the transition layer have a total thickness above the depth of the depletion region for any applied voltage within the operating range of the device;
(E) The electronic device whose oxygen concentration of the said active layer is ^less than 10 ^{< 16} > cm ^<-3 >. Electron concentration of the active ^layer, below 10 16 ^{cm -3,} an electronic device according to claim 27.   The electronic device according to claim 27 or 28, wherein the active layer is thicker than the depth of the depletion region.   29. The electronic device of claim 27 or 28, wherein the depletion region extends into the transition layer.   The transition layer has an impurity concentration or alloy that changes along the growth direction such that lattice matching is achieved at the interface between the transition layer and the substrate as well as at the interface between the transition layer and the active layer. The electronic device according to any of claims 26 to 30, having a composition.   32. The electronic device of any of claims 26-31, wherein the transition layer is thick enough to fill a crack made at the interface between the substrate and the transition layer.   33. The electronic device of any of claims 26-32, wherein the transition layer is doped with an impurity that prevents diffusion of impurities contained in the substrate. The substrate is made of a wafer made of bulk crystals of Ga _{1-x 1-y 1} Al _{x 1} In _{y 1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) grown in supercritical ammonia. Item 34. The electronic device according to any one of items 25 to 33. The substrate contains a sodium concentration greater than about ¹⁰ 16 ^{cm -3,} the active layer, wherein at least 100-fold less sodium concentration of the substrate, an electronic device according to any one of claims 25 to 34.   36. The electronic device of any of claims 25-35, wherein the active layer is grown by vapor phase epitaxy.   35. The electronic device of claim 34, wherein the wafer is a c-plane wafer with a miscut greater than 0.1 degrees and less than 5 degrees.   38. The electronic device of any of claims 25-37, further comprising a Schottky contact adjacent to the depletion region or a pn junction adjacent to the depletion region. (A) Schottky contact or metal-insulator-semiconductor structure adjacent to the depletion region;
(B) a current blocking layer between the substrate and the active layer, wherein the current blocking layer has a current aperture;
(C) further comprising a front side ohmic contact adjacent to the Schottky contact or the metal-insulator-semiconductor structure;
The front-side ohmic contact and the Schottky contact or the metal-insulator-semiconductor structure regulate the current passing from the front-side ohmic contact to the back-side ohmic contact by a voltage applied across the front-side ohmic contact and the Schottky contact The electronic device according to any one of claims 25 to 37, wherein the electronic device is arranged to   40. The electronic device of claim 39, wherein the current blocking layer comprises silicon dioxide.   40. The electronic device of claim 39, wherein the current blocking layer comprises a gas.   42. The electronic device of claim 41, wherein the gas is air. It said current blocking layer comprises _Ga of the p-type or semi-insulating _{1-x-y Al x In} y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1), an electronic device according to claim 39.   44. The electronic device of any of claims 39-43, further comprising a high electron concentration region under the front side ohmic contact.   38. The electronic device of any of claims 25-37, further comprising a pn junction adjacent the depletion region and an additional n-type semiconductor on the pn junction, thereby forming a bipolar transistor. A method of making an electronic device, comprising
(A) the supercritical _{ammonia-Ga 1-x1-y1} grown in _{Al x1 In y1 N (0 ≦} x1 ≦ 1,0 ≦ y1 ≦ 1) was sliced from the bulk crystal _{Ga 1-x1-y1} Al Ga _{1-x2-y 2} Al _{x 2} In _{y 2} N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1) on the first side of the substrate of _x1 In _y1 N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1) Growing the active layer of Si by vapor phase epitaxy;
(B) forming an ohmic contact on the second side of the substrate;
(C) forming a Schottky contact, a metal-insulator-semiconductor structure, or a p-type semiconductor on the active layer;
(D) the substrate has a dislocation density below 10 ⁵ cm ⁻² ,
(E) the substrate has an oxygen concentration greater than 10 ¹⁸ cm ^-3 ;
(F) the active layer has an oxygen concentration below 10 ¹⁶ cm ⁻³ ,
(G) A method of making an electronic device wherein the active layer has a thickness that exceeds the thickness of the depletion region for any applied voltage within the operating range of the device. Step (a) comprises the growth of the transition layer of _{Ga 1-x3-y3 Al x3} In y3 N (0 ≦ x3 ≦ 1,0 ≦ y3 ≦ 1) between the substrate and the active layer, claim 46. A method of producing the electronic device according to 46. Before the step of growing the active layer
(A) forming a dielectric layer on the first side of the substrate;
(B) forming a hole in the dielectric layer to expose a portion of the first side of the substrate;
48. A method of making an electronic device according to claim 46 or 47, wherein the Schottky contact, metal-insulator-semiconductor structure or p-type semiconductor is formed on the hole of the dielectric layer.   49. The method of making an electronic device of claim 48, wherein the dielectric layer comprises silicon dioxide.   The transition layer and / or the active layer are formed using vapor phase epitaxy which selectively deposits the material of the transition layer and / or the active layer in the pores of the dielectric layer and behind it. 50. A method of making an electronic device according to claim 48 or 49.   51. A method of making an electronic device according to claim 50, wherein the laterally deposited material extends to adjacent devices on the substrate such that the active layer forms a continuous film.   51. A method of making an electronic device according to claim 50, wherein the material deposited laterally does not extend to adjacent devices on the substrate such that the active layer forms a discontinuous film. The epitaxial multilayer wafer according to any of claims 3 to 8 , wherein x1 = x2 = x3 = 0 and y1 = y2 = y3 = 0. 34. The electronic device of any of claims 26-33, wherein x1 = x2 = x3 = 0 and y1 = y2 = y3 = 0.

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