JP6260788B2 - Error correction code control method and apparatus in data communication system - Google Patents

Description

  The present invention relates to a data communication system, and more particularly to an error correction code control method and apparatus.

  In data communication via a network such as the Internet and data reading from a storage medium such as a CD-ROM, there is always a possibility that noise affects data being transferred and causes a data error. For this reason, even if a data error occurs, an error correction code that can correct the error is widely used. Frequently used error correction codes include simplest single error correction codes such as Hamming codes, and cyclic suitable for implementation such as BCH (Bose-Chaudhuri-Hocquenghem) codes and RS (Reed-Solomon) codes. Codes, turbo codes, codes such as LDPC (Low Density Parity Check), but codes with high signal processing load are available. Among them, LDPC is a code having characteristics approaching Shannon's theoretical limit, and has attracted attention in recent years.

  The error correction code is used in the form of forward error correction (FEC) that adds redundant data to the message and transmits the entire codeword, and the redundant data is shared again between the sender and receiver based on the transmitted message. Thus, there is a method for correcting an error in a message (hereinafter referred to as a sharing method). In FEC, before transmitting a message, redundant data is calculated by an encoder and transmitted to a receiver together with the message, and an error in the received data is detected / corrected by a receiver through a decoder. In this way, since FEC does not require data retransmission, high throughput can be obtained, and it is widely used in wireless communication and optical communication. On the other hand, the sharing method is divided into means for sharing data including errors between transmitters and receivers, and means for calculating parity information from the shared data and comparing the transceivers with each other to detect / correct errors. It is used for quantum cryptography key distribution technology and Distributed Source Coding.

  In a general error correction code, M bits of redundant data are added to a k-bit message to form an n (n = k + M) -bit code word. Depending on the number of errors present in a constant k-bit message, the required M-bit redundant data becomes large. Actually, the code length of the n-bit code word is fixed, and the ratio between the message k bits and the redundant data M bits is determined according to the error rate of the code word before error correction. Increasing the ratio of redundant data makes it possible to correct more bit errors, but decreases the data transfer efficiency. In order to correct a codeword with a bit error rate p on a binary symmetric channel, a redundancy greater than Shannon's binary entropy (H (p) =-plog2p- (1-p) log2 (1-p)) It is necessary to secure data, and the higher the bit error rate, the more redundant data is required. Therefore, the coding rate of the error correction code to be used is determined from the target bit error rate.

  Thus, the upper limit of the bit error rate that can be corrected is determined for the error correction code, and this upper limit is determined by the type of code and the coding rate. As an example, FIG. 1 shows a change in error correction performance of an LDPC code with respect to an error rate.

  The horizontal axis of FIG. 1 shows the error rate of the codeword to be subjected to error correction, and the vertical axis shows the error correction efficiency f (p) given by the following equation.

f (p) = {(1-coding rate) / error correction success probability} / H (p)
As the error correction efficiency f (p) is closer to 1.0, the error correction efficiency closer to the Shannon limit is obtained. For example, in Non-Patent Document 1, the error correction efficiency f is represented by a code having a code length of 1 M bits. A characteristic of (p) <1.1 has been reported.

  FIG. 1 shows the result of simulating error correction performance of three code lengths of 8 k bits, 16 k bits, and 130 k bits when the coding rates are 0.70 and 0.75. In the case of an encoding rate of 0.75 and a code length of 16k bits, the error correction efficiency f (p) approaches 1.0 as the error rate increases in an area where the error rate is 3.3% or less. This is because the numerator value of f (p) is constant, whereas the denominator value is increased. On the other hand, when the error rate increases to 3.5%, the error correction efficiency deteriorates rapidly. This is because the number of errors exceeding the error correctable by this code is present in the code word, so that the error correction success probability is lowered and the numerator of f (p) is increased.

  On the other hand, when the code length is set to 130 k bits even at the same coding rate of 0.75, the error correction efficiency f (p) continues to decrease smoothly to an error rate of 3.5%. This is because, by taking a long code length, the error rate fluctuation of the code word is reduced, and the probability of exceeding the number of errors that can be corrected is reduced. The characteristic of the coding rate of 0.70 in the region where the error rate is 3.6% or more shows the same tendency. Therefore, in order to obtain an error correction code with good characteristics, it is necessary to lengthen the code length and use it around the upper limit of the correctable error rate.

D. Elkouss, A. Leverrier, R. Alleaume and JJ Boutros, “Efficient reconciliation protocol for discrete-variable quantum key distribution,” (available at http://arxiv.org/PS_cache/arxiv/pdf/0901/0901.2140v1. pdf), Jan. 2009.

  However, the fact that the correction efficiency of a specific error correction code is improved around the upper limit of the correctable error rate means that the range of error rates that can be used efficiently is narrow. Therefore, if error rate variation and fluctuation range are large, efficient error correction cannot be performed. Examples of communication systems with large fluctuations in error rate include wireless communication with large changes in communication path conditions, and PLC (Power Line Communication) that is affected by impedance fluctuations of electrical equipment connected to a power line. Further, examples of the communication system having a large variation in error rate include a passive optical network (PON) having different transmission path conditions for each user and a communication system that processes communication data of a plurality of channels with a single error correction circuit.

  In order to support such a communication system with a wide range of error rate variations and fluctuations, it is sufficient to implement an error correction code corresponding to the worst error rate, but this degrades efficiency when the error rate is low. There is a problem of doing. As another method, it is also possible to perform error correction corresponding to a wide range of error rates by mounting a plurality of error correction circuits. However, mounting a plurality of circuits causes an increase in circuit size and power consumption.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an error correction code control method and apparatus that can cope with a communication system in which error rate variation or fluctuation is large with a single error correction circuit.

An error correction control apparatus according to the present invention is an error correction code control apparatus in a data communication system in which a predetermined error correction code is implemented in an encoder of a transmission side communication device and a decoder of a reception side communication device, An error rate estimation means for estimating a first error rate using a known pattern shared in advance between the transmission side communication device and the reception side communication device from a reception codeword received from the transmission side communication device; Using the first error rate and a second error rate estimated based on error correction when the decoder decodes the received codeword, the known pattern of the input data of the encoder A coding rate determination for determining a coding rate of the predetermined error correction code with reference to the first error rate when the ratio is higher than at least one threshold and with reference to the second error rate when the rate is low Means. .

An error correction control method according to the present invention is an error correction code control method in a data communication system in which a predetermined error correction code is implemented in an encoder of a transmission side communication device and a decoder of a reception side communication device, A first error rate is estimated from a received codeword received from the transmitting communication device using a known pattern shared in advance between the transmitting communication device and the receiving communication device, and the first error is estimated. And a second error rate estimated based on error correction when the decoder decodes the received codeword, and the ratio of the known pattern in the input data of the encoder is at least one The coding rate of the predetermined error correction code is determined by referring to the first error rate when it is higher than the threshold value and referring to the second error rate when it is low .

  According to the present invention, the range of error rates that can be corrected by one error correction circuit is expanded, and it becomes possible to cope with communication systems in which variations or fluctuations in error rates are large.

FIG. 1 is a graph showing an example of characteristics of an LDPC error correction code. FIG. 2 is a block diagram showing a data communication system according to the first embodiment of the present invention. FIG. 3 is a graph showing the characteristics of the error correction code used in the first embodiment. FIG. 4A is a functional block diagram for explaining the error correction code control apparatus according to the first embodiment, and FIG. 4B is a flowchart showing a dummy bit control operation as an example. FIG. 5 is an explanatory diagram showing a dummy bit insertion method in the first embodiment. FIG. 6A is a schematic diagram illustrating an example of framing of a client signal in the first embodiment, and FIG. 6B is a schematic diagram illustrating another example of framing. FIG. 7 is a graph illustrating the variation of the error characteristics of the communication path in the first embodiment. FIG. 8 is a block diagram showing a communication system according to the second embodiment of the present invention. FIG. 9 is a graph showing a change in the ratio of the fixed pattern inserted into the message when the communication path is switched in the second embodiment. FIG. 10 is a flowchart showing the operation of the third embodiment of the present invention. FIG. 11 is a block diagram showing a communication system according to the fourth embodiment of the present invention. FIG. 12A is a sequence diagram showing a normal Discovery process when a new subscriber is added to the PON system according to the fourth embodiment of the present invention, and FIG. 12B shows an error of the present invention in the Discovery process. It is a sequence diagram at the time of additionally applying the correction code control method.

  According to an embodiment of the present invention, in a communication system in which a predetermined error correction code is implemented, based on a first error rate based on a predetermined pattern embedded in a codeword and the number of error corrections at the time of error correction decoding The coding rate of the error correction code is determined using the second error rate. As a result, the range of error rates that can be corrected by one error correction circuit can be expanded, and it is possible to cope with communication systems in which variations or fluctuations in error rates are large. Hereinafter, embodiments of the present invention will be described in detail.

1. First Embodiment A communication system to which this embodiment is applied is in a state in which a sender and a receiver are connected 1: 1, and the error correction code of the present invention is used to cope with dynamic fluctuations in channel characteristics. Use control methods. Using LDPC as the error correction code, as described later, a part of the message is changed to a fixed pattern according to the error rate, and the channel is estimated based on the error rate of the fixed pattern and the number of corrected errors. I do.

1.1) System Configuration As shown in FIG. 2, in the data communication system according to the present embodiment, the transmitter 11 is connected to the receiver 13 through the communication path 12 to transmit messages and redundant data to the receiver 13. Error rate information is transmitted to and received from the receiver 13. The communication path 12 may be wired / wireless.

  The transmitter 11 includes a MAC (Media Access Control) block 111 that generates a message, an error correction code controller 112 that performs dummy bit insertion control, an encoder 113, and a transmission interface 114.

The receiver 13 receives the message from the MAC block 131 that receives the message, the error correction code controller 132 that performs dummy bit deletion control, the decoder 133 that performs error correction of the received message, and the reception that receives the code word from the transmitter 11. And a fixed pattern error rate calculator 136 and an error rate discriminator 135. Decoder 133 outputs error rate ER _COR based on the number of errors corrected when decoding the codeword input from reception interface 134 to error discriminator 135. Fixed pattern error rate calculator 136 extracts only the dummy bits from the code word which is inputted from the receiving interface 134 to calculate the dummy bit error rate ER _D outputs to the error rate discriminator 135. Error rate discriminator 135 discriminates the error rate information ER _EST by using the dummy bit error rate ER _D from the error rate ER _COR a fixed pattern error rate calculator 136 from the decoder 133, the sender and receiver Error correction code controllers 112 and 132 respectively

  Note that the error correction code controller 112 and the encoder 113 of the transmitter 11 can realize an equivalent function by executing a program on a program control processor such as a CPU (Central Processing Unit) of the transmitter 11. . Similarly, the decoder 133, the fixed pattern error rate calculator 136, the error rate discriminator 135, and the error correction code controller 132 of the receiver 13 are also programmed on a program control processor such as a CPU (Central Processing Unit) of the receiver 13. By executing this, an equivalent function can be realized. Further, the function of the transmitter 11 and the function of the receiver 13 may be provided in one communication device.

1.2) System Operation In the transmitter 11 in this embodiment, the MAC block 111 outputs a transmission message to the error correction code controller 112. The error correction code controller 112 determines the coding rate of the error correction code based on the error rate information ER _EST sent from the error rate discriminator 135 on the receiving side, and receives the receiver in advance as a predetermined amount of dummy bits. The fixed pattern shared with 12 is inserted into the transmission message. The encoder 113 receives the message with the dummy bits inserted, adds parity information and outputs the code word to the transmission interface 114, and the transmission interface 114 transmits the code word as a signal to the communication path 12.

In the receiver 13, the reception interface 134 receives the signal transmitted from the transmission interface 114 on the transmission side, and outputs the received codeword to the fixed pattern error rate calculator 136 and the decoder 133, respectively. Here, the transmission codeword transmitted from the transmission interface 114 may be received by the receiver 13 due to a partial error in the communication path 12, and this received codeword is referred to as a reception codeword. To. Fixed pattern error rate calculator 136, a dummy bit is extracted from the received codeword, it estimates the dummy bit error rate ER _D by matching a fixed pattern that is shared between the transmitter 11 in advance Output to the error rate discriminator 135. Decoder 133 performs error correction on the received codeword, estimates error rate ER _COR based on the number of corrected errors, and outputs the error rate to error rate discriminator 135. Further, the decoder 133 outputs the error-corrected message with the dummy bits inserted to the error correction code controller 132. Error correcting code controller 132, after the coding rate determined based on the error rate information ER _EST notified from the error rate discriminator 135, and deletes the dummy bits from the data input from the decoder 133, MAC messages Output to block 131.

Error rate discriminator 135, reference to determine the error rate ER _EST codeword both error rate ER _COR inputted from the dummy bit error rate ER _D and decoder 133 input from the fixed pattern error rate calculator 136 The error correction code controllers 112 and 132 on the transmission side and the reception side are notified respectively. That is, the error rate discriminator 135 selects the most probable error rate from a plurality of estimated error rates while referring to the implemented error correction code, and notifies the error correction code controllers 112 and 132 of the error rate.

  Hereinafter, it is assumed that LDPC having a code length of 1 M bits and a coding rate of 0.75 is mounted on the encoder 113 and the decoder 133 in the present embodiment. For example, it is assumed that the degree distribution of the LDPC parity check matrix follows the distribution as shown in Non-Patent Document 1 and has the error correction performance shown in FIG. That is, as shown in FIG. 3, in the region where the error rate is lower than 3.6%, the error correction efficiency f (p) approaches 1.0 as the error rate becomes higher, and the error rate exceeds 3.6%. The number of cases where error correction cannot be completed increases and the correction efficiency f (p) deteriorates.

1.3) Dummy bit insertion control The dummy bit insertion control will be described in detail with reference to FIG. However, the error correction code controller 22 shown in FIG. 4A corresponds to the error correction code controller 112 on the transmission side in FIG. The error correction code controller 132 on the reception side generates a message M by performing a dummy bit deletion operation opposite to the dummy bit insertion of the error correction code controller 22.

  The amount of dummy bits to be inserted is determined from the performance of the installed error correction code and the estimated error rate. Specifically, when the code length is 1 Mbit and the error rate is degraded to 4.0%, a dummy bit of 100 kbit is added. In the error correction code having the performance shown in FIG. 3, an error of about 37748 bits can be corrected in 1 Mbit. However, if the error rate deteriorates to 4.0%, the number of correctable errors is exceeded. Fill with. As a result, the error that must be corrected is about 37724 bits in the remaining 921 kbits, and falls within the range of correctable errors. Furthermore, as shown below, the dummy bit to be inserted can be reduced by devising the position where the dummy bit is inserted.

As shown in FIG. 4A, the error correction code controller 22 includes a switching determination unit 23 and a dummy bit insertion unit 24 that perform dummy bit insertion control at a predetermined bit position. When the error rate ER _EST estimated by the receiving-side error rate discriminator 135 becomes higher than a predetermined value, the switching determination unit 23 outputs the message M read from the memory 21 to the dummy bit insertion unit 24. The dummy bit insertion unit 24 generates a message M 1 by inserting a dummy bit at a bit position where the error correction effect is lower due to the code characteristics of the encoder 25, and outputs the message M 1 to the encoder 25. If the error rate ER _EST is equal to or _smaller than the predetermined value, the switching determination unit 23 outputs the message M as it is to the encoder 25 as the message M1. As will be described in detail later, when the error rate ER _EST increases, it is possible to keep the number of errors within the correctable range by inserting dummy bits at bit positions where the error correction effect is low. The range of error rates that can be corrected is expanded.

  When LDPC codes are implemented in the encoder 113 and the decoder 133, the dummy bit insertion unit 24 inserts dummy bits into bit positions where the column weight value in the LDPC check matrix H is smaller than a predetermined value. The dummy bit insertion control operation of the error correction code controller 22 is as follows.

4B, the switching determination unit 23 determines whether or not the error rate ER _EST estimated by the error rate discriminator 135 is higher than a predetermined value (step S201). The predetermined value that is a criterion for determining whether or not to insert a dummy bit can be set to the upper limit of the error rate that can be corrected by the error correction code. If the estimated error rate ER _EST is higher than the predetermined value (YES in step S201), the error correction code controller 22 reads the predetermined amount A0 of information M0 from the transmission message M stored in the memory 21, and makes a switching determination. The unit 23 gives this information M0 to the dummy bit insertion unit 24 (step S202). The dummy bit insertion unit 24 generates a predetermined amount A1 of information M1 by inserting a dummy bit at a bit position of column weight = 2 in the LDPC check matrix H and outputs the information M1 to the encoder 25 (step S203). If the estimated error rate ER _EST is less than or equal to a predetermined value (NO in step S201), the error correction code controller 22 reads a predetermined amount A1 of information from the transmission message M stored in the memory 21 and determines whether to switch. The unit 23 outputs this information as it is to the encoder 25 (step S204).

  FIG. 5A shows a part of the LDPC parity check matrix implemented in this embodiment. The weight of the first column is 5, the weight of the second column is 4, the weight of the third column is 6, the weight of the fourth column is 2, and the weight of the fifth column is 3. When the parity check is performed, the error correction effect of the message bit corresponding to the column having the weight of 2 is reduced, so that when the message M1 is generated from the message M0, as shown in FIG. A fixed value “0” is inserted into the fourth bit, which is 2, and the bit numbers are sequentially shifted thereafter. Similarly thereafter, a fixed value “0” is inserted into a message bit position corresponding to a column having a column weight of 2, and the bit numbers are sequentially shifted thereafter. Here, an example in which a fixed value “0” is inserted as a dummy bit is shown, but any pattern may be used as long as it is shared between the transmitter and the receiver.

  When the error rate increases in this way, the number of errors in the codeword is corrected by performing parity calculation using the message M1 in which a dummy bit having a fixed value is assigned to the bit position where the error correction effect is low. Thus, the error correction range can be expanded with one encoder 25 (the encoder 113 in FIG. 2).

  FIG. 6 shows how the communication frame changes due to the insertion of dummy bits. FIG. 6A shows a state in which a client signal is accommodated in a general OTU (Optical-channel Transport Unit) frame. The client signal is sequentially attached with control information (OH), framed into an OPU (Optical-channel Payload Unit) and an ODU (Optical-channel Data Unit), and FEC redundant data is attached to form an OTU frame.

  When dummy bits are inserted, the client signal is divided according to the error rate of the communication channel, and the divided signals are framed together with the dummy bits, as shown in FIG. 6B. Become.

1.4) Estimated error rate discrimination According to the dummy bit insertion control described above, the rate of dummy bits in the codeword increases as the error rate increases, and the rate of dummy bits decreases as the error rate decreases. Therefore, in the example of the LDPC code having the error rate characteristics as shown in FIG. 3, if the error rate is sufficiently smaller than 3.6%, the proportion of dummy bits is small, and the error is estimated from the errors existing in the dummy bits. reliability of ER _D is an error rate is low. On the contrary, in the error rate region of 3.6% or more, the reliability of the error rate ER _COR estimated by the number of errors at the time of error correction becomes low. Therefore, if the error rate is smaller than 3.6%, the error rate discriminator 135 selects an ER _COR value having a relatively high reliability as the ER _EST , and the error rate discriminator 135 is reliable in the error rate region of 3.6% or more. the value of the relatively high ER _D is selected as _{ER EST.} The ER _EST thus determined is notified to the error correction code controllers 112 and 132. In other words, the error rate discriminator 135 selects the most probable error rate from among a plurality of estimated error rates while referring to the implemented error correction code, and transmits and corrects the error correction code controller 112 on the transmission side and the reception side. And 132 are notified respectively. Therefore, the error correction code controllers 112 and 132 can perform error correction code control using the most reliable error rate.

Hereinafter, an example of the error rate switching operation when the channel characteristics fluctuate will be described with reference to FIG. It is assumed that the error rate switching threshold ER _TH selected by the error rate discriminator 135 is 3.6%.

As shown in FIG. 7, the error rate characteristic of the communication channel, which was approximately 3.4% from time t0, gradually increases to about 3.7% from time t0 to t1, and from time t2 to t3. Let us consider a case where the value decreases again to 3.4%. Since the error rate is lower than ER _{TH in} the time domain before time t0, the error rate discriminator 135 selects ER _COR as ER _EST . The error rate starts to deteriorate at time t0, exceeds ER _TH at t4, and thereafter, error rate discriminator 135 selects ER _D as ER _EST until it falls below ER _TH again at time t5. After time t5, the error rate discriminator 135 selects ER _COR again as ER _EST . Even when the channel characteristics fluctuate in this way, the error rate of the received codeword can be accurately monitored over a wide range by switching the error rate calculation method, and depending on the monitored error rate. Thus, the coding rate can be determined.

Although the error rate switching threshold _ERTH is 3.6%, it may be about 3.5% in order to secure a margin. In addition, the switching threshold when the error rate increases and the switching threshold when the error rate decreases may be different values, and hysteresis can be provided to suppress the influence of fluctuation of the estimated error rate. Further, a method may be adopted in which the selection error rate is changed when the error rate threshold is continuously exceeded (or falls below) a plurality of times.

1.5) Effects According to the first embodiment of the present invention described above, the following effects can be obtained.

  The first effect is that efficient error correction can be performed without mounting a plurality of error correction circuits. The reason is that the error rate of the received codeword can be accurately monitored over a wide range by switching between a plurality of error rate calculation methods, and thus it is possible to continue to set the coding rate according to the error rate. Because you can. If the error correction code control as in this embodiment is not used, it is necessary to implement a code corresponding to the highest error rate in order to support a wide range of error rates with one error correction circuit, and low error For the rate data, the performance becomes excessive and the transmission efficiency is lowered.

  The second effect is that the transmission efficiency is increased because the number of dummy bits to be inserted can be reduced. The reason is that by assigning a dummy bit to a bit having a low error correction effect, a bit position that is likely to be erroneous when the error rate is high can be preferentially excluded.

2. Second Embodiment In the first embodiment described above, the coding rate control is described in which the transmitter and the receiver are connected one-to-one on the communication path, and the error rate varies due to the characteristics variation of the communication path. The invention is not limited to this. Hereinafter, a case where the present invention is applied to a network in which a transmission destination is switched will be described as a second embodiment of the present invention.

2.1) System Configuration As shown in FIG. 8, in the communication system according to the present embodiment, the transmitter 61 is connected to receivers 63 and 64 through communication paths 621 to 623 and a switch 62. The communication paths 621 to 623 may be wired / wireless.

  The transmitter 61 includes a MAC block 611 that generates a message, an error correction code controller 612 that performs dummy bit insertion control, an encoder 613, and a transmission interface 614.

The receivers 63 and 64 include MAC blocks 631 and 641 for receiving messages, error correction code controllers 632 and 642 for performing dummy bit deletion control, decoders 633 and 643 for performing error correction of received messages, and a transmitter 11 have receiving interfaces 634 and 644 for receiving codewords, respectively, and further has fixed pattern error rate calculators 636 and 646 and error rate discriminators 635 and 645, respectively. Decoders 633 and 643 output error rates ER _COR based on the number of errors corrected when decoding codewords input from reception interfaces 634 and 644, respectively, to error discriminators 635 and 645, respectively. Fixed pattern error rate calculator 636 and 646 are respectively output to the reception interface 634 and 644 extract only the dummy bits from the codeword input respectively from the error-rate discriminator 635 and 645 to calculate the dummy bit error rate ER _D and . Error rate discriminators 635 and 645 discriminate error rate information ER _EST using error rate ER _COR from decoders 633 and 643 and dummy bit error rate ER _D from fixed pattern error rate calculators 636 and 646, respectively. Then, the error correction code controller 612 on the transmission side and the error correction code controllers 632 and 642 on the reception side are notified respectively.

2.2) System operation It is assumed that the transmitter 61 and the receiver 63 perform communication while performing the error correction code control according to the first embodiment described above. In this case, the transmitter 61 and the receiver 63 are in a state of being connected through the communication paths 621 and 623 by the switch 62. If the error rate of the communication channel is about 3.4%, dummy bit insertion is minimized, so that the error rate discriminator 635 selects the ER _COR from the decoder 633 as described above. The error rate is monitored. In this state, the case where the switch 62 switches the path and the transmitter 61 and the receiver 64 start communication will be described.

As shown in FIG. 9, it is assumed that the switch 62 receives a path switching request at time t0, and the transmitter 61 and the receiver 64 start communication. Immediately after the path is switched, the transmitter 61 and the receiver 64 do not know the channel characteristics, so that the most suitable coding rate cannot be selected. Therefore, a fixed pattern is inserted as a dummy bit at a sufficient rate immediately after the path switching. Thus the error rate discriminator 645 to estimate the channel state by selecting the ER _D from fixed pattern error rate calculator 646. Here, the proportion of dummy bits in the code word is 50%. If the error rate estimated with this dummy bit ratio being high is 4.0%, the error correction code controller 612 of the transmitter 61 and the error correction code controller 642 of the receiver 64 are message messages from time t1. The amount of dummy bits to be inserted is 103 kbit, and the encoder 613 and the decoder 614 handle a 1 Mbit code word. Thereafter, communication is performed between the transmitter 61 and the receiver 64 while performing error correction code control based on the first embodiment described above.

2.3) Effect According to the present embodiment, it is not necessary to provide a time zone dedicated to the training mode in order to estimate the state of the communication path when the communication path is switched, and the communication efficiency can be improved. The reason is that immediately after the path is switched, the proportion of dummy bits is increased to estimate the communication path state, but communication can still be continued with message bits other than the dummy bits.

3. Third Embodiment Hereinafter, a third embodiment of the present invention will be described in detail with reference to FIG. The communication system to which the present embodiment is applied is implemented in order to cope with dynamic fluctuations in communication path characteristics by performing communication between the sender and the receiver in the same connection state as in the first embodiment (see FIG. 2). A form of error correction code control method is used. Use LDPC as an error correction code, and determine which of a plurality of implemented error rate calculation methods is used by referring to the ratio of the fixed pattern inserted in the message to the entire message, as will be described later. Shall.

  As shown in FIG. 2, the sender 11 and the receiver 13 are connected via the communication path 12, and the dummy bit amount to be inserted into the message is controlled following the state change of the communication path. To do.

Here, the error rate discriminator 135 refers to the ratio of the dummy bits inserted into the message, and the ER _D sent from the fixed pattern error rate calculator 136 and the ER _COR sent from the decoder 133 Decide which one to choose.

In FIG. 10, the error rate discriminator 135 calculates the ratio R of dummy bits in the message (step S701), and determines whether R is higher or lower than a predetermined threshold (step S702). If R is greater than a predetermined threshold value employs the error rate ER _D of the dummy bits as _{ER EST} (step S703), if it is lower employing the error rate _{ER COR} calculated from the number of error corrections as _{ER EST} (step S705 ). Further, the ratio of dummy bits in the message is set again based on the estimated error rate ER _EST (step S704). The predetermined threshold at this time may be set to a value with which the accuracy of dummy bit error rate calculation is sufficiently high, for example. In the case of a code length of 1 Mbit, if the ratio of dummy bits is 5%, a dummy bit of 50 kbits can be secured in the code word. If the error rate is 3.6%, about 1900 errors are included in the dummy bits. It exists and can secure sufficient accuracy for error rate estimation. That is, in this case, 5% is adopted as the predetermined threshold.

  According to this embodiment, the same effect as the first embodiment can be obtained.

4). Fourth Embodiment In the second embodiment described above, dummy bits are inserted at a sufficient rate immediately after path switching because the sender / receiver does not know the status of the new communication path when the communication path is switched. It is not limited to this. Hereinafter, a case where the present invention is applied to a communication system in which a plurality of subscriber devices are connected to a station side device will be described as a third embodiment of the present invention. As such a system, there is a PON system in which a plurality of ONUs (optical network units) are connected to one OLT (optical line terminal).

4.1) System Configuration In the PON system, the communication path characteristics between the station side device and each subscriber device may differ greatly. Even in such a case, according to the present embodiment, one code A good error correction characteristic can be maintained over a wide range of error rates by using a device.

  As shown in FIG. 11, in the communication system according to the present embodiment, a station side device 81 is connected to a plurality of subscriber devices 83 and 84 through a communication path 82 having a branching section. The station apparatus 81 includes an error correction code controller 811 that performs dummy bit insertion control on the transmission message described in the first embodiment, an encoder / decoder 812, a transmission interface 813, an error rate estimator 814, and an error rate. An information / monitor method storage unit 815 is provided. Also in the present embodiment, as in the second embodiment described above, the station side device 81 transmits the entire codeword in which redundant data (parity information) is added to the message from the transmission interface 813.

  The error rate estimator 814 has an error rate estimation function as described above. The error rate information / monitoring method storage unit 815 is a coding rate / error rate monitoring method setting table, and coding rate information and error rate monitor necessary for communication with each subscriber unit corresponding to the estimated error rate. The method is stored in advance. The coding rate / error rate monitoring method setting information table may be updated by measuring the transmission loss by the installer when starting the service, or used for error rate information generated in past communications or past communications. The station apparatus may update the coding rate / monitoring method setting information based on the error rate monitoring method. By referring to the coding rate / monitoring method setting table, it is possible to set the coding rate and the error rate monitoring method when communicating in the past using the error rate when communicating in the past. Subscriber apparatuses 83 and 84 are error correction code controllers 831 and 841 that perform dummy bit deletion control, encoder / decoders 832 and 842 that perform transmission data encoding and error correction of received messages, and station side apparatus 81. Communication interfaces 833 and 843 for receiving codewords are provided.

The operations of the error correction code controller 811 and the error correction code controllers 831 and 841 are as described in the first and second embodiments. Since the error rate information / monitoring method storage unit 815 stores the coding rate information and the error rate monitoring method necessary for communication with each subscriber unit, the communication partner can be set as in the example of the second embodiment. Immediately after the switching, it is not necessary to insert a sufficient proportion of dummy bits, and the coding rate and the monitoring method are determined based on the information stored in the error rate information / monitoring method storage unit 815. In this embodiment, a Reed-Solomon (255, 239) code is used as an error correction code. According to the information in the error rate information / monitor method storage unit 815 illustrated in FIG. 10, since the subscribers # 2 and # 3 have small transmission loss and do not need to insert dummy bits, the coding rate is set to 0.937. Then, the error rate ER _COR calculated from the number of error corrections is used for the error rate monitor. On the other hand, the subscriber # 1 has a large transmission loss and needs to insert dummy bits, the error correction code controllers 811 and 831 reduce the coding rate to 0.901, and the error rate discriminator 834 The rate ER _D is notified to the error correction code controllers 811 and 831 as the estimated error rate ER _EST . However, the error correction code controllers 831 and 841 in the subscriber units 83 and 84 are supplied from the encoders / decoders 832 and 842 when dummy bits are not inserted in accordance with the coding rate information from the station side device 81. The message is output as it is, and when the dummy bit is inserted, the dummy bit is deleted from the message from the encoder / decoder 832 or 842 and output.

4.2) Application to channel estimation when introducing a new subscriber unit In a PON system, a plurality of subscriber units are connected to one station side unit. In GE-PON (Gigabit Ethernet-PON), the maximum number of subscriber units is 32 units are connected. When a new user joins one PON system, the Discovery process works to measure the communication path distance and synchronize the time between the station side device and the subscriber device. A normal Discovery process and a Discovery process to which the present invention has been added will be described with reference to FIG.

a) Normal Discovery Sequence As shown in FIG. 12A, in the normal Discovery process, first, Discovery_Gate is transmitted from the OLT 1103 to the ONU 1101 (step S2101), and the local time T1 of the OLT 1103 and the like are notified to the ONU 1101. Subsequently, the ONU 1101 adjusts the time to T1, then transmits Register_Request to the OLT 1103, and notifies the ONU 1101 transmission time T2 and a registration request to the OLT (step S2102). The OLT 1103 measures the distance between the time T3 at which Register_Request is received and the ONU 1101 from the above T1 and T2, and then notifies the LLID (Logical Link Identifier) and the uplink transmission designated time (steps S2103 and S2104). Registration_ACK (step S2105), the registration is completed (step S2106).

b) Discovery sequence to which this embodiment is applied FIG. 12B shows a sequence when the error correction code control method according to this embodiment is applied when a new ONU is introduced. The ONU 1101 and the ONU 1103 set the dummy bit ratio to a high value in advance, and start the Discovery process (Steps S3101 and S3102). In this way, the Discovery process can be performed without error regardless of the communication path state. Then it runs the same process as FIG. 11 (A), the receives a Discovery_Gate (S2101), ONU1101 computes a dummy bit error rate ER _D of the downlink signal (step S3103), the T2 in Register_Request (S2102) Additionally informing the error rate ER _D of the downstream signal. When receiving the in OLT1103 Register_Request (S2102), calculates the dummy bit error rate ER _D of the uplink signal (step S3104), informs the error rate ER _D of the uplink signal in addition to notifying the LLID in Register (S2103). After the completion of the discovery process, the ratio of dummy bits is set low (steps S3105 and S3106), and the registration is completed (S2106).

  In addition, in order to secure a communication band for a user whose communication path state is poor and the coding rate must be set low, it is possible to extend the communication time of the user in DBA (Dynamic Bandwidth Allocation).

4.3) Effect According to the present embodiment, even when the communication path is switched, there is no need to estimate a channel characteristic by inserting a sufficient proportion of dummy bits as in the example of the second embodiment. Communication speed degradation can be avoided.

5. Additional Notes Part or all of the above-described embodiments may be described as the following additional notes, but are not limited thereto.

(Appendix 1)
An error correction code control apparatus in a data communication system in which a predetermined error correction code is implemented in an encoder of a transmission side communication device and a decoder of a reception side communication device,
Error rate estimating means for estimating a first error rate from a received codeword received from the transmitting communication device;
Using the first error rate and a second error rate estimated based on error correction when the decoder decodes the received codeword, and based on characteristics of the predetermined error correction code Coding rate determining means for determining a coding rate of the predetermined error correction code;
An error correction control device comprising:
(Appendix 2)
The coding rate determining means has at least one error rate threshold, and when the first error rate exceeds the error rate threshold, the coding rate is changed to be low, and the second error rate is set. The error correction code control apparatus according to appendix 1, wherein the coding rate is changed to be higher when the error rate becomes equal to or less than the error rate threshold.
(Appendix 3)
The appendix 1 or 2 is characterized in that the error rate estimation means estimates the first error rate using a known pattern shared in advance between the transmitting communication device and the receiving communication device. The error correction code control device described.
(Appendix 4)
The error correction code control apparatus according to appendix 3, wherein the determined coding rate is realized by changing a ratio of the known pattern in input data of the encoder.
(Appendix 5)
The coding rate determining means has at least one threshold for the ratio of the known pattern, the first error rate is higher when the ratio of the known pattern is higher than the threshold, and the second is when the ratio is lower. The error correction code control apparatus according to appendix 3 or 4, wherein the coding rate is set with reference to the error rate.
(Appendix 6)
An error correction code control method in a data communication system in which the encoder of the transmission side communication device and the decoder of the reception side communication device are mounted with a predetermined error correction code,
Estimating a first error rate from a received codeword received from the transmitting communication device;
Using the first error rate and a second error rate estimated based on error correction when the decoder decodes the received codeword, and based on characteristics of the predetermined error correction code Determining a coding rate of the predetermined error correction code;
An error correction control method characterized by the above.
(Appendix 7)
When the first error rate exceeds at least one error rate threshold, the coding rate is changed to be low, and when the second error rate is less than or equal to the error rate threshold, the coding rate is changed to be high. The error correction code control method according to appendix 6, characterized in that:
(Appendix 8)
The error correction code control method according to appendix 6 or 7, characterized in that the first error rate is estimated using a known pattern shared in advance between the transmitting communication device and the receiving communication device. .
(Appendix 9)
9. The error correction code control method according to appendix 8, wherein the determined coding rate is realized by changing a ratio of the known pattern in input data of the encoder.
(Appendix 10)
At least one threshold for the ratio of the known pattern is provided, the first error rate is referred to when the ratio of the known pattern is higher than the threshold, and the second error rate is referred to when the ratio is lower. The error correction code control method according to appendix 8 or 9, characterized in that a conversion rate is set.
(Appendix 11)
A data communication system in which the encoder of the transmitter communicator and the decoder of the receiver communicator implement a predetermined error correction code,
The transmission-side communication device controls input data when encoding is performed based on an error rate of a communication path, and transmits a code word encoded by the encoder to the reception-side communication device,
The receiver communicator estimates a first error rate from a received codeword received from the transmitter communicator, and the first error rate and an error when the decoder decodes the received codeword Using the second error rate estimated based on correction, discriminating error rate information based on characteristics of the predetermined error correction code, notifying the error rate information to the transmitting side communication device,
Determining a coding rate of the predetermined error correction code in the transmission side communication device and the reception side communication device based on the error rate information;
A data communication system.
(Appendix 12)
When the first error rate exceeds at least one error rate threshold, the coding rate is changed to be low, and when the second error rate is less than or equal to the error rate threshold, the coding rate is changed to be high. The data communication system as set forth in appendix 11, wherein:
(Appendix 13)
13. The data communication system according to appendix 11 or 12, wherein the first error rate is estimated using a known pattern shared in advance between the transmitting communication apparatus and the receiving communication apparatus.
(Appendix 14)
14. The data communication system according to appendix 13, wherein the determined coding rate is realized by changing a ratio of the known pattern in input data of the encoder.
(Appendix 15)
At least one threshold for the ratio of the known pattern is provided, the first error rate is referred to when the ratio of the known pattern is higher than the threshold, and the second error rate is referred to when the ratio is lower. 15. The data communication system according to appendix 13 or 14, wherein a conversion rate is set.
(Appendix 16)
The transmission side communication device is a station side communication device, the reception side communication device is a subscriber side communication device, executes a Discovery process in a state where the coding rate is set low, and sets the first error rate. 16. The data communication system according to any one of appendix 11-15, wherein the coding rate is determined by calculation, and communication is performed by setting the determined coding rate after completion of the Discovery process.
(Appendix 17)
The transmission side communication device is a station side communication device, the reception side communication device is a subscriber side communication device, executes a Discovery process in a state where the coding rate is set low, and sets the first error rate. Any one of appendices 11-15, wherein the coding rate is determined by calculation, and after completion of the Discovery process, the determined coding rate is set, and a communication band is allocated according to the determined coding rate. A data communication system according to claim 1.
(Appendix 18)
An error correction code control method in a communication system in which a transmission side communication device and a reception side communication device are connected via a communication path,
The transmitting communication device is
Control input data when encoding based on the error rate of the communication channel, encode the input data by an encoder equipped with a predetermined error correction code, and then transmit the code word to the receiving side communication To the machine,
The receiving side communication device is
A decoder that implements a predetermined error correction code performs decoding of a received word sent from the transmitting communication device,
By means of a plurality of error rate estimation means, the error rate of the received word before decoding in the decoder, or the notification after decoding, or both data is calculated,
The coding rate determining means determines the coding rate in the predetermined error correction code based on the plurality of error rates estimated by the plurality of error rate estimating means, and determines the coding determined by the encoder and the decoder. Rate rate,
And an error correction code control method.

  INDUSTRIAL APPLICABILITY The present invention can be used in a data communication system in which error rate correction codes corresponding to a wide error rate range are required because of large fluctuations and differences in channel characteristics.

11, 61 Transmitter 12, 621, 622, 623, 82 Communication path 13, 63, 64 Receiver 111, 131, 611, 631, 641 MAC block 112, 132, 22, 612, 632, 642, 811, 831, 841 Error correction code controller 113, 25, 613 Encoder 114, 614 Transmission IF
133, 633, 634 Decoder 134, 634, 644 Reception IF
135, 635, 645 Error rate discriminator 136, 636, 646 Fixed pattern error rate calculator 21 Memory 23 Switching judgment unit 24 Dummy bit insertion unit 624 Switch 81, 1103 Station side devices 83, 84, 1101 Subscriber devices 812, 832 842 Encoder / decoder 813, 833, 843 Communication IF
814 Error rate estimation unit 815 Error rate information / monitor method storage unit

Claims (7)

An error correction code control apparatus in a data communication system in which a predetermined error correction code is implemented in an encoder of a transmission side communication device and a decoder of a reception side communication device,
An error rate estimating means for estimating a first error rate from a received codeword received from the transmitting communication device using a known pattern shared in advance between the transmitting communication device and the receiving communication device; ,
Using the first error rate and a second error rate estimated based on error correction when the decoder decodes the received codeword, the known pattern of the input data of the encoder A coding rate determination for determining a coding rate of the predetermined error correction code with reference to the first error rate when the ratio is higher than at least one threshold and with reference to the second error rate when the rate is low Means,
An error correction control device comprising:   The coding rate determining means has at least one error rate threshold, and when the first error rate exceeds the error rate threshold, the coding rate is changed to be low, and the second error rate is set. 2. The error correction code control apparatus according to claim 1, wherein the coding rate is changed to be higher when the error rate becomes equal to or less than the error rate threshold. The error correction code control device according to claim 1 or 2 , wherein the determined coding rate is realized by changing a ratio of the known pattern in input data of the encoder. An error correction code control method in a data communication system in which the encoder of the transmission side communication device and the decoder of the reception side communication device are mounted with a predetermined error correction code,
From the received codeword received from the transmitting communication device, a first error rate is estimated using a known pattern shared in advance between the transmitting communication device and the receiving communication device ,
Using the first error rate and a second error rate estimated based on error correction when the decoder decodes the received codeword, the known pattern of the input data of the encoder Determining a coding rate of the predetermined error correction code by referring to the first error rate when the ratio is higher than at least one threshold and referring to the second error rate when the rate is low ;
An error correction control method characterized by the above. When the first error rate exceeds at least one error rate threshold, the coding rate is changed to be low, and when the second error rate is less than or equal to the error rate threshold, the coding rate is changed to be high. The error correction code control method according to claim 4 , wherein: A data communication system in which the encoder of the transmitter communicator and the decoder of the receiver communicator implement a predetermined error correction code,
The transmission-side communication device controls input data when encoding is performed based on an error rate of a communication path, and transmits a code word encoded by the encoder to the reception-side communication device,
The reception side communication device uses the received codeword received from the transmission side communication device to obtain a first error rate using a known pattern shared in advance between the transmission side communication device and the reception side communication device. And using the first error rate and a second error rate estimated based on error correction when the decoder decodes the received codeword, the input data of the encoder When the ratio of the known pattern is higher than at least one threshold, the error rate information is determined by referring to the first error rate, and when it is lower, the error rate information is determined. Notify the sending communication device,
Determining a coding rate of the predetermined error correction code in the transmission side communication device and the reception side communication device based on the error rate information;
A data communication system. When the first error rate exceeds at least one error rate threshold, the coding rate is changed to be low, and when the second error rate is less than or equal to the error rate threshold, the coding rate is changed to be high. The data communication system according to claim 6 .

Images