JP5764114B2 - Method for resuming portable computer from power saving state, power state control method, and portable computer - Google Patents

Description

  The present invention relates to a technique for resuming a portable computer equipped with a storage device including a rotary disk from a power saving state, and further to a technology for preventing damage to the storage device and shortening the POST time during the resume.

  Notebook personal computers (notebook PCs) have a suspend state or a hibernation state in which the recovery time is shorter than the power-off state by the user's operation or system control when not in use in order to secure the operation time by the battery Transition to the power saving state. In the suspend state, the system context of the device that is powered off is stored in volatile main memory, and then power to devices that do not need to maintain main memory storage is turned off.

  In the hibernation state, the system context of each device in the power-on state and the contents stored in the main memory (hereinafter referred to as hibernation data) are stored in a hard disk drive (HDD) or a solid state drive (SSD). Then turn off most devices. A process performed by the BIOS or the operating system (OS) when returning from the suspended state or the hibernation state to the power-on state is referred to as a resume process.

  On the other hand, BIOS or OS processing when shifting from the power-on state to the power saving state is referred to as sleep processing. When resuming, as a rule, power on all devices that have been stopped. The BIOS executes a resume process such as verification of system safety and POST (Power On Self Test) for a device whose power has been stopped. Hereinafter, the resume process performed by the BIOS is referred to as POST as necessary. In the POST, the BIOS detects a device mounted on the notebook PC and performs initialization, and the device that is reset when the power is turned on performs a self-inspection.

  Each device sends a ready signal to the BIOS when the self-inspection is over and the system is ready for use. The BIOS and the OS cannot use the device until the ready signal is received. When the ready signal is received from all the devices, the BIOS ends the POST and takes over the resume process to the OS. The OS performs hibernation data loading and system context return processing. When the OS resume process is completed, the system shifts to a power-on state.

  If the BIOS cannot receive a ready signal after a predetermined time from the device, initialization of the device may be skipped and control may be passed to the OS, but many BIOS can be used after resuming. The POST cannot be completed unless a ready signal is received from a highly reliable HDD or SSD. In particular, when the HDD is a boot disk, the BIOS stores a boot file and hibernation data. Therefore, the BIOS must always receive a ready signal when resuming.

  Patent Document 1 discloses a computer system that can shorten the startup time of an HDD. In the present invention, the OS boot program is stored in a flash memory provided in the HDD. The startup time of the computer system is shortened by reading the OS startup program from the flash memory before the drive motor reaches the steady speed after the power is applied.

  Patent Document 2 discloses an invention for shortening the startup time of a notebook PC equipped with a disk device. In the present invention, when the power is turned off, the activation information stored in the HDD is written into the nonvolatile memory, and a flag indicating that the same activation information as that of the HDD is stored in the nonvolatile memory is set. When the power is turned on, if the flag is set in the nonvolatile memory, the activation information is read from the nonvolatile memory and the notebook PC is activated.

  Patent Document 3 predicts an expected use time when a user uses a computer from a past time and a use pattern related to a power state, and makes a transition to a power state that is shallower than the expected use time in a standby state. An invention is disclosed that enables a quick return to an on state. In the present invention, the S5 state with a small standby power and the S1 state with a short recovery time are used to achieve both a reduction in the recovery time and a reduction in standby power.

JP 2003-216435 A JP 2008-40948 A US Pat. No. 6,654,895

  In the HDD that is powered on at the time of resuming, the internal CPU powers on and resets, and the spindle motor operates to rotate the magnetic disk. This operation of the HDD is called spin-up. The HDD in the power-on state reduces power consumption by executing a power management operation such as active, idle, standby, or sleep by a command from the host device or a unique algorithm. In standby and sleep, the spindle motor stops and rotation of the magnetic disk stops. This operation of the HDD is called spin down. Since the head is retracted to the ramp mechanism during the spin down, the impact resistance of the HDD is improved.

  The magnetic disk includes an HDD with a rated capacity, manufacturer name, model, partition information, information indicating that it is a rotating type, and whether or not power up in standby (PUIS) described below is supported. The unique data (hereinafter referred to as HDD data) for specifying is stored. The HDD data corresponds to data that the BIOS needs to read from the magnetic disk of the HDD that has been spun up. The BIOS needs to read the HDD data from the magnetic disk in order to complete the POST of the HDD. The HDD needs to be spun up and self-inspected before sending a ready signal to the BIOS during POST. If the BIOS receives a ready signal from the HDD that has been spun up, it can read the HDD data thereafter.

  The notebook PC employs various types of power management for quickly shifting to the power-on state when the user wants to use it and reducing power consumption when the possibility of using the notebook PC is low. As the power saving state is deeper, the standby power is reduced, but the resume time is longer. In power management, the depth of the power saving state is changed according to the situation to balance the resume time and standby power when the user uses.

  As an example, in the first power management, the system automatically shifts to the hibernation state when a predetermined time elapses after the user shifts to the suspend state. Also, in the second power management, the system that tracks the user's life pattern is shifted to the suspended state before entering the time zone in which the user is highly likely to use, and the time when the system is less likely to be used. Transition to hibernation when entering the belt.

  If an impact is applied to the notebook PC while the HDD is spinning up, the HDD may be damaged. Therefore, a certain type of notebook PC is equipped with an impact response system in which the acceleration detected by the acceleration sensor is processed by a program operating on the OS and the head is retracted to the lamp mechanism when the possibility of an impact is predicted. When the power state changes in either the first power management or the second power management, the power supply of the HDD is activated and spins up.

  Since the shock response system does not function before the OS is executed at the time of resuming, there is an increased possibility that the HDD is damaged particularly when resuming during movement. ATA defines an operation mode called PUIS as a method for maintaining spin-down in a powered-on HDD. When the BIOS or OS sets PUIS to enable, the HDD maintains spindown when power is turned on or reset. A PUIS that is enabled will not return to disabled unless the HDD subsequently receives a command to disable it.

  If PUIS is set to enable, the HDD can be prevented from being damaged by maintaining the spin down while the shock response system is not functioning. However, in order to end POST, it is necessary for the BIOS to read the HDD data after sending a command to the HDD to spin up and receiving a ready signal. This procedure is unacceptable for the above power management because it results in an increase in POST time. Further, when the user resumes using the notebook PC, it is necessary to finish POST in as short a time as possible. In order to realize power management in a notebook PC equipped with an HDD as described above, it is necessary to consider the balance between prevention of HDD damage and reduction of the resume time at the timing of each resume.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a method for preventing damage to a portable computer equipped with a storage device having a rotary disk. It is a further object of the present invention to provide a method for reducing the resume time of such portable computers. It is a further object of the present invention to provide a method for reducing the power consumption of such portable computers. It is a further object of the present invention to provide a method for controlling the power state of such portable computers. A further object of the present invention is to provide a computer program and a portable computer for realizing such a method.

  The present invention provides a method for resuming from a power saving state a portable computer equipped with a rotary disk for storing initialization data and a storage device having a rotation suppression function for stopping and starting the rotation of the disk at reset. . The resume process is performed by a system configured by cooperative operations of a CPU, a main memory, firmware, and the like that constitute a portable computer. The initialization data corresponds to storage device information required by the system during POST.

  The nonvolatile memory stores initialization data read from the disk in advance. The non-volatile memory can be located anywhere that can be accessed by the system during resume. If the rotation suppression function is set to enable and the state is shifted to the power saving state, the disk does not rotate even when the storage device is turned on during the resume. Therefore, damage to the storage device can be prevented even if resumed during movement.

  On the other hand, if the rotation suppression function is set to enable, the system cannot read the initialization data from the disk, so in the present invention, it reads from the non-volatile memory. The system may need to receive a ready signal from the storage device to finish the resume process. To that end, the system can send a command to rotate the disk to a storage device with the rotation suppression function enabled.

  The system can send this command before reading initialization data from non-volatile memory. In this case, since the reading of the initialization data and the self-inspection of the storage device after the disk is rotated can be performed in parallel, the ready signal can be received in a short time and the POST time can be shortened. This method is suitable when the rotation inhibition function is enabled and the user wakes up with a low possibility of impact.

  The portable computer can include an impact response system configured by a program operating on an operating system and an acceleration sensor. In this case, if the command is sent after the system reads the initialization data, the time for which the disk rotates while the shock response system does not function can be reduced. Since this method can improve safety even when it is necessary to spin up during resume, this method is suitable for a system wake that has a high possibility of impact and does not require a reduction in POST time.

  The storage device can send a ready signal to the system after self-inspection when the disk rotates. As a result, when the system requests a ready signal, it can shift to the resume processing by the operating system after receiving the ready signal. If the acceleration generated in the portable computer is detected and the command transmission is stopped until the acceleration becomes less than a predetermined value, damage to the storage device can be prevented more reliably.

  When the storage device is removed from the portable computer, the initialization data stored in the non-volatile memory will not correctly describe the storage device. In this case, the system can detect the removal and read the correct initialization data from the disk after the storage device receiving the command generates a ready signal. Then, by updating the nonvolatile memory with the initialization data read from the disk, it is possible to perform POST using the initialization data in the nonvolatile memory thereafter.

  The system reads initialization data from non-volatile memory without rotating the disk if the portable computer has a flash memory that stores the system context generated in the power-on state during the power-saving state be able to. This method is suitable for POST when the storage device is not used, such as when power is turned on to transition the power state between power saving states due to a system event.

  According to the present invention, it is possible to provide a method for preventing damage to a portable computer equipped with a storage device including a rotary disk. Furthermore, the present invention has provided a method for shortening the resume time of such a portable computer. Furthermore, the present invention can provide a method for reducing the power consumption of such a portable computer. Furthermore, the present invention has provided a method for controlling the power state of such a portable computer. Further, according to the present invention, it is possible to provide a computer program and a portable computer that realize such a method.

It is a functional block diagram for demonstrating an example of the hardware constitutions of notebook PC. It is a flowchart which shows the execution procedure of 1st HDD_POST. It is a flowchart which shows the execution procedure of 2nd HDD_POST. It is a flowchart which shows the execution procedure of 3rd HDD_POST. It is a flowchart which shows the execution procedure of 4th HDD_POST. It is a figure explaining transition of a power state when performing the 1st power management. It is a flowchart which shows the execution procedure of 1st power management. It is a figure explaining the transition of a power state when performing 2nd power management.

[Configuration of notebook PC]
FIG. 1 is a functional block diagram for explaining an example of a hardware configuration of the notebook PC 10. Since many hardware configurations are well known, they will be described here within the scope necessary for understanding the present invention. First, the power state of the notebook PC 10 will be described. The notebook PC 10 corresponds to a power saving function of ACPI (Advanced Configuration and Power Interface). ACPI defines four sleeping states (power-saving state), S0 state (power-on state), and S5 state (power-off state) from the S1 state to the S4 state.

  Of the ACPI sleeping states, the notebook PC 10 defines only the S3 state and the S4 state as an example, but other sleeping states may be defined. Further, the S5 state may be included in the S4 state without being defined independently. The S3 state, S4 state, and S5 state are collectively referred to as the Sx state.

  When in the sleeping state, the CPU 11 and HDD 23 are always powered off. In the S3 state (suspended state), the storage of the main memory 13 is held, and power to devices other than the devices necessary for starting the storage holding of the main memory 13 and the power supply of the notebook PC 10 is stopped. When entering the suspend state, the OS saves the system context held by the device whose power is stopped to the main memory 13, and restores it to each device when returning to the power-on state.

  The S4 state (hibernation state) is a state in which the time until activation is the longest among the sleeping states supported by ACPI and the power consumption is low. When the notebook PC 10 transitions from the power-on state to the hibernation state, the OS stores the hibernation data stored in the main memory 13 in the hibernation area of the HDD 23 or the flash memory 19, and then the power controller 33 and the like. Stop power to devices other than those required to power on

  The S5 state is also called so-called soft-off, and basically the range of devices that supply power is the same as the S4 state except that the OS does not store hibernation data in the HDD 23 or the like. Note that the S4 state in the present invention includes a state in which the BIOS automatically transitions to the S4 state when a predetermined time elapses after the OS transitions to the S3 state. In this case, the OS recognizes that the system has transitioned to the S3 state, but the actual power state is the S4 state.

  A CPU 11, flash memory 19, HDD 23, firmware ROM 25, and embedded controller (EC) 27 are connected to a platform control hub (PCH) 17 configured as a chip set. Instead of the PCH 17, it can be composed of ICH and MCH, or can be composed of IOH and ICH. A main memory 13 and an LCD 15 are connected to the CPU 11. The PCH 17 has interface functions of various standards. In FIG. 1, typically, the flash memory 19 is connected to the mSATA controller, the HDD 23 is connected to the SATA controller, the firmware ROM 25 is connected to the SPI, and the EC 27 is connected to the LPC. Is connected.

  The flash memory 19 is divided into two partitions: a cache area used as a cache of the HDD 23 and a hibernation area for storing hibernation data when transitioning to the S4 state. Instead of the flash memory 19, a dedicated flash memory for storing hibernation data may be provided. When the flash memory 19 does not include a hibernation area, the HDD 23 can store hibernation data.

  The HDD 23 includes a magnetic disk 24 that stores an OS, device drivers, application programs, user data, and the like. The HDD 23 stores a boot file that is loaded when the notebook PC 10 is activated by a boot disk drive. The HDD 23 includes a flash memory in which UEFI (Unified Extensible Firmware Interface) firmware (hereinafter referred to as UEFI) sets PUIS. After initializing the interface of the HDD 23, the UEFI can access the flash memory of the HDD 23 to check the PUIS setting and the setting state.

  The firmware ROM 25 is a non-volatile memory that can electrically rewrite stored contents, and includes a code area and a data area. The code area stores UEFI composed of a plurality of code groups. UEFI is a new specification system firmware used in place of or in addition to the BIOS developed by the UEFI Forum. UEFI is always executed first when the CPU 11 is powered on and reset when the notebook PC 10 resumes from the Sx state to the S0 state.

  The UEFI executes a so-called POST that checks whether there is a modification to its own code, performs password authentication, or initializes the device when resuming. UEFI can change the contents of POST according to the power state of the transition source when the system resumes. For example, when resuming from the S5 state, a complete POST for acquiring parameters from all devices and setting the interface is executed, and when resuming from the S4 state, the POST of some devices is entrusted to the OS. Reduce POST time by restoring previously set parameters to the interface. When resuming from the S3 state, a simpler POST is executed so that it can be completed in a short time.

  The data area stores HDD data used by UEFI when resuming in the present embodiment. The HDD data is data conventionally read from the magnetic disk 24 by the UEFI in order to POST the HDD 23 when resuming from the Sx state to the S0 state. UEFI requires HDD data in order to use HDD 23 during or after resuming the POST of HDD 23.

  In this embodiment, UEFI reads HDD data from the data area when PUIS is enabled. The area where the HDD data is stored in the UEFI need not be limited to the firmware ROM 25, but other areas such as the hibernation area of the flash memory 19 that the UEFI can access during POST, the flash memory stored in the HDD 23, and the like. It can also be a non-volatile memory.

  The PCH 17 includes an RTC (Real Time Clock) 50 and an RTC memory 51. The RTC 50 and the RTC memory 51 can receive power from the button battery when the power of the AC / DC adapter 39 and the battery pack 41 is stopped and power is not supplied from the DC / DC converter 37 to the PCH 17. The RTC memory 51 is a volatile memory that stores set-up data set in the device by the UEFI, time information generated by the RTC 50, and the like. The RTC memory 51 stores the S34 flag and the S34 time that the UEFI refers to when making a transition from the S3 state or the S4 state to the S0 state. The setting of the S34 flag and the S34 time in the RTC memory 51 is performed when the user sets the S34 enable in the data area of the firmware ROM 25 through the UEFI firmware setup code.

  The S34 flag is information for instructing the UEFI to perform the process of transitioning to the S4 state when a predetermined time has elapsed since the OS transitioned the notebook PC 10 to the S3 state. The S34 time is the time from when the OS changes the system to the S3 state until the UEFI automatically changes to the S34 state. As an example, S34 time is 3 hours. The PCH 17 includes registers 56, 57, and 58. The register 56 is supplied with power during the Sx state.

  The register 56 corresponds to an SLP_TYP register and an SLP_EN register defined in ACPI. The register 56 is set by the OS when transitioning from the S0 state to the Sx state. The OS sets the power state of the transition destination in the register 56 when the system is ready to transition to the Sx state. When the power state of the transition destination is set in the register 56, the PCH 17 causes the notebook PC 10 to transition to the set power state through the EC 27.

  The UEFI refers to the register 56 when resuming from the Sx state, and determines the POST execution path according to the power state of the transition source. In the POST execution path selected by the UEFI, the POST time is maximum when the power state of the transition source is the S5 state, and is minimum when the power state is the S3 state. In the register 57, the RTC 50 sets the time-up bit when the elapsed time since the transition to the S3 state reaches the S34 time. When the time up bit is set, the PCH 17 resumes the notebook PC 10 through the EC 27.

  Starting the power supply so as to shift to the power-on state by the user pressing the power button 35 or the operation of the lid sensor 36 in the Sx state is called user wake, and an event generated at that time is Let's call it a user event. The case where the system does the same thing is called a system wake and a system event. The time up bit corresponds to a system event.

  An acceleration bit is set in the register 58. The EC 27 sets an acceleration bit when the acceleration acquired from the acceleration sensor 29 exceeds a predetermined value. The EC 27 resets the acceleration bit when the acceleration falls below the threshold for a predetermined time. The PCH 17 includes a cache controller 53 for causing the flash memory 19 to function as a cache of the HDD 23. The cache controller 53 writes data to be written to the HDD 23 by the program executed by the CPU 11 to the cache area of the flash memory 19 and the magnetic disk 24 of the HDD 23 by write-back caching or write-through caching.

  An acceleration sensor 29 and a power controller 33 are connected to the EC 27. The EC 27 is a microcomputer composed of a CPU, ROM, RAM, and the like. The EC 27 can execute a program related to management of the operating environment inside the notebook PC 10 independently of the CPU 11. The EC 27 controls the operation of the DC / DC converter 37 through the power controller 33.

  The acceleration sensor 29 outputs the acceleration generated in the notebook PC 10 to the EC 27. The acceleration sensor 29 and the program operating on the OS constitute an impact response system. The impact handling system retracts the head of the HDD 23 to the ramp mechanism when detecting a sign of impact that requires the head to be retracted by a predetermined algorithm. An example of an impact handling system is disclosed in Japanese Patent Application Laid-Open No. 2004-146036.

  When transitioning from the Sx state to the S0 state, the shock handling system does not function because the OS is not executed. However, when power is supplied to the EC 27 and the acceleration sensor 29, the EC 27 can detect the magnitude of acceleration. In the present embodiment, damage can be prevented by preventing the HDD 23 from spinning up when the EC 27 detects an acceleration greater than or equal to a predetermined value during the resume.

  The power controller 33 is connected with control circuits for a power button 35, a lid sensor 36 and a DC / DC converter 37. The power controller 33 is a wired logic digital control circuit (ASIC) that controls the DC / DC converter 35 based on an instruction from the EC 27. The power controller 33 includes a register 59 for setting a tamper bit, a register 61 for setting a power bit, a register 62 for setting a wake bit, and a timer 63.

  The power controller 33 maintains power even in the Sx state in order to resume the notebook PC 10. When the power of the power controller 33 is stopped, the bits of the registers 59, 61 and 62 are reset to indicate 0. The power controller 33 is connected to the HDD 23 by a tamper detection line 67. The tamper detection line 67 is pulled up by the same power source as the power controller 33. While the HDD 23 is attached to the notebook PC 10, the potential of the tamper detection line 67 is maintained at the ground level. When the HDD 23 is removed from the notebook PC 10, the potential of the tamper detection line 67 rises.

  When the logic circuit of the power controller 33 detects the leading edge when the potential of the tamper detection line 67 rises, it sets the register 59 to the logic value 1. The UEFI sets the register 61 to a logical value 1 on the assumption that power is supplied to the power controller 33 when the password authentication is successful. When the register 61 indicates 1, it indicates that the power of the power controller 33 is not stopped after the UEFI is set.

  The registers 59 and 61 constitute a tamper function, and are reset and set to a logical value 0 when the power of the power controller 33 is stopped. UEFI determines that the HDD 23 has been removed except when the register 59 is 0 and the register 61 is 1. The timer 63 clocks during the Sx state to generate a system event for resume.

  The wake bit 62 is set by the logic circuit of the power controller 33 when the power button 35 is pressed or the lid sensor 36 is operated. The wake bit corresponds to a user event. In this embodiment, in order to reduce power consumption, in the Sx state, the RTC 50 and the register 57 stop the function of the PCH 17 for generating a system event. Therefore, during the Sx state, the timer 63 measures the time roughly. Then, power is supplied to the PCH 17 immediately before the time when the system event is scheduled to be generated, and the RTC 50 sets the time-up bit in the register 57 at the correct time.

  The PCH 17 that has generated the system event activates the power supply through the EC 27. Japanese Patent Laid-Open No. 2012-226677, assigned to the applicant of the present invention, discloses a system wake method in which the RTC 50 and the timer 63 cooperate. However, in the present invention, the method of generating a system event in the Sx state is not necessarily limited to this. For example, a system event may be generated by supplying power to a portion related to the RTC 50 of the PCH 17 even in the Sx state, or by providing a dedicated timing device whose power is backed up in the Sx state.

  The AC / DC adapter 39 and the battery pack 41 are power sources for the notebook PC 10. The DC / DC converter 37 converts the DC voltage supplied from the AC / DC adapter 39 or the battery pack 41 into a plurality of voltages necessary for operating the notebook PC 10, and is further defined according to the power state. Power is supplied to each device based on the power supply category.

[HDD POST]
In the present embodiment, in the first power management and the second power management, one of four types of POST (HDD_POST) related to the HDD 23 is performed at the timing of each resume. Each power management is configured to select an appropriate HDD_POST while emphasizing either the prevention of damage to the HDD 23 or the reduction of the POST time, and to make both compatible as a whole.

  In the present embodiment, since the user event is generated when the user uses the notebook PC 10, it is assumed that there is a low possibility that the HDD 23 is damaged even if the user wakes up and spins up at the same time as the startup. To do. Further, since the system event may be generated when the user is carrying the notebook PC 10, it is assumed that the HDD 23 is likely to be damaged if it is spun up at the time of activation at the time of resume.

  When resuming at a user event, it is important to reduce the POST time in consideration of the convenience of the user. However, when resuming at a system event, shortening the POST time is hardly a problem, but rather prevents damage to the HDD 23. Become important. In the conventional method of setting PUIS to disable, the POST time is not a problem because the HDD 23 is spun up simultaneously with the start-up, but the prevention of damage becomes a problem.

  When PUIS is set to enable, the HDD 23 is not spun up at the same time as starting up, so that damage can be prevented even when the system event is resumed. When it is necessary to receive a ready signal from the HDD 23 that has been spun up in order for the UEFI to finish POST, it can be spun up by sending a spin-up command to the HDD 23 even if it is enabled. Even in this case, the HDD 23 does not spin up at the same time as startup, and the time during which the HDD 23 is spinning up while the impact handling system is not functioning can be reduced to improve safety against impact.

  If there is a flash memory 19 for storing hibernation data and it is not necessary to use the HDD 23 during the resume process or after the resume is completed, the spin down may be maintained during the resume. If the spin down can be maintained using the flash memory 19 at the time of resume, the power consumption, the POST time and the HDD 23 can be most reliably prevented.

  Table 1 shows the types of HDD_POST selected by the UEFI in order to respond to these requests. When UEFI executes power management, it determines three factors: PUIS setting status, wake type, and presence / absence of flash memory 19 that stores hibernation data on behalf of HDD such as flash memory 19 To select any HDD_POST. In the following, after briefly describing the characteristics of each HDD_POST, the procedure will be described in detail.

  The first HDD_POST to the third HDD_POST are applied regardless of the presence or absence of the flash memory 19 storing hibernation data or the corresponding nonvolatile semiconductor memory. The first HDD_POST is a conventional method for setting PUIS to disable, and the POST time of the HDD 23 does not matter. The first HDD_POST is suitable for POST by a user wake that does not need to consider damage to the HDD 23.

  From the second HDD_POST to the fourth HDD_POST, PUIS is set to enable, and UEFI selects one depending on the type of wake and the presence or absence of the flash memory 19. From the second HDD_POST to the fourth HDD_POST, it is predicted that a system wake will occur, and PUIS is enabled to prevent damage to the HDD 23. Furthermore, when a user wake occurs unexpectedly, POST can be completed in as short a time as possible. From the second HDD_POST to the fourth HDD_POST, the HDD data is not read from the magnetic disk 24 after receiving the ready signal as usual, and the firmware is received before receiving the ready signal or without receiving the ready signal. POST is executed using the HDD data stored in the data area of the ROM 25.

  Since the second HDD_POST has PUIS enabled, the POST time is longer than that of the first HDD_POST. However, since the second HDD_POST is not spun up at the time of activation, damage to the HDD 23 can be prevented. Since the UEFI reads HDD data from the firmware ROM 25, the POST time can be shortened as compared with the conventional method of reading HDD data from the magnetic disk 24, which is suitable for POST by user wake.

  The third HDD_POST differs from the second HDD_POST in that the wake type is a system wake. In the case of a system wake, there is a high possibility that the HDD 23 will be damaged instead of making the POST time longer, so the third HDD_POST spins up to prevent further damage to the HDD 23 compared to the second HDD_POST. -The timing to send the command is delayed. The fourth HDD_POST is applied in the case of a system wake in which there is a flash memory 19 for storing hibernation data and there is no possibility of using the HDD 23 during and after the resume.

[First HDD_POST]
FIG. 2 is a flowchart showing the execution procedure of the first HDD_POST. Blocks 101 to 109 show the UEFI execution procedure, and blocks 151 to 157 show the operation procedure of the HDD 23. In blocks 101 and 151, power is supplied to a device that has been stopped by a user event when transitioning to the Sx state. At this time, the HDD 23 is set to PUIS disabled.

  In block 153, the internal CPU of the HDD 23 starts a reset operation, and at the same time, the magnetic disk 24 is spun up. The HDD 23 that has started the spin-up performs a self-inspection of a servo system such as an actuator that drives the head and a spindle motor that rotates the magnetic disk 24 in block 155. This servo system inspection takes more time than the electronic circuit system inspection.

  The UEFI initializes basic devices necessary for starting the execution of POST such as the CPU 11 and the main memory 13, and further verifies the consistency of the platform. In block 103, the UEFI inspects the interfaces of the PCH 17, the flash memory 19, and the HDD 23, and sets and initializes the parameters stored in the RTC memory 51 therein. At the same time, other peripheral devices are also initialized. Thereafter, the UEFI firmware waits for a ready signal from each device including the HDD 23.

  When the servo system inspection is completed, the HDD 23 sends a ready signal to UEFI in block 157. The HDD 23 having a servo system usually takes a longer time to send a ready signal than other devices composed only of electronic devices. In block 104, the UEFI sends a command to the HDD 23 to confirm the PUIS setting state. Further, the UEFI confirms the mounted state of the flash memory 19 and the type of wake event, and selects the execution path of the first HDD_POST from among the four types of HDD_POST. The UEFI confirms the type of the wake event with reference to the S34 flag of the RTC memory 51 and the registers 57 and 62.

  In block 105, the UEFI receives a ready signal from the HDD 23. The UEFI that has received the ready signal recognizes that the HDD 23 can be accessed and sends a command to the HDD 23 in block 107 to read the HDD data from the magnetic disk 24. When the ready signal is received from all devices scheduled in block 109, the UEFI firmware terminates POST and shifts the resume processing to the OS.

  In the first HDD_POST, PUIS is set to disable and spin-up starts at the same time as reset, and the procedure from block 101 to 105 and the procedure from block 151 to 157 are performed in parallel. HDD_POST can be completed by reading HDD data from the magnetic disk 24 in a short time. However, since the HDD 23 is spun up while the impact handling system from the block 101 to the block 109 is not functioning, the impact resistance is low.

[Second HDD_POST]
FIG. 3 is a flowchart showing the execution procedure of the second HDD_POST. Blocks 101 to 237 show a UEFI execution procedure, and blocks 251 to 157 show an operation procedure of the HDD 23. In FIG. 3, the same steps as those in FIG. In block 251, the HDD 23 with PUIS enabled is powered on and reset, and in block 253, the CPU is reset, but the magnetic disk 24 maintains spin down. When the magnetic disk 24 becomes ready to receive a command from the UEFI, it sends a ready signal to the UEFI. In block 201, the UEFI sends a command to the HDD 23 to confirm that PUIS is enabled, and selects the execution path of the second HDD_POST.

  Further, the UEFI confirms the acceleration bit in the register 58 and maintains the spin-down of the HDD 23 while the acceleration bit is set. When UEFI sends a spin-up command to HDD 23 at block 203, HDD 23 spins up at block 255. In block 205, the UEFI refers to the registers 59 and 61 to determine whether or not the HDD 23 has been removed. If it is determined that it has not been removed, the process proceeds to block 207 where the UEFI reads HDD data from the data area of the firmware ROM 25. The UEFI performs POST using the data read from the HDD data and proceeds to block 105. In the second HDD_POST, the HDD data can be acquired before the UEFI receives the ready signal.

  When it is determined in block 205 that the HDD 23 has been removed, the HDD data stored in the firmware ROM 25 does not describe the currently installed HDD, and the process proceeds to block 231. In block 231, the UEFI that has received the ready signal from the HDD 23 sends a read command to the HDD 23 in block 233 to read the HDD data from the replaced HDD magnetic disk. Thereafter, in block 235, the UEFI updates the firmware ROM 25 with the read HDD data. In block 237, the tampering functions of the registers 59 and 61 are reset and the process returns to block 103. Thereafter, the updated HDD data is read from the firmware ROM 25, and POST of the HDD and other devices is terminated in block 207.

  In the second HDD_POST, since PUIS is enabled, a spin-up command is sent in block 203 to spin up. From block 101 to block 203, the UFI spends a predetermined time to perform various processes, but sends a command as soon as it becomes possible to send a command. In addition, since the HDD data is not read from the magnetic disk 24 after the ready signal is received in the block 105, the inspection of the servo system in the block 155 and the reading of the HDD data from the firmware ROM 25 in the block 207 are performed in parallel. , POST time can be shortened. Further, since the blocks 101 to 203 are not spun up, it is possible to improve the safety by reducing the spin-up time in the time zone where the impact handling system does not function.

[Third HDD_POST]
FIG. 4 is a flowchart showing the execution procedure of the third HDD_POST. In FIG. 4, the same steps as those in FIGS. 2 and 3 are denoted by the same reference numerals, and the description thereof is omitted. The procedure in FIG. 4 is different from that in FIG. 3 because the UEFI sends a spin-up command in block 301 after the block 205 and block 207, and the HDD 23 has been removed in connection therewith. The only thing that is sometimes sent in block 303 is a spin up command.

  Since the third HDD_POST is executed in response to a system wake, the POST time is not considered. However, since the system event may be generated during the movement, the HDD 23 is prevented from being damaged more than the second HDD_POST. It is necessary to devise further. In the third HDD_POST, the timing for sending the spin-up command is delayed as compared with the second HDD_POST, thereby reducing the spin-up time in the time zone in which the shock response system does not function.

[Fourth HDD_POST]
FIG. 5 is a flowchart showing the execution procedure of the fourth HDD_POST. In FIG. 5, the same steps as those in FIGS. The fourth HDD_POST is executed in the notebook PC 10 on which the flash memory 19 capable of storing hibernation data is mounted. 5 differs from FIG. 3 and FIG. 4 in that POST is terminated in block 401 without receiving a ready signal without sending a spin-up command as in block 203 in FIG. 3 or block 301 in FIG. It is a point to do.

  The fourth HDD_POST cannot use the HDD 23 even if the POST is completed because the HDD 23 has completed the POST without performing the self-inspection. Therefore, it can be executed by a system wake that does not require the use of the HDD 23 after POST. However, when it is determined that the HDD 23 has been removed in the same manner as in the procedure of FIG. The fourth HDD_POST can prevent the HDD 23 from being damaged and reduce power consumption since the HDD 23 maintains the spin down during the resume. Further, since the hibernation data is loaded from the flash memory 19, the POST time can be shortened.

[First power management]
FIG. 6 is a diagram for explaining the transition of the power state when the notebook PC 10 executes the first power management, and FIG. 7 is a flowchart showing the procedure corresponding thereto. In FIG. 6A, at time t1, a sleep event makes a transition from S0 state to S3 state, at time t3, a system event makes a transition from S3 state to S4 state, and at time t5, a user event makes a transition from S4 state to S0 state. The state transition to the state is shown. FIG. 6B shows a state in which the S0 state is changed to the S3 state by a sleep event at time t1, and the S3 state is changed to the S0 state by user event at time t2.

  In executing the first power management and the second power management described below, the UEFI determines the type of HDD_POST and the contents of the POST before passing the resume processing to the OS as follows. The UEFI sends a command to the HDD 23 to confirm the PUIS setting state when executing any HDD_POST. Further, the presence / absence of the flash memory 19 having a hibernation area is confirmed at the interface initialization stage in block 103. Further, when the type of wake-up is confirmed with reference to the registers 57 and 62, the type of HDD_POST is determined based on Table 1 and the execution path is selected.

  At the time of transition from the S4 state, referring to the registers 56 and 57 and the S34 flag of the RTC memory 51, if the S34 flag is set and the S34 time has elapsed, the hibernation area of the flash memory 19 is used. After the hibernation data is loaded into the main memory 13 and transitioned to the S3 state, the resume process is passed to the OS. The OS performs a resume process from the S3 state to the S0 state. When the S34 flag is not set, the UEFI passes the resume process to the OS when the POST ends at the time of transition from the Sx state. At this time, when resuming from the S4 state, the OS loads hibernation data from the hibernation area of the flash memory 19.

  In block 501, the notebook PC 10 is operating in the S0 state (time t0). At this time, PUIS is set to disable. In addition, an S34 flag and an S34 time are also set in the RTC memory 51. In block 503, a sleep event is generated by the user pressing the power button 35, operating the lid sensor 36, or operating through a GUI icon.

  The Sx state that shifts in response to the sleep event is set in the power management system in advance. Here, it is assumed that the transition to the S3 state is set. When the OS is ready for transition to the S3 state of each device and the application program being executed, the OS writes the system context of the device whose power is stopped to the main memory 13 and transitions to the S3 state in the register 56. Set.

  At this time, the OS sends a command to the HDD 23 to enable PUIS. When the register 56 is set, the PCH 17 instructs the power supply to transition to the S3 state via the EC 27, and the system transitions to the S3 state at block 505. The RTC 50 counts the time until the S34 time elapses after the transition to the S3 state in cooperation with the timer 63. The S34 time is a time for which the system determines that priority should be given to switching to the hibernation state and saving power because the user does not use the notebook PC 10 anymore.

  In block 507, when the time measured by the RTC 50 reaches S34 time, the PCH 17 sets a time-up bit in the register 57 to generate a system event, and supplies power to the previously stopped device in the EC 27. The process proceeds to block 509 (time t3). At this time, the system is in a state where the power supply is in the S0 state but has not reached the S0 state in terms of software. If no system event is generated, the process moves to block 551.

  In block 509, the UEFI executes the fourth HDD_POST shown in FIG. 5 in response to the system event. At this time, PUIS is set to enable, and since UEFI does not send a spin-up command, the HDD 23 maintains the spin-down during the resume process. Therefore, even if the resume process is performed during the movement, the HDD 23 is not damaged. Absent. In addition, the power consumption of the HDD 23 accompanying the spin-up can be reduced.

  If the notebook PC 10 is not equipped with the flash memory 19, the hibernation data save destination is the HDD 23, and therefore the third HDD_POST that assumes the use of the HDD 23 is executed. When POST of the HDD 23 and other devices is completed, the process proceeds to block 511. If the UEFI recognizes in step 511 that the current resume is intended to transition to the S4 state by referring to the S34 flag and registers 56 and 57 of the RTC memory 51, the UEFI immediately enters the S4 state without passing resume processing to the OS Process to transition.

  The UEFI writes the hibernation data generated by writing the system context of the device whose power is stopped in the S4 state to the main memory 13 and writes it to the hibernation area of the flash memory 19. At this time, the UEFI sends a command to the HDD 23 to set PUIS to disable. The procedures of blocks 507, 509, and 511 are performed in a state where the OS does not recognize them. At this point, the system has transitioned to the S4 state, but the OS maintains recognition when transitioning to the S3 state at time t1.

  When a user wake occurs in block 513 during the S4 state, the power controller 33 supplies power to the device that has been stopped and sets the wake bit in the register 62. In block 515, the UEFI executes the first HDD_POST shown in FIG. 2 (time t5). Since PUIS is set to disabled, UEFI executes the first HDD_POST and makes a transition to the S0 state in a short time. Further, since it is a user wake, it can be assumed that the posture of the notebook PC 10 is stable, so the possibility that the HDD 23 is damaged is low.

  The UEFI loads hibernation data from the hibernation area of the flash ROM 19 to the main memory 101. The OS that has taken over the resume processing from UEFI in block 517 recognizes the resume from the S3 state with reference to the register 56 and restores the system context included in the hibernation data to each device. In addition to this state, the software completely makes a transition to the S0 state.

  In block 551, when a user wake occurs during the S3 state, the power controller 33 supplies power to the stopped device and sets the wake bit in the register 62. In block 553, the UEFI executes the second HDD_POST shown in FIG. 3 (time t2). When POST of the HDD 23 and other devices is completed in block 555, the OS returns the system context stored in the main memory 13 to each device, and transitions the system to the S0 state.

  In the first power management, it is assumed that a user wake does not occur during S34 time, and PUIS is enabled at time t1 so that the HDD 23 is not damaged even if a system wake occurs during movement. For the user wake at the unexpected time t2, the second HDD_POST is executed so that the POST of the HDD 23 is completed in a relatively short time.

[Second power management]
FIG. 8 is a diagram for explaining the transition of the power state when executing the second power management. When the second power management learns the user's life pattern and makes a transition to the S3 state immediately before entering the time zone in which the user is likely to use, the user resumes in a short time by the user wake. Can be used. Further, when entering a time zone in which there is a high possibility that the user will not use, the state is shifted to the S4 state to minimize the standby power. Since the second power management is performed under the management of the OS, the UEFI does not change from the S3 state to the S4 state unlike the first power management.

  FIG. 8A shows a state in which the system wakes up only and FIG. 8B shows a state in which a user wake has occurred in the S3 state or S4 state. Here, it is assumed that the flash memory 19 having a hibernation area does not exist. Therefore, since UEFI needs to spin up the HDD 23 and receive a ready signal when resuming, when a system wake occurs, the third HDD_POST is executed instead of the fourth HDD_POST.

  The transition of the power state from the S0 state to the Sx state is controlled by a power management utility operating on the OS. Also, the system event in the Sx state is generated by the RTC 50 and the timer 63 working together. In FIG. 8A, the state transitions to the S3 state at time tx1, transitions to the S0 state at time tx2, and after a while transitions to the S4 state at time tx3. After that, the state transits to the S0 state at time tx4, and after a while, transits to the S3 state at time ts5, and further transits to the S0 state at time tx6 in the same manner as at time tx2.

  As an example, PUIS is disabled in the S0 state and enabled in the S3 and S4 states. In the system wake at times tx2, tx4, and tx6, the third HDD_POST in FIG. 4 is executed. Therefore, a spin-up command is sent at a timing later than that of the second HDD_POST to shorten the spin-up time in the time zone when the impact handling system is not functioning as much as possible. At this time, since it is a system wake, the resume time is not a problem.

  In another example, PUIS may be set to disable when transitioning to the S3 state at time tx5. In that case, when the user starts to use the morning user wake, the first HDD_POST can be executed to shift to the S0 state in a shorter time. Thereafter, when PUIS is set to disable when the system transits to the S3 state, the system returns to the S3 state after time tx1.

  In FIG. 8B, a user wake occurs at time t2 while transitioning to the S3 state, and a user wake occurs at time t3 while transitioning to the S4 state. UEFI executes the second HDD_POST because PUIS is set to enable. In the present invention, it is not necessary to limit the selection of HDD_POST in the second power management to that described above. It is possible to select an appropriate HDD_POST according to the user's utility value by determining POST time reduction, HDD damage prevention, power saving, and the like according to the type of wake-up. When the flash memory 19 exists, the fourth HDD_POST can be selected for the system wake.

  Although the present invention has been described with the specific embodiments shown in the drawings, the present invention is not limited to the embodiments shown in the drawings, and is known so far as long as the effects of the present invention are achieved. It goes without saying that any configuration can be adopted.

10 Notebook PC
17 Chip set (PCH)
19 Flash memory 23 HDD
24 Magnetic disk 25 Firmware ROM
33 Power controller

Claims (17)

A method of resuming from a power saving state a portable computer equipped with a rotary disk for storing initialization data and a storage device having a rotation suppression function for stopping and starting the rotation of the disk upon resetting,
Providing a nonvolatile memory capable of storing and storing the initialization data read from the disk in the power saving state;
Setting the rotation suppression function to enable and shifting to the power saving state;
The portable computer starts to start upon power-up;
Reading the initialization data from the non-volatile memory and executing a resume process ;
Sending a command to rotate the disk to the storage device.   The method of claim 1, wherein sending the command is performed prior to reading the initialization data. Receiving a ready signal from the storage device that has received the command;
The method according to claim 1, further comprising the step of transitioning to resume processing by an operating system after receiving the ready signal. Detecting acceleration generated in the portable computer;
The method according to claim 1, further comprising: stopping transmission of the command until the acceleration becomes less than a predetermined value. Detecting that the storage device has been removed from the portable computer;
The method according to claim 1, further comprising reading the initialization data from the disk after the storage device generates a ready signal.   6. The method of claim 5, comprising updating the non-volatile memory with initialization data read from the disk. A rotating disk for storing initialization data, a storage device having a rotation suppression function for stopping and starting rotation of the disk at reset, a program operating on the operating system, and an acceleration sensor are configured in cooperation. A method of resuming a portable computer equipped with an impact handling system from a power saving state,
Providing a non-volatile memory for storing the initialization data read from the disk;
Setting the rotation suppression function to enable and shifting to the power saving state;
The portable computer starts to start upon power-up;
Reading the initialization data from the non-volatile memory;
Sending a command to rotate the disk to the storage device after reading the initialization data. A rotating disk that stores initialization data, a storage device that has a rotation suppression function that stops and starts rotation of the disk at reset, and a system context generated in the power-on state between the power-saving state A method of resuming a portable computer equipped with a flash memory for storing from a power saving state,
Providing a non-volatile memory for storing the initialization data read from the disk;
Setting the rotation suppression function to enable and shifting to the power saving state;
The portable computer starts to start upon power-up;
A step of sending a command to rotate the disk to the storage device when the power is turned on by a user event and reading the initialization data from the nonvolatile memory; and the disk when the power is turned on by a system event. Reading the initialization data from the non-volatile memory without rotating. A method for controlling the power state of a portable computer equipped with a rotary disk for storing initialization data and a storage device having a rotation suppression function for stopping and starting the rotation of the disk at reset,
Providing a non-volatile memory for storing initialization data read from the disk;
Operating the portable computer in a power-on state;
Setting the rotation suppression function to enable and shifting from the power-on state to the suspended state;
Powering on the portable computer by a system event generated by measuring an elapsed time since the transition to the suspended state;
Realizing a function that, after reading the initialization data from the non-volatile memory, the firmware sets the rotation suppression function to disabled in the portable computer and then shifts to the hibernation state;
Powering up the portable computer due to a user event generated during the hibernation state;
Reading the initialization data from the disk and transitioning to the power-on state. Powering on the portable computer due to a user event during the suspended state;
Sending a command to rotate the disk to the storage device;
Reading the initialization data from the non-volatile memory and transitioning to the power-on state;
The method according to claim 9, further comprising the step of transitioning to a resume process by an operating system after receiving a ready signal from the storage device. A method for controlling the power state of a portable computer equipped with a rotary disk for storing initialization data and a storage device having a rotation suppression function for stopping and starting the rotation of the disk at reset,
Providing a non-volatile memory for storing initialization data read from the disk;
Operating the portable computer in a power-on state;
Enabling the rotation suppression function in response to a sleep event generated at a first time to transition from the power-on state to the suspended state;
Turning on the portable computer in response to a system event generated at a second time;
Reading the initialization data from the non-volatile memory;
Sending a command to rotate the disk to the storage device;
Transitioning to the power-on state after receiving a ready signal from the storage device. Powering the portable computer with a user event generated while transitioning to the suspended state;
12. The method of claim 11, comprising reading the initialization data from the non-volatile memory and transitioning to the power-on state. Setting the rotation suppression function to disabled by a sleep event generated at a third time to shift from the power-on state to the suspended state;
Turning on the portable computer in response to a system event generated at a fourth time;
13. The method of claim 12, comprising reading the initialization data from the disk and transitioning to the power on state. Hard disk drive with power-up in standby function,
A first nonvolatile memory capable of storing and holding in a power saving state storing initialization data read from a magnetic disk of the hard disk drive;
An event generator for generating a wake event,
When power is turned on in response to the wake event generated while the power-up-in-standby function is enabled and transitioned to the power-saving state, firmware is transferred to the hard disk drive. A portable computer for causing a computer to realize a function of sending a spin-up command and a function of reading the initialization data from the first nonvolatile memory.   15. The apparatus according to claim 14, further comprising a second nonvolatile memory for storing hibernation data, wherein the firmware implements a function of reading the initialization data without sending the spin-up command to the hard disk drive. The portable computer described.   The portable computer according to claim 14, wherein the function of sending the spin-up command is realized before the function of reading the initialization data. A portable computer equipped with a hard disk drive having a power-up in standby function,
A non-volatile memory for storing initialization data read from the magnetic disk;
An event generator for generating a wake event;
A tamper circuit that detects that the hard disk drive has been removed from the portable computer;
When power is turned on in response to the wake event generated while the power-up-in-standby function is enabled and transitioning to a power-saving state, firmware is stored in the portable computer. , Realizing a function of reading the initialization data from the nonvolatile memory, and sending a spin-up command to the hard disk drive when detecting that the hard disk drive is removed from the magnetic disk rotated. A portable computer for realizing a function of updating the nonvolatile memory with the read initialization data.

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