JP5759644B1 - Differential amplifier circuit - Google Patents
Differential amplifier circuit Download PDFInfo
- Publication number
- JP5759644B1 JP5759644B1 JP2015016531A JP2015016531A JP5759644B1 JP 5759644 B1 JP5759644 B1 JP 5759644B1 JP 2015016531 A JP2015016531 A JP 2015016531A JP 2015016531 A JP2015016531 A JP 2015016531A JP 5759644 B1 JP5759644 B1 JP 5759644B1
- Authority
- JP
- Japan
- Prior art keywords
- differential amplifier
- circuit
- input terminal
- input
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 claims description 15
- 230000008878 coupling Effects 0.000 abstract description 7
- 238000010168 coupling process Methods 0.000 abstract description 7
- 238000005859 coupling reaction Methods 0.000 abstract description 7
- 230000001052 transient effect Effects 0.000 description 12
- 230000004044 response Effects 0.000 description 11
- 238000004088 simulation Methods 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000011084 recovery Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
【課題】交流結合時のＣＭＲＲを実動作状況において改善する。【解決手段】交流結合された差動増幅器と、前記差動増幅器の入力端子に接続されたハイパスフィルタと、前記差動増幅器の正入力端子と負入力端子との間を接続する可変抵抗素子と、前記可変抵抗素子の抵抗値を変化させるための調整回路とを備えた差動増幅回路である。【選択図】図１To improve CMRR during AC coupling in an actual operation state. An AC-coupled differential amplifier, a high-pass filter connected to an input terminal of the differential amplifier, and a variable resistance element that connects between a positive input terminal and a negative input terminal of the differential amplifier A differential amplifier circuit including an adjustment circuit for changing a resistance value of the variable resistance element. [Selection] Figure 1
Description
本発明は、差動増幅回路に関する。 The present invention relates to a differential amplifier circuit.
２つの入力信号の差分を一定係数で増幅する回路である差動増幅回路は、微小信号を増幅する機能が要求される測定器の入力回路等に利用される。計装アンプとして用いられる理想的な差動増幅回路では、交流結合時の同相電圧は完全に除去され、同相電圧除去比（ＣＭＲＲ）は無限大（ｄＢ）である。しかし、現実の差動増幅回路では、回路内部に使用する部品の製作精度、温度変化による回路定数の変動などにより、回路自体の特性が大きく変化する。このようなＣＭＲＲの変動を抑制して回路特性を改善しようという試みが多くなされてきたが、入力信号に対する過渡状態から定常状態に復旧するための増幅回路の回復時間が長い、あるいは増幅回路のゲインの設定自由度が低くなるなどの問題があった。 A differential amplifier circuit, which is a circuit that amplifies a difference between two input signals by a constant coefficient, is used in an input circuit of a measuring instrument that requires a function of amplifying a minute signal. In an ideal differential amplifier circuit used as an instrumentation amplifier, the common-mode voltage during AC coupling is completely removed, and the common-mode voltage rejection ratio (CMRR) is infinite (dB). However, in an actual differential amplifier circuit, the characteristics of the circuit itself change greatly due to the manufacturing accuracy of components used in the circuit and the fluctuation of circuit constants due to temperature changes. Many attempts have been made to improve the circuit characteristics by suppressing such variation in CMRR. However, the recovery time of the amplifier circuit for recovering from the transient state to the steady state with respect to the input signal is long, or the gain of the amplifier circuit is large. There were problems such as lowering the degree of freedom of setting.
この点、特許文献１はＡＣ結合差動増幅器に関し、例えば図１を参照すると、各出力の同相電圧を抵抗器Ｒ５、またはＲ６を通して増幅器Ａ１，Ａ２の反転入力端子に帰還させ、さらにその点より、コンデンサＣ３，Ｃ４を通じて帰還させて、抵抗器Ｒ１、あるいはＲ４を使った分圧回路を通じて、みかけの時定数を増やしている。また、特許文献２に開示されている計装アンプ／差動アンプでは、基本的に交流ＣＭＲＲは悪化しないとされている。この計装アンプ／差動アンプでは、図中の抵抗器（図１のＲ２とＲ４）の抵抗値が一定の場合、回路の入力抵抗値（図１のＲ１，Ｒ３）を小さくすると、回路全体の入力の電圧範囲が狭くなる。逆に入力電圧範囲を大きくする場合には、入力抵抗値（図１のＲ１，Ｒ３）を大きくする必要がある。 In this regard, Patent Document 1 relates to an AC coupled differential amplifier. For example, referring to FIG. 1, the common-mode voltage of each output is fed back to the inverting input terminals of the amplifiers A1 and A2 through the resistors R5 and R6. The apparent time constant is increased through the voltage dividing circuit using the resistor R1 or R4 by feeding back through the capacitors C3 and C4. In the instrumentation amplifier / differential amplifier disclosed in Patent Document 2, the AC CMRR is basically not deteriorated. In this instrumentation amplifier / differential amplifier, if the resistance values of the resistors in the figure (R2 and R4 in FIG. 1) are constant, if the input resistance values of the circuit (R1, R3 in FIG. 1) are reduced, the entire circuit The input voltage range becomes narrower. Conversely, when the input voltage range is increased, it is necessary to increase the input resistance value (R1, R3 in FIG. 1).
しかしながら、特許文献１では、帰還抵抗器Ｒ５，Ｒ６、あるいはブートストラップ回路、および入力に使っている抵抗器Ｒ１およびＲ４の抵抗値などに高いマッチング精度が要求されるため必要な回路特性を得ながらコストを抑えることは現実的には難しい。また、特許文献２では、抵抗器の熱雑音が増えることにより回路全体のノイズ特性が悪化する問題がある。一般には、計装アンプ・差動アンプの場合、微小な信号を利用可能な電圧まで増幅する必要があるため、大きなゲインをとる必要があり、特許文献２の方法では大きなゲインを得る場合大きな抵抗値を選ぶ必要があるためノイズが増えてしまい応用範囲が狭いと考えられる。 However, in Patent Document 1, high matching accuracy is required for the feedback resistors R5 and R6, or the bootstrap circuit, and the resistance values of the resistors R1 and R4 used for input, so that necessary circuit characteristics are obtained. In practice, it is difficult to keep costs down. Moreover, in patent document 2, there exists a problem which the noise characteristic of the whole circuit deteriorates, when the thermal noise of a resistor increases. In general, in the case of instrumentation amplifiers / differential amplifiers, it is necessary to amplify a minute signal to a usable voltage, so it is necessary to obtain a large gain. In the method of Patent Document 2, a large resistance is required when a large gain is obtained. Since it is necessary to select a value, noise increases and the application range is considered to be narrow.
本発明は、交流結合時のＣＭＲＲを実動作状況において改善することができる差動増幅回路を提供することを一つの目的としている。 An object of the present invention is to provide a differential amplifier circuit capable of improving CMRR during AC coupling in an actual operating state.
上記の目的等を達成するための本発明の一態様は、差動増幅器と、前記差動増幅器の入力端子に接続されたハイパスフィルタと、前記差動増幅器の正入力端子と負入力端子との間を接続する可変抵抗素子と、前記差動増幅器の出力レベルに応じて前記可変抵抗素子の抵抗値を変化させるための調整回路とを備えた差動増幅回路である。 An aspect of the present invention for achieving the above-described object and the like includes a differential amplifier , a high-pass filter connected to an input terminal of the differential amplifier, and a positive input terminal and a negative input terminal of the differential amplifier. A differential amplifier circuit comprising: a variable resistance element that connects the two; and an adjustment circuit that changes a resistance value of the variable resistance element in accordance with an output level of the differential amplifier.
本発明の一態様によれば、交流結合時のＣＭＲＲを実動作状況において改善することができる差動増幅回路が提供される。 According to one aspect of the present invention, a differential amplifier circuit that can improve CMRR during AC coupling in an actual operating state is provided.
本発明の差動増幅回路について、添付図面を参照しながらその一実施形態に即して説明する。まず従来の一般的な差動増幅回路について説明する。図６に一般的な差動増幅回路の回路図の例を示している。図６に例示する差動増幅回路では、差動増幅器Ｕ１の正入力端子にコンデンサＣ２が、負入力端子にコンデンサＣ１が接続されている。コンデンサＣ２とＣ１の入力端子側の間には２つの抵抗器Ｒ２，Ｒ３が直列に接続されている。抵抗器Ｒ２とＲ３の中点は接地されている。 A differential amplifier circuit of the present invention will be described in accordance with an embodiment thereof with reference to the accompanying drawings. First, a conventional general differential amplifier circuit will be described. FIG. 6 shows an example of a circuit diagram of a general differential amplifier circuit. In the differential amplifier circuit illustrated in FIG. 6, the capacitor C2 is connected to the positive input terminal of the differential amplifier U1, and the capacitor C1 is connected to the negative input terminal. Two resistors R2 and R3 are connected in series between the input terminals of the capacitors C2 and C1. The midpoint of resistors R2 and R3 is grounded.
図６に例示する理想的な差動増幅回路のＣＭＲＲは、入力時定数を規定する抵抗器Ｒ２，Ｒ３の抵抗値と入力コンデンサＣ２，Ｃ１の容量の誤差（マッチング精度）に大きく依存する。理想的な差動増幅器でない場合には、差動増幅器Ｕ１の入力インピーダンスを含めた抵抗器Ｒ２，Ｒ３の抵抗値との合成インピーダンス、および入力コンデンサＣ２，Ｃ１の容量により定まる時定数が、利用周波数帯域において一致する場合に、高い交流ＣＭＲＲが実現できる。 The CMRR of the ideal differential amplifier circuit illustrated in FIG. 6 greatly depends on the error (matching accuracy) between the resistance values of the resistors R2 and R3 that define the input time constant and the capacitances of the input capacitors C2 and C1. If the differential amplifier is not an ideal differential amplifier, the combined frequency with the resistance values of the resistors R2 and R3 including the input impedance of the differential amplifier U1 and the time constant determined by the capacitances of the input capacitors C2 and C1 are used frequencies. A high AC CMRR can be achieved if they match in the bands.
しかし、市販の一般的な抵抗器やコンデンサを用いる場合には、それらの製作精度は５％、１％精度であり、抵抗値、容量を完全に一致させることは困難である。交流ＣＭＲＲを改善するには、入力時定数の抵抗器Ｒ２，Ｒ３と入力コンデンサＣ２，Ｃ１による時定数（Ｒ２×Ｃ２、Ｒ３×Ｃ１）を、誤差の大きな部品を使っても一致させる必要がある。その一つの実現方法は、結合コンデンサＣ１，Ｃ２の値をできるだけ小さくして、入力時定数の抵抗器Ｒ２，Ｒ３の抵抗値を大きくすることである。あるいは、別の例として、結合コンデンサＣ１，Ｃ２の容量値を固定値とした場合には、入力時定数の抵抗器Ｒ２，Ｒ３の抵抗値を大きくすればよい。しかしながら、この方法では、入力信号のカットオフ周波数が極端に低くなるため、差動増幅回路全体が過渡状態から定常状態に移行するために長い時間を要してしまう。 However, when using commercially available general resistors and capacitors, their manufacturing accuracy is 5% and 1% accuracy, and it is difficult to make the resistance value and the capacitance completely coincide. In order to improve the AC CMRR, it is necessary to match the time constants (R2 × C2, R3 × C1) of the input time constant resistors R2 and R3 and the input capacitors C2 and C1 even if components having a large error are used. . One realization method is to reduce the values of the coupling capacitors C1 and C2 as much as possible and increase the resistance values of the resistors R2 and R3 having input time constants. Alternatively, as another example, when the capacitance values of the coupling capacitors C1 and C2 are fixed values, the resistance values of the resistors R2 and R3 having input time constants may be increased. However, in this method, since the cutoff frequency of the input signal is extremely low, it takes a long time for the entire differential amplifier circuit to shift from the transient state to the steady state.
入力信号が過渡状態から定常状態に移る場合の時定数は、増幅器Ｕ１が差動増幅器として機能していない状態から、差動増幅器として機能する状態に移行することと同じように考えることができる。したがって、この場合の時定数（Ｔ=Ｃ×Ｒ）は、合成容量Ｃ＝１／（１／Ｃ１＋１／Ｃ２）と合成抵抗Ｒ＝Ｒ２＋Ｒ３によって定まるため、合成容量を小さくして、合成抵抗値を大きくすることで、時定数を小さく、つまり、過渡応答状態から定常状態に移行する時間を短くすることができる。 The time constant when the input signal shifts from the transient state to the steady state can be considered in the same way as when the amplifier U1 does not function as a differential amplifier and shifts to a state that functions as a differential amplifier. Therefore, the time constant (T = C × R) in this case is determined by the combined capacitance C = 1 / (1 / C1 + 1 / C2) and the combined resistance R = R2 + R3. By increasing the time constant, the time constant can be reduced, that is, the time for transition from the transient response state to the steady state can be shortened.
例えば、回路全体に直流電圧が印加されて、増幅器Ｕ１のゲインが１０００倍、カットオフ周波数が０．００１Ｈｚであるとすると、回路全体が過渡状態から定常状態に移行するには１０００秒以上かかってしまうことになる。これは、例えば、回路全体をプローブやセンサーなどの増幅器として応用した場合、入力信号が遮断された状態、あるいは、入力端子が開放された状態から小信号の信号を増幅できるような状態に移行するまで長時間を要することを意味し、回路を応用する観点からは不便である。逆に過渡応答特性を重視すると、大きなＣや小さなＲを利用して回路の時定数を小さくする必要があり、交流ＣＭＲＲ特性が劣化することになる。そのため、交流ＣＭＲＲと時定数とはトレードオフの関係にあり、どちらも改善することは困難であった。 For example, if a DC voltage is applied to the entire circuit, the gain of the amplifier U1 is 1000 times, and the cutoff frequency is 0.001 Hz, it takes 1000 seconds or more for the entire circuit to transition from the transient state to the steady state. Will end up. For example, when the entire circuit is applied as an amplifier such as a probe or a sensor, the state shifts from a state where the input signal is blocked or a state where the input terminal is opened to a state where a small signal can be amplified. It is inconvenient from the viewpoint of applying the circuit. Conversely, if the transient response characteristic is emphasized, it is necessary to reduce the time constant of the circuit using a large C or a small R, and the AC CMRR characteristic is deteriorated. Therefore, AC CMRR and time constant are in a trade-off relationship, and it has been difficult to improve both.
実施例
次に、本発明の実施例に係る差動増幅回路について説明する。図１に本実施例の差動増幅回路の回路図を例示している。本実施例の差動増幅回路は前記した一般的な差動増幅回路（図６）と基本的な構成は同等であるが、増幅器Ｕ１の正負入力端子間を接続する可変抵抗素子Ｒ１が設けられている点が異なる。この可変抵抗素子Ｒ１の抵抗値は増幅器Ｕ１の出力に接続された調整回路ＣＩＲによって調整される。
Next, a differential amplifier circuit according to an embodiment of the present invention will be described. FIG. 1 illustrates a circuit diagram of the differential amplifier circuit of this embodiment. The basic configuration of the differential amplifier circuit of this embodiment is the same as that of the general differential amplifier circuit (FIG. 6) described above, but a variable resistance element R1 for connecting the positive and negative input terminals of the amplifier U1 is provided. Is different. The resistance value of the variable resistance element R1 is adjusted by an adjustment circuit CIR connected to the output of the amplifier U1.
本実施例の調整回路ＣＩＲは、増幅器Ｕ１の出力レベルをモニタしており、その信号を利用して差動入力増幅器Ｕ１の正入力端子と負入力端子との間にある可変抵抗素子Ｒ１の端子間抵抗値を変化させる機能を有する。増幅器Ｕ１の入力端子間電圧が大きい場合、つまり、入力信号が過渡状態にあるような場合には、調整回路ＣＩＲは、増幅器Ｕ１の出力端子の電圧が、正又は負のある電圧以上となっている条件で、可変抵抗素子Ｒ１の抵抗値を減少させる方向に作用する。一例として、調整回路ＣＩＲとして両波整流回路を用い、可変抵抗素子Ｒ１としてフォトカプラ（例えば、ＬＥＤとＣｄＳセルを組み合わせたアナログフォトカプラ）を用いることができる。具体的には、調整回路ＣＩＲは、増幅器Ｕ１の両波整流後の出力レベルが一定値を超えたときに、一定値との差分に応じてフォトカプラの信号の大きさを増加させるように動作して可変抵抗素子Ｒ１の抵抗値を減少させることができる。なお、調整回路ＣＩＲ、可変抵抗素子Ｒ１は、上記の動作特性を実現するどのような回路により構成してもよく、具体的な動作特性は、入力信号の条件、所要のゲイン等に応じて決定することができる。 The adjustment circuit CIR of the present embodiment monitors the output level of the amplifier U1, and uses the signal of the variable resistance element R1 between the positive input terminal and the negative input terminal of the differential input amplifier U1. It has a function to change the resistance value. When the voltage between the input terminals of the amplifier U1 is large, that is, when the input signal is in a transient state, the adjustment circuit CIR causes the voltage at the output terminal of the amplifier U1 to be equal to or higher than a positive or negative voltage. Under the condition that the resistance value of the variable resistance element R1 is decreased. As an example, a double-wave rectifier circuit can be used as the adjustment circuit CIR, and a photocoupler (for example, an analog photocoupler in which an LED and a CdS cell are combined) can be used as the variable resistance element R1. Specifically, the adjustment circuit CIR operates so as to increase the signal magnitude of the photocoupler according to the difference from the constant value when the output level after the two-wave rectification of the amplifier U1 exceeds the constant value. Thus, the resistance value of the variable resistance element R1 can be reduced. The adjustment circuit CIR and the variable resistance element R1 may be configured by any circuit that realizes the above operating characteristics, and the specific operating characteristics are determined according to the conditions of the input signal, the required gain, and the like. can do.
動作状態の例
例えば、直流電圧１０Ｖが入力端子（図１の入力１−入力２間）に印加され、増幅器Ｕ１のゲインが１０００倍であると仮定してみる。この場合、入力信号の線形応答範囲は１０ｍＶである。増幅器Ｕ１が過渡応答状態から定常応答状態に移行するには、増幅器Ｕ１の入力端子間電圧が１０ｍＶ以下になるまで待つ必要がある。したがって、可変抵抗素子Ｒ１が設けられない場合、抵抗器Ｒ２，Ｒ３を通して増幅器Ｕ１の同相入力電圧が１０ｍＶ以下になるまで待つ必要がある。コンデンサＣ１，Ｃ２の電荷は抵抗器Ｒ２，Ｒ３とオペアンプのインピーダンスを通して充電又は放電されるため、抵抗器Ｒ２，Ｒ３の抵抗値が大である場合には、その充電又は放電のために時間がかかることになる。
Example of Operation State For example, assume that a DC voltage of 10 V is applied to the input terminal (between input 1 and input 2 in FIG. 1), and the gain of the amplifier U1 is 1000 times. In this case, the linear response range of the input signal is 10 mV. In order for the amplifier U1 to shift from the transient response state to the steady response state, it is necessary to wait until the voltage between the input terminals of the amplifier U1 becomes 10 mV or less. Therefore, when the variable resistance element R1 is not provided, it is necessary to wait until the common-mode input voltage of the amplifier U1 becomes 10 mV or less through the resistors R2 and R3. Since the charges of the capacitors C1 and C2 are charged or discharged through the impedances of the resistors R2 and R3 and the operational amplifier, if the resistance values of the resistors R2 and R3 are large, the charging or discharging takes time. It will be.
一方、増幅器Ｕ１の入力端子間に可変抵抗素子Ｒ１を追加した本実施例の差動増幅回路（図１）では、過渡応答状態（この例では、増幅器Ｕ１の入力端子間電圧が１０ｍＶを超えている場合）から定常状態に移行する場合、コンデンサＣ１，Ｃ２の充電又は放電は、抵抗器Ｒ２，Ｒ３と、それらよりもはるかに小さな抵抗値を有する可変抵抗素子Ｒ１を通して行われる。したがって、抵抗器Ｒ２，Ｒ３のみにより充電又は放電される場合（図６の従来例）に比べて、回路全体を１０００分の１以下の短い時間で定常状態（増幅器Ｕ１の入力端子間電圧が１０ｍＶ以下の状態）に移行させることが可能となる。 On the other hand, in the differential amplifier circuit (FIG. 1) of the present embodiment in which the variable resistance element R1 is added between the input terminals of the amplifier U1, the transient response state (in this example, the voltage between the input terminals of the amplifier U1 exceeds 10 mV). When the transition to the steady state is performed, the capacitors C1 and C2 are charged or discharged through the resistors R2 and R3 and the variable resistance element R1 having a much smaller resistance value. Therefore, the entire circuit is in a steady state in a short time of 1/1000 or less (the voltage between the input terminals of the amplifier U1 is 10 mV) as compared with the case where only the resistors R2 and R3 are charged or discharged (conventional example in FIG. 6). It is possible to shift to the following state.
シミュレーション結果
図１に例示している本実施例の差動増幅回路による動作シミュレーション結果を、図２に示している。図２は、シミュレーションの対象となった回路についての入力信号の周波数と交流ＣＭＲＲとの関係を示している。図２のグラフで、実線は本実施例の回路、破線は比較例の回路、一点鎖線は両者に用いた増幅器Ｕ１の単体についての結果を示している。なお、本シミュレーションにおいては、図３〜図５に例示する動作特性を有するように回路条件を設定した。図４は本発明による回路がない場合の応答特性であり、７５０秒程度で過渡状態から定常状態に移行するように設計した回路である。同じ回路に、本発明を追加することにより得られる効果を示したものが図３である。図５は、本発明回路を備えた差動増幅回路（図１の例）と、本発明回路を有しない差動増幅回路（図６の例）の出力波形を比較して示すグラフを例示している。また、増幅器Ｕ１としては、一般的なオペアンプであればどれでも採用することができるが、一例としてはAD620，INA128，LT1167など（いずれもメーカーの製品型番）のオペアンプが考えられる。本シミュレーションで想定した増幅器Ｕ１は、一般的なオペアンプであって比較的ＣＭＲＲの大きなものを考えて、利用したものである。また、本実施例では調整回路ＣＩＲを、±１０Ｖ、ゲイン１０００倍（６０ｄＢ）という増幅器の動作条件で設計したため、１０ｍＶを超える入力がオペアンプ（増幅器Ｕ１）の入力に加わるような条件では、オペアンプの動作モードが線形状態から非線形状態（あるいは、定常状態から過渡状態）に変化すると考えられるが、本シミュレーション例の回路では、増幅器Ｕ１の入力に対して、数ｍＶ、つまり、アンプが線形増幅器として機能しなくなるレベルよりも低い電圧の条件では、調整回路ＣＩＲが動作を止める、つまり可変抵抗素子Ｒ１の値が十分に大きくなる特性で可変抵抗素子Ｒ１の抵抗値を変化させるものと設定した。これらのシミュレーション条件の設定は、本発明の技術的範囲をなんら制約するものではない。
Simulation Result FIG. 2 shows an operation simulation result by the differential amplifier circuit of this embodiment illustrated in FIG. FIG. 2 shows the relationship between the frequency of the input signal and the AC CMRR for the circuit to be simulated. In the graph of FIG. 2, the solid line indicates the result of the circuit of this example, the broken line indicates the result of the comparative example, and the alternate long and short dash line indicates the result of the amplifier U1 used for both. In this simulation, the circuit conditions are set so as to have the operation characteristics illustrated in FIGS. FIG. 4 shows the response characteristics when there is no circuit according to the present invention, which is a circuit designed to shift from a transient state to a steady state in about 750 seconds. FIG. 3 shows the effect obtained by adding the present invention to the same circuit. FIG. 5 illustrates a graph showing a comparison between output waveforms of a differential amplifier circuit (example in FIG. 1) having the circuit of the present invention and a differential amplifier circuit not having the circuit of the present invention (example in FIG. 6). ing. Further, as the amplifier U1, any general operational amplifier can be used. As an example, operational amplifiers such as AD620, INA128, and LT1167 (all of which are manufacturer's product model numbers) are conceivable. The amplifier U1 assumed in this simulation is a general operational amplifier that is used in consideration of a comparatively large CMRR. Further, in this embodiment, the adjustment circuit CIR is designed under the operating condition of the amplifier of ± 10 V and gain 1000 times (60 dB), so that the input of the operational amplifier (amplifier U1) is added to the input of the operational amplifier (amplifier U1). Although the operation mode is considered to change from a linear state to a non-linear state (or from a steady state to a transient state), in the circuit of this simulation example, several mV with respect to the input of the amplifier U1, that is, the amplifier functions as a linear amplifier. Under the condition of a voltage lower than the level at which it does not occur, the adjustment circuit CIR is set to stop the operation, that is, to change the resistance value of the variable resistance element R1 with a characteristic that the value of the variable resistance element R1 becomes sufficiently large. The setting of these simulation conditions does not limit the technical scope of the present invention.
図６の回路構成を有する比較例の差動増幅回路においては、回路入力の時定数を決定する部品であるコンデンサＣ１，Ｃ２、抵抗器Ｒ２，Ｒ３の定数を、設計値から１％ずらした設定とした。本実施例の差動増幅回路は、その比較例の回路に対して可変抵抗素子Ｒ１と調整回路ＣＩＲを設けた。この結果、図２に示されるように、従来方式の比較例では、回路部品の定数のわずかな誤差でも交流ＣＭＲＲが劣化することがわかる。例えば図２の入力周波数１００Ｈｚでの交流ＣＭＲＲは、わずか４０ｄＢに悪化している。これに対して、本実施例の回路では、入力周波数１００Ｈｚにおける交流ＣＭＲＲが１００ｄＢと、比較例に対して６０ｄＢの改善効果が得られることが確認された。
以上のように、本実施例の差動増幅回路によれば、入力時定数に関して所望の過渡応答特性を確保した上で、交流ＣＭＲＲの劣化を防止することができるという効果を奏するものである。
In the differential amplifier circuit of the comparative example having the circuit configuration of FIG. 6, the constants of capacitors C1 and C2 and resistors R2 and R3, which are components for determining the circuit input time constant, are set by shifting by 1% from the design values. It was. The differential amplifier circuit of this embodiment is provided with a variable resistance element R1 and an adjustment circuit CIR with respect to the circuit of the comparative example. As a result, as shown in FIG. 2, it can be seen that the AC CMRR deteriorates even with a slight error in the constants of the circuit components in the conventional comparative example. For example, the AC CMRR at an input frequency of 100 Hz in FIG. 2 has deteriorated to only 40 dB. In contrast, in the circuit of this example, it was confirmed that the AC CMRR at an input frequency of 100 Hz was 100 dB, and an improvement effect of 60 dB was obtained with respect to the comparative example.
As described above, according to the differential amplifier circuit of the present embodiment, it is possible to prevent the AC CMRR from being deteriorated while ensuring a desired transient response characteristic with respect to the input time constant.
応用例
本発明の差動増幅回路は、例えば、生体信号等の微小な信号を大きなゲインで増幅するような用途の測定器の入力段の増幅器などに用いることで、交流ＣＭＲＲが大きく、回復時間の時定数が短い測定器を実現することができる。測定器などの入力段では、高い交流ＣＭＲＲを有することで、外部からの同相ノイズの影響を少なくして微小な信号を増幅することができ、また、測定対象回路やセンサなどからの微小出力を次々と測定していくような場合、回路の入力端子は「開放→被測定物１へ接続→開放→被測定物２へ接続→…」という一連の動作を繰り返すことになる。このような場合、復旧時間の長い従来回路では試験時間を短縮することははなはだ困難であった。しかし、上記本実施例に例示するような本発明の差動増幅回路によれば、従来回路に比べて応答時間を相当短縮することができるため、効率よい測定が可能となる。
Application Example The differential amplifier circuit of the present invention is used for an amplifier in an input stage of a measuring instrument for a purpose of amplifying a minute signal such as a biological signal with a large gain, and thus has a large AC CMRR and a recovery time. A measuring instrument with a short time constant can be realized. By having a high AC CMRR at the input stage such as a measuring instrument, it is possible to amplify a minute signal by reducing the influence of external common mode noise, and to output a minute output from a circuit to be measured or a sensor. When measuring one after another, the input terminal of the circuit repeats a series of operations of “open → connect to device under test 1 → open → connect to device under test 2... In such a case, it is very difficult to shorten the test time with the conventional circuit having a long recovery time. However, according to the differential amplifier circuit of the present invention as exemplified in the above-described embodiment, the response time can be considerably shortened compared with the conventional circuit, so that efficient measurement is possible.
なお、本発明は上記した実施形態に限定されるものではなく、様々な変形例が含まれる。例えば，上記した実施形態は本発明を分かりやすく説明するために詳細に説明したものであり、必ずしも説明した全ての構成を備えるものに限定されるものではない。また、実施形態の構成の一部を他の構成に置き換えることが可能であり、また、ある実施形態の構成に他の構成を加えることも可能である。 In addition, this invention is not limited to above-described embodiment, Various modifications are included. For example, the above-described embodiment has been described in detail for easy understanding of the present invention, and is not necessarily limited to one having all the configurations described. In addition, a part of the configuration of the embodiment can be replaced with another configuration, and another configuration can be added to the configuration of a certain embodiment.
Ｃ１，Ｃ２ コンデンサ
Ｒ１ 可変抵抗素子
Ｒ２，Ｒ３ 抵抗器
ＣＩＲ 調整回路
Ｕ１ 差動増幅器
C1, C2 Capacitor R1, Variable resistance element R2, R3 Resistor CIR Adjustment circuit U1 Differential amplifier
Claims (4)
前記差動増幅器の入力端子に接続されたハイパスフィルタと、
前記差動増幅器の正入力端子と負入力端子との間を接続する可変抵抗素子と、
前記差動増幅器の出力レベルに応じて前記可変抵抗素子の抵抗値を変化させるための調整回路と、を備えた差動増幅回路。 A differential amplifier ;
A high-pass filter connected to the input terminal of the differential amplifier;
A variable resistance element for connecting between a positive input terminal and a negative input terminal of the differential amplifier;
A differential amplifier circuit comprising: an adjustment circuit for changing a resistance value of the variable resistance element according to an output level of the differential amplifier;
前記差動増幅器の入力端子に接続されたハイパスフィルタと、
前記差動増幅器の正入力端子と負入力端子との間を接続する可変抵抗素子と、
前記差動増幅器の出力レベルに応じて前記可変抵抗素子の抵抗値を変化させるための調整回路と、を備えた差動増幅回路を備えている電気信号の測定器。 A differential amplifier ;
A high-pass filter connected to the input terminal of the differential amplifier;
A variable resistance element for connecting between a positive input terminal and a negative input terminal of the differential amplifier;
An electrical signal measuring instrument comprising a differential amplifier circuit comprising: an adjustment circuit for changing a resistance value of the variable resistance element in accordance with an output level of the differential amplifier.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015016531A JP5759644B1 (en) | 2015-01-30 | 2015-01-30 | Differential amplifier circuit |
| PCT/JP2016/052691 WO2016121943A1 (en) | 2015-01-30 | 2016-01-29 | Differential amplification circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015016531A JP5759644B1 (en) | 2015-01-30 | 2015-01-30 | Differential amplifier circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP5759644B1 true JP5759644B1 (en) | 2015-08-05 |
| JP2016143946A JP2016143946A (en) | 2016-08-08 |
Family
ID=53887600
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015016531A Active JP5759644B1 (en) | 2015-01-30 | 2015-01-30 | Differential amplifier circuit |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP5759644B1 (en) |
| WO (1) | WO2016121943A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017175603A1 (en) * | 2016-04-06 | 2017-10-12 | Ntn株式会社 | Capacitance change detection circuit and monitoring device |
| CN110166384A (en) * | 2019-05-28 | 2019-08-23 | 苏州浪潮智能科技有限公司 | A kind of differential signal transmission circuit and communication device |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018107643A (en) * | 2016-12-27 | 2018-07-05 | ヤマハ株式会社 | Differential amplifier |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5323252A (en) * | 1976-08-16 | 1978-03-03 | Yashica Co Ltd | Operational amplifier |
| JPS606330U (en) * | 1983-12-26 | 1985-01-17 | 株式会社日立製作所 | differential amplifier |
| JPS6133520U (en) * | 1984-07-27 | 1986-02-28 | 横河電機株式会社 | differential amplifier circuit |
| JPS6326106A (en) * | 1986-07-18 | 1988-02-03 | Mitsubishi Electric Corp | Amplifier circuit |
| JPH05206747A (en) * | 1992-01-27 | 1993-08-13 | Iwatsu Electric Co Ltd | Broad band amplifier |
-
2015
- 2015-01-30 JP JP2015016531A patent/JP5759644B1/en active Active
-
2016
- 2016-01-29 WO PCT/JP2016/052691 patent/WO2016121943A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5323252A (en) * | 1976-08-16 | 1978-03-03 | Yashica Co Ltd | Operational amplifier |
| JPS606330U (en) * | 1983-12-26 | 1985-01-17 | 株式会社日立製作所 | differential amplifier |
| JPS6133520U (en) * | 1984-07-27 | 1986-02-28 | 横河電機株式会社 | differential amplifier circuit |
| JPS6326106A (en) * | 1986-07-18 | 1988-02-03 | Mitsubishi Electric Corp | Amplifier circuit |
| JPH05206747A (en) * | 1992-01-27 | 1993-08-13 | Iwatsu Electric Co Ltd | Broad band amplifier |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017175603A1 (en) * | 2016-04-06 | 2017-10-12 | Ntn株式会社 | Capacitance change detection circuit and monitoring device |
| CN110166384A (en) * | 2019-05-28 | 2019-08-23 | 苏州浪潮智能科技有限公司 | A kind of differential signal transmission circuit and communication device |
| CN110166384B (en) * | 2019-05-28 | 2022-02-18 | 苏州浪潮智能科技有限公司 | Differential signal transmission circuit and communication device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2016143946A (en) | 2016-08-08 |
| WO2016121943A1 (en) | 2016-08-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6744695B2 (en) | Active shunt ammeter | |
| JP5759644B1 (en) | Differential amplifier circuit | |
| JP2006174122A (en) | Output amplifier circuit, and sensor device using the same | |
| CN112083212B (en) | Current sensor and frequency compensation method thereof | |
| CN102035483B (en) | Operational amplifier | |
| CN102577287B (en) | High speed intra-pair de-skew circuit | |
| RU128043U1 (en) | ACTIVE LOW FILTER RC FILTER | |
| JP5348389B2 (en) | oscilloscope | |
| CN104883147A (en) | Preamplifier of acoustic emission detector | |
| JP2008261722A (en) | Probe | |
| Bajer et al. | Voltage-mode quadrature oscillator using VD-DIBA active elements | |
| WO2006008945A1 (en) | Video signal output circuit, and electronic device using the circuit | |
| JP2014072680A (en) | Amplification circuit | |
| JP2001177063A (en) | Semiconductor device, and amplifying circuit, and active filter | |
| JP6698045B2 (en) | amplifier | |
| JP6695262B2 (en) | Variable low-pass filter circuit | |
| JP6512826B2 (en) | Differential amplifier | |
| JP6725781B2 (en) | Impedance increase/decrease circuit | |
| TWI660575B (en) | Operational amplifier device with improved output voltage response | |
| WO2024090239A1 (en) | Differential input/differential output inverting amplifier circuit and measuring device | |
| US9013221B2 (en) | Low-voltage differential signal receiver circuitry | |
| CN105509626A (en) | Instrument amplification circuit for micro displacement testing | |
| JP5944740B2 (en) | Bandpass filter circuit | |
| JP2014155169A (en) | Operational amplifier | |
| CN109962687B (en) | Automatic transconductance control amplifying circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150514 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150602 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150605 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5759644 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7423 Effective date: 20151019 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R360 | Written notification for declining of transfer of rights |
Free format text: JAPANESE INTERMEDIATE CODE: R360 |
|
| R370 | Written measure of declining of transfer procedure |
Free format text: JAPANESE INTERMEDIATE CODE: R370 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160225 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |