JP5707695B2 - Flash disk device - Google Patents

Description

  The present invention relates to a semiconductor disk device, and more particularly to a flash disk device using a flash memory.

  With the recent increase in capacity and cost of non-volatile memories, flash disk devices, which are disks using non-volatile memories, have been developed, and many products are beginning to circulate in the market.

  The flash memory is composed of a plurality of blocks, and each of these blocks is composed of a plurality of pages. A page is a unit of read / write, and is usually 512 bytes with the same size as a sector which is the minimum unit of read / write in a hard disk device such as a magnetic disk device.

  When rewriting data in a page, normally, new data is written after erasing previous data. A block is a unit of erasure, generally 16 Kbytes, and even if rewriting is a partial page in this block, it is necessary to erase the entire block.

  In a flash disk device using such a flash memory, a bit error occurs in the data stored in the flash memory with a certain probability, and erasure is performed for each block, but the lifetime of the number of erasures for each block. However, there is a restriction that it has a short life of, for example, 100,000 times to 1 million times.

  In order to solve these restrictions, an empty area is prepared in advance in the flash disk device regardless of the logical address designated by the central processing unit (hereinafter referred to as “CPU”) of the host, and designated by the host CPU. A method in which the logical address of the write data is converted into a physical address in an empty area on the flash memory by an address table for converting the logical address into a physical address, and the write data is sequentially written in the empty area in the physical address Has been proposed.

  The management data part, which is a redundant bit part for each physical chunk composed of a plurality of pages in the flash memory, holds a logical chunk number corresponding to the physical chunk and an update number indicating the new and old data every time data writing is completed. The address table is stored in a non-volatile memory separate from the flash memory, eliminating the overhead of writing the address table and address table log to the flash memory, and managing the logical chunks and update numbers along with the data A technique has been proposed in which data is simultaneously written in each physical chunk of the flash memory and the consistency between the data and the management data is always maintained (see, for example, Patent Document 1).

Japanese Patent Laying-Open No. 2005-242897 (pages 14-16, FIGS. 14, 15)

  However, in the above conventional technique, in the address data reconfiguration performed at startup, the management data part is read and only the management data part is checked. Therefore, when the power is cut off during data writing, the management data part is managed. There is a problem that the data portion is normal, incomplete write data is treated as valid data, and the data area remains broken.

  The present invention employs the following means in order to solve the aforementioned problems. That is, for each predetermined capacity, an error correction code for performing error correction of data, a logical address corresponding to a physical address, and a flash memory including management data for storing update numbers indicating new and old of the rewritten data, A non-volatile memory for storing an address table for associating a logical address and a physical address, and a control means for controlling the flash memory and the non-volatile memory. Only when there is no error after performing an error correction process of the address data, when there is the same physical address in the address table, the address table is updated with the physical address of the new number by the respective update numbers.

  According to the flash memory device of the present invention, for each predetermined capacity, management data for storing an error correction code for performing error correction of data, a logical address corresponding to a physical address, and an update number indicating the new and old of the rewritten data A flash memory, a non-volatile memory for storing an address table for associating the logical address with a physical address, and a control means for controlling the flash memory and the non-volatile memory. When there is no error by performing error correction processing of the data at the physical address at the time of the processing, when there is the same physical address in the address table, the address table with the physical address of the new number by the respective update numbers The power is turned off during data writing. It is possible to avoid a state that broke data area by incomplete write data in a case was.

1 is a configuration diagram of a flash disk device according to Embodiment 1. FIG. 1 is a logical configuration diagram of a flash memory according to Embodiment 1. FIG. 3 is an exemplary diagram of a flash memory and an address table according to Embodiment 1. FIG. FIG. 3 is an operation flowchart when starting up the flash disk device according to the first embodiment.

  Embodiments of the present invention will be described below with reference to the drawings. Elements common to the drawings are given the same reference numerals.

(Constitution)
FIG. 1 is a schematic configuration diagram of the flash disk device according to the first embodiment, and FIG. 2 is a logical configuration diagram of the flash memory of FIG. First, as shown in FIG. 1, a flash disk device 10 used in this embodiment is connected to a host machine 1 such as a host CPU by a host interface (hereinafter referred to as “I / F”) bus 2. Has been. The flash disk device 10 includes, for example, a microprocessor unit (hereinafter referred to as “MPU”) 11 that functions as control means such as a flash memory and a nonvolatile memory.

  The MPU 11 includes a RAM 11a, a read-only memory (hereinafter referred to as “ROM”) 11b, an input / output (hereinafter referred to as “I / O”) port 11c, and the like, to which a nonvolatile memory 12 is connected. Yes.

  The nonvolatile memory 12 is access-controlled by the MPU 11 and has a memory structure (FRAM, MRAM) that can be rewritten in units of words, such as a RAM that can be easily controlled to hold a management table or list. Etc.).

  The flash disk device 10 is provided with a host I / F controller 13 connected to the host I / F bus 2. The host I / F controller 13 is a circuit that processes the protocol of the host I / F and exchanges data with the host machine 1. A buffer memory 15 is connected to the host I / F controller 13 via the internal data bus 14. ing.

  The buffer memory 15 is a memory that temporarily stores and processes read / write data from the host machine 1. A flash memory controller 16 is connected to the internal data bus 14, and one or more flash memories 20 are connected to the flash memory controller 16 via a flash memory bus 17.

  The flash memory controller 16 is a circuit that controls access to the flash memory 20 in accordance with an instruction from the MPU 11, and includes a data reading unit 16a, a data writing unit 16b, a block erasing unit 16c, and the like. The one or more flash memories 20 are memories that store write data from the host machine 1 in a nonvolatile manner.

  Next, the logical configuration of the flash memory 20 shown in FIG. 1 will be described with reference to FIG. As shown in the figure, the flash memory 20 has a plurality of blocks 21-0,..., 21-N for storing data, which are erase units. Each block 21 has a plurality of pages for storing data, which is a read / write unit.

  One page has a storage capacity of 512 bytes, for example. In such a flash memory 20, it is necessary to erase one entire block even if rewriting is performed on some pages in the block 21.

  In order to manage a plurality of sectors (pages) in units of chunks, read / write from the host machine 1 to the flash memory 20 is performed in units of chunks. In other words, at the logical address 25 of the host machine 1, a plurality of logical sectors are collectively accessed in units of logical chunks. In this embodiment, the case where 8 pages are grouped into one chunk will be described as an example. However, 16 pages may be grouped into one chunk, or more or vice versa. May be. When 8 pages are grouped into one chunk, 8 * 512 bytes = 4096 bytes is one chunk of data.

  An address table 30 is stored in the nonvolatile memory 12. The address table 30 stores a plurality of address conversion information for converting a logical chunk designated by the host machine 1 into a physical chunk that is a physical address on the flash memory 20.

  The address table 30 stores empty chunk information 30a that is a list of physical chunks to which no data is written. The empty chunk information 30a may be provided for each logical chunk as shown in FIG.

  The flash memory 20 has a plurality of blocks 21-0, 21-1,... For storing data, which is a unit of erasure, and each block 21-0, 21-1,. This page has a plurality of physical chunks (8 pages as described above in this example).

  FIG. 3 is a view showing an example of the data contents on the flash memory and the contents of the address table 30. As shown in the figure, each physical chunk stores 4096-byte data 21d and, for example, 16-byte management data 21k for managing the data.

  The management data 21k includes an error correction code for data error correction, a logical chunk number corresponding to the physical chunk, and an update number that is updated by adding, for example, +1 each time data writing of the physical chunk is completed. The state flag indicating the state such as the erased state of the physical chunk can be stored.

  In FIG. 3, the first physical chunk 0 stores “4” as the logical chunk number, and is therefore associated with the logical chunk 4, the update number is “10”, the status flag is “0”, and the write state It is shown that. The last physical chunk M stores “1” as the logical chunk number. Therefore, the last physical chunk M is associated with the logical chunk 1, the update number is “6”, the status flag is “0”, and is in the write state. It is shown that.

  The next physical chunk 1 has no associated logical chunk and is all “1”, indicating that it is unused.

  The physical chunk 9 is associated with the same logical chunk 4 as the physical chunk 0 as an example when the power is turned off at the time of data writing, the update number is “11”, and the status flag is “0”. Indicates that it is in a writing state.

(Operation)
With the above configuration, the flash disk device of the first embodiment operates as follows. The reconfiguration operation of the address table 30 performed when the flash disk device is started up will be described in detail below with reference to the flash memory and the address table illustrated in FIG. 3 and the operation flowchart shown in FIG. Since the read / write operation is the same as that of the flash memory device of Patent Document 1, detailed description thereof is omitted.

  First, when start-up processing is started, I, which is a physical chunk number, is initialized to “0”, and the last physical chunk number is set to M (step S01).

  Next, it is determined whether or not the physical chunk number I is greater than M (step S02). If I is greater than M, it is determined that all physical chunks have been processed, and this process ends.

  On the other hand, when the physical chunk number I is equal to or less than M, the logical chunk number and the update number recorded in the physical chunk are read (step S03).

  In this case, since I = 0, “4” as the logical chunk number and “10” as the update number are read from the management data 21k0 of the physical chunk 0.

  Next, it is determined from the logical chunk number read from the management data 21k0 whether the content of the logical chunk in the address table 30 is “free” (step S04). In this case, the logical chunk number is “4”. Since the logical chunk 4 is not “empty” but stores “physical chunk 0”, the process proceeds to step S05, and error correction processing of the physical chunk, that is, physical chunk 0 is performed. It is confirmed whether there is no bit error (step S06).

  If there is no bit error in the data of physical chunk 0 in step S06, the physical chunk number registered in the address table 30 as the logical chunk 4 corresponding to the physical chunk 0 is referred to, and the registered physical chunk “0” is acquired as the number, and this is compared with the physical chunk number (I = 0) (step S07). If the numbers are the same, it is determined that there are no duplicated physical chunks, and the process proceeds to step 09. , I is incremented, and the process returns to step S02 to similarly process the next physical chunk.

  On the other hand, for example, in the case of physical chunk 9 (I = 9), the corresponding logical chunk number is “4”, and the physical chunk number described as this logical chunk number in the address table 30 is “0”. If it is different from the physical chunk number (I = 9), there are already duplicated physical chunks, so the update number of the registered physical chunk 0 (“10”) and the update number of the physical chunk 9 ( "11") (step S07), the address table is updated with the number of the new physical chunk with the larger update number, in this case the physical chunk number "9" (step S08), and I is incremented. (Step S09), the process returns to Step S02 to process the next physical chunk. Although not shown, the physical chunk with the smaller update number, in this case the physical chunk 0, is empty and all “1” s are written.

  Returning to step 04 again, if the physical chunk 1 is empty and all are “1” as in the case of I = 1 in step 04, the process proceeds to step S08, and the address table 30 is referred to. The selected logical chunk, for example, logical chunk 3 is selected, “1” is stored in the address table 30 as the physical chunk number of logical chunk 3, and “3” is stored in the management data 21k1 of physical chunk 1 as the logical chunk number. Store (step S08). Then, I is incremented (step S09), the process returns to step S02, and the next physical chunk is similarly processed.

(Effect of Example 1)
As described above, according to the flash disk device of the first embodiment, only when there is no error by performing error correction processing on the data area of the physical chunk at the time of processing at the time of reconfiguration of the address table, the address When there is the same physical chunk number in the table, the address table is updated with the new physical chunk number by each update number, so incomplete writing even when the power is cut off during data writing It is possible to prevent the data area from being broken by data.

  As described above, the present invention can be widely used for nonvolatile storage devices such as flash memory devices composed of a nonvolatile memory that can be rewritten a plurality of times.

1 Host machine 10 Flash disk 11 MPU
12 Nonvolatile memory 16 Flash memory controller 21 Flash memory 21d Data area 21k Management data 30 Address table

Claims (2)

For each predetermined capacity, an error correction code for performing error correction of data, a logical address corresponding to the physical address, an update number indicating the new and old of the rewritten data, and whether or not the physical address is usable Flash memory with management data for storing status flags ;
A nonvolatile memory that stores an address table that associates the logical address with the physical address, and a control unit that controls the flash memory and the nonvolatile memory,
When the address table is reconfigured at startup, if the logical address is not empty, an error correction process is performed on the data of the physical address, and if it is determined that there is no error, it is already registered in duplicate. When there is a physical address that has been updated, the address table is updated with the physical address of the new number according to each of the update numbers,
After updating the address table, the flash memory device stores the same specified value in the status flag, error correction code, logical address, and update number of the physical address with the oldest update number. 2. The flash memory device according to claim 1, wherein whether or not a physical address is usable is determined based on the same specified value in which the status flag is stored.

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