JP5531529B2 - Substrate with piezoelectric thin film, piezoelectric thin film element, actuator, and sensor - Google Patents

Substrate with piezoelectric thin film, piezoelectric thin film element, actuator, and sensor Download PDF

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JP5531529B2
JP5531529B2 JP2009218467A JP2009218467A JP5531529B2 JP 5531529 B2 JP5531529 B2 JP 5531529B2 JP 2009218467 A JP2009218467 A JP 2009218467A JP 2009218467 A JP2009218467 A JP 2009218467A JP 5531529 B2 JP5531529 B2 JP 5531529B2
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thin film
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JP2011071150A (en
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憲治 柴田
和史 末永
秀樹 佐藤
明 野本
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Hitachi Metals Ltd
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Description

本発明は、圧電薄膜付基板、圧電薄膜素子、アクチュエータ、及びセンサに関する。特に、本発明は、ペロブスカイト構造の圧電薄膜を備えた圧電薄膜付基板、圧電薄膜素子、アクチュエータ、及びセンサに関する。   The present invention relates to a substrate with a piezoelectric thin film, a piezoelectric thin film element, an actuator, and a sensor. In particular, the present invention relates to a substrate with a piezoelectric thin film including a piezoelectric thin film having a perovskite structure, a piezoelectric thin film element, an actuator, and a sensor.

アクチュエータ、センサ等には圧電体を有する圧電素子が用いられている。そのような圧電素子を形成する圧電体としては、Pb(Zr1−xTi)O系のペロブスカイト型強誘電体(PZT)が広く用いられている。例えば、シリコン基板上にスパッタリング法で形成したPZT薄膜が、高速高精細のインクジェットプリンタヘッド用アクチュエータの圧電薄膜として実用化されている。しかしながら、PZTは、60重量%〜70重量%程度の鉛(Pb)を含有しているので、生態学的見地及び公害防止の観点から鉛を含有しない圧電体、すなわち、鉛フリーの圧電体を圧電素子に用いることが望まれる。さまざまな非鉛圧電材料が研究されている中で、ニオブ酸カリウムナトリウム(一般式:(KNa1−x)NbO(0<x<1))が知られている。ニオブ酸カリウムナトリウムはペロブスカイト構造を有する材料であり、非鉛の材料をしては比較的良好な圧電特性を示すので、非鉛圧電材料の有力な候補として期待されている。 Piezoelectric elements having a piezoelectric body are used for actuators, sensors, and the like. As a piezoelectric body forming such a piezoelectric element, a Pb (Zr 1-x Ti x ) O 3 perovskite ferroelectric (PZT) is widely used. For example, a PZT thin film formed on a silicon substrate by a sputtering method has been put into practical use as a piezoelectric thin film for an actuator for a high-speed, high-definition inkjet printer head. However, since PZT contains about 60 wt% to 70 wt% of lead (Pb), a piezoelectric body that does not contain lead, that is, a lead-free piezoelectric body is used from the viewpoint of ecological viewpoint and pollution prevention. It is desirable to use it for a piezoelectric element. Among various lead-free piezoelectric materials being studied, potassium sodium niobate (general formula: (K x Na 1-x ) NbO 3 (0 <x <1)) is known. Since potassium sodium niobate is a material having a perovskite structure and exhibits relatively good piezoelectric characteristics as a lead-free material, it is expected as a promising candidate for a lead-free piezoelectric material.

従来、ニオブ酸カリウムナトリウム薄膜は、スパッタリング法、ゾルゲル法、エアロゾルデポジション法等の成膜方法でシリコン基板上への成膜が試みられており、一部では圧電薄膜として実用化レベルの特性が実現されている(例えば、非特許文献1参照)。   Conventionally, a potassium sodium niobate thin film has been attempted to be deposited on a silicon substrate by a film forming method such as a sputtering method, a sol-gel method, an aerosol deposition method, etc. (For example, refer nonpatent literature 1).

Applied Physics Epressl (2008) 011501Applied Physics Epressl (2008) 011501

しかし、圧電定数d31が−90pm/V以上である圧電薄膜を安定的に得ることが困難であり、例えば、当該圧電薄膜をインクジェットプリンタのヘッドに適用するには更なる改良が必要である。 However, it is difficult to stably obtain a piezoelectric thin film having a piezoelectric constant d 31 of −90 pm / V or more. For example, further improvement is required to apply the piezoelectric thin film to an inkjet printer head.

したがって、本発明の目的は、圧電定数d31が良好であると共に、圧電特性の温度上昇に伴う特性の劣化の小さい圧電薄膜付基板、圧電薄膜素子、アクチュエータ、及びセンサを提供することにある。 Accordingly, an object of the present invention is in conjunction with the piezoelectric constant d 31 is good, a small piezoelectric thin film substrate with a deterioration of the characteristics caused by the temperature rise of the piezoelectric characteristics, the piezoelectric thin film element, an actuator, and to provide a sensor.

(1)本発明は、上記目的を達成するため、基板と、基板の上方に設けられる下部電極と、下部電極上に設けられ、一般式(K1−xNa)NbO(0.4≦x≦0.7)で表されるアルカリニオブ酸化物系化合物からなる圧電薄膜とを備え、圧電薄膜は、膜面内方向の内部応力をσ、温度をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔTが負の傾きを有し、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.2495×106から−0.6866×106(Pa/℃)の範囲内であり、20℃での圧電定数d 31 が−100pm/V以上(当該圧電定数に関する「以上」とは絶対値が大きいことを示す)、かつ圧電定数の温度による変化率d 31 (150℃)/d 31 (20℃)が0.9以上である圧電薄膜付基板が提供される。
(2)また、基板と、基板の上方に設けられる下部電極と、下部電極上に設けられ、一般式(K 1−x Na )NbO (0.4≦x≦0.7)で表されるアルカリニオブ酸化物系化合物からなる圧電薄膜とを備え、圧電薄膜は、膜面内方向の内部応力をσ、温度をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔTが負の傾きを有し、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.2495×10 6 から−0.6866×10 6 (Pa/℃)の範囲内であり、20℃での圧電定数d 31 が−100pm/V以上(当該圧電定数に関する「以上」とは絶対値が大きいことを示す)、かつ圧電定数の温度による変化率d 31 (150℃)/d 31 (20℃)が0.9以上である圧電薄膜付基板(ただし、前記圧電薄膜が、前記基板の基板温度を550℃以下に設定して形成されたものである圧電薄膜付基板は除く)が提供される。
(1) In order to achieve the above object, the present invention is provided on the substrate, the lower electrode provided above the substrate, and the lower electrode, and is represented by the general formula (K 1-x Na x ) NbO 3 (0.4 ≦ x ≦ 0.7), and a piezoelectric thin film made of an alkali niobium oxide-based compound. The piezoelectric thin film corresponds to a temperature change ΔT when σ is the internal stress in the in-plane direction and T is the temperature. The ratio Δσ / ΔT of the change in internal stress Δσ has a negative slope, and the average value of Δσ / ΔT between 20 ° C. and 250 ° C. is −0.2495 × 10 6 to −0.6866 × 10 6 (Pa / range der of ° C.) is, the piezoelectric constant d 31 at 20 ° C. is -100 pm / V or more (indicating that the absolute value is the "more" for the piezoelectric constant is large), and the rate of change with temperature of the piezoelectric constant d 31 (150 ℃) / d 31 (20 ℃) 0.9 Ru on Der piezoelectric thin film with a substrate is provided.
(2) Moreover, it is provided on the substrate, the lower electrode provided above the substrate, and the lower electrode, and is represented by the general formula (K 1-x Na x ) NbO 3 (0.4 ≦ x ≦ 0.7). A piezoelectric thin film made of an alkali niobium oxide-based compound, and the piezoelectric thin film has a ratio Δσ / of the change Δσ of the internal stress to the temperature change ΔT when the internal stress in the in-plane direction is σ and the temperature is T ΔT has a negative slope, and the average value of Δσ / ΔT at 20 ° C. or more and 250 ° C. or less is in the range of −0.2495 × 10 6 to −0.6866 × 10 6 (Pa / ° C.), Piezoelectric constant d 31 at −100 pm / V or more (“or more” for the piezoelectric constant indicates that the absolute value is large), and rate of change of piezoelectric constant with temperature d 31 (150 ° C.) / D 31 ( Substrate with piezoelectric thin film (20 ° C) is 0.9 or more (however, The piezoelectric thin film, the substrate with the piezoelectric thin film and the substrate temperature and is formed by setting the 550 ° C. or less of the substrate is excluded) is provided.

)また、上記圧電薄膜付基板は、圧電薄膜は、20℃における膜面内方向の内部応力が、−80MPa以上250MPa以下の範囲内であることが好ましい。 ( 3 ) Moreover, as for the said board | substrate with a piezoelectric thin film, as for a piezoelectric thin film, it is preferable that the internal stress of the film surface direction in 20 degreeC exists in the range of -80 Mpa or more and 250 Mpa or less.

)また、上記圧電薄膜付基板は、圧電薄膜は、圧電薄膜の膜面内方向の内部応力と温度との関係を示すグラフにおいて、250℃以上400℃以下の温度範囲内に変曲点を有し、20℃以上250℃以下の範囲におけるΔσ/ΔTの平均値より、400℃以上500℃以下の範囲内におけるΔσ/ΔTの平均値が小さいことが好ましい。 ( 4 ) Further, in the above-mentioned substrate with piezoelectric thin film, the piezoelectric thin film has an inflection point in a temperature range of 250 ° C. or higher and 400 ° C. or lower in a graph showing the relationship between the internal stress in the in-plane direction of the piezoelectric thin film and the temperature. It is preferable that the average value of Δσ / ΔT in the range of 400 ° C. to 500 ° C. is smaller than the average value of Δσ / ΔT in the range of 20 ° C. to 250 ° C.

)また、上記圧電薄膜付基板は、圧電薄膜は、下部電極上に圧電薄膜を形成する際における所定の温度での膜面内方向の内部応力が−500MPaを超え−200MPa以下の範囲内であり、前記所定の温度は、前記圧電薄膜を成膜する際における最高温度に相当する温度であることが好ましい。 ( 5 ) Further, in the substrate with the piezoelectric thin film, the piezoelectric thin film has an internal stress in the in-plane direction at a predetermined temperature when the piezoelectric thin film is formed on the lower electrode in the range of more than −500 MPa and not more than −200 MPa. der is, the predetermined temperature is a temperature der Rukoto corresponding to the maximum temperature at the time of forming the piezoelectric thin film is preferable.

)また、上記圧電薄膜付基板は、下部電極は、白金(Pt)から形成されることが好ましい。 ( 6 ) Moreover, as for the said board | substrate with a piezoelectric thin film, it is preferable that a lower electrode is formed from platinum (Pt).

)また、上記圧電薄膜付基板は、基板と下部電極との間に、チタン(Ti)層を更に備えることもできる。 ( 7 ) The piezoelectric thin film-attached substrate may further include a titanium (Ti) layer between the substrate and the lower electrode.

)また、上記圧電薄膜付基板は、基板は、表面に熱酸化膜を有することもできる。 ( 8 ) Moreover, the board | substrate with a said piezoelectric thin film can also have a thermal oxide film on the surface.

(9)また、上記圧電薄膜付基板は、所定の温度は、550℃以上600℃以下の範囲であることが好ましい。   (9) Moreover, it is preferable that predetermined | prescribed temperature is the range of 550 degreeC or more and 600 degrees C or less of the said board | substrate with a piezoelectric thin film.

(10)また、本発明は、上記目的を達成するため、上記(1)〜(9)のいずれか1つに記載の圧電薄膜付基板と、前記圧電薄膜上に設けられる上部電極とを備える圧電薄膜素子が提供される。 (10) Further, the present invention is to achieve the above object, the above (1) Preparations ~ and piezoelectric thin film with board according to any one of (9), and an upper electrode provided on the piezoelectric thin film A piezoelectric thin film element is provided.

11)また、本発明は上記目的を達成するため、上記(1)〜(9)のいずれか1つに記載の圧電薄膜付基板を備えるアクチュエータが提供される。 ( 11 ) Moreover, in order to achieve the said objective, this invention provides an actuator provided with the board | substrate with a piezoelectric thin film as described in any one of said (1)-(9).

12)また、本発明は上記目的を達成するため、上記(1)〜(9)のいずれか1つに記載の圧電薄膜付基板を備えるセンサが提供される。 ( 12 ) Moreover, in order to achieve the said objective, this invention provides a sensor provided with the board | substrate with a piezoelectric thin film as described in any one of said (1)-(9).

本発明に係る圧電薄膜付基板、圧電薄膜素子、アクチュエータ、及びセンサによれば、圧電定数d31が良好であると共に、圧電特性の温度上昇に伴う特性の劣化の小さい圧電薄膜付基板、圧電薄膜素子、アクチュエータ、及びセンサを提供できる。 The piezoelectric thin film substrate with the present invention, a piezoelectric thin film element, an actuator, and according to the sensor, the piezoelectric constant d 31 is good, a small piezoelectric thin film substrate with a deterioration of the characteristics caused by the temperature rise of the piezoelectric characteristics, the piezoelectric thin film Elements, actuators, and sensors can be provided.

本発明の第1の実施の形態に係る圧電薄膜付基板の断面図である。It is sectional drawing of the board | substrate with a piezoelectric thin film which concerns on the 1st Embodiment of this invention. 本発明の第2の実施の形態に係る圧電薄膜付基板の断面図である。It is sectional drawing of the board | substrate with a piezoelectric thin film which concerns on the 2nd Embodiment of this invention. 本発明の第3の実施の形態に係る圧電薄膜付基板の断面図である。It is sectional drawing of the board | substrate with a piezoelectric thin film which concerns on the 3rd Embodiment of this invention. 本発明の第4の実施の形態に係る圧電薄膜素子の断面図である。It is sectional drawing of the piezoelectric thin film element which concerns on the 4th Embodiment of this invention. 光てこ法による薄膜付基板の曲率半径測定の概要図である。It is a schematic diagram of the curvature radius measurement of the board | substrate with a thin film by an optical lever method. 実施例2に係る圧電薄膜のX線回折パターンである。3 is an X-ray diffraction pattern of a piezoelectric thin film according to Example 2. FIG. 比較例2に係る圧電薄膜のX線回折パターンである。3 is an X-ray diffraction pattern of a piezoelectric thin film according to Comparative Example 2. FIG. 実施例2に係る圧電薄膜の内部応力の温度依存性を示す図である。It is a figure which shows the temperature dependence of the internal stress of the piezoelectric thin film which concerns on Example 2. FIG. 実施例7に係る圧電薄膜の内部応力の温度依存性を示す図である。It is a figure which shows the temperature dependence of the internal stress of the piezoelectric thin film which concerns on Example 7. FIG. 比較例1に係る圧電薄膜の内部応力の温度依存性を示す図である。It is a figure which shows the temperature dependence of the internal stress of the piezoelectric thin film which concerns on the comparative example 1. 比較例2に係る圧電薄膜の内部応力の温度依存性を示す図である。It is a figure which shows the temperature dependence of the internal stress of the piezoelectric thin film which concerns on the comparative example 2. (a)及び(b)は圧電素子の圧電定数d31の評価方法の概略図である。(A) and (b) is a schematic diagram of the evaluation method of the piezoelectric constant d 31 of the piezoelectric element.

[実施の形態の要約]
ペロブスカイト構造の圧電薄膜を備える圧電薄膜付基板において、基板と、基板の上方に設けられる下部電極と、下部電極上に設けられ、一般式(K1−xNa)NbO(0.4≦x≦0.7)で表されるアルカリニオブ酸化物系化合物からなる圧電薄膜とを備え、圧電薄膜は、膜面内方向の内部応力をσ、温度をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔTが負の傾きを有し、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.25×10から−0.68×10(Pa/℃)の範囲内である圧電薄膜付基板が提供される。また、ペロブスカイト構造の圧電薄膜を備える圧電薄膜素子において、基板と、基板の上方に設けられる下部電極と、下部電極上に設けられ、一般式(K1−xNa)NbO(0.4≦x≦0.7)で表されるアルカリニオブ酸化物系化合物からなる圧電薄膜と、圧電薄膜上に設けられる上部電極とを備え、圧電薄膜は、膜面内方向の内部応力をσ、温度をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔTが負の傾きを有し、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.25×10から−0.68×10(Pa/℃)の範囲内である圧電薄膜素子が提供される。更に、上記圧電薄膜付基板を備えるアクチュエータ、及びセンサが提供される。
[Summary of embodiment]
In a substrate with a piezoelectric thin film including a piezoelectric thin film having a perovskite structure, a substrate, a lower electrode provided above the substrate, and a lower electrode are provided. The general formula (K 1-x Na x ) NbO 3 (0.4 ≦ and a piezoelectric thin film made of an alkali niobium oxide compound represented by x ≦ 0.7). The piezoelectric thin film has an internal stress with respect to a temperature change ΔT when σ is an internal stress in the in-plane direction and T is a temperature. The ratio Δσ / ΔT of the stress change Δσ has a negative slope, and the average value of Δσ / ΔT at 20 ° C. or more and 250 ° C. or less is −0.25 × 10 6 to −0.68 × 10 6 (Pa / ° C. The substrate with piezoelectric thin film is provided. Further, in a piezoelectric thin film element including a piezoelectric thin film having a perovskite structure, a substrate, a lower electrode provided above the substrate, and a lower electrode are provided. The general formula (K 1-x Na x ) NbO 3 (0.4 ≦ x ≦ 0.7), a piezoelectric thin film made of an alkali niobium oxide-based compound and an upper electrode provided on the piezoelectric thin film. The piezoelectric thin film has an internal stress in the in-plane direction of σ, a temperature The ratio Δσ / ΔT of the change in internal stress Δσ to the temperature change ΔT when T is T has a negative slope, and the average value of Δσ / ΔT at 20 ° C. to 250 ° C. is −0.25 × 10 6 A piezoelectric thin film element in the range of −0.68 × 10 6 (Pa / ° C.) is provided. Furthermore, an actuator and a sensor provided with the said board | substrate with a piezoelectric thin film are provided.

[第1の実施の形態]
(圧電薄膜付基板1の構成の概要)
図1は、本発明の第1の実施の形態に係る圧電薄膜付基板の断面の概要を示す。
[First Embodiment]
(Outline of configuration of substrate 1 with piezoelectric thin film)
FIG. 1 shows an outline of a cross section of a substrate with a piezoelectric thin film according to a first embodiment of the present invention.

第1の実施の形態に係る圧電薄膜付基板1は、基板10と、基板10の表面に接して設けられる下部電極20と、下部電極20の表面に接して設けられる圧電薄膜30とを備える。本実施の形態に係る圧電薄膜付基板は、例えば、インクジェットプリンタのヘッドに適用される。   The substrate 1 with a piezoelectric thin film according to the first embodiment includes a substrate 10, a lower electrode 20 provided in contact with the surface of the substrate 10, and a piezoelectric thin film 30 provided in contact with the surface of the lower electrode 20. The substrate with piezoelectric thin film according to the present embodiment is applied to a head of an ink jet printer, for example.

(基板10)
基板10としては、例えば、(100)面方位を有するシリコン基板を用いることができる。基板10は、一例として、200μm以上1000μm以下の厚さを有する。また、基板10として、(100)面とは異なる面方位を有するシリコン基板、Silicon on Insulator(SOI)基板、石英ガラス基板、GaAs等からなる化合物半導体基板、サファイア基板、ステンレス等からなる金属基板、MgO基板、SrTiO基板等を用いることもできる。
(Substrate 10)
As the substrate 10, for example, a silicon substrate having a (100) plane orientation can be used. As an example, the substrate 10 has a thickness of 200 μm or more and 1000 μm or less. Further, as the substrate 10, a silicon substrate having a plane orientation different from the (100) plane, a silicon on insulator (SOI) substrate, a quartz glass substrate, a compound semiconductor substrate made of GaAs, a sapphire substrate, a metal substrate made of stainless steel, An MgO substrate, a SrTiO 3 substrate, or the like can also be used.

(下部電極20)
下部電極20は、一例として、白金(Pt)から形成される。下部電極20は、一例として、0.02μm以上0.5μm以下の厚さを有する。下部電極20をPtから形成することにより、高い配向性を有する圧電薄膜30を下部電極20上に形成できる。また、下部電極20として、Ptを含む合金、金(Au)、ルテニウム(Ru)、イリジウム(Ir)等の金属材料、又はSrRuO、LaNiO等の金属酸化物を用いることもできる。
(Lower electrode 20)
For example, the lower electrode 20 is made of platinum (Pt). For example, the lower electrode 20 has a thickness of 0.02 μm to 0.5 μm. By forming the lower electrode 20 from Pt, the piezoelectric thin film 30 having high orientation can be formed on the lower electrode 20. Alternatively, the lower electrode 20 may be made of an alloy containing Pt, a metal material such as gold (Au), ruthenium (Ru), or iridium (Ir), or a metal oxide such as SrRuO 3 or LaNiO 3 .

(圧電薄膜30)
圧電薄膜30は、ペロブスカイト構造を有すると共に、鉛(Pb)を含まない圧電材料から形成される。圧電薄膜30は、一例として、0.2μm以上5μm以下の範囲内の膜厚で形成される。本実施の形態において、圧電薄膜30は、一般式(K1−xNa)NbO(0.4≦x≦0.7)で表されるアルカリニオブ酸化物系化合物(例えば、ニオブ酸カリウムナトリウム、以下、「KNN」と称する場合がある)から形成される。また、5重量%以下のLi、Ta、Sb、Ca、Cu、Ba、Ti等の添加元素をKNNに添加した圧電薄膜30を形成することもできる。
(Piezoelectric thin film 30)
The piezoelectric thin film 30 has a perovskite structure and is formed of a piezoelectric material that does not contain lead (Pb). As an example, the piezoelectric thin film 30 is formed with a film thickness in the range of 0.2 μm to 5 μm. In the present embodiment, the piezoelectric thin film 30 includes an alkali niobium oxide compound represented by the general formula (K 1-x Na x ) NbO 3 (0.4 ≦ x ≦ 0.7) (for example, potassium niobate). Sodium, hereinafter referred to as “KNN”). Alternatively, the piezoelectric thin film 30 in which an additive element such as Li, Ta, Sb, Ca, Cu, Ba, Ti or the like of 5 wt% or less is added to KNN can be formed.

そして、本実施の形態に係る圧電薄膜30は、膜面内方向の内部応力をσ、温度(ただし、膜表面の温度)をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔT(以下、内部応力σの温度依存性という場合がある)が負の傾きを有すると共に、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.25×10から−0.68×10(Pa/℃)の範囲内であるように形成される。また、圧電薄膜30は、20℃における膜面内方向の内部応力が、−80MPa(圧縮応力)以上250MPa(引張り応力)以下の範囲内であることが好ましい。そして、圧電薄膜30の膜面内方向の内部応力と温度との関係を示すグラフにおいて、250℃以上400℃以下の温度範囲内に変曲点を有すると共に、20℃以上250℃以下の範囲におけるΔσ/ΔTの平均値より、400℃以上500℃以下の範囲内におけるΔσ/ΔTの平均値が小さいことが更に好ましい。更に、圧電薄膜30は、下部電極20上に圧電薄膜30を形成する際における所定の温度(例えば、圧電薄膜30を形成する成膜プロセスにおける最高温度)での膜面内方向の内部応力が−500MPa(圧縮応力)を超え−200MPa(圧縮応力)以下の範囲内である。なお、本実施の形態において「成膜プロセスにおける最高温度」とは、圧電薄膜30が形成されるまでの工程(成膜工程、結晶化工程を含む)における最高温度を意味する。また、圧電薄膜30の形成は、圧電薄膜30を形成する工程のみの場合と、圧電薄膜30を形成する工程の後に、結晶化のための熱処理を圧電薄膜30に施す工程とを含む場合とがある。したがって、本実施の形態において「成膜プロセスの最高温度」とは、圧電薄膜30を形成する工程のみの場合には、圧電薄膜30を形成する工程における最高温度を意味し、圧電薄膜30を形成する工程の後に熱処理を圧電薄膜30に施す工程を実施する場合には、圧電薄膜30を形成する工程における最高温度と、熱処理を圧電薄膜30に施す工程における最高温度とを比較した場合に、高い方の温度を意味する。 The piezoelectric thin film 30 according to the present embodiment has a ratio Δσ of the change Δσ of the internal stress to the temperature change ΔT when the internal stress in the in-plane direction is σ and the temperature (where the temperature of the film surface) is T. / ΔT (hereinafter sometimes referred to as temperature dependency of internal stress σ) has a negative slope, and the average value of Δσ / ΔT at 20 ° C. or higher and 250 ° C. or lower is −0.25 × 10 6 to −0. It is formed so as to be in the range of 68 × 10 6 (Pa / ° C.). The piezoelectric thin film 30 preferably has an internal stress in the in-plane direction at 20 ° C. in the range of −80 MPa (compression stress) to 250 MPa (tensile stress). And in the graph which shows the relationship between the internal stress of the film surface direction of the piezoelectric thin film 30, and temperature, it has an inflection point in the temperature range of 250 degreeC or more and 400 degrees C or less, and in the range of 20 degrees C or more and 250 degrees C or less. More preferably, the average value of Δσ / ΔT in the range of 400 ° C. or higher and 500 ° C. or lower is smaller than the average value of Δσ / ΔT. Further, the piezoelectric thin film 30 has an internal stress in the in-plane direction at a predetermined temperature when the piezoelectric thin film 30 is formed on the lower electrode 20 (for example, the highest temperature in the film forming process for forming the piezoelectric thin film 30). It is in the range of more than 500 MPa (compressive stress) and −200 MPa (compressive stress). In the present embodiment, the “maximum temperature in the film formation process” means the maximum temperature in the process (including the film formation process and the crystallization process) until the piezoelectric thin film 30 is formed. In addition, the formation of the piezoelectric thin film 30 includes only a step of forming the piezoelectric thin film 30 and a case of including a step of performing heat treatment for crystallization on the piezoelectric thin film 30 after the step of forming the piezoelectric thin film 30. is there. Therefore, in the present embodiment, the “maximum temperature of the film forming process” means the maximum temperature in the process of forming the piezoelectric thin film 30 in the case of only the process of forming the piezoelectric thin film 30, and the piezoelectric thin film 30 is formed. In the case where the step of applying the heat treatment to the piezoelectric thin film 30 is performed after the step of performing, the highest temperature in the step of forming the piezoelectric thin film 30 and the maximum temperature in the step of applying the heat treatment to the piezoelectric thin film 30 are high. Means the temperature.

なお、本実施の形態において、圧電薄膜30(例えば、KNN膜)で発生する応力は膜面内方向の応力のことを意味する。そして、KNN膜の内部応力は膜厚方向に分布を有するが、その平均内部応力のことを本実施の形態では「内部応力」とする。また、内部応力は、KNN膜に圧縮応力が発生する場合を負、KNN膜に引張り応力が発生する場合を正として表記することとする。   In the present embodiment, the stress generated in the piezoelectric thin film 30 (for example, a KNN film) means a stress in the in-film direction. The internal stress of the KNN film has a distribution in the film thickness direction, and the average internal stress is referred to as “internal stress” in the present embodiment. Internal stress is expressed as negative when compressive stress is generated in the KNN film and positive when tensile stress is generated in the KNN film.

圧電薄膜30の温度変化に対する内部応力の変化等をこのように規定する理由は、本発明者が得た以下の知見による。   The reason for defining the change of internal stress with respect to the temperature change of the piezoelectric thin film 30 in this way is based on the following knowledge obtained by the present inventors.

(本発明者が得た知見)
まず、KNNからなる圧電薄膜の成膜方法としては、高温でスパッタ成膜する方法(高温スパッタ法)、室温でのスパッタ成膜後に高温で結晶化させる方法(室温スパッタ法)、室温又は低温で原料液を基板に塗布した後に高温で結晶化させる方法(MOD法又はゾルゲル法)、原料微粒子の基板への高速衝突によるエアロゾルデポジション成膜後に高温で熱処理する方法(エアロゾルデポジション法)、及び、高温スパッタ法、室温スパッタ法、MOD法、又はゾルゲル法による成膜後に熱処理する方法等を採用することができる。本発明者が検討した結果、KNN薄膜の圧電特性は、成膜方法、結晶粒の配向状況に多少依存するものの、主として、成膜時、成膜後にKNN薄膜に発生する応力の影響が大きいという知見を得、以下の傾向を見出した。
(Knowledge obtained by the inventor)
First, as a film formation method of a piezoelectric thin film made of KNN, a method of sputtering film formation at a high temperature (high temperature sputtering method), a method of crystallizing at a high temperature after sputtering film formation at room temperature (room temperature sputtering method), a room temperature or a low temperature. A method of crystallizing at a high temperature after applying the raw material liquid on the substrate (MOD method or sol-gel method), a method of heat-treating at a high temperature after forming an aerosol deposition film by high-speed collision of the raw material fine particles with the substrate (aerosol deposition method), and Alternatively, a heat treatment method after film formation by a high temperature sputtering method, a room temperature sputtering method, a MOD method, or a sol-gel method can be employed. As a result of the study by the present inventor, the piezoelectric characteristics of the KNN thin film are largely influenced by the stress generated in the KNN thin film at the time of film formation and after film formation, although it slightly depends on the film forming method and the orientation of crystal grains. We obtained knowledge and found the following trends.

まず、第1の傾向として、成膜プロセス中の最高温度に相当する温度でのKNN薄膜の内部応力が500MPaを超え200MPa以下の圧縮応力の範囲内である場合(すなわち、内部応力が−500MPaを超え−200MPa以下の範囲内である場合)に、圧電定数d31が−100pm/V以上の優れた圧電特性を発揮することを見出した。なお、本明細書において、内部応力は、平面視にて20mm角の正方形の試料を用いて測定している。 First, as a first tendency, when the internal stress of the KNN thin film at a temperature corresponding to the maximum temperature during the film forming process is in the range of compressive stress exceeding 500 MPa and not more than 200 MPa (that is, the internal stress is −500 MPa). It has been found that the piezoelectric constant d 31 exhibits excellent piezoelectric characteristics of −100 pm / V or more when the value is in the range of more than −200 MPa. In this specification, the internal stress is measured using a 20 mm square sample in plan view.

また、第2の傾向として、圧電薄膜の内部応力σの温度依存性(Δσ/ΔT)が負の傾きを有すると共に(すなわち、温度上昇に伴いKNN薄膜の圧縮応力が増加する傾向を有すると共に)、20℃から250℃のΔσ/ΔTの平均値が−0.25×10〜−0.68×10(Pa/℃)の範囲内である場合に、KNN薄膜の圧電特性の温度上昇に伴う特性の劣化が小さくなることを見出した。具体的には、150℃での圧電定数と20℃での圧電定数との比d31(150℃)/d31(20℃)の値が0.9以上になることを見出した。 Further, as a second tendency, the temperature dependence (Δσ / ΔT) of the internal stress σ of the piezoelectric thin film has a negative slope (that is, the compressive stress of the KNN thin film tends to increase as the temperature rises). When the average value of Δσ / ΔT from 20 ° C. to 250 ° C. is in the range of −0.25 × 10 6 to −0.68 × 10 6 (Pa / ° C.), the temperature rise of the piezoelectric characteristics of the KNN thin film It has been found that the deterioration of the characteristics accompanying the reduction becomes small. Specifically, it has been found that the ratio d 31 (150 ° C.) / D 31 (20 ° C.) between the piezoelectric constant at 150 ° C. and the piezoelectric constant at 20 ° C. is 0.9 or more.

このような傾向があることについて、本発明者は以下のように考察している。すなわち、まず、KNN薄膜の成膜プロセス中の最高温度の時にKNN結晶構造が形成され、その時にKNN結晶の質の良し悪しの大半が決定される。KNN結晶構造が決定される時、すなわち、成膜プロセス中の最高温度の時に500MPa以上の大きな圧縮応力がKNN結晶中に発生するとKNN結晶の質が劣化してしまい(ただし、「KNN結晶の質の劣化」とは、圧縮応力によってKNN結晶中に結晶欠陥や歪が生じることをいう)、その結果、KNN薄膜の圧電特性が低下すると思われる。成膜プロセス中の最高温度において200MPa以下の圧縮応力、及び/又は引張り応力がKNN結晶中に発生する場合には、KNN薄膜が成膜された時点では良質のKNN結晶膜が形成されていると思われるが、最高温度から室温に冷却すると、KNN薄膜の熱膨張係数がシリコン基板の熱膨張係数よりも大きいことから、室温ではKNN薄膜に非常に大きな引張り応力が発生することになる。室温において大きな引張り応力がKNN薄膜に発生することがKNN薄膜の圧電特性を劣化させていると思われる。   The inventor considers this tendency as follows. That is, first, the KNN crystal structure is formed at the highest temperature during the film formation process of the KNN thin film, and most of the quality of the KNN crystal is determined at that time. When the KNN crystal structure is determined, that is, when a large compressive stress of 500 MPa or more is generated in the KNN crystal at the highest temperature during the film forming process, the quality of the KNN crystal deteriorates (however, “the quality of the KNN crystal” "Deterioration of" means that crystal defects and strain are generated in the KNN crystal due to compressive stress), and as a result, the piezoelectric properties of the KNN thin film are considered to be degraded. When compressive stress of 200 MPa or less and / or tensile stress is generated in the KNN crystal at the maximum temperature during the film forming process, a good quality KNN crystal film is formed at the time when the KNN thin film is formed. Although it seems that when the temperature is cooled from the maximum temperature to room temperature, the KNN thin film has a thermal expansion coefficient larger than that of the silicon substrate, so that a very large tensile stress is generated in the KNN thin film at room temperature. It seems that the generation of a large tensile stress in the KNN thin film at room temperature deteriorates the piezoelectric properties of the KNN thin film.

また、温度上昇に伴うKNN薄膜の圧電特性の劣化は、KNN薄膜の内部応力の大きさが温度変化に伴って変化することが主な原因と考えられる。発明者らが検討した結果、圧電薄膜の内部応力σの温度依存性(Δσ/ΔT)の20℃から250℃の平均値が−0.25×10〜−0.68×10(Pa/℃)の範囲内である時に圧電特性の温度上昇に伴う特性の劣化が小さくなることが分かった。Δσ/ΔTの値はKNN薄膜の熱膨張係数、ヤング率、ポアソン比によって変化する。ただし、基板10上に配されたKNN薄膜の熱膨張係数、ヤング率、ポアソン比は互いが複雑に影響を与えており、それぞれ個別の正確な値を得ることは事実上困難である。しかしながら、発明者は、さまざまな検討結果から、KNN薄膜の(001)面方位配向状況、Na組成([Na]/[K]+[Na])等を変化させることでΔσ/ΔTの値を制御できることを見出した。 Moreover, it is considered that the deterioration of the piezoelectric characteristics of the KNN thin film due to the temperature rise is mainly caused by the change in the internal stress of the KNN thin film accompanying the temperature change. As a result of investigation by the inventors, the average value of the temperature dependence (Δσ / ΔT) of the internal stress σ of the piezoelectric thin film from 20 ° C. to 250 ° C. is −0.25 × 10 6 to −0.68 × 10 6 (Pa / ° C), it was found that the deterioration of the characteristics due to the temperature rise of the piezoelectric characteristics becomes small. The value of Δσ / ΔT varies depending on the thermal expansion coefficient, Young's modulus, and Poisson's ratio of the KNN thin film. However, the thermal expansion coefficient, Young's modulus, and Poisson's ratio of the KNN thin film disposed on the substrate 10 affect each other in a complicated manner, and it is practically difficult to obtain individual accurate values. However, the inventor has found that the value of Δσ / ΔT is changed by changing the (001) plane orientation state of the KNN thin film, the Na composition ([Na] / [K] + [Na]), etc. I found out that it can be controlled.

(第1の実施の形態の効果)
第1の実施の形態に係る圧電薄膜付基板1は、膜面内方向の内部応力をσ、温度をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔTが負の傾きを有すると共に、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.25×10から−0.68×10(Pa/℃)の範囲内である圧電薄膜30を備えるので、例えば、インクジェットプリンタヘッド用のPZT薄膜に代替可能な圧電特性を有する圧電薄膜付基板1を提供することができる。すなわち、KNNからなる圧電薄膜30が広くインクジェットプリンタヘッドに適用されるためには、少なくとも圧電定数d31が−90pm/V以上(なお、本実施の形態において圧電定数に関する「以上」とは−100、−110などの絶対値が大きいことを示す)を安定して実現する必要があるところ、第1の実施の形態に係る圧電薄膜付基板1によれば、圧電定数d31が−90pm/V以上のKNN圧電薄膜を備える圧電薄膜付基板1を安定して提供することができる。
(Effects of the first embodiment)
In the substrate with piezoelectric thin film 1 according to the first embodiment, the ratio Δσ / ΔT of the change Δσ of the internal stress to the temperature change ΔT when the internal stress in the in-plane direction is σ and the temperature is T is negative slope And an average value of Δσ / ΔT at 20 ° C. or more and 250 ° C. or less is within the range of −0.25 × 10 6 to −0.68 × 10 6 (Pa / ° C.), For example, it is possible to provide a substrate 1 with a piezoelectric thin film having piezoelectric characteristics that can be substituted for a PZT thin film for an inkjet printer head. That is, in order for the piezoelectric thin film 30 made of KNN to be widely applied to an ink jet printer head, at least the piezoelectric constant d 31 is −90 pm / V or more (in this embodiment, “above” relating to the piezoelectric constant is −100. , −110, etc., indicating that the absolute value is large), the piezoelectric constant d 31 according to the first embodiment has a piezoelectric constant d 31 of −90 pm / V. The piezoelectric thin film-equipped substrate 1 including the above KNN piezoelectric thin film can be provided stably.

また、KNNからなる圧電薄膜30の圧電特性は、温度上昇に伴う特性の低下が大きいということが従来の認識であり(具体的には、20℃での圧電定数をd31(20℃)、150℃での圧電定数をd31(150℃)とした時、d31(150℃)/d31(20℃)の値が0.75を下回るものであるということが従来の認識であった)、圧電膜の応用製品によって多少は異なるが、d31(150℃)/d31(20℃)の値は0.8以上であることが望まれているところ、第1の実施の形態に係る圧電薄膜付基板1によれば、KNN薄膜の圧電特性の温度上昇に伴う特性の劣化が大きいという問題を改善することができ、一例として、d31(150℃)/d31(20℃)の値が0.8以上のKNN薄膜を備える圧電薄膜付基板1を提供することができる。 In addition, it is a conventional recognition that the piezoelectric characteristics of the piezoelectric thin film 30 made of KNN have a large decrease in characteristics due to a temperature rise (specifically, the piezoelectric constant at 20 ° C. is d 31 (20 ° C.), The conventional recognition is that when the piezoelectric constant at 150 ° C. is d 31 (150 ° C.), the value of d 31 (150 ° C.) / D 31 (20 ° C.) is less than 0.75. ), Which differs somewhat depending on the applied product of the piezoelectric film, but the value of d 31 (150 ° C.) / D 31 (20 ° C.) is desired to be 0.8 or more. According to the substrate 1 with a piezoelectric thin film, it is possible to improve the problem that the characteristic of the KNN thin film is greatly deteriorated due to a temperature rise. For example, d 31 (150 ° C.) / D 31 (20 ° C.) With a KNN thin film having a value of 0.8 or more A substrate with a thin film 1 can be provided.

[第2の実施の形態]
図2は、本発明の第2の実施の形態に係る圧電薄膜付基板の断面の概要を示す。
[Second Embodiment]
FIG. 2 shows an outline of a cross section of a substrate with a piezoelectric thin film according to the second embodiment of the present invention.

第2の実施の形態に係る圧電薄膜付基板1aは、第1の実施の形態に係る圧電薄膜付基板1とは、基板10上に密着層40を更に備える点を除き、第1の実施の形態に係る圧電薄膜付基板1と略同一の構成・機能を備える。したがって、相違点を除き詳細な説明は省略する。   The substrate with a piezoelectric thin film 1a according to the second embodiment is different from the substrate with a piezoelectric thin film 1 according to the first embodiment except that an adhesion layer 40 is further provided on the substrate 10. It has substantially the same configuration and function as the piezoelectric thin film-coated substrate 1 according to the embodiment. Therefore, a detailed description is omitted except for differences.

圧電薄膜付基板1aは、基板10と、基板10の表面に接して設けられ、下部電極20と基板10との密着性を向上させる密着層40と、密着層40上に接して設けられる下部電極20と、下部電極20上に設けられる圧電薄膜30とを備える。密着層40は、例えば、チタン(Ti)等の金属材料から形成される。密着層40は、一例として、0.001μm以上0.05μm以下の厚さを有する。また、密着層40は、タンタル(Ta)から形成することもできる。   The substrate with piezoelectric thin film 1 a is provided in contact with the substrate 10, the surface of the substrate 10, an adhesion layer 40 for improving adhesion between the lower electrode 20 and the substrate 10, and a lower electrode provided in contact with the adhesion layer 40. 20 and a piezoelectric thin film 30 provided on the lower electrode 20. The adhesion layer 40 is formed from a metal material such as titanium (Ti), for example. For example, the adhesion layer 40 has a thickness of 0.001 μm or more and 0.05 μm or less. The adhesion layer 40 can also be formed from tantalum (Ta).

[第3の実施の形態]
図3は、本発明の第3の実施の形態に係る圧電薄膜付基板の断面の概要を示す。
[Third Embodiment]
FIG. 3 shows an outline of a cross section of a substrate with a piezoelectric thin film according to the third embodiment of the present invention.

第3の実施の形態に係る圧電薄膜付基板1bは、基板10の表面に熱酸化膜12が形成されている点を除き、第2の実施の形態に係る圧電薄膜付基板1aと略同一の構成・機能を備える。したがって、相違点を除き詳細な説明は省略する。   The substrate 1b with a piezoelectric thin film according to the third embodiment is substantially the same as the substrate 1a with a piezoelectric thin film according to the second embodiment except that a thermal oxide film 12 is formed on the surface of the substrate 10. It has configuration and functions. Therefore, a detailed description is omitted except for differences.

第3の実施の形態に係る圧電薄膜付基板1bは、例えば、シリコン等から形成される基板10と、基板10の表面が熱酸化されることにより基板10の表面から所定の深さを有して形成される熱酸化膜12と、熱酸化膜12上に接して設けられる密着層40と、密着層40上に接して設けられる下部電極20と、下部電極20上に設けられる圧電薄膜30とを備える。熱酸化膜12は、基板10がシリコンから形成されている場合、二酸化シリコンから形成される。熱酸化膜12は、一例として、0.1μm以上0.3μm以下の厚さを有する。   The substrate with piezoelectric thin film 1b according to the third embodiment has, for example, a substrate 10 formed of silicon or the like, and a predetermined depth from the surface of the substrate 10 by thermally oxidizing the surface of the substrate 10. A thermal oxide film 12 formed in contact with the thermal oxide film 12, an adhesive layer 40 provided in contact with the thermal oxide film 12, a lower electrode 20 provided in contact with the adhesive layer 40, and a piezoelectric thin film 30 provided on the lower electrode 20. Is provided. The thermal oxide film 12 is formed from silicon dioxide when the substrate 10 is formed from silicon. As an example, the thermal oxide film 12 has a thickness of 0.1 μm or more and 0.3 μm or less.

なお、第3の実施の形態の変形例としては、圧電薄膜付基板1bから密着層40を除いた形態、すなわち、基板10と、基板10の表面に形成される熱酸化膜12と、熱酸化膜12上に設けられる下部電極20と、下部電極20上に設けられる圧電薄膜30とを備える構成にすることもできる。   As a modification of the third embodiment, a form in which the adhesion layer 40 is removed from the piezoelectric thin film-coated substrate 1b, that is, the substrate 10, the thermal oxide film 12 formed on the surface of the substrate 10, and the thermal oxidation. A configuration including a lower electrode 20 provided on the film 12 and a piezoelectric thin film 30 provided on the lower electrode 20 may be employed.

[第4の実施の形態]
図4は、本発明の第4の実施の形態に係る圧電薄膜素子の断面の概要を示す。
[Fourth Embodiment]
FIG. 4 shows an outline of a cross section of a piezoelectric thin film element according to the fourth embodiment of the present invention.

第4の実施の形態に係る圧電薄膜素子2は、第2の実施の形態に係る圧電薄膜付基板1aとは、上部電極50を更に備え、下部電極20の表面の一部が外部に露出している点を除き、圧電薄膜付基板1aと略同一の構成・機能を備える。したがって、相違点を除き詳細な説明は省略する。   The piezoelectric thin film element 2 according to the fourth embodiment further includes an upper electrode 50 as compared with the piezoelectric thin film-coated substrate 1a according to the second embodiment, and a part of the surface of the lower electrode 20 is exposed to the outside. Except for this point, it has substantially the same configuration and function as the piezoelectric thin film-coated substrate 1a. Therefore, a detailed description is omitted except for differences.

第4の実施の形態に係る圧電薄膜素子2は、図4に示すように、基板10と、基板10上に接して設けられる密着層40と、密着層40上に接して設けられる下部電極20と、下部電極20の表面の一部に接して設けられる圧電薄膜30と、圧電薄膜30上に接して設けられる上部電極50とを備える。すなわち、圧電薄膜素子2は、圧電薄膜付基板1が備える圧電薄膜30の上に上部電極50が更に形成されると共に、下部電極20の表面の一部が露出した構成を有する。上部電極表面50aと下部電極表面20aとの間に電圧を印加することにより、圧電薄膜素子2を駆動させることができる。   As shown in FIG. 4, the piezoelectric thin film element 2 according to the fourth embodiment includes a substrate 10, an adhesion layer 40 provided in contact with the substrate 10, and a lower electrode 20 provided in contact with the adhesion layer 40. A piezoelectric thin film 30 provided in contact with a part of the surface of the lower electrode 20, and an upper electrode 50 provided in contact with the piezoelectric thin film 30. That is, the piezoelectric thin film element 2 has a configuration in which the upper electrode 50 is further formed on the piezoelectric thin film 30 provided in the substrate 1 with the piezoelectric thin film, and a part of the surface of the lower electrode 20 is exposed. The piezoelectric thin film element 2 can be driven by applying a voltage between the upper electrode surface 50a and the lower electrode surface 20a.

第4の実施の形態に係る上部電極50は、金属材料から形成され、一例としてPtから形成される。上部電極50は、一例として、0.005μm以上0.2μm以下の厚さを有する。上部電極50は、Ptを除く他の金属材料、又はPt等の金属材料を含む合金材料から形成することもできる。また、圧電素子2は、平面視にて短冊形状に形成される。   The upper electrode 50 according to the fourth embodiment is made of a metal material, and is made of Pt as an example. For example, the upper electrode 50 has a thickness of 0.005 μm or more and 0.2 μm or less. The upper electrode 50 can also be formed from other metal materials except Pt, or alloy materials containing metal materials such as Pt. The piezoelectric element 2 is formed in a strip shape in plan view.

(内部応力の算出方法)
なお、圧電薄膜30において発生する内部応力は、以下のようにして算出することができる。
(Calculation method of internal stress)
The internal stress generated in the piezoelectric thin film 30 can be calculated as follows.

図5は、光てこ法による薄膜付基板の曲率半径測定の概要を示す。   FIG. 5 shows an outline of the measurement of the radius of curvature of the substrate with a thin film by the optical lever method.

基板10上に直接、間接に配された圧電薄膜30の内部応力は、圧電薄膜付基板1の反りの曲率半径から計算することができる。圧電薄膜付基板1の反りの曲率半径は、光てこ法によって測定することができる。図2を参照すると分かるように、レーザー100から発せられたレーザー光をビームスプリッター110により基板15に向かう方向に伝搬するレーザー光と、ミラー112に向かう方向に伝搬するレーザー光とに分岐する。そして、ビームスプリッター110から基板15に照射されたレーザー光は、基板15上の薄膜35により反射され、反射されたレーザー光は検出器120により検出される。一方、ミラー112から基板15に照射されたレーザー光は、基板15上の薄膜35により反射され、反射されたレーザー光は検出器122により検出される。そして、検出器120及び検出器122における検出結果に基づいて、圧電薄膜付基板1の反りの曲率半径を算出する。   The internal stress of the piezoelectric thin film 30 disposed directly or indirectly on the substrate 10 can be calculated from the curvature radius of the warp of the substrate 1 with the piezoelectric thin film. The curvature radius of the warp of the substrate with piezoelectric thin film 1 can be measured by an optical lever method. As can be seen from FIG. 2, the laser light emitted from the laser 100 is branched by the beam splitter 110 into laser light propagating in the direction toward the substrate 15 and laser light propagating in the direction toward the mirror 112. The laser light applied to the substrate 15 from the beam splitter 110 is reflected by the thin film 35 on the substrate 15, and the reflected laser light is detected by the detector 120. On the other hand, the laser light applied to the substrate 15 from the mirror 112 is reflected by the thin film 35 on the substrate 15, and the reflected laser light is detected by the detector 122. And based on the detection result in the detector 120 and the detector 122, the curvature radius of the curvature of the board | substrate 1 with a piezoelectric thin film is calculated.

第1乃至第4の実施の形態において測定対象にした構造は、一例として、「KNNからなる圧電薄膜30/Ptからなる下部電極20(ただし、厚さは200nm)/Tiからなる密着層40(ただし、厚さは2nm)/熱酸化膜12(ただし、厚さは200nm)/Siからなる基板10(ただし、厚さは0.5mm)」である。ここでは、「基板15」を「Ptからなる下部電極20/Tiからなる密着層40/熱酸化膜12/Siからなる基板10」とした。基板15自体は初期状態及び高温にした際に多少の反りを有しているため、その曲率半径をRとした。また、KNNからなる圧電薄膜30/基板10での反りの曲率半径をRとした。この時、KNNからなる圧電薄膜30によって引き起こされる反りの曲率半径Rは以下の式(1)から算出することができる。 As an example, the structure to be measured in the first to fourth embodiments is “the lower electrode 20 made of KNN piezoelectric thin film 30 / Pt (thickness is 200 nm) / adhesive layer 40 made of Ti ( However, the thickness is 2 nm) / thermal oxide film 12 (thickness is 200 nm) / substrate 10 made of Si (thickness is 0.5 mm). Here, the “substrate 15” is “the lower electrode 20 made of Pt / the adhesion layer 40 made of Ti / the substrate 10 made of the thermal oxide film 12 / Si”. Because the substrate 15 itself has a slight warp upon the initial state and a high temperature, and the radius of curvature R 1. Moreover, the radius of curvature of warping of the piezoelectric thin film 30 / substrate 10 consisting of KNN was R 2. At this time, the curvature radius R of the warp caused by the piezoelectric thin film 30 made of KNN can be calculated from the following equation (1).

Figure 0005531529
Figure 0005531529

光てこ法で測定された各温度でのR、RからRを算出することができる。また、圧電薄膜30の内部応力σと圧電薄膜30によって引き起こされる反りの曲率半径Rとには以下の式(2)又は式(3)の関係がある。 R can be calculated from R 1 and R 2 at each temperature measured by the optical lever method. Further, the internal stress σ of the piezoelectric thin film 30 and the curvature radius R of the warp caused by the piezoelectric thin film 30 have the relationship of the following formula (2) or formula (3).

Figure 0005531529
Figure 0005531529

Figure 0005531529
Figure 0005531529

ここで、Eは基板のヤング率(Pa)、νは基板のポアソン比、E/(1−ν)は基板の2軸弾性係数、hは基板の厚み(m)、tは薄膜の膜厚(m)、Rは基板の反りの曲率半径(m)、σは薄膜の内部応力の平均値(Pa)である。   Here, E is the Young's modulus (Pa) of the substrate, ν is the Poisson's ratio of the substrate, E / (1-ν) is the biaxial elastic modulus of the substrate, h is the thickness (m) of the substrate, and t is the film thickness of the thin film. (M), R is the curvature radius (m) of the warp of the substrate, and σ is the average value (Pa) of the internal stress of the thin film.

各実施の形態では、シリコンからなる基板10の2軸弾性係数E/(1−ν)は、180.5GPaを用いる。また、内部応力は、薄膜に圧縮応力が発生する場合を負、薄膜に引張り応力が発生する場合を正にする。また、基本的には、昇温時、降温時のいずれにおいても圧電薄膜30中に発生する内部応力は略同じであるが、各実施の形態においては、昇温時の温度特性を用いる。20℃から250℃のΔσ/ΔT(すなわち、温度−KNNからなる圧電薄膜の内部応力特性グラフの傾き)の平均値は、20℃から250℃の範囲でのσ(応力)−T(温度)グラフを最小二乗法で直線近似して得ることのできる直線の傾きを用いる。各実施の形態での成膜プロセスの最高温度における圧電薄膜の内部応力は、成膜が終了したKNNからなる圧電薄膜付基板を、再び成膜プロセスの最高温度と同じ温度まで上昇させて光てこ法で測定した場合におけるKNNからなる圧電薄膜30の内部応力と同じと考えることができる。   In each embodiment, 180.5 GPa is used as the biaxial elastic modulus E / (1-ν) of the substrate 10 made of silicon. The internal stress is negative when compressive stress is generated in the thin film and positive when tensile stress is generated in the thin film. Basically, the internal stress generated in the piezoelectric thin film 30 is substantially the same both when the temperature is raised and when the temperature is lowered. In each embodiment, the temperature characteristics at the time of temperature rise are used. The average value of Δσ / ΔT from 20 ° C. to 250 ° C. (that is, the slope of the internal stress characteristic graph of the piezoelectric thin film consisting of temperature-KNN) is σ (stress) −T (temperature) in the range of 20 ° C. to 250 ° C. The slope of a straight line that can be obtained by linearly approximating the graph by the least square method is used. The internal stress of the piezoelectric thin film at the maximum temperature of the film forming process in each embodiment is that the substrate with the piezoelectric thin film made of KNN after film formation is raised again to the same temperature as the maximum temperature of the film forming process. It can be considered to be the same as the internal stress of the piezoelectric thin film 30 made of KNN when measured by the method.

実施例1〜9に係る圧電薄膜付シリコン基板と、比較例1〜6に係る圧電薄膜付シリコン基板とをそれぞれ作製した。なお、実施例1〜9、及び比較例1〜6に係る圧電薄膜付シリコン基板の断面の概要は、第2の実施の形態に係る圧電薄膜付基板1aと略同一である。   The silicon substrate with a piezoelectric thin film according to Examples 1 to 9 and the silicon substrate with a piezoelectric thin film according to Comparative Examples 1 to 6 were respectively produced. The outline of the cross section of the silicon substrate with piezoelectric thin film according to Examples 1 to 9 and Comparative Examples 1 to 6 is substantially the same as that of the substrate with piezoelectric thin film 1a according to the second embodiment.

(実施例1〜9、比較例1〜3)
具体的には、膜厚3μmのKNNからなる圧電薄膜30を備える圧電薄膜付シリコン基板を作製した。基板10としては、熱酸化膜付きシリコン基板(ただし、(100)面方位、厚さ0.525mm、熱酸化膜厚さ200nm、サイズ20mm×20mm)を用いた。まず、基板10上にRFマグネトロンスパッタリング法で、Tiからなる密着層40(但し、膜厚2nm)と、Ptからなる下部電極20(ただし、(111)面優先配向、膜厚200nm)を形成した。Tiからなる密着層40とPtからなる下部電極20とはそれぞれ、基板温度300℃、放電パワー200W、導入ガスAr雰囲気、圧力2.5Pa、成膜時間1〜3分、10分の条件で成膜した。その上に、RFマグネトロンスパッタリング法で3μm厚の(K1−xNa)NbO薄膜を形成した。(K1−x)NbO圧電薄膜は組成比(K+Na)/Nb=1.0、Na/(K+Na)=0.4〜0.7の(K1−xNa)NbO焼結体をターゲットに用い、基板温度550℃〜575℃、放電パワー75W〜100W、導入ガスAr雰囲気、圧力1.3Paの条件で成膜した。成膜時間はそれぞれの成膜で膜厚が略3μmになるように微調整した。なお、RFマグネトロンスパッタリング法においては、ターゲット上を基板が自公転するRFマグネトロンスパッタリング装置を用い、かつ、ターゲットと基板との間の距離を100mm〜150mmの範囲にして成膜を実施した。そして、実施例9、比較例1〜6では、成膜後に600℃〜750℃の熱処理を、大気雰囲気下で2時間実施した。
(Examples 1-9, Comparative Examples 1-3)
Specifically, a silicon substrate with a piezoelectric thin film provided with a piezoelectric thin film 30 made of KNN having a thickness of 3 μm was produced. As the substrate 10, a silicon substrate with a thermal oxide film (however, a (100) plane orientation, a thickness of 0.525 mm, a thermal oxide film thickness of 200 nm, a size of 20 mm × 20 mm) was used. First, an adhesion layer 40 made of Ti (with a film thickness of 2 nm) and a lower electrode 20 made of Pt (with a (111) plane preferred orientation, film thickness of 200 nm) were formed on the substrate 10 by RF magnetron sputtering. . The adhesion layer 40 made of Ti and the lower electrode 20 made of Pt are respectively formed under the conditions of a substrate temperature of 300 ° C., a discharge power of 200 W, an introduced gas Ar atmosphere, a pressure of 2.5 Pa, a film formation time of 1 to 3 minutes, and 10 minutes. Filmed. A (K 1-x Na x ) NbO 3 thin film having a thickness of 3 μm was formed thereon by RF magnetron sputtering. The (K 1-x N x ) NbO 3 piezoelectric thin film has a composition ratio (K + Na) /Nb=1.0 and Na / (K + Na) = 0.4 to 0.7 (K 1-x Na x ) NbO 3 Using the bonded body as a target, a film was formed under conditions of a substrate temperature of 550 ° C. to 575 ° C., a discharge power of 75 W to 100 W, an introduced gas Ar atmosphere, and a pressure of 1.3 Pa. The film formation time was finely adjusted so that the film thickness was about 3 μm in each film formation. In the RF magnetron sputtering method, film formation was performed using an RF magnetron sputtering apparatus in which the substrate revolves on the target, and the distance between the target and the substrate was in the range of 100 mm to 150 mm. And in Example 9 and Comparative Examples 1-6, the heat processing of 600 to 750 degreeC was implemented for 2 hours in air | atmosphere after film-forming.

(比較例4)
比較例4に係る圧電薄膜付シリコン基板は、圧電薄膜を室温スパッタ法で作製した。基板10と、基板10上に設ける密着層40と、密着層40上に設ける下部電極20とは実施例1〜9、比較例1〜3と同様にして形成した。一方、(K1−x)NbO圧電薄膜は、組成比(K+Na)/Nb=1.0、Na/(K+Na)=0.5の(K0.5Na0.5)NbO焼結体をターゲットに用い、基板の加熱なし、放電パワー75W、導入ガスAr雰囲気、圧力0.4Paの条件で成膜した。成膜時間は膜厚が略3μmになるように調整した。成膜後、電気炉によって大気雰囲気下、650℃で2時間の熱処理を実施して、比較例4に係る多結晶KNNからなる圧電薄膜を備える圧電薄膜付シリコン基板を作製した。なお、KNNからなる圧電薄膜のNa組成は0.47であった。
(Comparative Example 4)
In the silicon substrate with a piezoelectric thin film according to Comparative Example 4, the piezoelectric thin film was produced by a room temperature sputtering method. The substrate 10, the adhesive layer 40 provided on the substrate 10, and the lower electrode 20 provided on the adhesive layer 40 were formed in the same manner as in Examples 1 to 9 and Comparative Examples 1 to 3. On the other hand, (K 1-x N x ) NbO 3 piezoelectric thin film, the composition ratio (K + Na) /Nb=1.0,Na/ (K + Na) = 0.5 of (K 0.5 Na 0.5) NbO 3 The sintered body was used as a target, and the film was formed under the conditions of no substrate heating, discharge power of 75 W, introduced gas Ar atmosphere, and pressure of 0.4 Pa. The film formation time was adjusted so that the film thickness was about 3 μm. After the film formation, heat treatment was performed at 650 ° C. for 2 hours in an air atmosphere using an electric furnace to produce a silicon substrate with a piezoelectric thin film provided with a piezoelectric thin film made of polycrystalline KNN according to Comparative Example 4. The Na composition of the piezoelectric thin film made of KNN was 0.47.

(比較例5)
比較例5に係る圧電薄膜付シリコン基板は、圧電薄膜をMOD法(塗布熱分解法)で作製した。基板10と、基板10上に設ける密着層40と、密着層40上に設ける下部電極20とは実施例1〜9、比較例1〜3と同様にして形成した。その後、(K,Na)NbO薄膜形成用のMOD原料液(但し、Na組成0.5)をスピンコーターによってPtからなる下部電極20上に塗布して、400℃に設定したホットプレート上で5分間の乾燥処理を実施した。その後、電気炉中、大気雰囲気下で700℃で30分間の結晶化処理を実施することにより、多結晶KNNからなる圧電薄膜を備える圧電薄膜付シリコン基板を作製した。KNNからなる圧電薄膜のNa組成は0.45であった。
(Comparative Example 5)
In the silicon substrate with a piezoelectric thin film according to Comparative Example 5, the piezoelectric thin film was produced by the MOD method (coating pyrolysis method). The substrate 10, the adhesive layer 40 provided on the substrate 10, and the lower electrode 20 provided on the adhesive layer 40 were formed in the same manner as in Examples 1 to 9 and Comparative Examples 1 to 3. Thereafter, a MOD raw material solution (however, Na composition 0.5) for forming a (K, Na) NbO 3 thin film was applied onto the lower electrode 20 made of Pt by a spin coater, and was heated on a hot plate set at 400 ° C. A drying process for 5 minutes was performed. Then, the silicon substrate with a piezoelectric thin film provided with the piezoelectric thin film which consists of polycrystalline KNN was produced by implementing the crystallization process for 30 minutes at 700 degreeC in an atmospheric condition in an electric furnace. The Na composition of the piezoelectric thin film made of KNN was 0.45.

(比較例6)
比較例6に係る圧電薄膜付シリコン基板は、圧電薄膜をエアロゾルデポジション法で作製した。基板10と、基板10上に設ける密着層40と、密着層40上に設ける下部電極20とは実施例1〜9、比較例1〜3と同様にして形成した。その後、Ptからなる下部電極20上にエアロゾルデポジション法で3μm厚のKNNからなる圧電薄膜を成膜した。原料粉末は平均粒径0.5μmの(K0.5Na0.5)NbO微粒子を用いて、基板の加熱はせずに、基板(より具体的には、下部電極20の表面)へのKNN微粒子の衝突速度を約100m/secの条件に設定して成膜した。成膜後、電気炉内において大気雰囲気下、750℃で2時間の熱処理を実施することにより、多結晶KNNからなる圧電薄膜を備える圧電薄膜付シリコン基板を作製した。KNNからなる圧電薄膜のNa組成は0.49であった。
(Comparative Example 6)
In the silicon substrate with a piezoelectric thin film according to Comparative Example 6, the piezoelectric thin film was produced by an aerosol deposition method. The substrate 10, the adhesive layer 40 provided on the substrate 10, and the lower electrode 20 provided on the adhesive layer 40 were formed in the same manner as in Examples 1 to 9 and Comparative Examples 1 to 3. Thereafter, a piezoelectric thin film made of KNN having a thickness of 3 μm was formed on the lower electrode 20 made of Pt by an aerosol deposition method. The raw material powder is (K 0.5 Na 0.5 ) NbO 3 fine particles having an average particle size of 0.5 μm, and is heated to the substrate (more specifically, the surface of the lower electrode 20) without heating the substrate. The film was formed by setting the collision speed of the KNN fine particles at a condition of about 100 m / sec. After the film formation, a silicon substrate with a piezoelectric thin film provided with a piezoelectric thin film made of polycrystalline KNN was manufactured by performing a heat treatment at 750 ° C. for 2 hours in an electric furnace in an air atmosphere. The Na composition of the piezoelectric thin film made of KNN was 0.49.

(KNNからなる圧電薄膜のX線回折測定)
実施例1〜9、比較例1〜6に係るKNNからなる圧電薄膜を備える圧電薄膜付シリコン基板において、X線回折測定(2θ/θスキャン)を実施して、結晶構造、配向状況を調査した。
(X-ray diffraction measurement of piezoelectric thin film made of KNN)
In the silicon substrate with piezoelectric thin film provided with the piezoelectric thin film made of KNN according to Examples 1 to 9 and Comparative Examples 1 to 6, X-ray diffraction measurement (2θ / θ scan) was performed to investigate the crystal structure and the orientation state. .

図6は、実施例2に係る圧電薄膜のX線回折パターンを示し、図7は、比較例2に係る圧電薄膜のX線回折パターンを示す。   6 shows an X-ray diffraction pattern of the piezoelectric thin film according to Example 2, and FIG. 7 shows an X-ray diffraction pattern of the piezoelectric thin film according to Comparative Example 2.

図6及び図7を参照すると、KNNからなる圧電薄膜は完全なペロブスカイト構造になっており、擬立方晶であり、KNNの(001)面方位に優先配向していることが分かる。なお、(001)面方位の配向状況の目安として、各KNNからなる圧電薄膜を備える圧電薄膜付シリコン基板におけるKNNの(001)回折ピーク(2θ=21〜23°のピーク)の強度を読み取った。   6 and 7, it can be seen that the piezoelectric thin film made of KNN has a complete perovskite structure, is a pseudo-cubic crystal, and is preferentially oriented in the (001) plane orientation of KNN. As an indication of the orientation state of the (001) plane orientation, the intensity of the (001) diffraction peak (2θ = 21-23 ° peak) of KNN in the piezoelectric thin film-attached silicon substrate provided with the piezoelectric thin film composed of each KNN was read. .

(KNNからなる圧電薄膜の内部応力及び内部応力の温度依存性の測定)
実施例1〜9、比較例1〜6に係る圧電薄膜付基板の各温度でのKNNからなる圧電薄膜の内部応力を光てこ法で測定した(詳細は前述の通り)。
(Measurement of internal stress of piezoelectric thin film made of KNN and temperature dependence of internal stress)
The internal stress of the piezoelectric thin film composed of KNN at each temperature of the piezoelectric thin film-attached substrates according to Examples 1 to 9 and Comparative Examples 1 to 6 was measured by an optical lever method (details are as described above).

図8は、実施例2に係る圧電薄膜の内部応力の温度依存性を示し、図9は、実施例7に係る圧電薄膜の内部応力の温度依存性を示し、図10は、比較例1に係る圧電薄膜の内部応力の温度依存性を示し、図11は、比較例2に係る圧電薄膜の内部応力の温度依存性を示す。   8 shows the temperature dependence of the internal stress of the piezoelectric thin film according to Example 2, FIG. 9 shows the temperature dependence of the internal stress of the piezoelectric thin film according to Example 7, and FIG. FIG. 11 shows the temperature dependence of the internal stress of the piezoelectric thin film according to Comparative Example 2. FIG.

測定結果に基づいて、20℃でのKNNからなる圧電薄膜の内部応力、成膜プロセスにおける最高温度における圧電薄膜の膜面内方向の内部応力、20℃から250℃のΔσ/ΔTの平均値を求めた。また、その他の実施例、比較例に関しても、同様の方法で20℃でのKNN圧電薄膜の内部応力、成膜プロセスにおける最高温度における圧電薄膜の膜面内方向の内部応力、20℃から250℃のΔσ/ΔTの平均値を求めた。   Based on the measurement results, the internal stress of the piezoelectric thin film made of KNN at 20 ° C., the internal stress in the in-plane direction of the piezoelectric thin film at the highest temperature in the film forming process, and the average value of Δσ / ΔT from 20 ° C. to 250 ° C. Asked. For other examples and comparative examples, the internal stress of the KNN piezoelectric thin film at 20 ° C. in the same manner, the internal stress in the in-plane direction of the piezoelectric thin film at the highest temperature in the film forming process, and 20 ° C. to 250 ° C. The average value of Δσ / ΔT was determined.

(圧電特性評価、アクチュエータ・センサ試作例)
その後、KNNからなる圧電薄膜の圧電定数d31を評価するために、実施例1〜9、比較例1〜6それぞれの試料のKNNからなる圧電薄膜の上にPtからなる上部電極(但し、膜厚20nm)をRFマグネトロンスパッタリング法で形成して、長さ20mm、幅2.5mmの短冊形を切り出して、KNN圧電薄膜を含む圧電素子を作製した。
(Piezoelectric property evaluation, actuator / sensor prototype)
Thereafter, in order to evaluate the piezoelectric constant d 31 of the piezoelectric thin film made of KNN, an upper electrode made of Pt (provided that the film is formed on the piezoelectric thin film made of KNN of each of Examples 1 to 9 and Comparative Examples 1 to 6) 20 nm thick) was formed by RF magnetron sputtering, and a rectangular shape having a length of 20 mm and a width of 2.5 mm was cut out to produce a piezoelectric element including a KNN piezoelectric thin film.

図12(a)及び(b)は、圧電素子の圧電定数d31の評価方法の概略を示す。 12A and 12B show an outline of a method for evaluating the piezoelectric constant d 31 of the piezoelectric element.

圧電定数d31は、以下のように評価した。すなわち、まず図12の(a)に示すように、圧電素子の長手方向の端をクランプ200で固定して、簡易的なユニモルフカンチレバーを構成した。次に、この状態で、上部電極50と下部電極20との間の圧電薄膜30としてのKNN薄膜に所定の電圧を印加した。これにより、KNN薄膜が伸縮して、ユニモルフレバーの全体が屈曲動作して、図12(b)に示すように、カンチレバーの先端が動作した。この時に、電圧印加前の上部電極表面50aの表面位置300aと電圧印加後の表面位置300bとの変位である変位量300を、レーザードップラ変位計250で測定した。   The piezoelectric constant d31 was evaluated as follows. That is, first, as shown in FIG. 12A, the end of the piezoelectric element in the longitudinal direction was fixed with the clamp 200 to constitute a simple unimorph cantilever. Next, in this state, a predetermined voltage was applied to the KNN thin film as the piezoelectric thin film 30 between the upper electrode 50 and the lower electrode 20. As a result, the KNN thin film was expanded and contracted, and the entire unimol flavor was bent, and the tip of the cantilever was moved as shown in FIG. At this time, a displacement amount 300, which is a displacement between the surface position 300a of the upper electrode surface 50a before voltage application and the surface position 300b after voltage application, was measured with a laser Doppler displacement meter 250.

圧電定数d31はカンチレバー先端の変位量300、カンチレバー長さ、基板及び圧電薄膜の厚さ、基板及び圧電薄膜のヤング率、印加電圧から算出される。圧電定数d31の印加電界30kV/cmの時の値を測定した。圧電定数d31の算出方法は文献(T.Mino, S. Kuwajima, T.Suzuki, I.Kanno, H.Kotera, and K.Wasa: Jpn. J. Appl. Phys. 46(2007) 6960)に記載されている方法に則った。 The piezoelectric constant d 31 is calculated from the displacement amount 300 at the tip of the cantilever, the cantilever length, the thickness of the substrate and the piezoelectric thin film, the Young's modulus of the substrate and the piezoelectric thin film, and the applied voltage. The value of the piezoelectric constant d 31 when the applied electric field was 30 kV / cm was measured. The method for calculating the piezoelectric constant d 31 is described in the literature (T. Mino, S. Kuwajima, T. Suzuki, I. Kanno, H. Kotera, and K. Wasa: Jpn. J. Appl. Phys. 46 (2007) 6960). According to the method described.

KNN薄膜のヤング率は104GPaを用いた。周辺雰囲気温度を管理することでKNN薄膜の温度を20℃に制御して、20℃での圧電定数d31(20℃)を算出した。また、KNN薄膜を備えるカンチレバーの直下に非接触でホットプレート270を設置して、輻射熱でKNN薄膜カンチレバーを加熱した。KNN薄膜の温度は上方からハンディータイプの放射温度計260を用いて測定して、KNN薄膜の温度が150℃の時に同様の圧電定数測定を実施して、d31(150℃)を算出した。 The Young's modulus of the KNN thin film was 104 GPa. By controlling the ambient atmosphere temperature, the temperature of the KNN thin film was controlled at 20 ° C., and the piezoelectric constant d 31 (20 ° C.) at 20 ° C. was calculated. In addition, a hot plate 270 was installed in a non-contact manner directly below the cantilever provided with the KNN thin film, and the KNN thin film cantilever was heated with radiant heat. The temperature of the KNN thin film was measured from above using a handy type radiation thermometer 260, and the same piezoelectric constant measurement was performed when the temperature of the KNN thin film was 150 ° C. to calculate d 31 (150 ° C.).

図13は、d31(150℃)の測定方法の概要を示す。 FIG. 13 shows an outline of a method for measuring d 31 (150 ° C.).

実施例1〜9、比較例1〜6の成膜方法、成膜温度、成膜プロセス最高温度、Na組成、X線回折測定でのKNNの(001)面回折ピーク強度、20℃でのKNN薄膜の内部応力、成膜プロセス最高温度でのKNN薄膜の内部応力、20℃から250℃でのKNN薄膜の内部応力の温度依存性、20℃での圧電定数d31、圧電定数の温度による変化率d31(150℃)/d31(20℃)を表1に示す。 Film forming method, film forming temperature, film forming process maximum temperature, Na composition, KNN (001) plane diffraction peak intensity in X-ray diffraction measurement, KNN at 20 ° C. The internal stress of the thin film, the internal stress of the KNN thin film at the maximum temperature of the film forming process, the temperature dependence of the internal stress of the KNN thin film from 20 ° C. to 250 ° C., the piezoelectric constant d 31 at 20 ° C., and the change of the piezoelectric constant with temperature The rate d31 (150 ° C.) / D31 (20 ° C.) is shown in Table 1.

Figure 0005531529
Figure 0005531529

表1を参照すると、成膜プロセスの最高温度でのKNN薄膜の内部応力が−500〜−200MPaの範囲の時、20℃での圧電定数d31が−100pm/V以上の高い値を有しており、この範囲を外れると急激に圧電定数d31の値が小さくなることが示された。20℃〜250℃でのKNN薄膜の内部応力の温度依存性(Δσ/ΔT)が−0.25×10〜−0.68×10(Pa/℃)の範囲内の時、圧電定数の温度による変化率d31(150℃)/d31(20℃)は0.9以上という高い値を有しており、この範囲を外れると0.71以下の小さい値になることが示された。なお、上記の簡易的なユニモルフカンチレバーは、上下電極間に電圧検知器を接続することで、カンチレバー先端の変位量を電圧として出力するセンサとして用いることもできる。 Referring to Table 1, when the internal stress of the KNN thin film at the maximum temperature of the film forming process is in the range of −500 to −200 MPa, the piezoelectric constant d 31 at 20 ° C. has a high value of −100 pm / V or more. It was shown that the value of the piezoelectric constant d 31 suddenly decreases outside this range. When the temperature dependence (Δσ / ΔT) of the internal stress of the KNN thin film at 20 ° C. to 250 ° C. is in the range of −0.25 × 10 6 to −0.68 × 10 6 (Pa / ° C.), the piezoelectric constant The rate of change d 31 (150 ° C.) / D 31 (20 ° C.) with a temperature of 0.9 has a high value of 0.9 or more, and it is shown that it becomes a small value of 0.71 or less outside this range. It was. The simple unimorph cantilever can also be used as a sensor that outputs a displacement amount at the tip of the cantilever as a voltage by connecting a voltage detector between the upper and lower electrodes.

実施例2、実施例7の圧電薄膜の内部応力σと温度の関係を示すグラフ(図8、図9)において、250℃以上400℃以下の温度範囲で、グラフは明確な変曲点を有しており、圧電薄膜の内部応力σの温度依存性(Δσ/ΔT)が20℃以上250℃以下の範囲での平均値よりも、400℃以上500℃以下の範囲での平均値の方が小さい値であることが示された(すなわち、絶対値が大きいことが示された)。また、表1を参照すると、20℃で圧電薄膜の膜面内方向の内部応力が、−80MPa(圧縮応力)から250MPa(引張り応力)の範囲内で、Na組成が0.4以上0.7以下の範囲で20℃における圧電定数d31が良好で、圧電定数d31の温度による変化率も良好であることが示された。 In the graphs (FIGS. 8 and 9) showing the relationship between the internal stress σ and the temperature of the piezoelectric thin films of Examples 2 and 7, the graphs have clear inflection points in the temperature range of 250 ° C. or more and 400 ° C. or less. The average value in the range of 400 ° C. or more and 500 ° C. or less is higher than the average value in the range of 20 ° C. or more and 250 ° C. or less of the temperature dependence (Δσ / ΔT) of the internal stress σ of the piezoelectric thin film. It was shown to be a small value (ie an absolute value was shown to be large). Further, referring to Table 1, the internal stress in the in-plane direction of the piezoelectric thin film at 20 ° C. is in the range of −80 MPa (compression stress) to 250 MPa (tensile stress), and the Na composition is 0.4 or more and 0.7. It was shown that the piezoelectric constant d 31 at 20 ° C. was good and the rate of change of the piezoelectric constant d 31 with temperature was good in the following range.

以上、本発明の実施の形態及び実施例を説明したが、上記に記載した実施の形態及び実施例は特許請求の範囲に係る発明を限定するものではない。また、実施の形態及び実施例の中で説明した特徴の組合せの全てが発明の課題を解決するための手段に必須であるとは限らない点に留意すべきである。   While the embodiments and examples of the present invention have been described above, the embodiments and examples described above do not limit the invention according to the claims. It should be noted that not all combinations of features described in the embodiments and examples are necessarily essential to the means for solving the problems of the invention.

1、1a、1b 圧電薄膜付基板
2、2a 圧電薄膜素子
10 基板
12 熱酸化膜
15 基板
20 下部電極
20a 下部電極表面
30 圧電薄膜
35 薄膜
40 密着層
50 上部電極
50a 上部電極表面
100 レーザー
110 ビームスプリッター
112 ミラー
120、122 検出器
200 クランプ
250 レーザードップラ変位計
260 放射温度計
270 ホットプレート
300 変位量
300a 表面位置
300b 表面位置
DESCRIPTION OF SYMBOLS 1, 1a, 1b Substrate with piezoelectric thin film 2, 2a Piezoelectric thin film element 10 Substrate 12 Thermal oxide film 15 Substrate 20 Lower electrode 20a Lower electrode surface 30 Piezoelectric thin film 35 Thin film 40 Adhesion layer 50 Upper electrode 50a Upper electrode surface 100 Laser 110 Beam splitter 112 Mirror 120, 122 Detector 200 Clamp 250 Laser Doppler Displacement Meter 260 Radiation Thermometer 270 Hot Plate 300 Displacement 300a Surface Position 300b Surface Position

Claims (12)

基板と、
前記基板の上方に設けられる下部電極と、
前記下部電極上に設けられ、一般式(K1-xNax)NbO3(0.4≦x≦0.7)で表されるアルカリニオブ酸化物系化合物からなる圧電薄膜と
を備え、
前記圧電薄膜は、膜面内方向の内部応力をσ、温度をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔTが負の傾きを有し、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.2495×106から−0.6866×106(Pa/℃)の範囲内であり、
20℃での圧電定数d 31 が−100pm/V以上(当該圧電定数に関する「以上」とは絶対値が大きいことを示す)、かつ圧電定数の温度による変化率d 31 (150℃)/d 31 (20℃)が0.9以上である圧電薄膜付基板。
A substrate,
A lower electrode provided above the substrate;
A piezoelectric thin film provided on the lower electrode and made of an alkali niobium oxide compound represented by the general formula (K 1-x Na x ) NbO 3 (0.4 ≦ x ≦ 0.7);
In the piezoelectric thin film, the ratio Δσ / ΔT of the change Δσ of the internal stress to the temperature change ΔT when the internal stress in the in-plane direction is σ and the temperature is T has a negative slope, and is 20 ° C. or higher and 250 ° C. or lower. in the average value of .DELTA..sigma / [Delta] T is - 0.2495 from × 10 6 - 0.6866 Ri range der of × 10 6 (Pa / ℃) ,
Piezoelectric constant d 31 at 20 ° C. is −100 pm / V or more (“above” relating to the piezoelectric constant indicates that the absolute value is large), and rate of change of piezoelectric constant with temperature d 31 (150 ° C.) / D 31 (20 ° C.) are piezoelectric thin film substrate with a Ru der least 0.9.
基板と、
前記基板の上方に設けられる下部電極と、
前記下部電極上に設けられ、一般式(K1-xNax)NbO3(0.4≦x≦0.7)で表されるアルカリニオブ酸化物系化合物からなる圧電薄膜と
を備え、
前記圧電薄膜は、膜面内方向の内部応力をσ、温度をTとした場合における温度変化ΔTに対する内部応力の変化Δσの比Δσ/ΔTが負の傾きを有し、20℃以上250℃以下におけるΔσ/ΔTの平均値が−0.2495×106から−0.6866×106(Pa/℃)の範囲内であり、
20℃での圧電定数d 31 が−100pm/V以上(当該圧電定数に関する「以上」とは絶対値が大きいことを示す)、かつ圧電定数の温度による変化率d 31 (150℃)/d 31 (20℃)が0.9以上である圧電薄膜付基板(ただし、前記圧電薄膜、前記基板の基板温度を550℃以下に設定して形成されたものである圧電薄膜付基板は除く)。
A substrate,
A lower electrode provided above the substrate;
A piezoelectric thin film provided on the lower electrode and made of an alkali niobium oxide compound represented by the general formula (K 1-x Na x ) NbO 3 (0.4 ≦ x ≦ 0.7);
In the piezoelectric thin film, the ratio Δσ / ΔT of the change Δσ of the internal stress to the temperature change ΔT when the internal stress in the in-plane direction is σ and the temperature is T has a negative slope, and is 20 ° C. or higher and 250 ° C. or lower. in the average value of .DELTA..sigma / [Delta] T is - 0.2495 from × 10 6 - 0.6866 Ri range der of × 10 6 (Pa / ℃) ,
Piezoelectric constant d 31 at 20 ° C. is −100 pm / V or more (“above” relating to the piezoelectric constant indicates that the absolute value is large), and rate of change of piezoelectric constant with temperature d 31 (150 ° C.) / D 31 (20 ° C.) a substrate with a piezoelectric thin film Ru der 0.9 or more (but before Symbol piezoelectric thin film, der Ru pressure conductive thin film which was formed by setting the substrate temperature before Kimoto plate 550 ° C. or less Excluding attached board).
前記圧電薄膜は、20℃における膜面内方向の内部応力が、−80MPa以上250MPa以下の範囲内である請求項1または2に記載の圧電薄膜付基板。   3. The substrate with a piezoelectric thin film according to claim 1, wherein the piezoelectric thin film has an internal stress in a film plane direction at 20 ° C. within a range of −80 MPa to 250 MPa. 前記圧電薄膜は、前記圧電薄膜の膜面内方向の内部応力と温度との関係を示すグラフにおいて、250℃以上400℃以下の温度範囲内に変曲点を有し、20℃以上250℃以下の範囲における前記Δσ/ΔTの平均値より、400℃以上500℃以下の範囲内における前記Δσ/ΔTの平均値が小さい請求項3に記載の圧電薄膜付基板。   The piezoelectric thin film has an inflection point in a temperature range of 250 ° C. or higher and 400 ° C. or lower in a graph showing the relationship between the internal stress in the in-plane direction of the piezoelectric thin film and temperature, and is 20 ° C. or higher and 250 ° C. or lower. The substrate with a piezoelectric thin film according to claim 3, wherein the average value of Δσ / ΔT in the range of 400 ° C. or more and 500 ° C. or less is smaller than the average value of Δσ / ΔT in the range of 5. 前記圧電薄膜は、前記下部電極上に前記圧電薄膜を形成する際における所定の温度での膜面内方向の内部応力が−500MPaを超え−200MPa以下の範囲内であり、
前記所定の温度は、前記圧電薄膜を成膜する際における最高温度に相当する温度である請求項4に記載の圧電薄膜付基板。
The piezoelectric thin film state, and are within the scope internal stress of the film plane direction is less -200MPa exceed -500MPa at a given temperature at the time of forming the piezoelectric thin film on the lower electrode,
Wherein the predetermined temperature is, the piezoelectric thin film with substrate according to the temperature der Ru claim 4, which corresponds to the maximum temperature at the time of forming the piezoelectric thin film.
前記下部電極は、白金(Pt)から形成される請求項5に記載の圧電薄膜付基板。   The substrate with a piezoelectric thin film according to claim 5, wherein the lower electrode is made of platinum (Pt). 前記基板と前記下部電極との間に、チタン(Ti)層を更に備える請求項6に記載の圧電薄膜付基板。   The substrate with a piezoelectric thin film according to claim 6, further comprising a titanium (Ti) layer between the substrate and the lower electrode. 前記基板は、表面に熱酸化膜を有する請求項7に記載の圧電薄膜付基板。   The substrate with a piezoelectric thin film according to claim 7, wherein the substrate has a thermal oxide film on a surface thereof. 前記所定の温度は、550℃以上600℃以下の範囲である請求項に記載の圧電薄膜付基板。 The substrate with a piezoelectric thin film according to claim 5 , wherein the predetermined temperature is in a range of 550 ° C to 600 ° C. 請求項1〜のいずれかに記載の圧電付基板と、前記圧電薄膜上に設けられる上部電極とを備える圧電薄膜素子。 The piezoelectric thin film element comprising: a piezoelectric thin film Tsukemoto plate according, and an upper electrode provided on the piezoelectric thin film in any of claims 1-9. 請求項1〜のいずれか1項に記載の圧電薄膜付基板を備えるアクチュエータ。 Actuator comprising a piezoelectric thin film with substrate according to any one of claims 1-9. 請求項1〜のいずれか1項に記載の圧電薄膜付基板を備えるセンサ。 Sensor comprising a piezoelectric thin film with substrate according to any one of claims 1-9.
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