JP5509151B2 - DMA controller and image forming apparatus including the same - Google Patents

Description

  The present invention relates to a DMA control device that reads and writes data such as image data to and from a memory using a direct memory address (hereinafter referred to as “DMA”). The present invention also relates to an image forming apparatus such as a multifunction machine, a copier, a facsimile, or a printer equipped with the DMA control device.

  Conventionally, when the CPU controls the writing and reading of data to / from the memory, in order to eliminate the inconvenience that a waiting time occurs during data transfer and other processing cannot be performed, each device does not go through the CPU by DMA. Data transfer directly between the main memory and the main memory. In order to prepare the necessary data in the main memory within the required time, the DMA controller performs complex arbitration processing such as execution order determination, interruption, and time division in response to various DMA requests. ing. Therefore, a DMA control device as described in Patent Document 1 has been invented.

  Specifically, Patent Document 1 includes a plurality of DMA request cores, an arbiter device for arbitrating the DMA execution order, and a timer that issues time information in common to the plurality of DMA request cores and the arbiter device. The plurality of DMA request cores calculate the DMA execution start request time so that the DMA transfer is completed by the DMA execution end request time while referring to the time information issued from the timer when each DMA request is issued. A DMA controller that sends DMA execution information request information together with DMA transfer information indicating the contents of transfer to the arbiter device, and the arbiter device arbitrates the DMA execution order based on the DMA execution start request time of each DMA request core. Is described. With this configuration, the circuit scale of the arbitration circuit is reduced, and DMA transfer is attempted within the time limit (see Patent Document 1: Claim 1, Abstract, etc.).

JP 2006-215621 A

  Certainly, in the invention described in Patent Document 1, there is a possibility that the circuit scale of the arbitration circuit can be reduced and DMA transfer can be performed within the time limit. However, the arbitration circuit described in Patent Document 1 manages the DMA execution start request time by software processing, but requires a timer that issues time information in common to the DMA request core and the arbitration circuit. In order to keep the time information in the timer even when the main power is turned off, it is necessary to prepare a backup power supply and to restore the time information to the DMA request core and the arbitration circuit when the main power is turned on. There's a problem. Further, when a plurality of DMA execution start request times are close to each other, it is difficult to perform DMA transfer within the time limit. In addition, in order to efficiently execute DMA, it may eventually require complicated time management and scheduling. As a result, there is a problem that the arbitration process may become complicated due to time management.

  In view of the above problems, the present invention does not require time management or the like, and operates modules in a desired order while simplifying an arbitration process for determining which request to execute from a plurality of stored requests. Let's make it an issue.

In order to achieve the above object, a DMA control device according to claim 1 reads a data stored in a main storage unit for storing data and data stored in the main storage unit, executes a process, and stores the data after the process is executed. A plurality of modules to be written in the main storage unit, a request issuing unit for issuing a processing request for the module based on software, a request storage unit for storing a plurality of processing requests issued by the request issuing unit and erasing processed processing requests A DMA control unit that arbitrates processing requests and controls access to the main storage unit of each module, and the request issuing unit is predetermined for the DMA control unit by software. Priority information indicating the degree to which the processing request is prioritized in a plurality of stages, and the DMA control unit includes the priority information among the processing requests stored in the request storage unit. Based select priority high priority processing request than lower processing request, to perform the process on the module corresponding to the processing request selected, also the request issuing unit, to said DMA controller, wherein An input processing request for causing the module to read data from the main storage unit and an output processing request for causing the module to write processed data to the main storage unit are issued. When a processing request is selected and there are a plurality of modules that execute processing requests of the same priority, the DMA control unit stores in the request storage unit if the completed processing request is the input processing request. Executable to the module that executes the input processing request stored in the request storage unit earliest among the plurality of input processing requests having the same priority. If the completed processing request is the output processing request, among the plurality of output processing requests having the same priority stored in the request storage unit, the processing request is stored first in the request storage unit. It was was Rukoto to execute the executable processing request to the module that executes the output processing request.

According to this configuration, the DMA control unit selects a processing request having a higher priority than a processing request having a lower priority based on the priority information among the processing requests stored in the request storage unit, and selects the selected process. Causes the module corresponding to the request to perform processing. As a result, the DMA control unit confirms the priority of each processing request and causes the module corresponding to the processing request having a high priority to execute the processing preferentially. Therefore, the priority of various processing requests should be set appropriately. As a result, even for processing requests that occur later in time series, it is possible to cause a module that has issued a processing request having a high priority to execute processing preferentially. Therefore, the DMA control unit manages the priority centrally, so that processing requests can be executed in a desired order. Further, the DMA control unit only needs to make arbitration by paying attention to the priority, and as in the prior art, a process for determining which processing request is executed with priority, an interrupt process associated with the determination, Confirm which module can be used from among multiple modules, and as a result of confirmation, prioritize which processing request, manage the startup request time, and send other processing requests in time for the startup request time In addition, the DMA control unit does not have to perform complicated arbitration processing such as determining the execution order. It is also possible to reduce the time lag until the processing request to be executed by the DMA control unit is determined. Further, according to this configuration, if the completed processing request is an input processing request, the DMA control unit earliest among a plurality of input processing requests having the same priority stored in the request storage unit. If the module that executes the stored input processing request executes an executable processing request, and the completed processing request is an output processing request, among the plurality of output processing requests of the same priority stored in the request storage unit The module that executes the output processing request stored in the request storage unit earliest is caused to execute an executable processing request. As a result, it is possible to clearly determine the first-come-first-served basis for the input processing request completion and the output processing request completion, and to determine which module is to execute the processing request. Therefore, the DMA control unit can easily select from among the processing requests having the same priority and different modules based on the input processing request when the input processing request is completed and the output processing request when the output processing request is completed. The module that should execute the processing request can be selected.

  Here, “priority” means processing that causes an error when data is insufficient from the required amount, such as a delay in delivery of image data to a portion to be printed in the image forming apparatus (avoid underrun occurrence) This is for distinguishing between processing that should be) and processing that is not. The priority is determined in advance according to software that makes a processing request to the DMA control unit. For example, the priority can be set in a plurality of stages such as four stages.

According to a second aspect of the present invention, in the first aspect of the invention, the request issuing unit issues a processing request with the priority information attached to each processing request.

  According to this configuration, the request issuing unit issues a processing request with priority information attached to each processing request. Thus, the DMA control unit only needs to select the processing request to be executed after confirming the priority information for each processing request.

According to a third aspect of the present invention, in the first or second aspect of the invention, the request issuing unit transmits the priority information that defines the priority of the module to the DMA control unit.

  According to this configuration, the request issuing unit transmits priority information that determines the priority of each module to the DMA control unit. As a result, it is possible to specify a module for which processing execution is prioritized and process a processing request. Therefore, it is possible to cause a specific module to perform processing intensively.

An image forming apparatus according to a fourth aspect includes the DMA control apparatus according to any one of the first to third aspects.

  According to this configuration, it is possible to provide an image forming apparatus that executes processing requests in a desired order and that does not require complicated arbitration processing by the DMA control unit. It is also possible to reduce the time lag until the processing request to be executed by the DMA control unit is determined. Accordingly, since the processing speed for data transfer and the like is high and the load on the part for controlling the multifunction machine is small, it is possible to provide an image forming apparatus that is stable and operates at high speed.

  According to the present invention, it is possible to operate modules in a desired order while simplifying the arbitration process for determining which request is executed from a plurality of stored requests without requiring time management or the like. it can.

1 is a schematic front sectional view of a multifunction machine. 2 is a block diagram illustrating an example of a hardware configuration of a multifunction peripheral. FIG. It is a block diagram which shows an example of the hardware regarding a DMA control apparatus. It is explanatory drawing for demonstrating the selection method of the DMA module started by the same priority. It is explanatory drawing for demonstrating the selection method of the DMA module started by the same priority. It is explanatory drawing for demonstrating the selection method of the DMA module started by the same priority. It is explanatory drawing for demonstrating the selection method of the DMA module started by the same priority. It is explanatory drawing for demonstrating the selection method of the DMA module started by the same priority. It is explanatory drawing for demonstrating the selection method of the DMA module started by the same priority. It is explanatory drawing for demonstrating the selection method of the DMA module started by the same priority. It is a flowchart which shows an example of the flow of starting control of each DMA module by a DMA control part.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS. In the following description, a multi-function device 100 (corresponding to an image forming apparatus) equipped with the DMA control device 1 according to the present invention will be described as an example. However, each element such as the configuration and arrangement described in the present embodiment is merely an illustrative example without limiting the scope of the invention.

(Outline of configuration of MFP 100)
First, an outline of a multifunction peripheral 100 (corresponding to an image forming apparatus) according to the embodiment will be described with reference to FIG. FIG. 1 is a schematic front sectional view of the multifunction machine 100.

  As shown in FIG. 1, the multifunction peripheral 100 according to the present embodiment includes a document conveying device 2a and an image reading unit 2b at the top. An operation panel 2c is provided on the front surface of the image reading unit 2b, and a sheet feeding unit 3a, a conveyance path 3b, an image forming unit 4a, a fixing unit 4b, and the like are provided in the main body of the multifunction peripheral 100.

  The document conveying device 2a has a fulcrum on the depth side of the sheet of FIG. 1, and can be opened and closed in the vertical direction of the sheet. The document conveying device 2 a presses the document placed on the placement reading contact glass 21. Further, the originals are fed one by one from the original bundle placed on the upper part of the original conveying apparatus 2a toward the contact glass 22 (reading position) for reading and reading, and are automatically conveyed.

  The image reading unit 2b reads a document and forms image data of the document. In addition, an optical system member (not shown) such as an exposure lamp, a mirror, a lens, and an image sensor (for example, CCD) is provided in the image reading unit 2b. Using these optical system members, the image reading unit 2b irradiates a document placed on the placement reading contact glass 21 or a document passing through the feed reading contact glass 22 with light reflected from the document. The output value of each pixel of the received image sensor is A / D converted to generate image data. Based on the generated image data, the multifunction peripheral 100 can also generate electronic document data.

  Further, as indicated by a broken line in FIG. 1, the operation panel 2 c is provided on the upper front side of the multifunction peripheral 100. The operation panel 2 c includes a liquid crystal display unit 23 that displays the state of the multifunction peripheral 100 and various messages. The liquid crystal display unit 23 can display one or a plurality of keys for performing function selection, setting, character input, and the like. In addition, a touch panel unit 24 (for example, a resistive film type) is provided on the upper surface of the liquid crystal display unit 23. The touch panel unit 24 is for extracting the position and coordinates of the portion pressed by the liquid crystal display unit 23. The operation panel 2c is also provided with various hard keys such as a start key 25 for instructing start of execution of various functions such as copying.

  The paper feed unit 3a stores a plurality of sheets (for example, various sheets such as copy sheets, plain sheets, recycled sheets, thick sheets, and OHP sheets) and sends them one by one to the conveyance path 3b. The transport path 3b is a path for transporting paper from the paper feed unit 3a to the discharge tray 31. The transport path 3b waits for the transport roller pairs 32 and 33 that are rotationally driven during transport of the paper and the transported paper in front of the image forming unit 4a, and puts the paper in time with toner image formation. A pair of registration rollers 34 and the like are provided.

  The image forming unit 4a forms a toner image based on the image data, and transfers the toner image to the conveyed paper. Therefore, the image forming unit 4a includes a photosensitive drum 41 supported so as to be rotationally driven in the direction of the arrow shown in FIG. 1, and a charging device 42, an exposure device 43, and a developing unit disposed around the photosensitive drum 41. A device 44, a transfer roller 45, a cleaning device 46, and the like are provided.

  The toner image formation and transfer process will be described. The photosensitive drum 41 is provided at substantially the center of the image forming unit 4a and is driven to rotate in the direction of the arrow shown in the drawing. The charging device 42 charges the photosensitive drum 41 to a predetermined potential. In FIG. 1, the exposure device 43 outputs laser light based on image data, scans and exposes the surface of the photosensitive drum 41, and forms an electrostatic latent image corresponding to the image data on the surface of the photosensitive drum 41. As the image data, image data obtained by the image reading unit 2b, image data transmitted from an external computer 200 or a partner FAX apparatus 300 (see FIG. 4) connected via a network, or the like is used.

  The developing device 44 supplies toner to the electrostatic latent image formed on the photosensitive drum 41 and develops it to form a toner image on the surface of the photosensitive drum 41. The transfer roller 45 is in pressure contact with the photosensitive drum 41, and a nip is formed between the transfer roller 45 and the photosensitive drum 41. The sheet enters the nip while being timed in accordance with the formation of the toner image in the image forming unit 4a. When the paper enters, a predetermined voltage is applied to the transfer roller 45, and the toner image on the photosensitive drum 41 is transferred to the paper. The cleaning device 46 removes the toner remaining on the photosensitive drum 41 after the transfer.

  The fixing unit 4b fixes the toner image transferred to the paper to the paper. The fixing unit 4b in the present embodiment is mainly composed of a heating roller 47 and a pressure roller 48 that incorporate a heating element. The heating roller 47 and the pressure roller 48 are pressed to form a nip. Then, as the sheet passes through the nip, the toner on the sheet surface is melted and heated, and the toner image is fixed on the sheet. The paper after the toner is fixed is received by the discharge tray 31. In this way, image formation (printing) is performed when the copy function and printer function are used.

(Hardware configuration of MFP 100)
Next, a hardware configuration of the multifunction peripheral 100 according to the embodiment of the present invention will be described with reference to FIG. FIG. 2 is a block diagram illustrating an example of a hardware configuration of the multifunction peripheral 100.

  As shown in FIG. 2, the multifunction peripheral 100 according to the present embodiment includes a main control unit 5 (corresponding to a request issuing unit). The main control unit 5 controls each unit of the multifunction peripheral 100. For example, the main control unit 5 includes a CPU 6 (corresponding to a request issuing unit) and, for example, a ROM 51 and a main storage unit 7 are mounted. The CPU 6 is a central processing unit, and includes parts for calculation and control processing such as a calculation circuit, a register, and a counter. The CPU 6 performs control and calculation of each unit of the multifunction peripheral 100 based on control software (program) and control data developed in the main storage unit 7.

  The main control unit 5 includes a storage device such as a nonvolatile ROM 51 (for example, an EEPROM or a flash ROM) and a volatile main storage unit 7. For example, the ROM 51 and the main storage unit 7 store a control program, control data, and the like for the multifunction machine 100.

  The ROM 51 is a non-volatile memory that retains stored contents even when the power is turned off. The ROM 51 stores software (programs) executed by the CPU 6, startup programs, fixed data for various controls such as various parameters unique to the apparatus, and software that causes the main control unit 5 to execute processing and control. Is stored. The ROM 51 stores, for example, copy software executed at the time of a copy job, printer software executed at the time of printing received data, transmission software executed at the time of transmitting data, and image data in the HDD 52. Stores software for boxes executed when storing. When executing various jobs, the CPU 6 reads software from the main storage unit 7 and sequentially performs processing.

  The main storage unit 7 is composed of, for example, a DRAM (for example, DIMM such as DDR, DDR2, DDR3). Further, the HDD 52 (Hard Disk Drive) for storing the image data obtained by reading the document of the image reading unit 2b and the image data received from the outside can communicate with the main control unit 5 as a large-capacity auxiliary storage device. Connected to. For example, the HDD 52 stores various setting data and image data. The main control unit 5 (CPU 6) reads out necessary data and programs from the HDD 52 to the main storage unit 7 according to the job and uses them. Instead of the HDD 52, a storage by a semiconductor storage device constituted by a flash ROM or the like may be used.

  The main control unit 5 is communicably connected to an engine control unit 40 that controls a portion related to printing (print engine unit). Based on an instruction from the main control unit 5, the engine control unit 40 performs image formation and ON / OFF of a motor or the like that rotates various rotating bodies. The engine control unit 40 actually controls operations of the paper feed unit 3a, the conveyance path 3b, the image forming unit 4a, the fixing unit 4b, and the like.

  The main control unit 5 is connected to the communication unit 53 so as to be communicable. The communication unit 53 is connected to the computer 200 (for example, a personal computer or a server) or the FAX apparatus 300 via a network, a public line, or a cable, and transmits and receives image data.

  The image processing unit 90 performs various image processing such as enlargement, reduction, density conversion, data format conversion, and the like on the image data from the computer 200 and the image reading unit 2b according to the setting. Since image processing that can be performed by the image processing unit 90 is diverse, it is assumed that image processing related to the known multifunction device 100 can be performed, and detailed description of executable image processing is omitted unless specifically described. The image processing unit 90 includes, for example, a plurality of DMA modules 9 (corresponding to modules, see FIG. 3) that process image data including an ASIC as a circuit dedicated to image processing, an image processing memory, and the like. Then, when printing is performed, the image processing unit 90 sends the image data after the image processing to the exposure device 43. The exposure device 43 receives the image data and scans and exposes the surface of the photosensitive drum 41.

  The main controller 5 is also communicably connected to the operation panel 2c via the bus 10 or the like. Data indicating the setting contents set on the operation panel 2c is sent to the main control unit 5, and the main control unit 5 controls the multifunction peripheral 100 to operate according to the user's setting. The main controller 5 is communicably connected to the document conveying device 2a and the image reading unit 2b. When executing a copy or scan job, the main control unit 5 causes the document conveying device 2a or the image reading unit 2b to read the document, and stores the image data obtained by reading the document in the main storage unit 7.

(DMA controller 1)
Next, an example of the DMA control device 1 installed in the multifunction peripheral 100 according to the present embodiment will be described with reference to FIG. FIG. 3 is a block diagram illustrating an example of hardware related to the DMA control device 1.

  In the multifunction peripheral 100 of the present embodiment, for example, the DMA control device 1 includes a CPU 6 of the main control unit 5, a main storage unit 7, a DMA control unit 8, and an image processing unit that are communicably connected via a bus 10 (memory bus). It consists of 90 various DMA modules 9. In other words, the CPU 6 of the main control unit 5, the main storage unit 7, the DMA control unit 8, and various DMA modules 9 of the image processing unit 90 function as part of the DMA control device 1. The CPU 6, main storage unit 7, DMA control unit 8, and various DMA modules 9 are connected to the bus 10. The CPU 6, main storage unit 7, DMA control unit 8, and various DMA modules 9 can communicate with each other via a bus 10.

  The main control unit 5 (CPU 6) issues a processing request by DMA (a request for starting the DMA module 9) to the DMA control unit 8 based on software operating in accordance with the job. The main storage unit 7 delivers the data to be subjected to DMA to the DMA module 9 and receives the data processed by the DMA module 9. In the present embodiment, the data to be subjected to DMA is, for example, image data.

  The DMA control unit 8 controls the operation of each DMA module 9 in response to a processing request from the main control unit 5 (CPU 6), and controls the exchange of image data between the main storage unit 7 and each DMA module 9. For example, the DMA control unit 8 includes an arbitration circuit 81 that selects a processing request to be executed according to the priority of the processing request, a queue buffer 82 (corresponding to a request storage unit) that stores a processing request from the CPU 6 (priority). Details of the degree will be described later).

  In the present embodiment, a plurality of DMA modules 9 are provided. Four are installed in the MFP 100 and the DMA control device 1 of the present embodiment. The number of DMA modules 9 to be mounted is not limited to four, but may be two to three or five or more.

  Each DMA module 9 is provided, for example, as a part of the image processing unit 90, executes image processing on the image data read from the main storage unit 7, and writes the image data after image processing in the main storage unit 7. .

  Each DMA module 9 has a different use (content of image processing to be executed), for example. For example, the DMA module 91 in FIG. 3 performs various image processing such as various image processing related to printing such as zoom processing. For example, the DMA module 92 performs various image processing such as image processing such as zoom without printing. Further, for example, the DMA module 93 performs various image processing such as image processing of a differential filter that emphasizes edges and a filter that smoothes density gradation. Further, for example, the DMA module 94 performs various types of image processing such as format conversion, compression, and expansion of image data according to a job, such as for the exposure apparatus 43 and for transmission. Since the following description applies to any of the DMA modules 91 to 94, the reference numerals 1, 2, 3, and 4 are omitted and referred to as the DMA module 9 unless otherwise specified. In addition, which DMA module 9 can perform what image processing can be arbitrarily determined.

  In each software corresponding to the job, what image processing is to be performed by which DMA module 9 is determined in advance. The main control unit 5 (CPU 6) issues a processing request for each DMA module 9 to the DMA control unit 8 along the flow of image data processing predetermined by each software corresponding to the job, and the DMA control unit 8 Then, the processing request stored in the queue buffer 82 is selected, and each DMA module 9 is caused to perform image processing.

  The data stored in the main storage unit 7 is read out to any of the DMA modules 9 and necessary image processing is performed. Since each DMA module 9 exchanges data with the main storage unit 7 via the bus 10, a plurality of DMA modules 9 cannot access the main storage unit 7 at the same time. Therefore, the DMA control unit 8 controls the DMA module 9 that communicates with the main storage unit 7 and selects the DMA module 9 that communicates with the main storage unit 7.

  Next, how to handle image data corresponding to a job to the multifunction device 100 will be described.

  First, a copy job will be described. When copying is performed (when the copy function of the multifunction machine 100 is used), copy software is read into the main storage unit 7 and activated. The main control unit 5 operates the image reading unit 2b based on the copying software to read the original. The main control unit 5 stores the image data obtained by reading the document in the main storage unit 7 based on the copy software.

  Further, the main control unit 5 (CPU 6) sets a plurality of image data bands (one page of image data with a certain number of lines) in accordance with the copy settings and default settings made on the operation panel 2c such as zoom and density conversion. A processing request is made to the DMA control unit 8 in units of (band-shaped image data divided into two). The copy software is in a state where image data can be delivered to the exposure apparatus 43 to the main control section 5 (until the image data can be used by the exposure apparatus 43). To the main control unit 5. As a result, the main control unit 5 sequentially issues processing requests to the DMA control unit 8 and causes the DMA data to be read from the main storage unit 7 to any one of the DMA modules 9. Image processing is performed, and image data after image processing is written to the main storage unit 7 (multiple times if necessary). Then, the main control unit 5 transmits the image data after completion of the image processing from the main storage unit 7 to the exposure device 43. In this way, printing is performed based on the image data obtained by the image reading unit 2b.

  Next, a job as a printer will be described. When printing is performed in accordance with image data or print setting data from the external computer 200 (when using the printer function of the multifunction machine 100), printer software is read into the main storage unit 7 and activated. . The main control unit 5 performs processing based on printer software. For example, the main control unit 5 causes the communication unit 53 to receive image data and the like based on the printer software, and stores the received image data in the main storage unit 7.

  Further, the main control unit 5 (CPU 6) divides the image data into bands (band-like image data obtained by dividing one page of image data into a plurality of lines with a certain number of lines) in accordance with the print settings transmitted in accordance with the image data. A processing request to the DMA control unit 8 is made in units. The software for the printer mainly issues processing requests to the DMA control unit 8 until the image data can be delivered to the exposure device 43 (until the image data can be used by the exposure device 43). Let the control unit 5 do this. As a result, the main control unit 5 sequentially issues a processing request to the DMA control unit 8, causes the main storage unit 7 to read any of the DMA modules 9, causes each DMA module 9 to perform image processing, The image data after image processing is written into the main storage unit 7 (multiple times if necessary). Then, the main control unit 5 transmits the image data after completion of the image processing from the main storage unit 7 to the exposure device 43. In this way, printing is performed based on the image data obtained by the communication unit 53.

  Next, a transmission job will be described. When an image data transmission job is performed (when the transmission function of the multifunction peripheral 100 is used), transmission software is read into the main storage unit 7 and activated. The main control unit 5 and the like perform processing based on transmission software. First, the main control unit 5 prepares image data to be transmitted based on transmission software. For example, the main control unit 5 operates the image reading unit 2 b to read a document, and stores the image data obtained by reading the document in the main storage unit 7. Alternatively, the main control unit 5 stores the image data stored in the HDD 52 or the image data transmitted from the computer 200 or the like in the main storage unit 7.

  Further, the main control unit 5 (CPU 6) requests the DMA control unit 8 to process image data in units of bands in accordance with transmission settings on the operation panel 2c, such as zoom, density conversion, and data format conversion adapted to transmission. I do. Then, the transmission software causes the main control unit 5 to make a processing request to the DMA control unit 8 until image data for transmission is generated. For example, if any of the DMA modules 9 is FAX transmission, the image data is set as image data for FAX transmission. In addition, any of the DMA modules 9 performs conversion processing to a file format for compression or transmission (for example, JPEG or PDF) for transmission to the computer 200. As described above, the main control unit 5 sequentially requests processing from the DMA control unit 8 based on the software for transmission, and reads data from any of the DMA modules 9 from the main storage unit 7. The image processing in the module 9 is performed, and the image data after the image processing is written into the main storage unit 7 (multiple times if necessary).

  When image data for transmission is completed, the main control unit 5 provides the image data from the main storage unit 7 to the communication unit 53 based on the transmission software, and transmits the image data to the destination set on the operation panel 2c. In this way, the multifunction peripheral 100 can transmit image data.

  Next, a job for storing image data in the HDD 52 (box function) will be described. When the image data is stored in the HDD 52 (when the box function of the multifunction machine 100 is used), the software for the box function is read into the main storage unit 7 and activated. The main control unit 5 and the like perform processing based on box function software. First, the main control unit 5 prepares image data to be accumulated based on software for the box function. For example, the main control unit 5 operates the image reading unit 2 b to read a document, and stores the image data obtained by reading the document in the main storage unit 7. Alternatively, the main control unit 5 stores the image data received by the communication unit 53 in the main storage unit 7.

  Further, the main control unit 5 (CPU 6) requests the DMA control unit 8 to process the image data in units of bands in accordance with settings on the operation panel 2c and the like related to compression and storage size. The box function software causes the main control unit 5 to make a processing request to the DMA control unit 8 until image data to be stored in the HDD 52 (for example, image data in JPEG or PDF format) is created. As described above, the main control unit 5 sequentially requests processing to the DMA control unit 8 based on the software for the box function, and reads data from any of the DMA modules 9 from the main storage unit 7. The image processing in the DMA module 9 is performed, and the image data after the image processing is written into the main storage unit 7 (multiple times if necessary).

  When the image data to be stored in the HDD 52 is completed, the main control unit 5 provides the image data from the main storage unit 7 to the HDD 52 based on the software for the box function, and stores it in the HDD 52. As described above, the multifunction peripheral 100 can store the image data in the HDD 52.

(Control of DMA module 9 based on priority)
Next, an example of control for the DMA module 9 of the DMA control device 1 according to the embodiment will be described with reference to FIGS. 4 to 10 are explanatory diagrams for explaining a method of selecting the DMA module 9 to be activated with the same priority.

  First, in the DMA control device 1 of the present embodiment, a processing request (startup request for the DMA module 9) is issued from the main control unit 5 (CPU 6). In this processing request, which DMA module 9 is to perform processing and the processing content are determined in advance. The software causes the main control unit 5 to issue a predetermined processing request as to which DMA module 9 performs processing.

  And in the DMA control apparatus 1 of this embodiment, a priority is provided regarding a processing request. For example, four levels of priority can be provided corresponding to the four DMA modules 9. The priority may be 2 levels, 3 levels, or 5 levels or more.

  In addition, although the code | symbol which shows the high order and low order of a priority can be set suitably, the code | symbol of A, B, C, D is used in this description. The priority is described as being in the relationship of A> B> C> D.

  The priority is also determined in advance (within the software) according to the software that is activated with the job. Then, the main control unit 5 issues a processing request to the DMA control unit 8 with information indicating the priority. Note that the main control unit 5 may give the DMA control unit 8 information indicating the priority for each processing request. While allowing each DMA module 9 to perform a plurality of image processing, the main control unit 5 sends information indicating which DMA module 9 has a higher priority (information indicating the priority of the DMA module 9) to the DMA control unit. 8 may be given priority over the specific DMA module 9.

  For example, for a process (image processing) in which underrun should not occur, a high priority is assigned, and for a process that can wait for processing (image processing), underrun should not occur. A lower priority is assigned to the processing that should not be performed.

  Since the multifunction peripheral 100 realizes a plurality of functions, a plurality of jobs may be processed in parallel at the same time. For example, when the communication unit 53 receives image data for transmission from the external computer 200 during execution of a copy job, the transmission software is activated while the copy software is activated.

  For example, in a copy job, printing is executed using image data of a document output from the image reading unit 2b. For example, when the image reading unit 2b continuously reads a document over a plurality of pages, the image reading unit 2b continuously outputs the image data of the document. In this case, not all image data to be used for a copy job can be stored in the main storage unit 7 and further provided to the exposure device 43 in the main storage unit 7 before the exposure start timing in the exposure device 43. The image data that should be prepared must be prepared. For example, when image data for transmission is generated in parallel, if an underrun occurs in which image data supply to the exposure device 43 is not in time, a printed matter with missing data may be generated.

  Therefore, a job processing request such as a copy job that should not cause an underrun has a high priority (for example, priority A). On the other hand, in a job such as transmission, since the image data may be transmitted after completion, the priority is set low (for example, priority D). Thus, the priority may be determined according to the type of job (for example, priority B for a printer job and priority C for a box function).

  As described above, “priority” means processing that causes an error when data is insufficient (such as underrun occurrence), such as delay in delivery of image data to a portion to be printed in the image forming apparatus. This is for distinguishing between processing that should be avoided and processing that is not. The priority is determined in advance according to software that makes a processing request to the DMA control unit 8. For example, the priority can be set in a plurality of stages such as four stages.

  For example, the DMA control unit 8 selects the DMA module 9 that executes the processing request with the highest priority among the processing requests accumulated in the queue buffer 82 and activates the selected DMA module 9. As a result, the DMA module 9 can be activated so that processing requests are executed in the expected order in software (according to the priority).

  Here, when there are a plurality of DMA modules 9 for which processing requests with the same priority are made, it is necessary to determine which DMA module 9 is to be activated. An example of selecting the DMA module 9 to be activated when there are a plurality of DMA modules 9 for which processing requests with the same priority are made will be described with reference to FIGS.

  First, in the DMA control device 1 of this embodiment, the main control unit 5 issues a processing request (input processing request) for inputting image data from the main storage unit 7 to any of the DMA modules 9 to the DMA control unit 8. . In the input processing request, it is determined which area in the main storage unit 7 image data is to be read out by which DMA module 9 together with information indicating the priority. The DMA control unit 8 causes the DMA module 9 to read image data from the main storage unit 7 based on the input processing request.

  Further, in the DMA control device 1 of the present embodiment, the main control unit 5 responds to the input processing request made earlier if the area for storing the image data processed by the DMA module 9 can be secured in the main storage unit 7. An output processing request is issued to the DMA control unit 8. In the output processing request, together with information indicating the priority, it is determined from which DMA module 9 to which area in the main storage unit 7 the image data is to be written. The DMA control unit 8 causes the main storage unit 7 to write image data after image processing based on the output processing request.

  In other words, at least one input processing request and one output processing are required to provide image data in the main storage unit 7 to one DMA module 9 and store the image data after image processing in the main storage unit 7. A request is required.

  Note that when the image data of the main storage unit 7 is given to one DMA module 9 and the image data after image processing is stored in the main storage unit 7, the output processing request is one time for the input processing request once. It is not decided. For example, in zoom processing for reducing the size of image data (for example, A4 size is reduced to A5 size), the size of image data after image processing is reduced. For example, when performing a reduction process, the main control unit 5 issues an input process request to the same DMA module 9 a plurality of times, and then performs image data after the reduction process (the DMA module 9 that has performed the reduction process). One output processing request may be issued to the same DMA module 9. Further, for example, when performing the enlargement process, the main control unit 5 issues an input process request once to the same DMA module 9 and then applies to the image data after the enlargement process (the DMA module 9 that has performed the enlargement process). Multiple output processing requests may be issued to the same DMA module 9. As described above, in the processing of one combination of reading and writing in the DMA module 9, the number of input processing requests and the number of output processing requests may be different.

  Then, when there are a plurality of DMA modules 9 to which processing requests of the same priority are made, a method (procedure) for determining which DMA module 9 is to be activated will be described with reference to FIGS. 4 to 10. To do.

  First, each explanatory drawing of FIGS. 4-10 is demonstrated. First, the horizontal axis in each of FIGS. 4 to 10 shows the flow of time.

  A system A and a system B in FIGS. 4 to 10 show two DMA modules 9 among the four DMA modules 9. In this description, a plurality of input processing requests and output processing requests in the A system and the B system are all assumed to have the same priority (for example, priority A).

  The number in each rectangle that delimits the upper band labeled “ON” in the two-stage band indicated as “A system” indicates the number of input processing requests to the DMA module 9 corresponding to the A system at each time point. Indicates. For example, if “2” is entered, it indicates that there are two input processing requests for the DMA module 9 corresponding to the A system in the queue buffer 82 at that time. A downward arrow attached to the upper rectangular boundary indicates a point in time when the input processing request issued by the main control unit 5 is accumulated in the queue buffer 82 (the main control unit 5 inputs to the DMA module 9 corresponding to the A system). Indicates when the processing request was issued. Each of FIGS. 4 to 10 shows that a total of four input processing requests (shown as A1 to A4) have been issued to the DMA module 9 of the A system. At the point of these downward arrows, the number in each rectangle is incremented by “1”. When the execution of the input processing request is completed, the DMA control unit 8 deletes the input processing request that has been executed from the queue buffer 82, and the number decreases (for example, in FIGS. 4 to 10). Time points at T1 and T3, the execution completion point of the input processing request is shaded).

  The number in each rectangle that delimits the lower band labeled “Out” of the two bands indicated as “A system” is the number of output processing requests to the DMA module 9 corresponding to the A system at each time point. Indicates. For example, if “2” is entered, it indicates that there are two output processing requests for the DMA module 9 corresponding to the A system in the queue buffer 82 at that time. The upward arrow attached to the lower rectangular boundary indicates when the output processing request issued by the main control unit 5 is accumulated in the queue buffer 82 (the main control unit 5 outputs to the DMA module 9 corresponding to the A system). Indicates when the processing request was issued. 4 to 10 show that a total of two output processing requests (shown as a1 and a2) for the A-system DMA module 9 have been issued. At the point of these upward arrows, “1” is added to the number in each rectangle. When the execution of the output processing request is completed, the DMA control unit 8 deletes the output processing request that has been executed from the queue buffer 82, and the number decreases with this deletion (for example, in FIGS. 4 to 10). Time points T2 and T5, the output processing request execution completion point is shaded).

  The number in each rectangle that delimits the upper band labeled “ON” in the two bands indicated as B system is the number of input processing requests to the DMA module 9 corresponding to the B system at each time point. Indicates. For example, if “2” is entered, it indicates that there are two input processing requests for the DMA module 9 corresponding to the B system in the queue buffer 82 at that time. A downward arrow attached to the upper rectangular boundary indicates a point in time when the input processing request issued by the main control unit 5 is accumulated in the queue buffer 82 (the main control unit 5 inputs to the DMA module 9 corresponding to the B system). Indicates when the processing request was issued. Each of FIGS. 4 to 10 shows that a total of three input processing requests (shown as B1 to B3) for the B-system DMA module 9 have been issued. At the point of these downward arrows, the number in each rectangle is incremented by “1”. When the execution of the input processing request is completed, the DMA control unit 8 deletes the input processing request that has been executed from the queue buffer 82, and the number decreases (for example, in FIGS. 4 to 10). At time T4 or T7, the input processing request execution completion point is shaded.

  The number in each rectangle that delimits the lower band labeled “Out” of the two bands shown as B system is the number of output processing requests to the DMA module 9 corresponding to the B system at each time point. Indicates. For example, if “2” is entered, it indicates that there are two output processing requests for the DMA module 9 corresponding to the B system in the queue buffer 82 at that time. The upward arrow attached to the lower rectangular boundary indicates when the output processing request issued by the main control unit 5 is accumulated in the queue buffer 82 (the main control unit 5 outputs to the DMA module 9 corresponding to the B system). Indicates when the processing request was issued. 4 to 10 show that a total of three output processing requests (shown as b1 to b3) for the B-system DMA module 9 have been issued. At the point of these upward arrows, “1” is added to the number in each rectangle. When the execution of the output processing request is completed, the DMA control unit 8 deletes the output processing request that has been executed from the queue buffer 82, and the number decreases with this deletion (for example, in FIGS. 4 to 10). At time T6, the execution completion point of the output processing request is shaded).

  4 to 10 indicate the contents of the processing performed between each DMA module 9 and the main storage unit 7. “A system input” indicates that input processing of image data from the main storage unit 7 to the DMA module 9 corresponding to the A system has been performed. “A system output” indicates that output processing of image data after image processing has been performed from the DMA module 9 corresponding to the A system to the main storage unit 7. “B system input” indicates that input processing of image data from the main storage unit 7 to the DMA module 9 corresponding to the B system has been performed. “B system output” indicates that output processing of image data after image processing has been performed from the DMA module 9 corresponding to the B system to the main storage unit 7.

  Next, a selection example of the DMA module 9 that causes the DMA control unit 8 to execute processing in time series will be described with reference to FIGS.

  First, as shown in FIG. 4, in response to the input processing request A1 and the output processing request a1 that are initially stored in the queue buffer 82 of the DMA control unit 8, activation of the DMA module 9 corresponding to the A system is started. The Since the image data cannot be output unless the DMA module 9 processes it according to the input processing request, the DMA control unit 8 executes the input processing request A1, as shown by the black and white reversed characters in FIG. The DMA module 9 is activated. As a result, the A-system DMA module 9 reads image data from the main storage unit 7 via the bus 10.

  Next, as shown in FIG. 5, when the execution of the input processing request A1 is completed (time point T1), the DMA control unit 8 activates (processes) which DMA module 9 of the A system or the B system. Judging. At this time, since the completed request is an input processing request, the DMA control unit 8 compares the two systems of input processing requests having the same priority and executes the input processing request previously stored in the queue buffer 82. The DMA module 9 is selected as the DMA module 9 for performing the next processing.

  In the case of FIG. 5, since the execution of the input processing request A1 has been completed at time T1, the DMA control unit 8 registers in the queue buffer 82 earliest among the unexecuted input processing requests of the A-system DMA module 9. The input processing request A2 and the input processing request B1 registered in the queue buffer 82 among the unexecuted input processing requests of the DMA system 9 of the B system earliest are compared (the comparison target is shown by shading). Since the input processing request A2 for the A system is registered in the queue buffer 82 earlier, the DMA control unit 8 selects the use of the DMA module 9 for the A system.

  In this case, in order to execute the input processing request A2, it is necessary to output the image processing result of the input processing request A1 to the main storage unit 7. Therefore, as shown in FIG. 5, the DMA control unit 8 executes the output processing request a1 corresponding to the executable input processing request A1 among the processing requests of the DMA module 9 of the A system selected when used. Specifically, the DMA control unit 8 activates the output of the DMA module 9 of the A system. As a result, the A-system DMA module 9 writes the image data after image processing into the main memory 7 via the bus 10.

  Next, as shown in FIG. 6, when the output processing request a1 is completed (time point T2), the DMA control unit 8 activates (processes) which DMA module 9 of the A system or the B system. Judging. At this time, since the completed request is an output processing request, the DMA control unit 8 compares the two output processing requests having the same priority and executes the output processing request previously stored in the queue buffer 82. 9 is selected as the DMA module 9 for performing the next processing.

  In the case of FIG. 6, since the execution of the output processing request a1 is completed at time T2, the DMA control unit 8 is registered in the queue buffer 82 earliest among the unexecuted output processing requests of the DMA module 9 of the A system. The output processing request a2 is compared with the output processing request b1 registered in the queue buffer 82 earliest among the unexecuted output processing requests of the B-system DMA module 9 (the comparison target is shown by shading). Since the output processing request a2 of system A is registered in the queue buffer 82 earlier, the DMA control unit 8 selects to use the DMA module 9 of system A.

  In this case, in order to execute the output process request a2, it is necessary to input the image data of the input process request A2 from the main storage unit 7 to the DMA module 9 of the A system. Therefore, as shown in FIG. 5, the DMA control unit 8 executes an executable input processing request A2 among the processing requests of the DMA system 9 of system A selected when used. Specifically, the DMA control unit 8 activates the input (input processing request A2) of the DMA module 9 of the A system. As a result, the A-system DMA module 9 reads image data from the main storage unit 7 via the bus 10.

  Next, as shown in FIG. 7, when the execution of the input processing request A2 is completed (at time T3), the DMA control unit 8 activates (processes) which DMA module 9 of the A system or the B system. Judging. At this time, since the completed request is an input processing request, the DMA control unit 8 compares two input processing requests with the same priority and executes the input processing request previously stored in the queue buffer 82. 9 is selected as the DMA module 9 for performing the next processing.

  In the case of FIG. 7, since the execution of the input processing request A2 is completed at time T3, the DMA control unit 8 is registered in the queue buffer 82 earliest among the unexecuted input processing requests of the A-system DMA module 9. The input processing request A3 is compared with the input processing request B1 registered in the queue buffer 82 among the unexecuted input processing requests of the B-system DMA module 9 first (one of the comparison targets is shown by shading). Since the input processing request B1 of the B system is registered in the queue buffer 82 earlier, the DMA control unit 8 selects to use the DMA module 9 of the B system.

  Therefore, as indicated by white letters in FIG. 7, the DMA control unit 8 executes an executable input processing request B1 among the processing requests of the selected B-system DMA module 9 when used. Specifically, the DMA control unit 8 activates the input (input processing request B1) of the B system DMA module 9. As a result, the B-system DMA module 9 reads image data from the main storage unit 7 via the bus 10.

  Next, as shown in FIG. 8, with the completion of execution of the input processing request B1 (time point T4), the DMA control unit 8 activates (processes) which DMA module 9 of the A system or the B system. Judging. At this time, since the completed request is an input processing request, the DMA control unit 8 compares two input processing requests with the same priority and executes the input processing request previously stored in the queue buffer 82. 9 is selected as the DMA module 9 for performing the next processing.

  In the case of FIG. 8, since the execution of the input processing request B1 is completed at time T4, the DMA control unit 8 is registered in the queue buffer 82 earliest among the unexecuted input processing requests of the A-system DMA module 9. The input processing request A3 is subject to comparison, but the B system does not have an input processing request at time T4 (the input of the input processing request B2 is shaded between time T4 and time T5 and one of the comparison targets is shaded. ). Therefore, since it can be said that the input processing request A3 of the A system is registered in the queue buffer 82 earlier, the DMA control unit 8 selects to use the DMA module 9 of the A system.

  In the case of this description, in order to execute the input processing request A3, the output processing request a2 is necessary (input of the image processing result of the input processing request A2 to the main storage unit 7 is necessary). Therefore, as indicated by white letters in FIG. 8, the DMA control unit 8 executes an executable output processing request a2 among the processing requests of the DMA system 9 of system A selected when used. Specifically, the DMA control unit 8 activates the output (output processing request a2) of the DMA module 9 of the a system. As a result, the A-system DMA module 9 writes the image data after image processing into the main memory 7 via the bus 10.

  Next, as shown in FIG. 9, when the output processing request a2 is completed (time T5), the DMA control unit 8 activates (processes) which DMA module 9 of the A system or the B system. Judging. At this time, since the completed request is an output processing request, the DMA control unit 8 compares the two output processing requests having the same priority and executes the output processing request previously stored in the queue buffer 82. 9 is selected as the DMA module 9 for performing the next processing.

  In the case of FIG. 9, since the execution of the output processing request a2 is completed at time T5, the DMA control unit 8 is registered in the queue buffer 82 earliest among the unexecuted output processing requests of the B-system DMA module 9. The output processing request b1 is a comparison target, but the A system has no output processing request at time T5. Therefore, since it can be said that the output processing request b1 of the B system is registered in the queue buffer 82 earlier, the DMA control unit 8 selects to use the DMA module 9 of the B system.

  In the case of this description, the input processing request B1 necessary for executing the output processing request b1 has already been executed. Therefore, as indicated by white letters in FIG. 9, the DMA control unit 8 executes an executable output processing request b1 among the processing requests of the selected B-system DMA module 9 when used. Specifically, the DMA control unit 8 activates the output (output processing request b1) of the B system DMA module 9. As a result, the B-system DMA module 9 writes the image data after image processing to the main memory 7 via the bus 10.

  Next, as shown in FIG. 10, when the output processing request b1 is completed (time point T6), the DMA control unit 8 activates (processes) which DMA module 9 of the A system or the B system. Judging. At this time, since the completed request is an output processing request, the DMA control unit 8 compares the two output processing requests having the same priority and executes the output processing request previously stored in the queue buffer 82. 9 is selected as the DMA module 9 for performing the next processing.

  In the case of FIG. 10, since the execution of the output processing request b1 is completed at time T6, the DMA control unit 8 is registered in the queue buffer 82 earliest among the unexecuted output processing requests of the B system DMA module 9. The output processing request b2 is a comparison target, but the A system has no output processing request at time T6. Therefore, since it can be said that the output processing request b2 of the B system is registered in the queue buffer 82 earlier, the DMA control unit 8 selects to use the DMA module 9 of the B system.

  In the case of the present description, the input processing request B1 necessary for executing the output processing request b1 has already been executed (for example, a plurality of outputs are required for one input in an enlargement zoom process or the like). Therefore, as indicated by white letters in FIG. 10, the DMA control unit 8 executes an executable output processing request b2 among the processing requests of the selected B-system DMA module 9 when used. Specifically, the DMA control unit 8 activates the output (output processing request b2) of the B system DMA module 9. As a result, the B-system DMA module 9 writes the image data after image processing to the main memory 7 via the bus 10.

  Thereafter, as in the case described above, when there are processing requests with the same priority for different DMA modules 9, the DMA control unit 8 first registers in the queue buffer 82 according to the type of processing request completed. When the DMA module 9 corresponding to the input processing request or the output processing request is used, the processing request executable by the selected DMA module 9 is activated.

(Flow of control of DMA module 9 based on priority)
Next, the flow of activation control of each DMA module 9 by the DMA control unit 8 according to the embodiment will be described with reference to FIG. FIG. 11 is a flowchart showing an example of the flow of activation control of each DMA module 9 by the DMA control unit 8.

  First, the start in FIG. 11 is a time point after the main power is turned on and the DMA control unit 8 starts to start. Specifically, one or a plurality of processing requests waiting for processing requests from the queue buffer 82 or the main control unit 5 is accumulated, and the DMA module 9 to be activated for processing is selected, and the processing is performed by the DMA module. 9 is the time at which execution is to be performed.

  First, the DMA control unit 8 (its arbitration circuit 81) checks whether or not there is a processing request of priority A based on the priority information corresponding to each processing request among the processing requests in the queue buffer 82 (step # 1). ). If there is a processing request of priority A (Yes in step # 1), the DMA control unit 8 (arbitration circuit 81 thereof) determines whether or not there are a plurality of processing requests of priority A (a plurality of processing of the same priority). Whether there is a request) is confirmed (step # 2).

  If there are not a plurality of processing requests with the same priority (No in step # 2), the DMA control unit 8 selects the DMA module 9 corresponding to the processing request with the highest priority at present (step # 3). Then, the DMA control unit 8 activates the selected DMA module 9 to execute an executable process request (step # 4). Then, the DMA control unit 8 deletes the executed processing request from the queue buffer 82 (step # 5). As described above, the activated DMA module 9 performs the image data reading process from the main storage unit 7, the image processing of the read image data, and the writing process of the image data after the image processing to the main storage unit 7. Do. Then, selection of the DMA module 9 to execute processing at the present time and execution of the processing request are completed, and this flow returns to step # 1. If a processing request remains in the queue buffer 82, the DMA module 9 is selected and the processing is executed again.

  On the other hand, if there are a plurality of processing requests with the same priority (Yes in step # 2), as explained using FIG. 4 to FIG. The DMA module 9 corresponding to the fast processing request (the earliest start request stored in the queue buffer 82) is selected (step # 6). Then, the flow moves to step # 4. As a result, the DMA control unit 8 activates the selected DMA module 9 and, for example, a process corresponding to the earliest process request is executed (step # 4 → step # 1).

  On the other hand, if there is no processing request of priority A (No in step # 1), the DMA control unit 8 (the arbitration circuit 81), among the processing requests in the queue buffer 82, priority information corresponding to each processing request. Based on the above, the presence / absence of a processing request of priority B is confirmed (step # 7). If there is a processing request for priority B (Yes in step # 7), the flow proceeds to step # 2.

  On the other hand, if there is no processing request for priority B (No in step # 7), the DMA control unit 8 (the arbitration circuit 81), among the processing requests in the queue buffer 82, priority information corresponding to each processing request. Based on the above, the presence / absence of processing request of priority C is confirmed (step # 8). If there is a priority C processing request (Yes in step # 8), the flow proceeds to step # 2.

  On the other hand, if there is no processing request of priority C (No in step # 8), the DMA control unit 8 (the arbitration circuit 81), among the processing requests in the queue buffer 82, priority information corresponding to each processing request. Based on the above, the presence / absence of a processing request of priority D is confirmed (step # 9). If there is a priority D processing request (Yes in step # 9), the flow proceeds to step # 2. On the other hand, if there is no processing request for priority D (No in step # 9), the flow proceeds to step # 1.

  In this way, the DMA control device 1 of the present embodiment reads the data stored in the main storage unit 7 for storing data and the main storage unit 7, executes the process, and stores the data after the process is executed in the main memory. A plurality of modules (DMA module 9) to be written to the unit 7, a request issuing unit (main control unit 5, CPU 6) that issues a processing request for the module based on software, and a plurality of processing requests issued by the request issuing unit are stored and processed A request storage unit that includes a request storage unit (queue buffer 82) for erasing a processed processing request, arbitrates the processing request, and controls access to the main storage unit 7 of each module. Transmits to the DMA control unit 8 priority information indicating the degree of priority given to processing requests predetermined by software in a plurality of stages, and the DMA control unit 8 stores the priority information in the request storage unit. Of the processing request based on the priority information, select the priority high priority processing request than lower processing request, to perform processing module corresponding to the processing request selected.

  As a result, the DMA control unit 8 confirms the priority of each processing request and causes the module corresponding to the processing request having a high priority to execute the processing preferentially. Therefore, the priority of various processing requests is set as appropriate. As a result, even for a processing request that occurs later in time series, a module that has issued a processing request with a high priority can be preferentially executed. Accordingly, the DMA control unit 8 manages the priority centrally, so that processing requests can be executed in a desired order. In addition, as in the past, processing for determining which processing request is executed with priority in time, interrupt processing associated with the determination, and which module can be used among a plurality of modules As a result of the confirmation, the DMA control unit 8 performs complicated arbitration processing such as giving priority to which processing request, managing the activation request time, and determining the execution order including other processing requests in time for the activation request time. You do n’t have to. It is also possible to reduce the time lag until the processing request to be executed by the DMA control unit 8 is determined.

  In addition, when there are a plurality of processing requests having the same priority in the request storage unit (queue buffer 82), the DMA control unit 8 selects and selects the processing request stored in the request storage unit early among the executable processing requests. The module (DMA module 9) corresponding to the processed request is executed. For example, processing requests for different modules and processing requests having the same priority may be accumulated in the request storage unit. This allows the DMA control unit 8 to perform complicated arbitration processing by a simple logic of first-come-first-served basis. The execution order of processing requests can be determined without performing the above.

  The request issuing unit (main control unit 5, CPU 6) sends an input processing request to the DMA control unit 8 to read data from the main storage unit 7 into the module (DMA module 9) and the processed data to the module. When an output processing request to be written to the main storage unit 7 is issued and a next processing request is selected upon completion of processing in any module, and there are a plurality of modules that execute processing requests of the same priority, If the completed processing request is an input processing request, the DMA control unit 8 is earliest stored in the request storage unit among a plurality of input processing requests having the same priority stored in the request storage unit (queue buffer 82). If the module that executes the input processing request executes an executable processing request, and the completed processing request is an output processing request, a plurality of outputs of the same priority stored in the request storage unit are output. Of the processing request to execute the executable processing request to a module that executes the output processing request stored in the earliest request storing unit.

  As a result, it is possible to clearly determine the first-come-first-served basis for the input processing request completion and the output processing request completion, and to determine which module is to execute the processing request. Accordingly, the DMA control unit 8 can easily select from among the processing requests having the same priority and different modules based on the input processing request when the input processing request is completed and the output processing request when the output processing request is completed. , The module to execute the processing request can be selected.

  The request issuing unit (main control unit 5, CPU 6) issues a processing request with priority information attached to each processing request. Thereby, the DMA control unit 8 only has to select the processing request to be executed after confirming the priority information for each processing request.

  The request issuing unit (main control unit 5, CPU 6) transmits priority information defining the priority of the module (DMA module 9) to the DMA control unit 8. As a result, it is possible to specify a module for which processing execution is prioritized and process a processing request. Therefore, it is possible to cause a specific module to perform processing intensively.

  The image forming apparatus (multifunction device 100) includes the above-described DMA control device 1. Accordingly, it is possible to provide an image forming apparatus (multifunction apparatus 100) that executes processing requests in a desired order and does not require the DMA control unit 8 to perform complicated arbitration processing. It is also possible to reduce the time lag until the processing request to be executed by the DMA control unit 8 is determined. Accordingly, since the processing speed for data transfer and the like is high and the load on the part that controls the multifunction peripheral 100 is small, it is possible to provide an image forming apparatus that operates stably and at high speed.

  The embodiment of the present invention has been described above, but the scope of the present invention is not limited to this, and various modifications can be made without departing from the spirit of the invention.

  The present invention can be applied to an image forming apparatus such as a DMA controller that performs data processing or a multifunction machine, a copier, a facsimile machine, or a printer equipped with the DMA controller.

100 MFP (Image Forming Apparatus) 1 DMA Controller 5 Main Control Unit (Request Issuing Unit) 6 CPU (Request Issuing Unit)
7 Main storage unit 8 DMA control unit 82 Queue buffer (request storage unit)
9 (91, 92, 93, 94) DMA module (module)

Claims (4)

A main memory for storing data;
A plurality of modules that read data stored in the main storage unit, execute processing, and write the processed data to the main storage unit;
A request issuing unit for issuing a processing request for the module based on software;
DMA control for storing a plurality of processing requests issued by the request issuing unit and having a request storage unit for erasing processed processing requests, arbitrating the processing requests, and controlling access to the main storage unit of each module And
The request issuing unit transmits priority information indicating the degree of priority of processing requests predetermined by software in a plurality of stages to the DMA control unit,
The DMA control unit selects a processing request having a higher priority than a processing request having a lower priority based on the priority information among the processing requests stored in the request storage unit, and corresponds to the selected processing request. The module to perform processing ,
The request issuing unit issues an input processing request for causing the module to read data from the main storage unit and an output processing request for causing the module to write processed data to the main storage unit. ,
When the next processing request is selected upon completion of processing in any of the modules, and when there are a plurality of modules that execute processing requests of the same priority,
If the completed processing request is the input processing request, the DMA control unit is earliest stored in the request storage unit among the plurality of input processing requests having the same priority stored in the request storage unit. If the module that executes the input processing request executes an executable processing request and the completed processing request is the output processing request, the output processing requests having the same priority stored in the request storage unit of, DMA controller, wherein Rukoto to execute the earliest the executable to the module that executes the output processing request stored in the request storage unit processing request. 2. The DMA control apparatus according to claim 1 , wherein the request issuing unit issues a processing request with the priority information attached to each processing request. The request issuing unit DMA control apparatus according to claim 1 or 2, characterized in that transmitting the priority information that defines the priority of the module to the DMA controller. An image forming apparatus comprising a DMA controller according to any one of claims 1 to 3.

Images