JP5479703B2 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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JP5479703B2
JP5479703B2 JP2008260848A JP2008260848A JP5479703B2 JP 5479703 B2 JP5479703 B2 JP 5479703B2 JP 2008260848 A JP2008260848 A JP 2008260848A JP 2008260848 A JP2008260848 A JP 2008260848A JP 5479703 B2 JP5479703 B2 JP 5479703B2
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semiconductor chip
power terminal
control circuit
hole
circuit board
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JP2010093033A (en
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一明 尾西
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Toshiba Corp
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    • H—ELECTRICITY
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    • H05K1/144—Stacked arrangements of planar printed circuit boards
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
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    • H—ELECTRICITY
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/1031—Surface mounted metallic connector elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10424—Frame holders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
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Description

本発明は、制御用回路基板を有する半導体装置及びその製造方法に関する。   The present invention relates to a semiconductor device having a control circuit board and a manufacturing method thereof.

半導体チップと、それを制御する制御回路基板と、を有する半導体装置がある。例えば、ＩＧＢＴ（Insulate Gate Bipolar Transistor）やパワーＭＯＳＦＥＴなどの大電力用の半導チップが半導体チップ実装基板に実装され、一方、半導体チップを制御するための制御回路を有する制御回路基板の制御信号端子が半導体チップ実装基板上の電極にハンダなどで接続され、制御回路と半導体チップとが電気的に接続される。この時、制御信号端子と、半導体チップ実装基板上の電極と、の位置合わせの精度、すなわち、端子の横方向の位置精度は重要である。
この位置精度を向上するために、位置決めピンを用いる手法が提案されている（例えば、特許文献１参照）。 There is a semiconductor device having a semiconductor chip and a control circuit board that controls the semiconductor chip. For example, a high-power semiconductor chip such as an IGBT (Insulate Gate Bipolar Transistor) or a power MOSFET is mounted on a semiconductor chip mounting board, while a control signal terminal of a control circuit board having a control circuit for controlling the semiconductor chip Are connected to the electrodes on the semiconductor chip mounting substrate by solder or the like, and the control circuit and the semiconductor chip are electrically connected. At this time, the positioning accuracy between the control signal terminal and the electrode on the semiconductor chip mounting substrate, that is, the lateral positioning accuracy of the terminal is important.
In order to improve the position accuracy, a method using a positioning pin has been proposed (for example, see Patent Document 1).

さらに、制御回路基板の上方に、半導体チップと電気的に接続される電力端子を有する電力端子ホルダが設けられる構造もある。このような構造の場合において、制御信号端子や電力端子の高さの精度は重要である。すなわち、半導体チップ実装基板から見たときの、電力端子ホルダの電力端子の下面と、制御回路基板の制御信号端子の下面と、の高さに差があると、これらの端子と半導体チップとの接続に際に、良好な接続が行うことができない。このような状態の半導体装置の場合、接続が不十分であるために、動作中の発熱等に起因した接続部の局所的な膨張や収縮によって接続部にクラック等が発生し半導体装置が正常に動作しなくなる。
特開２００７−２４２７０３号公報 Further, there is a structure in which a power terminal holder having a power terminal electrically connected to the semiconductor chip is provided above the control circuit board. In the case of such a structure, the accuracy of the height of the control signal terminal and the power terminal is important. That is, if there is a difference in height between the lower surface of the power terminal of the power terminal holder and the lower surface of the control signal terminal of the control circuit substrate when viewed from the semiconductor chip mounting substrate, the relationship between these terminals and the semiconductor chip When connecting, a good connection cannot be made. In the case of a semiconductor device in such a state, since the connection is insufficient, a crack or the like is generated in the connection portion due to local expansion or contraction of the connection portion due to heat generation during operation, and the semiconductor device is normally operated. Does not work.
JP 2007-242703 A

本発明は、制御信号端子及び電力端子の高さに差があった場合においても、これらの端子と半導体チップ実装基板とを良好に接続できる半導体装置及びその製造方法を提供する。   The present invention provides a semiconductor device that can satisfactorily connect these terminals and a semiconductor chip mounting substrate even when there is a difference in height between a control signal terminal and a power terminal, and a manufacturing method thereof.

本発明の一態様によれば、基板と、前記基板の第１主面に設けられた半導体チップと、
前記第１主面に設けられ前記半導体チップに接続された半導体チップ接続電極と、を有す
る半導体チップ実装基板と、前記第１主面に対して平行に設けられ、前記半導体チップを
制御する制御回路と、前記第１主面に対して垂直方向に延在する貫通孔及び電力端子用孔
と、を有する制御回路基板と、前記制御回路基板に設けられ、前記制御回路と前記半導体
チップ接続電極とを接続する制御信号端子と、前記制御回路基板の前記半導体チップ実装
基板と反対の側に設けられ、前記制御回路基板と離間している電力端子ホルダと、前記電
力端子ホルダに固定され、前記電力端子用孔を通り、前記半導体チップ接続電極と前記電
力端子ホルダを接続し、且つ前記制御回路基板と離間した電力端子と、前記貫通孔を貫通
し、一部が電力端子ホルダに固定され、且つ前記制御回路基板と離間している軸部と、前
記軸部の先端に接続され前記貫通孔の延在方向に対して直交する平面における断面が前記
貫通孔の大きさよりも大きい端部と、を有する半固定部材と、を備えたことを特徴とする
半導体装置が提供される。 According to one aspect of the present invention, a substrate, a semiconductor chip provided on the first main surface of the substrate,
A semiconductor chip mounting substrate having a semiconductor chip connection electrode provided on the first main surface and connected to the semiconductor chip, and a control circuit provided in parallel to the first main surface and controlling the semiconductor chip A control circuit board having a through hole and a power terminal hole extending in a direction perpendicular to the first main surface, the control circuit board, the control circuit and the semiconductor chip connection electrode, A control signal terminal for connecting the power supply circuit board, a power terminal holder provided on a side of the control circuit board opposite to the semiconductor chip mounting board and spaced apart from the control circuit board, and fixed to the power terminal holder, the power A power terminal that passes through the terminal hole, connects the semiconductor chip connection electrode and the power terminal holder and is separated from the control circuit board, and penetrates the through hole, and a part of the power terminal holder A shaft portion that is defined and spaced apart from the control circuit board, and an end that is connected to the tip of the shaft portion and that has a cross section in a plane perpendicular to the extending direction of the through hole is larger than the size of the through hole And a semi-fixed member having a portion.

本発明の別の一態様によれば、基板と、前記基板の第１主面に設けられた半導体チップと、前記第１主面に設けられ前記半導体チップに接続された半導体チップ接続電極と、を有する半導体チップ実装基板と、前記第１主面に対して平行に設けられ、前記半導体チップを制御する制御回路と、前記第１主面に対して垂直方向に延在する貫通孔及び電力端子用孔と、を有する制御回路基板と、前記制御回路基板に設けられ、前記制御回路と前記半導体チップ接続電極とを接続する制御信号端子と、前記制御回路基板の前記半導体チップ実装基板と反対の側に設けられ、前記制御回路基板と離間している電力端子ホルダと、前記電力端子ホルダに固定され、前記電力端子用孔を通り、前記半導体チップ接続電極と前記電力端子ホルダを接続し、且つ前記制御回路基板と離間した電力端子と、前記貫通孔を貫通し、一部が電力端子ホルダに固定され、且つ前記制御回路基板と離間している軸部と、前記軸部の先端に接続され前記貫通孔の延在方向に対して直交する平面における断面が前記貫通孔の大きさよりも大きい端部と、を有する半固定部材と、を有する半導体装置の製造方法であって、前記電力端子ホルダに固定された前記電力端子を、前記制御回路基板と離間しながら、前記電力端子用孔を通して、前記半導体チップ接続電極に固定する工程と、前記軸部を前記制御回路基板と離間しながら、前記貫通孔を通して、前記電力端子ホルダに固定する工程と、前記制御回路基板を上下方向に動かし、前記制御信号端子の高さを調整しながら、前記制御信号端子と前記半導体チップ接続電極と、を接続する工程と、を備えたことを特徴とする半導体装置の製造方法が提供される。 According to another aspect of the present invention, a substrate, a semiconductor chip provided on the first main surface of the substrate, a semiconductor chip connection electrode provided on the first main surface and connected to the semiconductor chip, A semiconductor chip mounting substrate, a control circuit that is provided in parallel to the first main surface and controls the semiconductor chip, and a through hole and a power terminal that extend in a direction perpendicular to the first main surface A control circuit board having a hole, a control signal terminal provided on the control circuit board for connecting the control circuit and the semiconductor chip connection electrode, and opposite to the semiconductor chip mounting board of the control circuit board provided on the side, a power terminal holder which is spaced apart from the control circuit board is fixed to the power terminal holder, through the power terminal holes, and connecting the power terminal holder and the semiconductor chip connecting electrodes,且A power terminal spaced apart from the control circuit board, a shaft that passes through the through-hole, a part of which is fixed to the power terminal holder, and is spaced from the control circuit board, and is connected to the tip of the shaft A semi-fixed member having a cross-section in a plane orthogonal to the extending direction of the through hole and an end portion larger than the size of the through hole , and a method for manufacturing a semiconductor device, wherein the power terminal holder Fixing the power terminal fixed to the semiconductor chip connection electrode through the power terminal hole while separating the power terminal from the control circuit board, and separating the shaft portion from the control circuit board, through the through-hole, and fixing the power terminal holder, moving the control circuit board in a vertical direction, while adjusting the height of the control signal terminals, the semiconductor chip connected to the control signal terminals The method of manufacturing a semiconductor device characterized by comprising a step of connecting the pole, and is provided.

本発明によれば、制御信号端子及び電力端子の高さに差があった場合においても、これらの端子と半導体チップ実装基板とを良好に接続できる半導体装置及びその製造方法が提供される。   According to the present invention, even when there is a difference in height between the control signal terminal and the power terminal, it is possible to provide a semiconductor device that can satisfactorily connect these terminals and the semiconductor chip mounting substrate and a method for manufacturing the same.

以下に、本発明の各実施の形態について図面を参照しつつ説明する。
なお、図面は模式的または概念的なものであり、各部分の厚みと幅との関係、部分間の大きさの比係数などは、必ずしも現実のものと同一とは限らない。また、同じ部分を表す場合であっても、図面により互いの寸法や比係数が異なって表される場合もある。
また、本願明細書と各図において、既出の図に関して前述したものと同様の要素には同一の符号を付して詳細な説明は適宜省略する。 Embodiments of the present invention will be described below with reference to the drawings.
Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio coefficient of the size between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratio coefficient may be represented differently depending on the drawing.
Further, in the present specification and each drawing, the same reference numerals are given to the same elements as those described above with reference to the previous drawings, and detailed description thereof will be omitted as appropriate.

（第１の実施の形態）
図１は、本発明の第１の実施形態に係る半導体装置の構成を例示する模式的断面図である。
図１に表したように、本発明の第１の実施形態に係る半導体装置１０１は、半導体チップ実装基板８と、制御回路基板１と、電力端子ホルダ６と、半固定部材２と、を備える。 (First embodiment)
FIG. 1 is a schematic cross-sectional view illustrating the configuration of a semiconductor device according to the first embodiment of the invention.
As shown in FIG. 1, the semiconductor device 101 according to the first embodiment of the present invention includes a semiconductor chip mounting substrate 8, a control circuit substrate 1, a power terminal holder 6, and a semi-fixed member 2. .

半導体チップ実装基板８は、基板８ｓと、基板８ｓの第１主面８ｍに設けられた半導体チップ２０と、第１主面８ｍに設けられ、半導体チップ２０に接続された半導体チップ接続電極７と、を有する。
半導体チップ２０には、例えば、ＩＧＢＴやパワーＭＯＳＦＥＴなどの大電力用の半導体チップを用いることができる。ただし、本発明はこれには限らず、半導体チップ２０は、任意の構成と任意の仕様の半導体チップを用いても良い。半導体チップ２０は、半導体チップ接続電極７の上に設けられる。なお、半導体チップ２０と半導体チップ接続電極７とが、例えば図示しないボンディングワイヤ等で互いに接続される。また、半導体チップ２０の裏面の電極と半導体チップ接続電極７とが、ハンダなどの導電材料で互いに接続される。 The semiconductor chip mounting substrate 8 includes a substrate 8s, a semiconductor chip 20 provided on the first main surface 8m of the substrate 8s, and a semiconductor chip connection electrode 7 provided on the first main surface 8m and connected to the semiconductor chip 20. Have.
For the semiconductor chip 20, for example, a high-power semiconductor chip such as an IGBT or a power MOSFET can be used. However, the present invention is not limited to this, and the semiconductor chip 20 may be a semiconductor chip having an arbitrary configuration and an arbitrary specification. The semiconductor chip 20 is provided on the semiconductor chip connection electrode 7. The semiconductor chip 20 and the semiconductor chip connection electrode 7 are connected to each other by, for example, a bonding wire (not shown). Further, the electrode on the back surface of the semiconductor chip 20 and the semiconductor chip connection electrode 7 are connected to each other by a conductive material such as solder.

半導体チップ実装基板８には、例えばセラミック基板が用いられる。本具体例の場合には、半導体チップ実装基板８の第１主面８ｍと反対の側には、回路パターン９が設けられ、その下側には、放熱板１１が設けられている。回路パターン９と放熱板１１との間にはリフローハンダ１０が設けられ、半導体チップ２０で発生する熱を半導体チップ実装基板８、回路パターン９及びリフローハンダ１０を介して、放熱板１１の側に伝達し、効率的に放熱することができるようになっている。   For example, a ceramic substrate is used as the semiconductor chip mounting substrate 8. In this specific example, a circuit pattern 9 is provided on the side opposite to the first main surface 8m of the semiconductor chip mounting substrate 8, and a heat sink 11 is provided below the circuit pattern 9. A reflow solder 10 is provided between the circuit pattern 9 and the heat sink 11, and heat generated in the semiconductor chip 20 is transferred to the heat sink 11 side through the semiconductor chip mounting substrate 8, the circuit pattern 9 and the reflow solder 10. It can transmit and efficiently dissipate heat.

なお、半導体チップ実装基板８に設ける半導体チップ２０の数は単数でも良く、複数でも良く、その個数は任意である。また、半導体チップ実装基板８に用いる材料は、セラミックに限らず、任意の材料を用いることができる。   The number of semiconductor chips 20 provided on the semiconductor chip mounting substrate 8 may be single or plural, and the number is arbitrary. The material used for the semiconductor chip mounting substrate 8 is not limited to ceramic, and any material can be used.

制御回路基板１は、半導体チップ実装基板８の第１主面８ｍに対して略平行に設けられる。制御回路基板１は、上記の半導体チップ２０を制御する制御回路１ａと、制御回路１ａと半導体チップ接続電極７とに接続された制御信号端子３と、貫通孔３ｈと、を有する。制御回路１ａは、例えば、コンデンサや抵抗、整流素子、トランジスタなどの各種の電子部品を有することができる。なお、同図においては、制御回路１ａは模式的に描かれており、個々の電子部品は省略されている。貫通孔３ｈは、制御回路基板１の第２主面１ｍに対して略垂直方向に制御回路基板１を貫通するものであり、すなわち、貫通孔３ｈは、半導体チップ実装基板８の第１主面８ｍに対して略垂直方向に延在する。   The control circuit board 1 is provided substantially parallel to the first main surface 8m of the semiconductor chip mounting board 8. The control circuit board 1 includes a control circuit 1a for controlling the semiconductor chip 20, the control signal terminal 3 connected to the control circuit 1a and the semiconductor chip connection electrode 7, and a through hole 3h. The control circuit 1a can include various electronic components such as a capacitor, a resistor, a rectifying element, and a transistor. In the figure, the control circuit 1a is schematically drawn, and individual electronic components are omitted. The through hole 3 h penetrates the control circuit board 1 in a direction substantially perpendicular to the second main surface 1 m of the control circuit board 1, that is, the through hole 3 h is the first main surface of the semiconductor chip mounting substrate 8. It extends in a direction substantially perpendicular to 8 m.

なお、制御回路基板１は、上記の制御回路１ａや制御信号端子３、貫通孔３ｈ以外に、例えば、ＩＧＢＴやパワーＭＯＳＦＥＴなどの大電力用の半導体チップや、それ以外の半導体チップ、すなわち、半導体チップ実装基板８に搭載される半導体チップ２０とは別に、任意の半導体チップを搭載しても良い。   In addition to the control circuit 1a, the control signal terminal 3, and the through-hole 3h, the control circuit board 1 is, for example, a high-power semiconductor chip such as an IGBT or a power MOSFET, or another semiconductor chip, that is, a semiconductor In addition to the semiconductor chip 20 mounted on the chip mounting substrate 8, an arbitrary semiconductor chip may be mounted.

電力端子ホルダ６は、制御回路基板１の半導体チップ実装基板８と反対の側に設けられる。すなわち、電力端子ホルダ６は、制御回路基板１の上方に設けられる。電力端子ホルダ６は、半導体チップ２０の電力の入力及び出力の少なくともいずれかのための電力端子５を有しており、電力端子５は、半導体チップ接続電極７と接続されている。電力端子ホルダ６には例えば樹脂を用いることができる。   The power terminal holder 6 is provided on the opposite side of the control circuit board 1 from the semiconductor chip mounting board 8. That is, the power terminal holder 6 is provided above the control circuit board 1. The power terminal holder 6 has a power terminal 5 for at least one of power input and output of the semiconductor chip 20, and the power terminal 5 is connected to the semiconductor chip connection electrode 7. For example, resin can be used for the power terminal holder 6.

例えば、電力端子ホルダ６の上面に電力端子５が取り出され、この電力端子５から、半導体チップ２０の電力に係る入力及び出力の少なくともいずれかが行われる。また、電力端子ホルダ６を貫通して、電力端子ホルダ６の上面に制御回路基板１の制御電極３ａが取り出され、例えば、制御回路１ａへの制御信号が与えられる。
これらの半導体チップ実装基板８、制御回路基板１及び電力端子ホルダ６は、図示しないケースの中の格納されることができる。なお、ケースの中に格納された後に、制御電極３ａは折り曲げられることができる。 For example, the power terminal 5 is taken out from the upper surface of the power terminal holder 6, and at least one of input and output related to the power of the semiconductor chip 20 is performed from the power terminal 5. Further, the control electrode 3a of the control circuit board 1 is taken out from the upper surface of the power terminal holder 6 through the power terminal holder 6, and for example, a control signal to the control circuit 1a is given.
The semiconductor chip mounting board 8, the control circuit board 1 and the power terminal holder 6 can be stored in a case (not shown). The control electrode 3a can be bent after being stored in the case.

半固定部材２は、制御回路基板１の貫通孔３ｈを貫通し、電力端子ホルダ６に固定されている。半固定部材２には、例えば、ビスやネジ（螺子）を用いることができる。すなわち、ビスやネジなどの半固定部材２は、貫通孔３ｈに通された状態で、例えば半固定部材２の端部２ａとは反対の他端に設けられたネジ山が電力端子ホルダ６にねじ込まれて固定されている。   The semi-fixed member 2 passes through the through hole 3 h of the control circuit board 1 and is fixed to the power terminal holder 6. For the semi-fixing member 2, for example, a screw or a screw (screw) can be used. That is, when the semi-fixing member 2 such as a screw or a screw is passed through the through-hole 3h, for example, a screw thread provided at the other end opposite to the end 2a of the semi-fixing member 2 is in the power terminal holder 6. Screwed and fixed.

半固定部材２は、端部２ａと軸部２ｂとを有する。端部２ａは、例えばビスやネジの頭の部分であり、制御回路基板１の半導体チップ実装基板８の側の面よりも半導体チップ実装基板８の側に設けられており、貫通孔３ｈの延在方向に対して直交する平面における貫通孔３ｈの大きさよりも大きい。すなわち、ビスやネジの頭の部分である端部２ａの貫通孔３ｈの延在方向に垂直な方向における断面の大きさは、貫通孔３ｈの大きさよりも大きい。すなわち、端部２ａは貫通孔３ｈを貫通させようとしても貫通しない。   The semi-fixed member 2 has an end portion 2a and a shaft portion 2b. The end 2a is, for example, a head portion of a screw or screw, and is provided on the semiconductor chip mounting substrate 8 side of the surface of the control circuit board 1 on the semiconductor chip mounting substrate 8 side, and extends through the through hole 3h. It is larger than the size of the through hole 3h in the plane orthogonal to the current direction. That is, the size of the cross section in the direction perpendicular to the extending direction of the through hole 3h of the end 2a which is the head portion of the screw or screw is larger than the size of the through hole 3h. That is, the end 2a does not penetrate through the through hole 3h.

一方、軸部２ｂは、貫通孔３ｈの延在方向における断面が貫通孔３ｈの大きさよりも小さい。すなわち、軸部２ｂの太さは、貫通孔３ｈの大きさ（例えば孔の径）よりも小さく、軸部２ｂと貫通孔３ｈとの間には、間隙３ｇが設けられている。   On the other hand, the shaft portion 2b has a cross section in the extending direction of the through hole 3h smaller than the size of the through hole 3h. That is, the thickness of the shaft portion 2b is smaller than the size of the through hole 3h (for example, the diameter of the hole), and a gap 3g is provided between the shaft portion 2b and the through hole 3h.

これにより、制御回路基板１は、半固定部材２の端部２ａの上面２ｕ（半導体チップ実装基板８の側と反対の側の面）と、電力端子ホルダ６の下面６ｄ（半導体チップ実装基板８の側の面）との間の距離δの範囲で、少なくとも貫通孔３ｈの延在方向に対して平行な方向に可動の構造である。   As a result, the control circuit board 1 includes the upper surface 2u of the end 2a of the semi-fixed member 2 (surface opposite to the semiconductor chip mounting substrate 8 side) and the lower surface 6d of the power terminal holder 6 (semiconductor chip mounting substrate 8). And a movable structure in a direction parallel to at least the extending direction of the through hole 3h.

ただし、制御回路基板１に固定されて設けられた制御信号端子３と、半導体チップ接続電極７とが例えばハンダ４により固定され、また、電力端子ホルダ６に固定されて設けられた電力端子５と、半導体チップ接続電極７とが例えばハンダ４により固定されることで、制御回路基板１と電力端子ホルダ６とが互いに固定され、その結果、電力端子ホルダ６に固定されている半固定部材２と制御回路基板１とは、相対的に固定されている。   However, the control signal terminal 3 fixed to the control circuit board 1 and the semiconductor chip connection electrode 7 are fixed by, for example, solder 4, and the power terminal 5 fixed to the power terminal holder 6 is provided. The semiconductor chip connection electrode 7 is fixed by, for example, the solder 4 so that the control circuit board 1 and the power terminal holder 6 are fixed to each other. As a result, the semi-fixed member 2 fixed to the power terminal holder 6 The control circuit board 1 is relatively fixed.

しかし、軸部２ｂと貫通孔３ｈとの間には、間隙３ｇが設けられ、これにより、制御回路基板１は、半固定部材２の端部２ａの上面２ｕと、電力端子ホルダ６の下面６ｄとの間の距離δの範囲で、少なくとも貫通孔３ｈの延在方向に対して平行な方向に動くことができるので、もし、制御信号端子３と電力端子５との高さに差があった場合においても、その差を補正して制御回路基板１と電力端子ホルダ６とを組み合わせて結合する。これにより、これらの端子と半導体チップ実装基板とを良好に接続できる。   However, a gap 3g is provided between the shaft portion 2b and the through hole 3h, so that the control circuit board 1 can be connected to the upper surface 2u of the end portion 2a of the semi-fixed member 2 and the lower surface 6d of the power terminal holder 6. In the range of the distance δ between the control signal terminal 3 and the power terminal 5, there is a difference in height between the control signal terminal 3 and the power terminal 5. Even in the case, the difference is corrected and the control circuit board 1 and the power terminal holder 6 are combined and coupled. Thereby, these terminals and a semiconductor chip mounting substrate can be connected favorably.

以下、本実施形態に係る半導体装置１０１の製造方法の一例について説明する。
図２は、本発明の第１の実施形態に係る半導体装置の製造方法を例示する工程順模式的断面図である。
図３は、図２に続く工程順模式的断面図である。 Hereinafter, an example of a method for manufacturing the semiconductor device 101 according to the present embodiment will be described.
FIG. 2 is a schematic cross-sectional view in order of the processes, illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention.
FIG. 3 is a schematic cross-sectional view in order of the processes following FIG.

図２（ａ）に表したように、まず、例えば、電力端子ホルダ６に、電力端子５が取り付けられる。なお、電力端子ホルダ６には、制御電極３ａが後で通される制御電極用孔５ｃと、半固定部材２が後で取り付けられる半固定部材用孔５ｈが設けられている。   As shown in FIG. 2A, first, for example, the power terminal 5 is attached to the power terminal holder 6. The power terminal holder 6 is provided with a control electrode hole 5c through which the control electrode 3a passes later and a semi-fixed member hole 5h to which the semi-fixed member 2 is attached later.

そして、図２（ｂ）に表したように、制御回路基板１に、制御回路１ａ、制御信号端子３及び制御電極３ａを設ける。制御信号端子３及び制御電極３ａは、例えば、ハンダ３ｂによって制御回路基板１に固定される。なお、制御回路基板１には、電力端子５を通せるように電力端子用孔３ｃが予め設けられている。そして、制御回路基板１の貫通孔３ｈに半固定部材２を貫通させる。すなわち、半固定部材２の軸部２ｂを貫通孔３ｈに通す。この時、半固定部材２の端部２ａの大きさが貫通孔３ｈよりも大きいので、端部２ａは貫通孔３ｈを貫通しない。一方、貫通孔３ｈの部分において、半固定部材２と制御回路基板１との間には間隙３ｇが設けられており、半固定部材２は、貫通孔３ｈの中で貫通孔３ｈの延在方向に沿って移動可能である。   2B, the control circuit board 1 is provided with a control circuit 1a, a control signal terminal 3, and a control electrode 3a. The control signal terminal 3 and the control electrode 3a are fixed to the control circuit board 1 by solder 3b, for example. The control circuit board 1 is provided with a power terminal hole 3c in advance so that the power terminal 5 can pass therethrough. Then, the semi-fixed member 2 is passed through the through hole 3 h of the control circuit board 1. That is, the shaft portion 2b of the semi-fixing member 2 is passed through the through hole 3h. At this time, since the size of the end 2a of the semi-fixed member 2 is larger than the through hole 3h, the end 2a does not penetrate the through hole 3h. On the other hand, in the portion of the through hole 3h, a gap 3g is provided between the semi-fixed member 2 and the control circuit board 1, and the semi-fixed member 2 extends in the through hole 3h in the extending direction of the through hole 3h. It can move along.

ここで、実際の作業としては、図２（ｂ）の紙面において上下方向を逆にした状態で制御回路基板１の貫通孔３ｈに半固定部材２を通すことで、重力によって半固定部材２は貫通孔３ｈにはめ込まれた状態を容易に維持でき、そして、半固定部材２の端部２ａ（ビスの頭）は、貫通孔３ｈを通って下に落下することがない。   Here, as an actual work, the semi-fixed member 2 is caused by gravity by passing the semi-fixed member 2 through the through hole 3h of the control circuit board 1 in the state where the vertical direction is reversed in the paper surface of FIG. The state fitted in the through hole 3h can be easily maintained, and the end 2a (screw head) of the semi-fixing member 2 does not fall down through the through hole 3h.

なお、図２（ａ）に例示した工程と、図２（ｂ）に例示した工程と、は互いに入れ替え可能であり、また、図２（ａ）や図２（ｂ）に例示した構造が予め準備されている場合は、これらの工程は省略可能である。   Note that the process illustrated in FIG. 2A and the process illustrated in FIG. 2B can be interchanged with each other, and the structures illustrated in FIG. 2A and FIG. If prepared, these steps can be omitted.

そして、図２（ｃ）に表したように、電力端子５を制御回路基板１の電力端子用孔３ｃに通し、また、制御電極３ａを電力端子ホルダ６の制御電極用孔５ｃに通して、制御回路基板１と電力端子ホルダ６とが組み合わされる。そして、半固定部材２の軸部２ｂが貫通孔３ｈを貫通している状態で、半固定部材２を電力端子ホルダ６に固定する。例えば、半固定部材２であるビスを回転させて、半固定部材用孔５ｈに半固定部材２を締め付けて固定する。この作業も、図２（ｃ）の紙面において上下方向を逆にして作業することで、半固定部材２の端部２ａ（ビスの頭）は貫通孔３ｈを通って下に落下することがなく、簡単に作業することができる。   2C, the power terminal 5 is passed through the power terminal hole 3c of the control circuit board 1, and the control electrode 3a is passed through the control electrode hole 5c of the power terminal holder 6, The control circuit board 1 and the power terminal holder 6 are combined. Then, the semi-fixing member 2 is fixed to the power terminal holder 6 with the shaft portion 2 b of the semi-fixing member 2 passing through the through hole 3 h. For example, the screw which is the semi-fixing member 2 is rotated, and the semi-fixing member 2 is fastened and fixed to the semi-fixing member hole 5h. This operation is also performed by reversing the vertical direction on the paper surface of FIG. 2C, so that the end 2a (screw head) of the semi-fixed member 2 does not fall down through the through hole 3h. Can work easily.

なお、図２（ｂ）に例示した作業と、図２（ｃ）に例示した作業と、は同時に行うこともでき、また、図２（ｃ）に例示したように、制御回路基板１と電力端子ホルダ６とを組み合わせた後に、半固定部材２の軸部２ｂを貫通孔３ｈに通して、その状態で、半固定部材２であるビスを回転させて、半固定部材用孔５ｈに締め付けて固定することもできる。すなわち、図２（ｂ）に例示した工程は省略可能である。   Note that the work illustrated in FIG. 2B and the work illustrated in FIG. 2C can be performed simultaneously. As illustrated in FIG. 2C, the control circuit board 1 and the power After combining with the terminal holder 6, the shaft portion 2b of the semi-fixing member 2 is passed through the through hole 3h, and in this state, the screw which is the semi-fixing member 2 is rotated and tightened to the semi-fixing member hole 5h. It can also be fixed. That is, the process illustrated in FIG. 2B can be omitted.

この時、図２（ｃ）に例示した矢印Ｄのように、軸部２ｂにおいて、半固定部材２と制御回路基板１とは互いに動くことができる。これにより、制御回路基板１と電力端子ホルダ６とは、制御回路基板１の第２主面１ｍに対して垂直な方向（貫通孔３ｈの延在方向に対して平行な方向）において相対的に動くことができる。この時、この可動の距離は、例えば、半固定部材２の端部２ａの上面２ｕと、電力端子ホルダ６の下面６ｄとの間の距離δの範囲である。半固定部材２である例えばビスの長さと、電力端子ホルダ６に埋め込んで取り付けるビスの深さとを適切に設計することで、所望の距離δを得ることができる。   At this time, as shown by an arrow D illustrated in FIG. 2C, the semi-fixing member 2 and the control circuit board 1 can move relative to each other in the shaft portion 2b. Thereby, the control circuit board 1 and the power terminal holder 6 are relatively relative to each other in a direction perpendicular to the second main surface 1m of the control circuit board 1 (a direction parallel to the extending direction of the through hole 3h). Can move. At this time, the movable distance is, for example, a range of a distance δ between the upper surface 2 u of the end 2 a of the semi-fixed member 2 and the lower surface 6 d of the power terminal holder 6. A desired distance δ can be obtained by appropriately designing, for example, the length of the screw that is the semi-fixed member 2 and the depth of the screw that is embedded and attached to the power terminal holder 6.

なお、貫通孔３ｈと軸部２ｂとの間の間隙３ｇに対応して、制御回路基板１と電力端子ホルダ６とは、第２主面１ｍに対して平行な方向（貫通孔３ｈの延在方向に対して垂直な方向）にも動くことができる。制御回路基板１と電力端子ホルダ６とが、第２主面１ｍに対して平行な方向に大きくずれると、第２主面１ｍに対して平行な方向において制御信号端子３と電力端子５とが相対的に大きくずれるので、あまり好ましくない。このため、例えば制御信号端子３と電力端子５との相対的なずれが実用的に許容される範囲に収まるように、間隙３ｇは適切な値に設定される。   The control circuit board 1 and the power terminal holder 6 correspond to the gap 3g between the through hole 3h and the shaft portion 2b in a direction parallel to the second main surface 1m (extension of the through hole 3h). It can also move in a direction perpendicular to the direction. When the control circuit board 1 and the power terminal holder 6 are greatly displaced in the direction parallel to the second main surface 1m, the control signal terminal 3 and the power terminal 5 are shifted in the direction parallel to the second main surface 1m. Since it deviates relatively greatly, it is not preferable. For this reason, for example, the gap 3g is set to an appropriate value so that the relative deviation between the control signal terminal 3 and the power terminal 5 falls within a practically allowable range.

また、間隙３ｇの広さによって、制御回路基板１と電力端子ホルダ６とは互いに斜めに角度を変えることもできる。このような、第２主面１ｍに対して平行な方向のずれや、斜めの角度は、この作業及び後述する作業における作業性や、制御信号端子３、電力端子５及び半導体チップ接続電極７の互いの位置ずれの許容値に基づいて適切に設計され、それに基づいて間隙３ｇは適切に設定される。   Further, the control circuit board 1 and the power terminal holder 6 can also change their angles obliquely depending on the width of the gap 3g. Such a shift in a direction parallel to the second main surface 1m and an oblique angle are caused by the workability in this work and the work described later, the control signal terminal 3, the power terminal 5, and the semiconductor chip connection electrode 7. The gap 3g is appropriately set based on an appropriate design based on an allowable value of mutual displacement.

このように、半固定部材２によって、制御回路基板１は、電力端子ホルダ６に対して、第２主面１ｍに対して垂直な方向には距離δの範囲で可動であり、第２主面１ｍに対して平行な方向には、距離δに対して相対的に小さい範囲の位置ずれの状態で、固定される。   Thus, the semi-fixed member 2 allows the control circuit board 1 to move within the distance δ in the direction perpendicular to the second main surface 1m with respect to the power terminal holder 6, and the second main surface. In a direction parallel to 1 m, it is fixed in a state of positional deviation within a relatively small range with respect to the distance δ.

そして、図３（ａ）に表したように、電力端子ホルダ６と組み合わされた制御回路基板１を、半導体チップ実装基板８の第１主面８ｍに対向させる。なお、本具体例では、制御回路基板１の第２主面１ｍと反対の面が、半導体チップ実装基板８の第１主面８ｍに対向するように、制御回路基板１と半導体チップ実装基板８とが対向させられる。なお、この時、半固定部材２によって制御回路基板１が電力端子ホルダ６に固定され、そして、半固定部材２自身も電力端子ホルダ６に固定されているので、重力によって、制御回路基板１や半固定部材２が電力端子ホルダ６から落下することがない。   Then, as illustrated in FIG. 3A, the control circuit board 1 combined with the power terminal holder 6 is opposed to the first main surface 8 m of the semiconductor chip mounting board 8. In this specific example, the control circuit substrate 1 and the semiconductor chip mounting substrate 8 are arranged such that the surface opposite to the second main surface 1m of the control circuit substrate 1 faces the first main surface 8m of the semiconductor chip mounting substrate 8. Are made to face each other. At this time, the control circuit board 1 is fixed to the power terminal holder 6 by the semi-fixed member 2 and the semi-fixed member 2 itself is also fixed to the power terminal holder 6. The semi-fixed member 2 does not fall from the power terminal holder 6.

そして、制御信号端子３と電力端子５とを、それぞれ半導体チップ接続電極７に対向させる。制御信号端子３及び電力端子５の半導体チップ接続電極７に対向する部分には、ハンダ４が設けられている。   Then, the control signal terminal 3 and the power terminal 5 are respectively opposed to the semiconductor chip connection electrode 7. Solder 4 is provided on portions of the control signal terminal 3 and the power terminal 5 facing the semiconductor chip connection electrode 7.

この時、制御信号端子３の半導体チップ接続電極７に対向する下面３ｄと、電力端子５の半導体チップ接続電極７に対向する下面５ｄとの間に高さずれΔｈが生じる。このΔｈは、制御信号端子３の長さや制御信号端子３の制御回路基板１への取り付け状態に起因した制御信号端子３の下面３ｄの高さのばらつきと、電力端子５の長さや電力端子５の電力端子ホルダ６への取り付け状態に起因した電力端子５の下面５ｄの高さのばらつきと、が合わさって発生するものであり、高さずれΔｈを完全になくすことは難しい。
例えば、図３（ａ）に例示した具体例では、制御信号端子３の下面３ｄが、電力端子５の下面５ｄよりも下方にずれており、このずれに応じた高さずれΔｈが生じている。 At this time, a height deviation Δh occurs between the lower surface 3 d of the control signal terminal 3 facing the semiconductor chip connection electrode 7 and the lower surface 5 d of the power terminal 5 facing the semiconductor chip connection electrode 7. This Δh is the variation in the height of the lower surface 3d of the control signal terminal 3 due to the length of the control signal terminal 3 and the mounting state of the control signal terminal 3 to the control circuit board 1, the length of the power terminal 5 and the power terminal 5 The variation in the height of the lower surface 5d of the power terminal 5 due to the mounting state of the power terminal 5 to the power terminal holder 6 occurs, and it is difficult to completely eliminate the height deviation Δh.
For example, in the specific example illustrated in FIG. 3A, the lower surface 3d of the control signal terminal 3 is shifted downward from the lower surface 5d of the power terminal 5, and a height shift Δh corresponding to this shift occurs. .

この時、本実施形態に係る半導体装置１０１においては、制御回路基板１と電力端子ホルダ６とは、互いに距離δの範囲で動くことができるので、高さずれΔｈを補正して、制御信号端子３の下面３ｄの高さと、電力端子５の下面５ｄの高さと、を実質的に一致させることができる。   At this time, in the semiconductor device 101 according to the present embodiment, the control circuit board 1 and the power terminal holder 6 can move within the range of the distance δ, so that the height deviation Δh is corrected and the control signal terminal 3 and the height of the lower surface 5d of the power terminal 5 can be substantially matched.

すなわち、図３（ｂ）に表したように、制御信号端子３及び電力端子５を半導体チップ接続電極７に接触させ、電力端子ホルダ６と組み合わされた制御回路基板１を半導体チップ実装基板８に組み合わせる。これにより、高さずれΔｈを補正して、制御信号端子３の下面３ｄの高さと電力端子５の下面５ｄの高さとが一致するように、制御回路基板１の電力端子ホルダ６に対する相対的な位置を調整することができる。   That is, as shown in FIG. 3B, the control signal terminal 3 and the power terminal 5 are brought into contact with the semiconductor chip connection electrode 7, and the control circuit board 1 combined with the power terminal holder 6 is attached to the semiconductor chip mounting board 8. combine. Thus, the height deviation Δh is corrected, and the relative height of the control circuit board 1 with respect to the power terminal holder 6 is adjusted so that the height of the lower surface 3d of the control signal terminal 3 matches the height of the lower surface 5d of the power terminal 5. The position can be adjusted.

例えば、本具体例の場合は、図３（ｂ）に例示したように、制御回路基板１が相対的に電力端子ホルダ６の方に近接するように動き、制御信号端子３の下面３ｄが、電力端子５の下面５ｄと実質的に同じ高さなる。そして、この状態で、制御信号端子３及び電力端子５と、半導体チップ接続電極７とが、例えばハンダ４によって接続され固定される。   For example, in the case of this specific example, as illustrated in FIG. 3B, the control circuit board 1 moves so as to be relatively close to the power terminal holder 6, and the lower surface 3 d of the control signal terminal 3 is It becomes substantially the same height as the lower surface 5d of the power terminal 5. In this state, the control signal terminal 3 and the power terminal 5 and the semiconductor chip connection electrode 7 are connected and fixed by, for example, solder 4.

これにより、制御信号端子３及び電力端子５の高さに差があった場合においても、これらの端子と半導体チップ実装基板８とを良好に接続できる半導体装置が提供できる。   Thereby, even when there is a difference in height between the control signal terminal 3 and the power terminal 5, it is possible to provide a semiconductor device that can satisfactorily connect these terminals and the semiconductor chip mounting substrate 8.

なお、この時、半固定部材２の端部２ａの上面２ｕと、電力端子ホルダ６の下面６ｄとの間の距離δを、制御信号端子３の半導体チップ接続電極７に対向する下面３ｄと、電力端子５の半導体チップ接続電極７に対向する下面５ｄとの間の高さずれΔｈよりも大きく設定することで、高さずれΔｈを解消することができる。   At this time, the distance δ between the upper surface 2u of the end 2a of the semi-fixing member 2 and the lower surface 6d of the power terminal holder 6 is set to the lower surface 3d of the control signal terminal 3 facing the semiconductor chip connection electrode 7. By setting the power terminal 5 to be larger than the height deviation Δh between the power terminal 5 and the lower surface 5d facing the semiconductor chip connection electrode 7, the height deviation Δh can be eliminated.

（比較例）
図４は、比較例の半導体装置の構成を例示する模式的断面図である。
図４に表したように、比較例の半導体装置１０９の場合、本実施形態の半導体装置１０１の半固定部材２に相当するビス２ｆにおいては、軸部２ｃは、貫通孔３ｈの延在方向における断面が貫通孔３ｈの大きさと実質的に同じ大きさとされている。すなわち、軸部２ｃと貫通孔３ｈとの間には、間隙が設けられていない。さらに、比較例の半導体装置１０９では、ビス２ｆのネジが制御回路基板１にも食い込んでいる。これ以外は、半導体装置１０１と同様なので説明を省略する。 (Comparative example)
FIG. 4 is a schematic cross-sectional view illustrating the configuration of a semiconductor device of a comparative example.
As shown in FIG. 4, in the case of the semiconductor device 109 of the comparative example, in the screw 2f corresponding to the semi-fixing member 2 of the semiconductor device 101 of the present embodiment, the shaft portion 2c is in the extending direction of the through hole 3h. The cross section is substantially the same as the size of the through hole 3h. That is, no gap is provided between the shaft portion 2c and the through hole 3h. Further, in the semiconductor device 109 of the comparative example, the screw 2f screw bites into the control circuit board 1 as well. Other than this, it is the same as the semiconductor device 101, and the description is omitted.

このため、半導体装置１０９においては、制御回路基板１は、貫通孔３ｈの延在方向に対して平行な方向に動くことができない。従って、半導体装置１０９を製造する際に、図３（ｄ）に例示した工程と同様の工程において、電力端子ホルダ６と組み合わされた制御回路基板１を半導体チップ実装基板８に組み合わせた時に、制御信号端子３の下面３ｄと電力端子５の下面５ｄとの間の高さずれΔｈが補正できない。そして、高さずれΔｈを有する状態のまま、制御信号端子３及び電力端子５と、半導体チップ接続電極７と、が、例えばハンダ４によって接続され固定される。   For this reason, in the semiconductor device 109, the control circuit board 1 cannot move in a direction parallel to the extending direction of the through hole 3h. Therefore, when the semiconductor device 109 is manufactured, the control circuit board 1 combined with the power terminal holder 6 is combined with the semiconductor chip mounting board 8 in the same process as illustrated in FIG. The height deviation Δh between the lower surface 3d of the signal terminal 3 and the lower surface 5d of the power terminal 5 cannot be corrected. Then, the control signal terminal 3 and the power terminal 5 and the semiconductor chip connection electrode 7 are connected and fixed by, for example, solder 4 while maintaining the height deviation Δh.

このため、比較例の半導体装置１０９の場合は、制御信号端子３及び電力端子５と、半導体チップ接続電極７と、の接続に際に良好な接続が行うことができず、動作中の発熱等に起因した接続部の局所的な膨張や収縮によって接続部にクラック等が発生し半導体装置１０９が正常に動作しなくなる。   For this reason, in the case of the semiconductor device 109 of the comparative example, a good connection cannot be made when the control signal terminal 3 and the power terminal 5 and the semiconductor chip connection electrode 7 are connected, and heat generation during operation, etc. Due to local expansion and contraction of the connection portion due to the occurrence of cracks and the like in the connection portion, the semiconductor device 109 does not operate normally.

これに対し、既に説明したように、本実施形態に係る半導体装置１０１によれば、制御回路基板１と電力端子ホルダ６とが相対的に動くことができるので、高さずれΔｈを補正して、制御信号端子３の下面３ｄの高さと、電力端子５の下面５ｄの高さと、を実質的に一致させ、この状態で、制御信号端子３及び電力端子５と、半導体チップ接続電極７と、を接続して固定することができる。このように、半導体装置１０１によれば、制御信号端子３及び電力端子５の高さに差があった場合においても、これらの端子と半導体チップ実装基板８とを良好に接続できる半導体装置が提供できる。そして、長期に渡ってハンダ接続の接触不良を防止でき、信頼性の高い半導体装置を提供できる。   On the other hand, as already described, according to the semiconductor device 101 according to the present embodiment, the control circuit board 1 and the power terminal holder 6 can move relatively, so that the height deviation Δh is corrected. The height of the lower surface 3d of the control signal terminal 3 and the height of the lower surface 5d of the power terminal 5 are substantially matched, and in this state, the control signal terminal 3, the power terminal 5, the semiconductor chip connection electrode 7, Can be connected and fixed. As described above, according to the semiconductor device 101, even when there is a difference in height between the control signal terminal 3 and the power terminal 5, a semiconductor device capable of satisfactorily connecting these terminals and the semiconductor chip mounting substrate 8 is provided. it can. In addition, it is possible to prevent poor contact of solder connection over a long period of time, and to provide a highly reliable semiconductor device.

さらに、制御信号端子３の下面３ｄと、電力端子５の下面５ｄと、の高さずれΔｈを補正して、制御信号端子３及び電力端子５と、半導体チップ接続電極７と、が固定されるので、これらの端子や制御回路基板１や電力端子ホルダ６や半導体チップ実装基板８に加わる応力が抑制できるので、熱的なストレスだけでなく機械的なストレスにも強くなる利点もある。   Further, the height deviation Δh between the lower surface 3d of the control signal terminal 3 and the lower surface 5d of the power terminal 5 is corrected, and the control signal terminal 3 and the power terminal 5 and the semiconductor chip connection electrode 7 are fixed. Therefore, since the stress applied to these terminals, the control circuit board 1, the power terminal holder 6, and the semiconductor chip mounting board 8 can be suppressed, there is an advantage that not only thermal stress but also mechanical stress is enhanced.

なお、図１〜図３では、説明を簡単にするために、半固定部材２は１つ設けられているが、半固定部材２の数は１つでも良く、複数でも良く、その数は任意である。   In FIG. 1 to FIG. 3, one semi-fixing member 2 is provided for ease of explanation, but the number of semi-fixing members 2 may be one or plural, and the number is arbitrary. It is.

また、半導体装置１０１において、上記のように、半固定部材２の軸部２ｂにはネジ山を設けず、軸部２ｂの端部２ａとは反対側の他端にネジ山を設けて、そのネジ山を電力端子ホルダ６にねじ込んで、半固定部材２を電力端子ホルダ６に固定することができる。   Further, in the semiconductor device 101, as described above, the shaft portion 2b of the semi-fixed member 2 is not provided with a screw thread, and a screw thread is provided at the other end opposite to the end portion 2a of the shaft portion 2b. The semi-fixed member 2 can be fixed to the power terminal holder 6 by screwing the screw thread into the power terminal holder 6.

また、貫通孔３ｈの径よりも半固定部材用孔５ｈの径を十分小さくしておき、半固定部材２の他端及び軸部２ｂの径を実質的に同じ大きさにし、それらの全体にネジ山を設ける構造にしても良い。この場合も、他端のネジ山により半固定部材２を電力端子ホルダ６に固定でき、そして、軸部２ｂの大きさは貫通孔３ｈよりも小さいので制御回路基板１は半固定部材２に対して相対的に可動である。   Further, the diameter of the semi-fixing member hole 5h is made sufficiently smaller than the diameter of the through-hole 3h, the other end of the semi-fixing member 2 and the diameter of the shaft portion 2b are made substantially the same size, You may make it the structure which provides a screw thread. Also in this case, the semi-fixed member 2 can be fixed to the power terminal holder 6 by the screw thread at the other end, and the size of the shaft portion 2b is smaller than the through-hole 3h. Relatively movable.

ただし、本発明はこれに限らず、半固定部材２の形態は、ビスやネジに限らず、貫通孔３ｈよりも大きい端部２ａと、貫通孔３ｈよりも小さい軸部２ｂと、を有していれば、その形態は任意である。例えば、上記のような端部２ａと軸部２ｂとを有するピンであっても良く、端部２ａと反対の側の他端にはネジ山が設けられなくても良い。このようなピンを用いる場合は、例えば、電力端子ホルダ６の半固定部材用孔５ｈの径を、半固定部材２の他端の径とほぼ同じ大きさに設定し、半固定部材用孔５ｈに半固定部材２の他端を押し込んで固定する方法を採用しても良い。   However, the present invention is not limited to this, and the form of the semi-fixed member 2 is not limited to a screw or a screw, and has an end portion 2a larger than the through hole 3h and a shaft portion 2b smaller than the through hole 3h. If it is, the form is arbitrary. For example, it may be a pin having the end 2a and the shaft 2b as described above, and the other end on the side opposite to the end 2a may not be provided with a thread. When such a pin is used, for example, the diameter of the semi-fixing member hole 5h of the power terminal holder 6 is set to be approximately the same as the diameter of the other end of the semi-fixing member 2, and the semi-fixing member hole 5h. Alternatively, the other end of the semi-fixing member 2 may be pushed in and fixed.

さらに、半固定部材２において、端部２ａと軸部２ｂとが一体的に形成された構造でも良く、また、端部２ａと軸部２ｂとが別々に形成され、後で軸部２ｂの一端に端部２ａを設ける構造にしても良い。例えば、ほぼ円柱状の形状を有するピンを用い、そのピンを貫通孔３ｈに通して電力端子ホルダ６に固定した後、ピンの一端に貫通孔３ｈよりも断面積が大きい端部２ａを設けても良い。具体的には、ピンの一端にネジ山を設けておき、そのネジ山の部分に端部２ａとなるナットをはめ込んで回転させ、そのナットをピンに固定する構造を採用しても良い。また、ピンの一端にネジ山を設けず、ピンの一端の径とほぼ同じ径の孔を有する端部２ａとなる固体構造体をはめ込んで固定しても良く、また、固体構造体が接着剤等によって固定される構造としても良い。   Further, the semi-fixed member 2 may have a structure in which the end portion 2a and the shaft portion 2b are integrally formed, and the end portion 2a and the shaft portion 2b are separately formed, and one end of the shaft portion 2b is later formed. Alternatively, the end 2a may be provided in the structure. For example, a pin having a substantially cylindrical shape is used, the pin is passed through the through hole 3h and fixed to the power terminal holder 6, and then an end 2a having a larger cross-sectional area than the through hole 3h is provided at one end of the pin. Also good. Specifically, a structure may be adopted in which a screw thread is provided at one end of the pin, a nut serving as the end portion 2a is fitted into the screw thread portion, the nut is rotated, and the nut is fixed to the pin. Further, a solid structure which becomes an end portion 2a having a hole having substantially the same diameter as that of one end of the pin may be fitted and fixed without providing a thread at one end of the pin. It is good also as a structure fixed by etc.

また、半固定部材２に用いられる材料は、金属や樹脂などでも良く、任意である。   The material used for the semi-fixing member 2 may be metal or resin, and is arbitrary.

（第２の実施の形態）
本発明の第２の実施形態に係る半導体装置の製造方法は、基板８ｓと、基板８ｓの第１主面８ｍに設けられた半導体チップ２０と、第１主面８ｍに設けられ、半導体チップ２０に接続された半導体チップ接続電極７と、を有する半導体チップ実装基板８と、第１主面８ｍに対して略平行に設けられ、半導体チップ２０を制御する制御回路１ａと、制御回路１ａと半導体チップ接続電極７とに接続された制御信号端子３と、を有する制御回路基板１と、制御回路基板１の半導体チップ実装基板８と反対の側に設けられ、半導体チップ接続電極７と接続され、半導体チップ２０の電力の入力及び出力の少なくともいずれかのための電力端子５を有する電力端子ホルダ６と、を有する半導体装置の製造方法である。以下、本実施形態に係る半導体装置の製造方法の特徴部分について説明する。 (Second Embodiment)
The method for manufacturing a semiconductor device according to the second embodiment of the present invention includes a substrate 8s, a semiconductor chip 20 provided on the first main surface 8m of the substrate 8s, and a semiconductor chip 20 provided on the first main surface 8m. A semiconductor chip mounting substrate 8 having a semiconductor chip connection electrode 7 connected to the control circuit 1a, a control circuit 1a which is provided substantially parallel to the first main surface 8m and controls the semiconductor chip 20, and the control circuit 1a and the semiconductor A control circuit board 1 having a control signal terminal 3 connected to the chip connection electrode 7, provided on the opposite side of the control circuit board 1 from the semiconductor chip mounting board 8, and connected to the semiconductor chip connection electrode 7; This is a method of manufacturing a semiconductor device having a power terminal holder 6 having a power terminal 5 for at least one of power input and output of the semiconductor chip 20. Hereinafter, the characteristic part of the manufacturing method of the semiconductor device according to the present embodiment will be described.

図５は、本発明の第２の実施形態に係る半導体装置の製造方法を例示するフローチャート図である。
図５に表したように、本実施形態に係る半導体装置の製造方法においては、制御回路基板１の第２主面１ｍに対して略垂直方向に延在して制御回路基板１に設けられた貫通孔３ｈの第２主面１ｍに対して平行な平面における断面の大きさよりも断面が小さい軸部２ｂを有する半固定部材２の軸部２ｂを貫通孔３ｈに貫通させて、半固定部材２を電力端子ホルダ６に固定する（ステップＳ１１０）。これには、図２（ａ）〜（ｃ）に関して説明した方法を用いることができる。 FIG. 5 is a flowchart illustrating the method for manufacturing the semiconductor device according to the second embodiment of the invention.
As shown in FIG. 5, in the method for manufacturing the semiconductor device according to the present embodiment, the control circuit board 1 is provided on the control circuit board 1 so as to extend in a direction substantially perpendicular to the second main surface 1 m of the control circuit board 1. The shaft portion 2b of the semi-fixed member 2 having the shaft portion 2b having a smaller cross section than the cross-sectional size in a plane parallel to the second main surface 1m of the through hole 3h is passed through the through hole 3h, so that the semi-fixed member 2 Is fixed to the power terminal holder 6 (step S110). For this, the method described with reference to FIGS. 2A to 2C can be used.

この時、半固定部材２の一端には、貫通孔３ｈの断面の大きさよりも大きい端部２ａを設けることができる。これにより、重力などによって半固定部材２が貫通孔３ｈから抜けて、制御回路基板１が電力端子ホルダ６から分離されることがない。   At this time, an end 2a larger than the cross-sectional size of the through hole 3h can be provided at one end of the semi-fixing member 2. Thereby, the semi-fixed member 2 does not come out of the through hole 3h due to gravity or the like, and the control circuit board 1 is not separated from the power terminal holder 6.

この時、端部２ａは、半固定部材２の軸部２ｂの一端に予め設けておき、そのような構造の半固定部材２の軸部２ｂを貫通孔３ｈに貫通させて、半固定部材２を電力端子ホルダ６に固定しても良い。
すなわち、上記の半固定部材２は、上記の軸部２ｂに加え、軸部２ｂの一端に設けられ、貫通孔３ｈの第２主面１ｍに対して平行な平面における断面の大きさよりも大きい端部２ａと、をさらに有することができる。 At this time, the end portion 2a is provided in advance at one end of the shaft portion 2b of the semi-fixing member 2, and the shaft portion 2b of the semi-fixing member 2 having such a structure is passed through the through-hole 3h, so that the semi-fixing member 2 is provided. May be fixed to the power terminal holder 6.
That is, the semi-fixed member 2 is provided at one end of the shaft portion 2b in addition to the shaft portion 2b, and has an end larger than the cross-sectional size in a plane parallel to the second main surface 1m of the through hole 3h. And a portion 2a.

また、端部２ａを半固定部材２の軸部２ｂの一端に予め設けるのではなく、軸部２ｂを貫通孔３ｈに貫通させて、半固定部材２を電力端子ホルダ６に固定した後に、軸部２ｂの一端に端部２ａを設けても良い。
すなわち、上記のステップＳ１１０の後に、軸部２ｂの一端に、貫通孔３ｈの第２主面１ｍに対して平行な平面における断面の大きさよりも大きい端部２ａを設けても良い。 In addition, the end portion 2a is not provided in advance at one end of the shaft portion 2b of the semi-fixed member 2, but the shaft portion 2b is passed through the through-hole 3h and the semi-fixed member 2 is fixed to the power terminal holder 6, and then the shaft You may provide the edge part 2a in the end of the part 2b.
That is, after step S110 described above, an end 2a larger than the cross-sectional size in a plane parallel to the second main surface 1m of the through hole 3h may be provided at one end of the shaft portion 2b.

そして、制御信号端子３及び電力端子５と、半導体チップ接続電極７と、を接続する（ステップＳ１２０）。これには、図３（ａ）及び（ｂ）に関して説明した方法を用いることができる。   Then, the control signal terminal 3 and the power terminal 5 are connected to the semiconductor chip connection electrode 7 (step S120). For this, the method described with reference to FIGS. 3A and 3B can be used.

これにより、制御回路基板１と電力端子ホルダ６とが、第２主面１ｍに対して垂直な方向において相対的に動くことができるので、高さずれΔｈを補正して、制御信号端子３の下面３ｄの高さと、電力端子５の下面５ｄの高さと、を一致させ、この状態で制御信号端子３及び電力端子５と半導体チップ接続電極７とが固定され、制御信号端子３及び電力端子５の高さに差があった場合においても、これらの端子と半導体チップ実装基板８とを良好に接続できる半導体装置の製造方法が提供できる。   Thereby, since the control circuit board 1 and the power terminal holder 6 can move relatively in the direction perpendicular to the second main surface 1m, the height deviation Δh is corrected, and the control signal terminal 3 The height of the lower surface 3d and the height of the lower surface 5d of the power terminal 5 are matched, and in this state, the control signal terminal 3, the power terminal 5, and the semiconductor chip connection electrode 7 are fixed, and the control signal terminal 3 and the power terminal 5 are fixed. Even when there is a difference in height, it is possible to provide a method of manufacturing a semiconductor device that can satisfactorily connect these terminals and the semiconductor chip mounting substrate 8.

すなわち、図２及び図３に関して説明したように、制御信号端子３及び電力端子５と、半導体チップ接続電極と、の接続を、半導体チップ実装基板８から見たときの、制御信号端子３の半導体チップ実装基板８の側の面（下面３ｄ）の高さと、電力端子５の半導体チップ実装基板８の側の面（下面５ｄ）の高さと、を実質的に同じ高さに揃えた状態で実施することができる。これにより、これらの高さずれΔｈを小さくして半導体装置を製造することができる。   That is, as described with reference to FIGS. 2 and 3, the semiconductor of the control signal terminal 3 when the connection between the control signal terminal 3 and the power terminal 5 and the semiconductor chip connection electrode is viewed from the semiconductor chip mounting substrate 8. Implemented in a state where the height of the surface (lower surface 3d) on the chip mounting substrate 8 side and the height of the surface (lower surface 5d) on the semiconductor chip mounting substrate 8 side of the power terminal 5 are substantially the same height. can do. As a result, the semiconductor device can be manufactured by reducing the height deviation Δh.

以上、具体例を参照しつつ、本発明の実施の形態について説明した。しかし、本発明は、これらの具体例に限定されるものではない。例えば、半導体装置及びその製造方法を構成する各要素の具体的な構成に関しては、当業者が公知の範囲から適宜選択することにより本発明を同様に実施し、同様の効果を得ることができる限り、本発明の範囲に包含される。
また、各具体例のいずれか２つ以上の要素を技術的に可能な範囲で組み合わせたものも、本発明の要旨を包含する限り本発明の範囲に含まれる。 The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, with regard to the specific configuration of each element constituting the semiconductor device and the method for manufacturing the same, the present invention can be similarly implemented by appropriately selecting from a known range and a similar effect can be obtained. Are included within the scope of the present invention.
Moreover, what combined any two or more elements of each specific example in the technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

その他、本発明の実施の形態として上述した半導体装置及びその製造方法を基にして、当業者が適宜設計変更して実施し得る全ての半導体装置及びその製造方法も、本発明の要旨を包含する限り、本発明の範囲に属する。   In addition, all semiconductor devices and manufacturing methods that can be implemented by those skilled in the art based on the above-described semiconductor device and manufacturing method described above as embodiments of the present invention include the gist of the present invention. As long as it belongs to the scope of the present invention.

その他、本発明の思想の範疇において、当業者であれば、各種の変更例及び修正例に想到し得るものであり、それら変更例及び修正例についても本発明の範囲に属するものと了解される。   In addition, in the category of the idea of the present invention, those skilled in the art can conceive of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. .

本発明の第１の実施形態に係る半導体装置の構成を例示する模式的断面図である。1 is a schematic cross-sectional view illustrating the configuration of a semiconductor device according to a first embodiment of the invention. 本発明の第１の実施形態に係る半導体装置の製造方法を例示する工程順模式的断面図である。FIG. 6 is a schematic cross-sectional view in order of the processes, illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention. 図２に続く工程順模式的断面図である。FIG. 3 is a schematic cross-sectional view in order of the steps following FIG. 2. 比較例の半導体装置の構成を例示する模式的断面図である。It is a typical sectional view which illustrates the composition of the semiconductor device of a comparative example. 本発明の第２の実施形態に係る半導体装置の製造方法を例示するフローチャート図である。FIG. 6 is a flowchart illustrating a method for manufacturing a semiconductor device according to a second embodiment of the invention.

符号の説明Explanation of symbols

１ 制御回路基板、 １ａ 制御回路、 １ｍ 第２主面、 ２ 半固定部材、 ２ａ 端部、 ２ｂ、２ｃ 軸部、 ２ｆ ビス、 ２ｕ 上面、 ３ 制御信号端子、 ３ａ 制御電極、 ３ｂ ハンダ、 ３ｃ 電力端子用孔、 ３ｄ 下面、 ３ｇ 間隙、 ３ｈ 貫通孔、 ４ ハンダ、 ５ 電力端子、 ５ｃ 制御電極用孔、 ５ｄ 下面、 ５ｈ 半固定部材用孔、 ６ 電力端子ホルダ、 ６ｄ 下面、 ７ 半導体チップ接続電極、 ８ 半導体チップ実装基板、 ８ｍ 第１主面、 ８ｓ 基板、 ９ 回路パターン、 １０ リフローハンダ、 １１ 放熱板、 ２０ 半導体チップ、 １０１、１０９ 半導体装置   DESCRIPTION OF SYMBOLS 1 Control circuit board, 1a Control circuit, 1m 2nd main surface, 2 Semi-fixed member, 2a End part, 2b, 2c Shaft part, 2f screw, 2u upper surface, 3 Control signal terminal, 3a Control electrode, 3b Solder, 3c Power Terminal hole, 3d bottom surface, 3g gap, 3h through-hole, 4 solder, 5 power terminal, 5c control electrode hole, 5d bottom surface, 5h semi-fixing member hole, 6 power terminal holder, 6d bottom surface, 7 semiconductor chip connection electrode 8 Semiconductor chip mounting substrate, 8m first main surface, 8s substrate, 9 circuit pattern, 10 reflow solder, 11 heat sink, 20 semiconductor chip, 101, 109 semiconductor device

Claims (3)

基板と、前記基板の第１主面に設けられた半導体チップと、前記第１主面に設けられ前
記半導体チップに接続された半導体チップ接続電極と、を有する半導体チップ実装基板と
、
前記第１主面に対して平行に設けられ、前記半導体チップを制御する制御回路と、前記
第１主面に対して垂直方向に延在する貫通孔及び電力端子用孔と、を有する制御回路基板
と、
前記制御回路基板に設けられ、前記制御回路と前記半導体チップ接続電極とを接続する
制御信号端子と、
前記制御回路基板の前記半導体チップ実装基板と反対の側に設けられ、前記制御回路基
板と離間している電力端子ホルダと、
前記電力端子ホルダに固定され、前記電力端子用孔を通り、前記半導体チップ接続電極
と前記電力端子ホルダを接続し、且つ前記制御回路基板と離間した電力端子と、
前記貫通孔を貫通し、一部が電力端子ホルダに固定され、且つ前記制御回路基板と離間
している軸部と、前記軸部の先端に接続され前記貫通孔の延在方向に対して直交する平面
における断面が前記貫通孔の大きさよりも大きい端部と、を有する半固定部材と、
を備えたことを特徴とする半導体装置。 A semiconductor chip mounting substrate comprising: a substrate; a semiconductor chip provided on a first main surface of the substrate; and a semiconductor chip connection electrode provided on the first main surface and connected to the semiconductor chip;
A control circuit provided in parallel to the first main surface and controlling the semiconductor chip, and a control circuit having a through hole and a power terminal hole extending in a direction perpendicular to the first main surface A substrate,
A control signal terminal provided on the control circuit board for connecting the control circuit and the semiconductor chip connection electrode;
A power terminal holder provided on the opposite side of the control circuit board from the semiconductor chip mounting board and spaced apart from the control circuit board;
A power terminal fixed to the power terminal holder, passing through the power terminal hole, connecting the semiconductor chip connection electrode and the power terminal holder, and spaced apart from the control circuit board;
A shaft portion that penetrates the through-hole, a part of which is fixed to the power terminal holder and is separated from the control circuit board, and is connected to the tip of the shaft portion and orthogonal to the extending direction of the through-hole A semi-fixed member having a cross-section in a plane to be larger than the size of the through-hole,
A semiconductor device comprising: 基板と、前記基板の第１主面に設けられた半導体チップと、前記第１主面に設けられ前
記半導体チップに接続された半導体チップ接続電極と、を有する半導体チップ実装基板と
、
前記第１主面に対して平行に設けられ、前記半導体チップを制御する制御回路と、前記
第１主面に対して垂直方向に延在する貫通孔及び電力端子用孔と、を有する制御回路基板
と、
前記制御回路基板に設けられ、前記制御回路と前記半導体チップ接続電極とを接続する
制御信号端子と、
前記制御回路基板の前記半導体チップ実装基板と反対の側に設けられ、前記制御回路基
板と離間している電力端子ホルダと、
前記電力端子ホルダに固定され、前記電力端子用孔を通り、前記半導体チップ接続電極
と前記電力端子ホルダを接続し、且つ前記制御回路基板と離間した電力端子と、
前記貫通孔を貫通し、一部が電力端子ホルダに固定され、且つ前記制御回路基板と離間
している軸部と、前記軸部の先端に接続され前記貫通孔の延在方向に対して直交する平面
における断面が前記貫通孔の大きさよりも大きい端部と、を有する半固定部材と、
を有する半導体装置の製造方法であって、
前記電力端子ホルダに固定された前記電力端子を、前記制御回路基板と離間しながら、
前記電力端子用孔を通して、前記半導体チップ接続電極に固定する工程と、
前記軸部を前記制御回路基板と離間しながら、前記貫通孔を通して、前記電力端子ホル
ダに固定する工程と、
前記制御回路基板を上下方向に動かし、前記制御信号端子の高さを調整しながら、前記
制御信号端子と前記半導体チップ接続電極と、を接続する工程と
を備えたことを特徴とする半導体装置の製造方法。 A semiconductor chip mounting substrate comprising: a substrate; a semiconductor chip provided on a first main surface of the substrate; and a semiconductor chip connection electrode provided on the first main surface and connected to the semiconductor chip;
A control circuit provided in parallel to the first main surface and controlling the semiconductor chip, and a control circuit having a through hole and a power terminal hole extending in a direction perpendicular to the first main surface A substrate,
A control signal terminal provided on the control circuit board for connecting the control circuit and the semiconductor chip connection electrode;
A power terminal holder provided on the opposite side of the control circuit board from the semiconductor chip mounting board and spaced apart from the control circuit board;
A power terminal fixed to the power terminal holder, passing through the power terminal hole, connecting the semiconductor chip connection electrode and the power terminal holder, and spaced apart from the control circuit board;
A shaft portion that penetrates the through-hole, a part of which is fixed to the power terminal holder and is separated from the control circuit board, and is connected to the tip of the shaft portion and orthogonal to the extending direction of the through-hole A semi-fixed member having a cross-section in a plane to be larger than the size of the through-hole,
A method of manufacturing a semiconductor device having
While separating the power terminal fixed to the power terminal holder from the control circuit board,
Fixing to the semiconductor chip connection electrode through the power terminal hole;
Fixing the shaft to the power terminal holder through the through hole while separating the shaft from the control circuit board;
A step of connecting the control signal terminal and the semiconductor chip connection electrode while moving the control circuit board in the vertical direction and adjusting the height of the control signal terminal. Production method. 前記制御信号端子及び前記電力端子と、前記半導体チップ接続電極と、の前記接続は、
前記半導体チップ実装基板から見たときの、前記制御信号端子の前記半導体チップ実装基
板の側の面の高さと、前記電力端子の前記半導体チップ実装基板の側の面の高さと、を実
質的に同じ高さに揃えた状態で実施されることを特徴とする請求項２記載の半導体装置の
製造方法。 The connection of the control signal terminal and the power terminal, and the semiconductor chip connection electrode,
When viewed from the semiconductor chip mounting substrate, the height of the surface of the control signal terminal on the side of the semiconductor chip mounting substrate and the height of the surface of the power terminal on the side of the semiconductor chip mounting substrate are substantially 3. The method of manufacturing a semiconductor device according to claim 2, wherein the method is carried out in a state where the same height is provided.
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JP2010093033A (en) 2010-04-22

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