JP5397526B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method of manufacturing a semiconductor device in which a semiconductor chip and a substrate are connected by a crimping apparatus having a stage and a crimping head.

  Conventionally, a wire bonding method using a fine metal wire such as a gold wire has been widely applied as a method for connecting a semiconductor chip and a substrate. However, in order to meet the demands for miniaturization, thinning, and high functionality of semiconductor devices, flip chip connection methods in which conductive protrusions called bumps are formed on a semiconductor chip and directly connected to a substrate electrode are becoming widespread.

  As a flip chip connection method, a method of metal bonding using solder or tin, a method of metal bonding by applying ultrasonic vibration, a method of maintaining mechanical contact by the contraction force of resin, and the like are known. Among these methods, from the viewpoint of connection reliability, a method of metal bonding using solder or tin is common.

  When metal bonding is performed using solder or tin, the following method is used. For example, a method in which a semiconductor chip and a substrate are stacked and placed on a stage, and the stage is heated to ensure metal bonding by its own weight, or a semiconductor chip and a substrate are stacked between the stage and a pressure-bonding head. It is a method of placing and applying heat and pressing force.

  After connecting the semiconductor chip and the substrate as described above, to protect the connection portion from the external environment and prevent external stress from concentrating on the connection portion, and to ensure the insulation reliability between the narrow pitch wiring, Usually, the gap between the semiconductor chip and the substrate is sealed and filled with resin. As a sealing and filling method, a method in which a liquid resin is injected by a capillary phenomenon and cured after the semiconductor chip and the substrate are connected is generally used. Also known is a method of supplying a sealing adhesive to the surface of the semiconductor chip or the substrate in advance before connecting the semiconductor chip and the substrate, and then bonding the bumps of the semiconductor chip and the metal wiring of the substrate. (For example, see Patent Document 1).

JP 2006-188573 A

  By the way, in recent years, a semiconductor device called COF (Chip On Film) is used in a liquid crystal display module or the like that has been progressing in size and functionality. The COF is manufactured, for example, by mounting a liquid crystal driving semiconductor chip on which a gold bump is formed on a polyimide substrate on which a tin plating wiring is formed by metal bonding using gold-tin eutectic.

  In producing COF, in order to form a gold-tin eutectic, it is necessary to make the connection part 278 ° C. or higher, which is the eutectic temperature. Further, from the viewpoint of improving productivity, the connection time is as short as 5 seconds or less, and heating is performed at or above the eutectic temperature in a short time, so that the set temperature of the crimping apparatus is 300 to 450 ° C.

  Also in the COF, from the viewpoint of protecting the connection portion, the gap between the semiconductor chip and the substrate is usually sealed and filled with resin. However, when the gap is sealed and filled with the resin after the connection between the semiconductor chip and the substrate, the gap to be filled with the resin tends to be miniaturized due to the recent progress in narrow pitch connection. It takes a long time to sufficiently inject the resin into the void, resulting in a problem that the productivity of the semiconductor device is lowered.

  As a means for solving the above problem, as described above, before connecting the semiconductor chip and the substrate, a sealing adhesive is supplied to the surface of the semiconductor chip or the substrate in advance, and then the bumps of the semiconductor chip and the substrate The method of joining metal wiring is mentioned. However, when the connection between the semiconductor chip and the substrate is performed under a high temperature condition (for example, 300 to 450 ° C.), for example, when the high-temperature pressure-bonding head is separated from the semiconductor chip, voids due to heat shrinkage of the adhesive ( So-called sink voids) are likely to occur. Such voids cause a decrease in insulation reliability between narrow pitch wirings.

  Voids due to heat shrinkage can be reduced by introducing a slow cooling process after heating, or by lengthening the time of crimping to fully cure the resin, but if such measures are taken, flipping The chip bonding process takes a long time, and the productivity of the semiconductor device is reduced.

  The present invention is for solving the above-described problems, and it is possible to perform bonding between a semiconductor chip and a substrate under high temperature conditions, and achieve both high productivity and high connection reliability at a sufficiently high level. An object of the present invention is to provide a method for manufacturing a semiconductor device.

The present invention relates to a method of manufacturing a semiconductor device in which a semiconductor chip and a substrate are joined by a crimping apparatus having a stage and a crimping head, and the semiconductor chip, the substrate, and a semiconductor sealing adhesive disposed therebetween An adhesive composition forming an adhesive layer is provided with a thermocompression bonding step of applying a pressing force in the thickness direction of the laminate by a crimping head and a stage to the laminate having a layer, and heating the laminate. , melt viscosity at 350 ° C. is not more than 350 Pa · s, in the thermocompression bonding process, the surface temperature of the set and compression head so that the difference in the surface temperature of the surface temperature and the stage of the pressure bonding head is less than 300 ° C. is stage If it is higher than the surface temperature, the surface temperature of the crimping head is set to over 278 ° C. and 450 ° C. or less, and the surface temperature of the crimping head is lower than the surface temperature of the stage. If, to set the surface temperature of the stage below 278 ° C. Ultra 450 ° C., to provide a method of manufacturing a semiconductor device which performs bonding of the semiconductor chip and the substrate.

  According to the present invention, since the gap is filled with the adhesive layer between the semiconductor chip and the substrate, it is not necessary to perform an operation of filling the gap with the resin after the thermocompression bonding process, thereby improving the productivity of the semiconductor device. It can be improved. Further, when the semiconductor chip and the substrate are joined in the thermocompression bonding step, the temperatures of the pressure bonding head and the stage are set so that the difference between the temperature of the pressure bonding head and the temperature of the stage is less than 300 ° C. Accordingly, for example, after the bonding process is performed, when the high-temperature pressure-bonding head is separated from the semiconductor chip, a rapid temperature change of the adhesive layer can be suppressed. For this reason, generation | occurrence | production of the void in a connection part can be reduced and the sufficiently high connection reliability of a connection part can be achieved.

  In the laminating step, it is preferable to form an adhesive layer by disposing a film made of an adhesive composition for semiconductor encapsulation between the semiconductor chip and the substrate. The adhesive layer for semiconductor sealing may be formed by applying an adhesive composition to the surface of the substrate or semiconductor chip. However, if an adhesive layer formed in advance is used, work efficiency is further improved. It can be improved.

  In the present invention, the semiconductor chip has at least a bump whose surface is made of gold (hereinafter referred to as “gold bump”), and the substrate has a metal wiring connected to the gold bump. It is preferable to join the bump and the metal wiring by metal bonding. According to the present invention, the bonding between the semiconductor chip and the substrate can be performed under a high temperature condition, so that the metal bond between the gold bump of the semiconductor chip and the metal wiring of the substrate can be sufficiently secured.

  In the present invention, the semiconductor sealing adhesive layer is preferably composed of an adhesive composition having heat resistance and thermosetting properties. From this viewpoint, it is preferable that the adhesive layer for semiconductor encapsulation contains a polymer component having a molecular weight of 10,000 or more and a thermosetting component. From the same viewpoint, the adhesive layer for semiconductor sealing may contain a polyimide resin and a thermosetting component.

The adhesive composition forming an adhesive layer for semiconductor encapsulation is Ru der melt viscosity of 350 Pa · s or less at 350 ° C.. The adhesive composition having high fluidity under high temperature conditions can easily flow into a minute gap and sufficiently reduce bubbles remaining in the connection portion. The melt viscosity is measured by a parallel plate plastometer method.

  According to the present invention, it is possible to perform bonding between a semiconductor chip and a substrate under a high temperature condition, and both high productivity and high connection reliability can be achieved at a sufficiently high level.

It is a schematic cross section which shows the crimping apparatus and the laminated body mounted on the stage. It is sectional drawing which shows one form of the adhesive member formed by shape | molding an adhesive composition in a film form. It is a photograph which shows the upper surface of the semiconductor device manufactured by the method based on this invention. FIG. 4 is a schematic cross-sectional view showing a connection portion of the semiconductor device shown in FIG. 3. It is a photograph of the semiconductor device in which no void is generated in the connection part. It is a photograph of a semiconductor device in which a void is generated in a connection part.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant descriptions are omitted.

<Method for Manufacturing Semiconductor Device>
FIG. 1 is a schematic cross-sectional view showing a pressure bonding apparatus having a stage and a pressure bonding head. A crimping apparatus 10 shown in the figure includes a stage 4 on which a substrate or the like is placed, and a crimping head 5 that is movable in the vertical direction. Each of the stage 4 and the pressure bonding head 5 has a built-in heater so that the surface temperature can be set to a desired temperature.

  When a liquid crystal display module (COF) is manufactured by mounting a semiconductor chip on a flexible wiring board, first, as shown in FIG. 1, the substrate 1 is placed on the stage 4 with the surface provided with the metal wiring 1a facing upward. And an adhesive layer 2 having thermosetting properties is provided thereon. Next, the semiconductor chip 3 is placed on the adhesive layer 2 so that the metal bumps 3a of the semiconductor chip 3 and the metal wirings 1a of the substrate 1 are aligned. Thereby, a laminated body in which the substrate 1, the adhesive layer 2, and the semiconductor chip 3 are laminated in this order from below is formed on the stage 4 of the crimping apparatus 10.

  Although it does not restrict | limit especially as a material of the board | substrate 1, Organic substrates, such as inorganic board | substrates, such as a ceramic, an epoxy resin, a bismaleimide triazine resin, a polyimide resin, are mentioned. Among these, polyimide resin is suitable for COF mounting.

  Examples of the material of the metal wiring 1a of the substrate 1 include copper, aluminum, silver, gold, and nickel. The metal wiring 1a can be formed by etching or pattern plating. The surface of the metal wiring 1a may be plated with gold, nickel, tin or the like. When performing the COF mounting, the metal wiring 1a is preferably a copper wiring whose surface is tin-plated.

  Examples of the material of the metal bump 3a of the semiconductor chip 3 include gold, low melting point solder, high melting point solder, nickel, tin and the like. In the case of COF, the metal bump 3a is preferably formed of gold.

  The adhesive layer 2 is preferably formed using a semiconductor sealing adhesive composition formed into a film. By using such a film, working efficiency can be further improved. The size and thickness of the adhesive layer 2 may be appropriately set according to the size of the semiconductor chip 3 and the height of the bumps.

  In addition, since it is only necessary to provide the adhesive layer 2 between the substrate 1 and the semiconductor chip 3, a laminate having the adhesive layer 2 may be manufactured as follows. That is, a semiconductor chip 3 having an adhesive layer 2 attached to one surface is prepared by attaching a film made of an adhesive composition to a bump forming surface of a semiconductor wafer, and then dicing into individual pieces. This may be laminated on the substrate 1.

  For example, an adhesive film as shown in FIG. 2 may be used. The adhesive film 15 shown in the figure includes a film-like substrate 12 and an adhesive layer 2 made of an adhesive composition provided on one surface thereof. The adhesive film 15 is manufactured by attaching the adhesive layer 2 on the substrate 12. When the adhesive film 15 is used, the substrate 12 is peeled off.

  After placing the semiconductor chip 3 on the adhesive layer 2, the crimping head 5 is lowered to press the semiconductor chip 3 against the substrate 1, and the metal bump 3 a and the metal wiring are heated by the heat of the stage 4 and the crimping head 5. 1a is metal-bonded (thermocompression process). Through the thermocompression bonding step, the substrate 1 and the semiconductor chip 3 are electrically connected. At the same time, the gap between the substrate 1 and the semiconductor chip 3 is filled with the cured product 2a of the adhesive layer 2 (see FIG. 4).

In the thermocompression bonding step, a difference ΔT of the surface temperature T _S of the surface temperature T _H and the stage 4 of the compression bonding head 5 is set to be less than 300 ° C., the semiconductor chip 3 metal bumps 3a and the substrate 1 metal wires 1a And joining. If the temperature difference ΔT is 300 ° C. or more, a void resulting from a rapid temperature change occurs in the cured product 2 a of the adhesive layer 2. From the viewpoint of suppressing the generation of such voids, the temperature difference ΔT is preferably 290 ° C. or less, and more preferably 280 ° C. or less.

Surface temperature T _S of the surface temperature T _H and the stage 4 of the compression bonding head 5 may be properly set depending on the metal material forming the metal material and the metal wiring 1a of the substrate 1 to form a metal bump 3a of the semiconductor chip 3 . For example, when the surface of the metal bump 3a is gold and the surface of the metal wiring 1a is tin, the temperature T _H , so that the temperature of the connection portion is higher than the eutectic temperature of gold-tin (278 ° C.). it is preferable to set the T _S.

There is no particular limitation as long as the temperature difference between T _H and T _S is less than 300 ° C. However, when T _H > T _S , the surface temperature T _H of the crimping head 5 is preferably 300 to 450 ° C. 325 More preferably, it is -425 degreeC. On the other hand, the surface temperature _{T S} of the stage 4 is preferably 50 to 150 ° C., and more preferably 100 to 150 ° C.. In the case of T _H <T _S , the surface temperature T _S is preferably 300 to 450 ° C., and more preferably 325 to 425 ° C. On the other hand, the surface temperature T _H is preferably 50 to 150 ° C, and more preferably 100 to 150 ° C.

  In the thermocompression bonding step, the temperature of the member (stage 4 or pressure bonding head 5) on which the substrate 1 is held is preferably lower than the temperature of the other member (thermocompression bonding head 5 or stage 4). Thereby, it can suppress that the dimension of the board | substrate 1 changes with the heat | fever of the member holding the board | substrate 1. FIG. In order to suppress the progress of the curing reaction of the adhesive layer 2 during the alignment between the substrate 1 and the semiconductor chip 3 mounted thereon, the temperature of the member that holds the adhesive layer 2 is suppressed. Is preferably set lower than the temperature of the other member. Note that, by preheating the adhesive layer 2, there is an advantage that a rapid temperature rise in the thermocompression bonding process can be prevented.

  The time for which the pressing force is applied to the laminate by the pressure-bonding head 5 and the stage 4 respectively set to predetermined temperature conditions is preferably 0.5 to 5 seconds, and preferably 0.5 to 3 seconds. More preferred. If the pressure bonding time by the pressing force is less than 0.5 seconds, voids due to insufficient curing of the adhesive layer 2 are likely to occur. On the other hand, if it exceeds 5 seconds, the working efficiency tends to decrease. Become. Note that the load due to the pressure bonding head 5 and the stage 4 depends on the number of bumps and the like, and may be set as appropriate in consideration of variations in the height of the metal bumps 3a and the amount of bump deformation.

  By passing through the said thermocompression bonding process, the semiconductor device with which the semiconductor chip 3 was mounted on the board | substrate 1 can be manufactured. FIG. 3 is a photograph showing an upper surface of a semiconductor device in which the semiconductor chip 3 is mounted on the substrate 1. FIG. 4 is a schematic cross-sectional view showing a connection portion of the semiconductor device shown in FIG. The connection portion of the semiconductor device shown in FIG. 4 is formed by metal bonding using gold-tin eutectic.

<Adhesive composition for semiconductor sealing>
The adhesive composition that forms the adhesive layer 2 will be described. This semiconductor sealing adhesive composition preferably has heat resistance and thermosetting properties. From this point of view, the adhesive composition preferably contains a polymer component having a molecular weight of 10,000 or more and a thermosetting component. Hereinafter, the components to be included in the adhesive composition will be described.

  Polymer components having a molecular weight of 10,000 or more include epoxy resin, phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, phenol resin, cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, polyethersulfone resin, polyetherimide. Examples thereof include resins, polyvinyl acetal resins, urethane resins, acrylic rubbers, and the like.

  Among the above resins, the polyimide resin is suitable in that it has high heat resistance. However, since the thermosetting shrinkage is large, voids are easily generated. However, as described above, by adjusting the temperature conditions in the thermocompression bonding step, the generation of voids can be sufficiently reduced even when a polyimide resin is used.

  The polyimide resin can be obtained, for example, by subjecting tetracarboxylic dianhydride and diamine to a condensation reaction by a known method. That is, in an organic solvent, tetracarboxylic dianhydride and diamine are used in an equimolar or nearly equimolar amount (the order of addition of each component is arbitrary), and the addition reaction is carried out at a reaction temperature of 80 ° C. or lower, preferably 0 to 60 ° C. As the reaction proceeds, the viscosity of the reaction solution gradually increases, and polyamic acid, which is a polyimide precursor, is generated. The acid dianhydride is preferably recrystallized and purified with acetic anhydride in order to suppress deterioration of various properties of the adhesive composition. In addition, the molecular weight of the polyamic acid can be adjusted by heating and depolymerizing at a temperature of 50 to 80 ° C.

  The polyimide resin can be obtained by dehydrating and ring-closing the reaction product (polyamic acid). The dehydration ring closure can be performed by a thermal ring closure method in which heat treatment is performed and a chemical ring closure method using a dehydrating agent.

  There is no restriction | limiting in particular as tetracarboxylic dianhydride used as a raw material of a polyimide resin. For example, pyromellitic dianhydride, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride, 2,2 ′, 3,3′-biphenyltetracarboxylic dianhydride, 2,2-bis (3,4-dicarboxyphenyl) propane dianhydride, 2,2-bis (2,3-dicarboxyphenyl) propane dianhydride, 1,1-bis (2,3-dicarboxyphenyl) ethane dianhydride 1,1-bis (3,4-dicarboxyphenyl) ethane dianhydride, bis (2,3-dicarboxyphenyl) methane dianhydride, bis (3,4-dicarboxyphenyl) methane dianhydride Bis (3,4-dicarboxyphenyl) sulfone dianhydride, 3,4,9,10-perylenetetracarboxylic dianhydride, bis (3,4-dicarboxyphenyl) ether dianhydride, benzene-1 , , 3,4-tetracarboxylic dianhydride, 3,4,3 ′, 4′-benzophenone tetracarboxylic dianhydride, 2,3,2 ′, 3′-benzophenone tetracarboxylic dianhydride, 3, 3,3 ′, 4′-benzophenone tetracarboxylic dianhydride, 1,2,5,6-naphthalene tetracarboxylic dianhydride, 1,4,5,8-naphthalene tetracarboxylic dianhydride, 2, 3,6,7-naphthalenetetracarboxylic dianhydride, 1,2,4,5-naphthalenetetracarboxylic dianhydride, 2,6-dichloronaphthalene-1,4,5,8-tetracarboxylic dianhydride 2,7-dichloronaphthalene-1,4,5,8-tetracarboxylic dianhydride, 2,3,6,7-tetrachloronaphthalene-1,4,5,8-tetracarboxylic dianhydride Phenanthrene-1 8,9,10-tetracarboxylic dianhydride, pyrazine-2,3,5,6-tetracarboxylic dianhydride, thiophene-2,3,5,6-tetracarboxylic dianhydride, 2,3 , 3 ′, 4′-biphenyltetracarboxylic dianhydride, 3,4,3 ′, 4′-biphenyltetracarboxylic dianhydride, 2,3,2 ′, 3′-biphenyltetracarboxylic dianhydride Bis (3,4-dicarboxyphenyl) dimethylsilane dianhydride, bis (3,4-dicarboxyphenyl) methylphenylsilane dianhydride, bis (3,4-dicarboxyphenyl) diphenylsilane dianhydride, 1,4-bis (3,4-dicarboxyphenyldimethylsilyl) benzene dianhydride, 1,3-bis (3,4-dicarboxyphenyl) -1,1,3,3-tetramethyldicyclohexa Dianhydride, p-phenylenebis (trimellitate anhydride), ethylenetetracarboxylic dianhydride, 1,2,3,4-butanetetracarboxylic dianhydride, decahydronaphthalene-1,4,5,8 -Tetracarboxylic dianhydride, 4,8-dimethyl-1,2,3,5,6,7-hexahydronaphthalene-1,2,5,6-tetracarboxylic dianhydride, cyclopentane-1, 2,3,4-tetracarboxylic dianhydride, pyrrolidine-2,3,4,5-tetracarboxylic dianhydride, 1,2,3,4-cyclobutanetetracarboxylic dianhydride, bis (exo- Bicyclo [2,2,1] heptane-2,3-dicarboxylic dianhydride, bicyclo- [2,2,2] -oct-7-ene-2,3,5,6-tetracarboxylic dianhydride , 2,2-bis (3,4-dical Xylphenyl) propane dianhydride, 2,2, -bis [4- (3,4-dicarboxyphenyl) phenyl] propane dianhydride, 2,2-bis (3,4-dicarboxyphenyl) hexafluoropropane Anhydride, 2,2, -bis [4- (3,4-dicarboxyphenyl) phenyl] hexafluoropropane dianhydride, 4,4'-bis (3,4-dicarboxyphenoxy) diphenyl sulfide dianhydride 1,4-bis (2-hydroxyhexafluoroisopropyl) benzenebis (trimellitic anhydride), 1,3-bis (2-hydroxyhexafluoroisopropyl) benzenebis (trimellitic anhydride), 5- ( 2,5-dioxotetrahydrofuryl) -3-methyl-3-cyclohexene-1,2-dicarboxylic dianhydride, tetrahydride And which may or may not be furan-2,3,4,5-tetracarboxylic dianhydride.

Moreover, you may use the tetracarboxylic dianhydride represented by the following general formula (I) and (II) as a tetracarboxylic dianhydride.

In general formula (I), n shows the integer of 2-20.

  As a specific example of the tetracarboxylic dianhydride represented by the general formula (I), for example, it can be synthesized from trimellitic anhydride monochloride and the corresponding diol, specifically 1,2- (ethylene ) Bis (trimellitic anhydride), 1,3- (trimethylene) bis (trimellitic anhydride), 1,4- (tetramethylene) bis (trimellitic anhydride), 1,5- (pentamethylene) bis (trimellitic anhydride) ), 1,6- (hexamethylene) bis (trimellitic anhydride), 1,7- (heptamethylene) bis (trimellitic anhydride), 1,8- (octamethylene) bis (trimellitic anhydride), 1,9 -(Nonamethylene) bis (trimellitic anhydride), 1,10- (decamethylene) bis (trimellitic anhydride), 1,12- ( Decamethylene) bis (trimellitate anhydride), 1,16 (hexamethylene decamethylene) bis (trimellitate anhydride), 1,18 (octadecamethylene) bis (trimellitate anhydride) and the like.

  The above-mentioned tetracarboxylic dianhydrides may be used singly or in combination of two or more. It is preferable to use the tetracarboxylic dianhydride represented by the general formula (II) in that excellent moisture resistance reliability can be imparted.

  When the tetracarboxylic dianhydride represented by the above general formula (II) is used as a raw material for the polyimide resin, the content of the tetracarboxylic dianhydride is 40 mol with respect to the total tetracarboxylic dianhydride. % Or more is preferable, 50 mol% or more is more preferable, and 70 mol% or more is still more preferable. When the content is less than 40 mol%, the effect of moisture resistance reliability due to the use of the tetracarboxylic dianhydride represented by the general formula (II) tends to be insufficient.

  There is no restriction | limiting in particular as diamine used as a raw material of a polyimide resin. For example, o-phenylenediamine, m-phenylenediamine, p-phenylenediamine, 3,3′-diaminodiphenyl ether, 3,4′-diaminodiphenyl ether, 4,4′-diaminodiphenyl ether, 3,3′-diaminodiphenylmethane, 3 , 4′-diaminodiphenylmethane, 4,4′-diaminodiphenylmethane, bis (4-amino-3,5-dimethylphenyl) methane, bis (4-amino-3,5-diisopropylphenyl) methane, 3,3′- Diaminodiphenyldifluoromethane, 3,4'-diaminodiphenyldifluoromethane, 4,4'-diaminodiphenyldifluoromethane, 3,3'-diaminodiphenylsulfone, 3,4'-diaminodiphenylsulfone, 4,4'-diaminodiphenyl Sulfo 3,3′-diaminodiphenyl sulfide, 3,4′-diaminodiphenyl sulfide, 4,4′-diaminodiphenyl sulfide, 3,3′-diaminodiphenyl ketone, 3,4′-diaminodiphenyl ketone, 4,4 ′ -Diaminodiphenyl ketone, 2,2-bis (3-aminophenyl) propane, 2,2 '-(3,4'-diaminodiphenyl) propane, 2,2-bis (4-aminophenyl) propane, 2,2 -Bis (3-aminophenyl) hexafluoropropane, 2,2- (3,4'-diaminodiphenyl) hexafluoropropane, 2,2-bis (4-aminophenyl) hexafluoropropane, 1,3-bis ( 3-aminophenoxy) benzene, 1,4-bis (3-aminophenoxy) benzene, 1,4-bis (4-amino) Phenoxy) benzene, 3,3 ′-(1,4-phenylenebis (1-methylethylidene)) bisaniline, 3,4 ′-(1,4-phenylenebis (1-methylethylidene)) bisaniline, 4,4 ′ -(1,4-phenylenebis (1-methylethylidene)) bisaniline, 2,2-bis (4- (3-aminophenoxy) phenyl) propane, 2,2-bis (4- (3-aminophenoxy) phenyl ) Hexafluoropropane, 2,2-bis (4- (4-aminophenoxy) phenyl) hexafluoropropane, bis (4- (3-aminophenoxy) phenyl) sulfide, bis (4- (4-aminophenoxy) phenyl ) Sulfide, bis (4- (3-aminophenoxy) phenyl) sulfone, bis (4- (4-aminophenoxy) pheny E) aromatic diamines such as sulfone and 3,5-diaminobenzoic acid, 1,3-bis (aminomethyl) cyclohexane, 2,2-bis (4-aminophenoxyphenyl) propane and the like.

Further, as the diamine, an aliphatic ether diamine represented by the following general formula (III), an aliphatic diamine represented by the following general formula (IV), and a siloxane diamine represented by the following general formula (V) are used. Also good.

In the general formula (III), Q ¹ , Q ² and Q ³ each independently represents an alkylene group having 1 to 10 carbon atoms, and m represents an integer of 2 to 80.

In general formula (IV), n shows the integer of 5-20.

In the general formula (V), Q ⁴ and Q ⁹ each independently represent an alkylene group having 1 to 5 carbon atoms or a phenylene group which may have a substituent, and Q ⁵ , Q ⁶ , Q ⁷ , and Q ⁸ Each independently represents an alkyl group having 1 to 5 carbon atoms, a phenyl group or a phenoxy group, and p represents an integer of 1 to 5.

Specific examples of the aliphatic ether diamine represented by the general formula (III) include the following.

It is more preferable to use an aliphatic ether diamine represented by the following general formula (VI) in that low temperature laminating properties and good adhesion to a substrate with an organic resist can be secured.

In general formula (VI), m shows the integer of 2-80.

  Examples of commercially available aliphatic diamines include, for example, Jeffamine D-230, D-400, D-2000, D-4000, ED-600, ED-900, ED-2001, and EDR- manufactured by Sun Techno Chemical Co., Ltd. 148, polyoxyalkylene diamines such as polyether amines D-230, D-400, and D-2000 manufactured by BASF.

  Specific examples of the aliphatic diamine represented by the general formula (IV) include 1,2-diaminoethane, 1,3-diaminopropane, 1,4-diaminobutane, 1,5-diaminopentane, 1, 6-diaminohexane, 1,7-diaminoheptane, 1,8-diaminooctane, 1,9-diaminononane, 1,10-diaminodecane, 1,11-diaminoundecane, 1,12-diaminododecane, 1,2- Diaminocyclohexane and the like can be mentioned, among which 1,9-diaminononane, 1,10-diaminodecane, 1,11-diaminoundecane and 1,12-diaminododecane are preferable.

Specific examples of the siloxane diamine represented by the general formula (V) include the following.
(When p is 1)
1,1,3,3-tetramethyl-1,3-bis (4-aminophenyl) disiloxane, 1,1,3,3-tetraphenoxy-1,3-bis (4-aminoethyl) disiloxane, 1,1,3,3-tetraphenyl-1,3-bis (2-aminoethyl) disiloxane, 1,1,3,3-tetraphenyl-1,3-bis (3-aminopropyl) disiloxane, 1,1,3,3-tetramethyl-1,3-bis (2-aminoethyl) disiloxane, 1,1,3,3-tetramethyl-1,3-bis (3-aminopropyl) disiloxane, 1,1,3,3-tetramethyl-1,3-bis (3-aminobutyl) disiloxane, 1,3-dimethyl-1,3-dimethoxy-1,3-bis (4-aminobutyl) disiloxane etc.
(When p is 2)
1,1,3,3,5,5-hexamethyl-1,5-bis (4-aminophenyl) trisiloxane, 1,1,5,5-tetraphenyl-3,3-dimethyl-1,5-bis (3-aminopropyl) trisiloxane, 1,1,5,5-tetraphenyl-3,3-dimethoxy-1,5-bis (4-aminobutyl) trisiloxane, 1,1,5,5-tetraphenyl −3,3-dimethoxy-1,5-bis (5-aminopentyl) trisiloxane, 1,1,5,5-tetramethyl-3,3-dimethoxy-1,5-bis (2-aminoethyl) tri Siloxane, 1,1,5,5-tetramethyl-3,3-dimethoxy-1,5-bis (4-aminobutyl) trisiloxane, 1,1,5,5-tetramethyl-3,3-dimethoxy- 1,5-bis (5-aminopenty ) Trisiloxane, 1,1,3,3,5,5-hexamethyl-1,5-bis (3-aminopropyl) trisiloxane, 1,1,3,3,5,5-hexaethyl-1,5- Bis (3-aminopropyl) trisiloxane, 1,1,3,3,5,5-hexapropyl-1,5-bis (3-aminopropyl) trisiloxane and the like.

  The above-mentioned diamines may be used alone or in combination of two or more. It is preferable to use the diamine represented by the above general formula (III) or (IV) from the viewpoint of imparting low stress properties, laminating properties and adhesiveness. On the other hand, it is preferable to use the diamine represented by the general formula (V) in that low water absorption and low hygroscopicity can be imparted.

  When one or more diamines represented by the above general formulas (III), (IV), and (V) are used as raw materials for the polyimide resin, the content of the diamine is the general formula for the total diamine. It is preferable that the diamine represented by (III) is 1-50 mol%, and it is preferable that the diamine represented by the said general formula (IV) is 20-80 mol%, In the said general formula (V), It is preferable that the diamine represented is 20-80 mol%.

  The polyimide resin manufactured using the above-mentioned raw material may be used individually by 1 type, and may be used by mixing (blending) 2 or more types as needed.

  The glass transition temperature (Tg) of the polyimide resin is preferably 100 ° C. or less, and more preferably 75 ° C. or less, from the viewpoint of stickability to a substrate or a chip. When the glass transition temperature exceeds 100 ° C., bumps formed on the semiconductor chip, and irregularities such as electrodes and wiring patterns formed on the substrate cannot be embedded, and bubbles remain, which tends to cause voids. Here, the glass transition temperature (Tg) is a DSC measuring device (differential scanning calorimetry, DSC-7 manufactured by PerkinElmer Co., Ltd.), sample amount 10 mg, heating rate 5 ° C./min, measurement atmosphere : The value when measured under the condition of air.

  In order for the weight average molecular weight of a polyimide to show favorable film-forming property independently, it is preferable that it is 30000 or more in polystyrene conversion, It is more preferable that it is 40000 or more, It is further more preferable that it is 50000 or more. If the molecular weight is less than 30,000, film formability may be insufficient. In addition, a weight average molecular weight here means a weight average molecular weight when measured in terms of polystyrene using high performance liquid chromatography (C-R4A manufactured by Shimadzu Corporation).

  Examples of the thermosetting component contained in the adhesive composition include (i) an epoxy resin and (ii) a phenol resin.

  (I) The epoxy resin is not particularly limited as long as it has two or more epoxy groups in the molecule. For example, bisphenol A type, bisphenol F type, naphthalene type, phenol novolak type, cresol novolak type, phenol aralkyl type, biphenyl type, triphenylmethane type, dicyclopentadiene type, various polyfunctional epoxy resins, and the like can be used. These may be used individually by 1 type, and may use 2 or more types as a mixture. For example, bisphenol A-type and bisphenol F-type liquid epoxy resins have a 1% thermogravimetric reduction temperature of 250 ° C or less, and may decompose during high-temperature heating to generate volatile components. It is preferable to use a solid epoxy resin.

  (Ii) The phenol resin is not particularly limited as long as it has two or more phenolic hydroxyl groups in the molecule. For example, phenol novolac resin, cresol novolac resin, phenol aralkyl resin, cresol naphthol formaldehyde polycondensate, triphenylmethane type polyfunctional phenol resin, various polyfunctional phenol resins, and the like can be used. These may be used individually by 1 type, and may use 2 or more types as a mixture.

  When a phenol resin and an epoxy resin are used in combination, the equivalent ratio of the phenol resin is preferably 0.4 to 1.2 from the viewpoints of curability, adhesiveness, storage stability, and the like. Is more preferably 0.0, and still more preferably 0.4 to 0.9. If the equivalent ratio is less than 0.4, the curability may be lowered and the adhesive strength may be insufficient. On the other hand, if it exceeds 1.2, an unreacted phenolic hydroxyl group will remain excessively, resulting in water absorption. The rate may increase and insulation reliability may be insufficient.

  The blending mass ratio between the polyimide resin and the thermosetting component in the adhesive composition is preferably 0.01 to 4 parts by mass with respect to 1 part by mass of the polyimide resin, and preferably 0.1 to 4. More preferably, it is more preferably 0.1-3. When the blending amount of the thermosetting component is less than 0.01 parts by mass, the curability is lowered and the adhesive force tends to be insufficient. On the other hand, when it exceeds 4 parts by mass, the film forming property of the adhesive composition is not good. It tends to be enough.

  The adhesive composition for semiconductor encapsulation may contain a curing accelerator in order to control the viscosity and physical properties of the cured product. In preparing the adhesive composition, it is preferable to appropriately mix a curing accelerator so that the melt viscosity at 350 ° C. is 350 Pa · s or less. If the melt viscosity at 350 ° C. is higher than 350 Pa · s, the adhesive composition does not sufficiently flow into the minute gaps in the thermocompression bonding process, bubbles remain between the narrow pitch wirings, and the insulation reliability becomes insufficient. Cheap. In addition to this, it is difficult to ensure conduction, and connection reliability tends to be insufficient.

The viscosity was measured by a parallel plate plastometer method. The film-like adhesive composition was cut into a predetermined size (diameter 6 mm, thickness about 0.1 mm) and stuck on a 0.7 mm thick glass chip (size: 15 mm × 15 mm). Thereafter, a cover glass (size: 18 mm × 18 mm) having a thickness of 0.12 to 0.17 mm is put on, and a flip chip bonder (manufactured by Matsushita Electric Industrial Co., Ltd., trade name: FCB3) is used. A pressure-bonded body was produced by pressure bonding under conditions of a pressure of 1 MPa and a heating and pressing time of 0.5 seconds. And the volume change of the film adhesive before and behind crimping was measured. The melt viscosity (viscosity) was calculated from the volume change measured by the parallel plate plastometer method according to the following viscosity calculation formula.
μ = 8πFtZ ⁴ Z ₀ ⁴ / [3V ² (Z ₀ ⁴ −Z ⁴ )]
μ: melt viscosity (Pa · s)
F: Load (N)
t: Heating and pressing time (seconds)
Z ₀ : initial thickness (m)
Z: Thickness after pressing (m)
V: Resin volume (m ³ )

  Examples of the curing accelerator include phosphines and imidazoles.

  Examples of the phosphines include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate, tetraphenylphosphonium (4-fluorophenyl) borate and the like.

  Examples of imidazoles include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano. 2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6- [2'-methylimidazolyl- (1 ' )]-Ethyl-s-triazine, 2,4-diamino-6- [2′-ethyl-4′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [ 2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct, 2- E sulfonyl imidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxy methyl imidazole, 2-phenyl-4-methyl-5-hydroxymethyl imidazole, and the like adducts of epoxy resins and imidazoles. Among these, from the viewpoints of curability and storage stability, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, which is an adduct of imidazoles and organic acids. Tate, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2′-ethyl-4′-methylimidazolyl- ( 1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct And 2-phenyl-4,5-dihydroxymethylimidazole, which is a high melting point imidazole, 2-phenyl-4-methyl-5-hydroxyme Imidazoles are preferred.

  The above hardening accelerators may be used alone or in combination of two or more. Moreover, you may use what microencapsulated these and raised the potential.

  It is preferable that the compounding quantity of a hardening accelerator is 0.1-10 mass parts with respect to 100 mass parts of (i) epoxy resins, It is more preferable that it is 0.1-5 mass parts, 0.1 More preferably, it is -3 mass parts. When the blending amount of the curing accelerator is less than 0.1 parts by mass, the curability tends to be insufficient, and when it exceeds 10 parts by mass, the curing is performed before the connection part by the gold-tin eutectic is formed. Therefore, poor connection is likely to occur.

  Moreover, it is preferable to adjust the kind and compounding quantity of a hardening accelerator so that the void generation rate of an adhesive composition may be 5% or less when it pressure-bonds at 350 degreeC for 5 second. The void generation rate is more preferably 1% or less, and further preferably 0.5% or less. When the void generation rate of the adhesive composition exceeds 5%, bubbles remain between the narrow pitch wirings, and the insulation reliability tends to be insufficient.

  The “void generation rate” here means a value calculated by (void generation area of the film on the chip) / (area of the entire film on the chip) × 100. The void generation rate after 5 seconds was measured using a glass chip and a semiconductor chip used in the following (examination of the cause of void generation) at a head of 350 ° C., a stage of 100 ° C., and a pressure of 1 MPa.

  The adhesive composition for semiconductor encapsulation may contain a filler in order to control the viscosity and the physical properties of the cured product. As the filler, an insulating inorganic filler, whisker, or resin filler can be used.

  Examples of the insulating inorganic filler include glass, silica, alumina, titanium oxide, carbon black, mica, boron nitride and the like. Among these, silica, alumina, titanium oxide, boron nitride and the like are preferable, silica, Alumina and boron nitride are more preferable. Examples of whiskers include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride. As the resin filler, polyurethane, polyimide, or the like can be used. These fillers and whiskers may be used alone or in combination of two or more. There is no particular limitation on the shape, particle size, and blending amount of the filler.

  Furthermore, the adhesive composition may further contain a silane coupling agent, a titanium coupling agent, a leveling agent, an antioxidant, and an ion trap agent. These may be used individually by 1 type and may be used in combination of 2 or more types. About a compounding quantity, what is necessary is just to adjust suitably so that the effect of each additive may express.

<Method for Preparing Adhesive Composition>
A resin varnish is prepared by adding a polyimide resin, an epoxy resin, a phenol resin, and additives (such as a curing accelerator and a filler) to an organic solvent and dissolving or dispersing them by stirring, mixing, kneading, or the like. Then, after applying the resin varnish using a knife coater, roll coater or applicator on the base film subjected to the release treatment, the organic solvent is removed by heating, and a film adhesive is applied on the base film. Form. Moreover, a polyimide resin may be used in the state of a varnish, without isolating after a synthesis | combination, and each component may be added in this varnish and a resin varnish may be prepared.

  As the organic solvent used for preparing the resin varnish, those having properties capable of uniformly dissolving or dispersing each component are preferable. For example, dimethylformamide, dimethylacetamide, N-methyl-2-pyrrolidone, dimethyl sulfoxide, diethylene glycol dimethyl ether, Examples include toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, and ethyl acetate. These organic solvents may be used individually by 1 type, and may be used in combination of 2 or more type. Mixing, kneading, and the like in preparing the resin varnish can be performed using a stirrer, a raking machine, a three roll, a ball mill, a homodisper, or the like.

  The substrate film is not particularly limited as long as it has heat resistance that can withstand the heating conditions when the organic solvent is volatilized. For example, a polyester film, a polypropylene film, a polyethylene terephthalate film, a polyimide film, a polyetherimide film, a polyether naphthalate film, a methylpentene film, or the like can be used. The base film is not limited to a single layer made of these films, and may be a multilayer film made of two or more materials.

  The conditions for volatilizing the organic solvent from the resin varnish after coating are preferably such that the organic solvent is sufficiently volatilized. Specifically, heating is performed at 50 to 200 ° C. for 0.1 to 90 minutes. It is preferable.

  According to the method for manufacturing a semiconductor device according to the present embodiment, since the adhesive layer 2 formed of the adhesive composition is provided between the semiconductor chip 3 and the substrate 1, a resin is formed in the gap of the connection portion after the thermocompression bonding process. Thus, the productivity of semiconductor devices can be improved. Also, in the thermocompression bonding process, even if processing is performed under high temperature conditions for flip chip bonding in a short time, a slow cooling process is introduced after the thermocompression bonding process, or the time for the crimping process is increased. Without taking measures, voids resulting from the heat shrinkage of the adhesive composition can be sufficiently reduced. For this reason, it is possible to manufacture a semiconductor device with high connection reliability while maintaining high productivity.

  In the above embodiment, the case where COF mounting is performed using a flexible wiring board is mainly exemplified. However, the method of the present invention is not limited to COF mounting but is used for metal bonding mounting that requires high-temperature connection. You may implement.

  EXAMPLES Hereinafter, although this invention is demonstrated concretely using an Example, this invention is not restrict | limited by an Example.

<Synthesis of polyimide resin>
A polyimide resin used for preparing the adhesive composition was synthesized as follows. That is, in a 300 ml flask equipped with a thermometer, a stirrer, and a calcium chloride tube, 2.12 g (0.035 mol) of 1,12-diaminododecane, 17.31 g of polyetherdiamine (manufactured by BASF, ED2000, molecular weight: 1923) ( 0.03 mol), 1,3-bis (3-aminopropyl) tetramethyldisiloxane (manufactured by Shin-Etsu Chemical Co., Ltd., LP-7100) 2.61 g (0.035 mol) and N-methyl-2-pyrrolidone 150 g (manufactured by Kanto Chemical Co., Inc.) was charged and stirred. After dissolution of the diamine, 4,4 ′-(4,4′-isopropylidenediphenoxy) bis (phthalic dianhydride) (made by ALDRICH, purified by recrystallization with acetic anhydride while cooling the flask in an ice bath, BPADA) 15.62 g (0.10 mol) was added in small portions. After reacting at room temperature (25 ° C.) for 8 hours, 100 g of xylene was added and heated at 180 ° C. while blowing nitrogen gas, and xylene was removed azeotropically with water to obtain a polyimide solution. The obtained polyimide resin had a glass transition temperature Tg of 22 ° C., a weight average molecular weight of 47000, and an SP value of 10.2.

<Preparation of adhesive film for semiconductor encapsulation>
First, an adhesive composition for semiconductor encapsulation was prepared using the polyimide resin synthesized as described above and the following compounds.
(A) Epoxy resin / cresol novolac type epoxy (manufactured by Toto Kasei Co., Ltd., YDCN-702),
・ Polyfunctional special epoxy resin (Printtech, VG3101L),
(B) Phenol resin / cresol naphthol formaldehyde polycondensate (Nippon Kayaku Co., Ltd., Kayahard NHN),
(C) Curing accelerator: 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct (manufactured by Shikoku Kasei Kogyo Co., Ltd., 2MAOK-PW).

  Polypropylene resin 1.62 g, Cresol novolac type epoxy 0.18 g, polyfunctional special epoxy resin 0.18 g, curing accelerator 0.0036 g, N-methyl-2-pyrrolidone (manufactured by Kanto Chemical Co., Ltd.) Was prepared so that the solid content was 40% by mass, and stirred using an agitation / defoaming device AR-250 (manufactured by Sinky Corporation) to obtain an adhesive composition.

  An adhesive film (thickness 30 μm) made of the adhesive composition was prepared by coating the adhesive composition on a substrate using a coating machine PI1210FILMCOATER (manufactured by Tester Sangyo Co., Ltd.) and then drying it. The drying was performed by using a clean oven (manufactured by Especsk Co., Ltd.) and holding at 80 ° C. for 30 minutes and then holding at 120 ° C. for 30 minutes.

<Manufacture of semiconductor devices>
(Examples 1 to 7 and Comparative Examples 1 and 2)
The adhesive film produced as described above was cut into a predetermined size (2.5 mm × 15.5 mm) and attached on a polyimide substrate. Using a mounting device (flip chip bonder FCB3, manufactured by Matsushita Electric Industrial Co., Ltd.), a semiconductor chip having gold bumps was mounted on a polyimide substrate. The stage and the crimping head of the mounting apparatus were set to the temperatures shown in Tables 1 and 2, and the crimping time was set to 1 second and the crimping force was set to 50N.

In addition, the following were used as a polyimide substrate and a semiconductor chip, respectively.
Polyimide substrate: thickness 38 μm, copper wiring thickness 8 μm, tin plating thickness 0.2 μm covering the copper wiring, manufactured by Hitachi Ultra LSI Systems, Ltd., JKIT COF TEG — 30-B (trade name).
Semiconductor chip: size 1.6 mm × 15.1 mm, thickness 0.4 mm, bump size 20 μm × 100 μm × height 15 μm, number of bumps 726, manufactured by Hitachi Ultra LSI Systems, JTEG PHASE6_30 (trade name).

The whole film on the chip | tip of the semiconductor device manufactured in Examples 1-7 and Comparative Examples 1 and 2 was observed, and the void generation rate was evaluated. FIG. 5 is a photograph showing an example of a semiconductor device in which no void is generated, and FIG. 6 is a photograph showing a semiconductor device in which a void is generated. The void generation rate was evaluated according to the following criteria.
A: The proportion of the void portion is 5% or less.
B: The proportion of the void portion is higher than 5%.
Here, the proportion of the void portion is obtained by taking an image (8 bits) using a metallographic microscope BX60 (OLMPUS) and a camera PDMC Iei (Polaroid), color correction, and two gradations using the image processing software Adobe Photoshop. The void portion was identified by the conversion, and calculated by the histogram.

(Examination of the cause of voids)
A test was conducted to confirm whether the void generated in the connection portion of the semiconductor device manufactured in Comparative Examples 1 and 2 was caused by thermal shrinkage or resin foaming. In order to easily observe the cured product of the adhesive composition, a glass chip (size 15 mm × 15 mm, thickness 0.7 mm) was used instead of the polyimide substrate. A semiconductor chip having a size of 4.26 mm × 4.26 mm, a thickness of 0.27 mm, and a gold bump height of 0.02 mm was used.

(Reference Examples 1 and 2)
An adhesive film (thickness 30 μm) made of the adhesive composition was cut into a predetermined size (5 mm × 5 mm) and attached onto a glass chip. Using a mounting device (flip chip bonder FCB3, manufactured by Matsushita Electric Industrial Co., Ltd.), a semiconductor chip having gold bumps was fixed on the glass chip. The stage of the mounting apparatus and the pressure bonding head were set to the temperatures shown in Table 3, and the pressure bonding time was 1 second and the pressure bonding pressure was 1 MPa.

  When the laminated body obtained by the reference examples 1 and 2 was observed, the void was produced in the hardened | cured material of the adhesive film similarly to the semiconductor device obtained by the said comparative examples 1 and 2.

(Reference Examples 3 and 4)
A laminated body was produced in the same manner as in Reference Examples 1 and 2 except that the pressure bonding time was set to 30 seconds instead of 1 second, and the presence or absence of voids in the cured adhesive film was observed. As a result, in the laminate obtained in Reference Examples 3 and 4, no void was observed in the cured adhesive film.

  By extending the pressure bonding time from 1 second to 30 seconds, voids are not generated. Therefore, the void generated in the connection portion of the semiconductor device manufactured in Comparative Examples 1 and 2 is not due to resin foaming, and the pressure bonding head is It is assumed that the void is caused by thermal contraction due to a rapid temperature change when leaving the semiconductor chip.

DESCRIPTION OF SYMBOLS 1 ... Board | substrate, 1a ... Metal wiring, 2 ... Adhesive layer, 2a ... Hardened | cured material of an adhesive layer, 3 ... Semiconductor chip, 3a ... Metal bump, 4 ... Stage, 5 ... Crimping head, 10 ... Crimping device, 12 ... Base material, 15 ... adhesive film.

Claims (6)

In a manufacturing method of a semiconductor device in which a semiconductor chip and a substrate are joined by a crimping device having a stage and a crimping head,
A pressing force is applied to the stacked body having the semiconductor chip, the substrate, and a semiconductor sealing adhesive layer disposed between them by the pressure-bonding head and the stage in the thickness direction of the stacked body. And adding a thermocompression bonding step for heating the laminate,
The adhesive composition forming the adhesive layer has a melt viscosity at 350 ° C. of 350 Pa · s or less,
In the thermal bonding step, wherein when the set and the surface temperature of the bonding head so that the difference in surface temperatures of the said stage is less than 300 ° C. of the crimping head is higher than the surface temperature of the stage, the crimp When the surface temperature of the head is set to be higher than 278 ° C. and lower than or equal to 450 ° C., and the surface temperature of the pressure-bonding head is lower than the surface temperature of the stage, A method for manufacturing a semiconductor device, comprising bonding a chip and the substrate.   2. The semiconductor device according to claim 1, wherein the semiconductor sealing adhesive layer is formed by disposing a film made of an adhesive composition for semiconductor sealing between the semiconductor chip and the substrate. Production method.   The semiconductor chip has bumps made of gold at least on the surface, and the substrate has metal wirings connected to the bumps, and the bumps and the metal wirings are joined by metal bonding by the process in the thermocompression bonding process. A method for manufacturing a semiconductor device according to claim 1.   The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor sealing adhesive layer contains a polymer component having a molecular weight of 10,000 or more and a thermosetting component.   The semiconductor device manufacturing method according to claim 1, wherein the semiconductor sealing adhesive layer includes a polyimide resin and a thermosetting component.   The method for manufacturing a semiconductor device according to claim 5, wherein the polyimide resin has a weight average molecular weight of 30000 or more and a glass transition temperature of 100 ° C. or less.