JP5331389B2 - 表示装置の作製方法 - Google Patents
表示装置の作製方法 Download PDFInfo
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- JP5331389B2 JP5331389B2 JP2008151264A JP2008151264A JP5331389B2 JP 5331389 B2 JP5331389 B2 JP 5331389B2 JP 2008151264 A JP2008151264 A JP 2008151264A JP 2008151264 A JP2008151264 A JP 2008151264A JP 5331389 B2 JP5331389 B2 JP 5331389B2
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- semiconductor film
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- film transistor
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3145—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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Description
本発明の表示装置の作製方法について説明する。はじめに、表示装置の一形態とし液晶表示装置を用いて説明する。図1乃至図3に、駆動回路に用いられる薄膜トランジスタの断面図と、画素部に用いられる薄膜トランジスタの断面図を示す。なお、微結晶半導体膜を有する薄膜トランジスタはp型よりもn型の方が、移動度が高いので駆動回路に用いるのにより適しているが、本発明では、薄膜トランジスタはn型であってもp型であってもどちらでも良い。いずれの極性の薄膜トランジスタを用いる場合でも、同一の基板上に形成する薄膜トランジスタを全て同じ極性にそろえておくことが、工程数を抑えるためにも望ましい。
次に、本発明の表示装置の一形態である表示パネルの構成について、以下に示す。
本発明により得られる液晶表示装置や発光装置等の表示装置によって、様々なモジュール(アクティブマトリクス型液晶モジュール、アクティブマトリクス型ELモジュール)に用いることができる。即ち、それらを表示部に組み込んだ電子機器全てに本発明を実施できる。
Claims (2)
- 基板上にゲート電極を形成する第1の工程と、
前記ゲート電極上にゲート絶縁膜を形成する第2の工程と、
前記ゲート絶縁膜上に微結晶半導体膜を形成する第3の工程と、
前記微結晶半導体膜上に非晶質半導体膜を形成する第4の工程と、
前記非晶質半導体膜上に一導電型を付与する不純物を含む第1の半導体膜を形成する第5の工程と、
前記第1の半導体膜上に第1の導電膜を形成する第6の工程と、
前記第1の導電膜、前記第1の半導体膜、前記非晶質半導体膜、及び前記微結晶半導体膜を島状に加工する第7の工程と、
島状に加工された前記第1の導電膜をエッチングして一対の第2の導電膜を形成する第8の工程と、
島状に加工された前記第1の半導体膜をエッチングして一対の第2の半導体膜を形成する第9の工程と、を有し、
前記第2の工程と前記第3の工程とは同一の反応室内で行われ、
前記第3の工程において、前記反応室内に水素化珪素を導入し、前記反応室内の酸素と前記水素化珪素と反応させることにより生じた反応物を前記反応室外に排出した後に前記微結晶半導体膜を形成し、
前記第4の工程の後であって前記第5の工程の前に、前記非晶質半導体膜表面をハロゲン化することを特徴とする表示装置の作製方法。 - 基板上にゲート電極を形成する第1の工程と、
前記ゲート電極上にゲート絶縁膜を形成する第2の工程と、
前記ゲート絶縁膜上に微結晶半導体膜を形成する第3の工程と、
前記微結晶半導体膜上に非晶質半導体膜を形成する第4の工程と、
前記非晶質半導体膜上に一導電型を付与する不純物を含む第1の半導体膜を形成する第5の工程と、
前記第1の半導体膜上に第1の導電膜を形成する第6の工程と、
前記第1の導電膜、前記第1の半導体膜、前記非晶質半導体膜、及び前記微結晶半導体膜を島状に加工する第7の工程と、
島状に加工された前記第1の導電膜をエッチングして一対の第2の導電膜を形成する第8の工程と、
島状に加工された前記第1の半導体膜をエッチングして一対の第2の半導体膜を形成する第9の工程と、を有し、
前記第2の工程と前記第3の工程とは同一の反応室内で行われ、
前記第3の工程において、前記反応室内に水素化珪素を導入し、前記反応室内の酸素と前記水素化珪素と反応させることにより生じた反応物を前記反応室外に排出した後に前記微結晶半導体膜を形成し、
前記第4の工程の後であって前記第5の工程の前に、前記非晶質半導体膜表面を窒素化することを特徴とする表示装置の作製方法。
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JP2009021571A (ja) | 2009-01-29 |
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