JP5310107B2 - Abnormality monitoring device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inexpensive anomaly monitoring device utilizing a function carried by a microcomputer, capable of detecting various anomalies which cannot be coped with by a conventional technology, and thereby having high reliability. <P>SOLUTION: A two-phase position detection signal from an encoder 10 is input into a control device 30 as an analog signal through a wiring system such as a cable 20. A microcomputer 33 in the control device 30 includes; level anomaly detection means 333A, 333B for detecting an anomaly of the encoder or the wiring system, when a voltage level of the analog input signal exists in a prescribed range; a pulse number comparison anomaly detection means 336 for detecting an anomaly of the encoder or the like, when a difference of the number of pulses of a digital signal corresponding to the two-phase analog input signal is over a prescribed threshold; and a pulse width comparison anomaly detection means 339 for detecting an anomaly of the encoder or the like, based on the fact that a pulse width of a synthetic signal of a two-phase digital signal is different from a pulse width of a past control period. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention, for example, in a power converter that drives an electric motor such as an inverter or a servo system, detects an abnormality of a pulse encoder (hereinafter also simply referred to as an encoder) or an abnormality of a wiring system, and monitors an abnormality to realize a safety function. Relates to the device.

  Inverters and servo systems that calculate the motor speed and rotor position from the output signal of a pulse encoder attached to the output shaft of the motor and feed back the calculated values to drive the motor at a variable speed have become widespread. In these devices, if there is an abnormality in the output signal of the encoder, normal operation becomes difficult. Therefore, various methods for stopping the operation by detecting an abnormality in the encoder or an abnormality in the wiring system have been proposed.

For example, Patent Document 1 (Japanese Patent Application Laid-Open No. 2008-232978) uses the internal functions of a microprocessor for abnormality monitoring, thereby minimizing the number of parts and minimizing circuits, thereby reducing costs. A wiring abnormality detection device is disclosed.
In this conventional technique (referred to as the first conventional technique for convenience), first, an encoder output signal is input as an analog signal to the wiring abnormality detection device. Then, when the analog signal is A / D (analog / digital) converted, and the converted voltage level is a predetermined intermediate voltage level except for a transient state, incomplete contact or short circuit is caused in the signal system. An abnormality is detected by judging that it has occurred.
The circuit configuration and operation of this prior art will be described below with reference to FIG.

In FIG. 16, the wiring abnormality detection apparatus 100 includes a microprocessor 120, a program memory 121, an AD converter 123, a constant voltage power circuit 130, a buffer amplifier 135, series resistors 131a and 131b, a filter capacitor 132a, 132b and pull-down resistors 134a and 134b. Reference numeral 122 denotes a memory in the microprocessor 120.
Reference numeral 110 denotes a rotary encoder for detecting a rotation angle of an electric motor (not shown). The encoder 110 outputs a rotation angle detection signal that outputs a two-phase (A phase, B phase) signal as a rotation angle detection signal. The circuit 115 includes sensor switches 111a and 111b as A-phase and B-phase signal output transistors, dropper diodes 112a, 112b, 113a, and 113b, and bleeder resistors 114a and 114b.

Furthermore, 101 is a DC power source, 102 is a power switch, 103 is a ground line, 104 is a power line, and 105 and 106 are signal lines.
A and B in the encoder 110 are output terminals for the A phase signal and the B phase signal, A1 and A2 in the wiring abnormality detection device 100 are analog input signals, and D1 and D2 in the microprocessor 120 are sensor switches 111a and 111b. closing logic signal, V _m represents the monitored voltage.

  As an operation of the rotary encoder 110, when the sensor switches 111a and 111b are turned on or off by the output signal of the rotation angle detection circuit 115, the voltage drop is caused by the action of the dropper diodes 112a, 112b, 113a, 113b and the bleeder resistors 114a, 114b. Occur. By detecting the voltage due to this voltage drop from the output terminals A and B as the A-phase signal and the B-phase signal and inputting them to the wiring abnormality detection device 100 via the signal lines 105 and 106, the abnormality detection operation as described below is performed. I do.

  FIG. 17 shows the characteristics of the A-phase and B-phase analog input signals A 1 and A 2 input to the wiring abnormality detection device 100. Hereinafter, the characteristics of the A-phase analog input signal A1 will be described, but the same operation is performed for the B-phase analog input signal A2.

When the sensor switch 111a is turned on, the voltage level V _{L in} FIG. 17 is detected by the on-voltage drop of the dropper diode 112a. On the other hand, when the sensor switch 111a is turned off, the voltage level _VH is detected by the voltage drop of the bleeder resistor 114a and the dropper diode 113a. Actually, in consideration of variations in characteristics of the dropper diodes 112a and 113a, the predetermined ranges centered on the voltage levels V _L and V _H are set to the normal “L” level and the normal “H” level, respectively.
As described above, the presence or absence of a pulse for detecting the rotation angle is detected by determining whether the voltage level of the analog input signal is “L” level or “H” level.
At this time, for example, if the signal line 105 has a disconnection or a ground fault with the ground, the voltage drop component described above is not detected, and the analog input signal is fixed to the ground level. Can do.

Further, when the output terminal A of the encoder 110 is short-circuited with the positive power source _Vcc , the analog input signal is fixed at a voltage level higher than _VH, so that it can be detected that an abnormality has occurred in the same manner. Furthermore, when incomplete contact between the positive power supply _Vcc and the ground or contact with another signal line occurs, the analog input signal is detected as the intermediate voltage level (logic determination level) V _s1 or V _{s2 in} FIG. Even if these intermediate voltage levels V _s1 or V _s2 continue for a certain period, it is also determined as abnormal.

When the sensor switch 111a is turned on / off, the voltage waveform of the A-phase analog input signal A1 is filtered by the low-pass filter including the series resistor 131a and the filter capacitor 132a. For this reason, depending on the sample timing, the intermediate voltage levels V _s1 and V _s2 are transiently detected even at the normal time, and as a result, there is a possibility that the abnormality is erroneously detected.
In order to prevent the above-described erroneous detection, in this conventional technique, when the intermediate voltage levels V _s1 and V _s2 are detected, detailed determination is performed, and the intermediate voltage levels V _s1 and V _s2 are transiently generated. It is judged whether it has occurred for a certain period of time or if it has continued for a certain period of time. If it has continued for a certain period of time, the above-mentioned abnormality due to incomplete contact between the positive power supply _Vcc and the ground or contact with other signal lines Deciding.

As another prior art (referred to as the second prior art for convenience), two-phase signals (A-phase signal and B-phase signal having different phases) output from the encoder are A / D converted and then input to individual counters. Thus, a method is known in which the number of pulses in a certain period is counted, and an abnormality is detected based on the number of pulses.
For example, when the motor is rotating, the number of pulses corresponding to the rotation speed is measured as an A-phase signal and a B-phase signal, but the signal line of one phase is disconnected or is in contact with the power line or ground line. If this occurs, an error occurs in the number of pulses in each phase. Therefore, an abnormality can be detected by comparing the number of pulses of each phase. Further, by comparing the speed detection value corresponding to the number of pulses of each phase with the current speed command value or the like, it is possible to detect not only one phase but also simultaneous abnormality in two phases.

JP 2008-232978 A (paragraphs [0010] to [0017], FIG. 1, FIG. 2, etc.)

  According to the first conventional technique, even when the motor is stopped, a wiring abnormality can be detected according to the voltage level of the analog signal input to the wiring abnormality detection device 100. However, during operation of the electric motor, it is difficult to determine the wiring abnormality, and even if the wiring is normal, it may be erroneously determined to be abnormal. The reason is as follows.

In general, an encoder determines the number of output signals per machine cycle (one rotation in the case of a rotary motor) of a rotating body such as an electric motor, and the interval between output signals becomes shorter at higher speeds. On the other hand, since an arithmetic processing unit such as a microprocessor normally performs arithmetic processing at a constant cycle, the interval between output signals from the encoder is often significantly shorter than the arithmetic cycle of the arithmetic processing unit.
At this time, if the sample timing by the AD converter on the arithmetic processing unit side coincides when the encoder output signal changes, the intermediate voltage level as described above is continuously detected, and the wiring system is normal. Nevertheless, it may be erroneously determined to be abnormal.

FIG. 18 is a timing chart showing the encoder output signal, AD conversion sample timing, power supply voltage V _c , detected value of the voltage level of the analog input signal, and the ground level at the time of the erroneous determination described above.
As shown in the figure, when the AD conversion sample timing period is a specific multiple of the encoder output signal period, the detected value at each sample timing becomes equal, and the voltage level of the analog input signal is at the intermediate voltage level. There is a possibility of misidentifying that it is fixed (ie abnormal).
In order to prevent such misjudgment and increase the reliability of the apparatus, it is effective to use a high-speed AD converter with a short sample timing period, but a high-speed AD converter is generally expensive, There is a problem that the cost of the apparatus increases.

  On the other hand, in the second prior art, it is impossible to detect an abnormality when the motor is stopped because of the principle of detecting an abnormality based on the number of two-phase pulses. Accordingly, it is necessary to separately prepare an abnormality detection means when the motor is stopped, which causes an increase in cost.

In addition, by combining the first conventional technique and the second conventional technique, it is possible to configure an abnormality detection device that can handle both when the motor is operating and when it is stopped. On the other hand, abnormality detection is impossible.
(1) Case where the phase of the two-phase output signal of the encoder is abnormal.
For example, when the interval between two-phase output signals changes temporarily due to a partial short circuit of the signal line.
In this case, the abnormality can be detected only when the output signal of the encoder is generated by the operation of the electric motor, and it cannot be detected simply by comparing the number of pulses as in the second prior art. .
(2) The output signal oscillates due to noise or the like even though there should be a difference in the number of two-phase pulses due to an abnormality.
In addition to the above, since there may be no difference in the number of pulses due to other causes at the time of abnormality, the abnormality may not be detected.

Accordingly, an object of the present invention is to provide a highly reliable abnormality monitoring apparatus that can detect various abnormalities that cannot be dealt with by the prior art.
Another object of the present invention is to provide an inexpensive anomaly monitoring apparatus using functions of an arithmetic processing unit such as a microcomputer (hereinafter also simply referred to as a microcomputer).

  In order to achieve the above object, in the present invention, an output signal of an encoder that detects the position of a rotating body is input as an analog signal to a control device, and an abnormality that occurs when the rotating body stops is based on the voltage level of the analog input signal. To detect. Further, when the rotating body rotates, a digital signal obtained by converting at least two-phase analog input signals is used to compare the difference in the number of pulses in each phase with a predetermined threshold value. Furthermore, an abnormality is detected by monitoring the pulse width of the combined signal obtained by combining two or more digital signals having different phases or the pulse width of the digital signal of each phase.

That is, in the abnormality monitoring device according to the present invention, for example, a two-phase position detection signal output from the encoder is input to the control device as an analog signal via a wiring system such as a cable.
The control device includes first, second, and third abnormality detection means for detecting an abnormality in the encoder or the wiring system, or first, second, and fourth abnormality detection means. The abnormality detection means is realized by a microcomputer as an arithmetic processing unit, for example.

The first abnormality detection means detects the voltage level of the analog input signal from the digital signal obtained by A / D converting the analog input signal, and if this voltage level is within a predetermined range, the encoder or wiring Judge that there is an abnormality in the system.
The second abnormality detection means obtains a difference in the number of pulses of the digital signal corresponding to the two-phase analog input signal, and determines that there is an abnormality in the encoder or the wiring system when the difference is equal to or greater than a predetermined threshold value. .
Further, the third abnormality detecting means synthesizes the two-phase digital signal used in the second abnormality detecting means, and the encoder or the wiring system has an abnormality when the pulse width of the combined signal is different from the past pulse width. Judge that there is.
The fourth abnormality detection means has an abnormality in the encoder or the wiring system when the pulse width of the two-phase digital signal is different from the past pulse width or different from the pulse width of the other phase. Judge.

  According to the first abnormality detecting means, it is possible to detect an abnormality while the rotating body is stopped. According to the second, third or fourth abnormality detecting means, an abnormality during rotation of the rotating body is detected. be able to.

The control device determines that the voltage level of the analog input signal is an analog high level obtained by subtracting the bias from the power supply voltage when the output of the encoder is “High” level, and the ground level when the output of the encoder is “Low” level. Bias generating means for providing an analog low level obtained by adding a bias amount to the level is provided. Such a bias generating means can be realized by a plurality of voltage dividing resistors connected between a power supply line, a signal line and a ground line, for example.
When the voltage level of the analog input signal exists between the analog high level and the analog low level, the first abnormality detection unit determines that the signal line or the power supply line is disconnected. If the voltage level of the analog input signal is closer to the power supply voltage than the analog high level, it is determined that the signal line is short-circuited with the power supply line, and the voltage level of the analog input signal is lower than the analog low level. If it is close to the ground level, it is determined that the signal line is grounded.

The second abnormality detection means detects the edge of the pulse of the two-phase digital signal to determine the number of pulses, and detects an abnormality when the difference between the number of pulses is equal to or greater than a predetermined threshold value.
Further, the third abnormality detection means compares the pulse width of the composite signal of the two-phase digital signals in the current control cycle with the past, for example, the pulse width in the previous control cycle, and when these pulse widths are different. Detect anomalies.
The fourth abnormality detection means compares the pulse width of the two-phase digital signal with each past pulse width, and when these pulse widths are different, the pulse width of the digital signal of one phase is compared with the pulse width of the other phase. Compared with, abnormalities are detected when these pulse widths are different.

  In the present invention, it is desirable to realize the main functions in the first to fourth abnormality detection means by utilizing the A / D conversion, counter function, and timer function of the microcomputer.

  In addition, the control device incorporates and multiplexes a plurality of microcomputers, and each microcomputer is provided with each abnormality detection means, and the microcomputer detects the data detected by each microcomputer and compares the other detection data with each other. It is also possible to detect an abnormality such as an internal communication function.

  According to the present invention, the first or second or third abnormality detection means or the first, second or fourth abnormality detection means can detect the position or the position when the rotating body such as the motor output shaft is stopped and rotated. It is possible to detect an abnormality in the speed detection encoder itself, an abnormality in the wiring system, an abnormality in the arithmetic processing unit itself multiplexed for abnormality detection, and the like. In particular, it is possible to reduce the cost of the abnormality monitoring device by using various functions of the arithmetic processing device.

1 is a circuit diagram showing a first embodiment of the present invention. It is a figure which shows the voltage level of the analog signal at the time of normal in FIG. It is a timing chart which shows the output signal of each part at the time of normal in FIG. It is explanatory drawing of the voltage level of the analog signal at the time of abnormality. It is explanatory drawing of the voltage level of the analog signal at the time of abnormality. It is explanatory drawing of the voltage level of the analog signal at the time of abnormality. It is a timing chart which shows the output signal of each part at the time of abnormality in FIG. It is a timing chart which shows the output signal of each part at the time of abnormality in FIG. It is a timing chart which shows the output signal of each part at the time of abnormality in FIG. It is a flowchart which shows the abnormality detection process by 1st Embodiment. It is a circuit diagram which shows 2nd Embodiment of this invention. It is a circuit diagram which shows 3rd Embodiment of this invention. It is a timing chart which shows the output signal of each part at the time of normal in FIG. It is a timing chart which shows the output signal of each part at the time of abnormality in FIG. It is a timing chart which shows the output signal of each part at the time of abnormality in FIG. It is a timing chart which shows the output signal of each part at the time of abnormality in FIG. It is a circuit diagram which shows 4th Embodiment of this invention. It is a circuit diagram of a wiring abnormality detection device according to the first prior art. FIG. 17 is a characteristic diagram of an analog input signal of the wiring abnormality detection device in FIG. 16. It is a timing chart for demonstrating the problem of a 1st prior art.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a circuit diagram showing a first embodiment of the present invention. In FIG. 1, 10 is an encoder that outputs a two-phase analog signal that is 90 degrees out of phase, 20 is a cable composed of a power line, a signal line, and a ground line, and 30 is an encoder 10 error by processing the output signal of the encoder 10. And a control device that detects an abnormality in the wiring system including the cable 20.

The encoder 10 includes an optical sensor that generates two relative position detection signals (A phase signal and B phase signal) that are 90 degrees out of phase with the rotation of a rotating body such as an electric motor output shaft. Note that these rotating bodies and optical sensors are not shown.
The A-phase signal and the B-phase signal are respectively input to the bases of the transistors Tr ₁ and Tr ₂ having a complementary configuration. Here, the processing circuits for the A-phase signal and the B-phase signal have the same configuration, and may have an open collector configuration as in the prior art of FIG. 16 in addition to the complementary configuration of the present embodiment.

The collector of _one transistor Tr ₁ is connected to the power supply terminal V _c (the power supply voltage is also expressed as V _c ), and the collector of the other transistor Tr ₂ is connected to the ground terminal M. The connection point between the transistors Tr ₁ and Tr ₂ is connected to the A-phase signal terminal A and the B-phase signal terminal B via the limiting resistor R ₁ , respectively.

The power supply voltage V _c is supplied to the encoder 10 from the control device 30 via the cable 20, and the electric signal of each part of the encoder 10 is based on the potential common to the control device 30. The power supply circuit in the control device 30 is not shown.
Normally, in order to prevent the influence of noise, the encoder 10 and the control device 30 may be electrically insulated by a photocoupler or an insulation amplifier at the A phase signal terminal A, the B phase signal terminal B, etc. in FIG. In this embodiment, the encoder 10 and the control device 30 are set to the same potential in order to simplify the description.

Next, in the control device 30, a bias is generated between the power supply terminal V _c , the A phase signal terminal A and the ground terminal M, and between the power supply terminal V _c , the B phase signal terminal B and the ground terminal M. Voltage dividing resistors R _x and R _y are connected as means. These voltage dividing resistors R _x and R _y may be set to appropriate values with respect to the limiting resistor R ₁ inside the encoder 10, and a diode on-resistance or a Zener diode may be used.
When the A-phase signal output from the encoder 10 is at the “H” (High) level (the transistor Tr ₁ is on and the transistor Tr ₂ is off), the A-phase signal terminal A detected by the control device 30 analog voltage _{V ADET} (corresponding to the voltage of the analog signal SigAana in FIG. 1), and ignoring the on voltage drop transistor Tr _1, is represented by equation 1.

On the other hand, the A-phase signal is "L" (Low) level when the (transistor Tr ₁ is turned off, a state where the transistor Tr ₂ is turned on), the analog voltage _{V ADET} the A phase signal terminal A, the transistor Tr ₂ If the on-voltage drop is ignored, it is expressed by Equation 2.

That is, when there is no failure in the encoder 10 and there is no disconnection, short circuit, ground fault or the like in the cable 20, as shown in FIG. 2, when the A-phase signal is at “H” level as the analog voltage V _adet , the power supply voltage V An analog high level (R _y · V _c / (R ₁ + R _y ) obtained by subtracting the bias from _c is detected, and when the A-phase signal is at the “L” level, an analog obtained by adding the bias to the ground voltage A low level (R ₁ · V _c / (R ₁ + R _x )) is detected.
Equations 1 and 2 are similarly established for the analog voltage at the B-phase signal terminal B.

In FIG. 1 again, the analog signal SigAana at the A-phase signal terminal A and the analog signal SigBana at the B-phase signal terminal B are respectively input to the analog input units 331A and 331B in the microcomputer 33 which is an arithmetic processing unit in the control device 30. Is done. The output signals of the analog input units 331A and 331B are converted into digital signals by the AD conversion units 332A and 332B. Then, in the subsequent level abnormality detection units 333A and 333B to which these digital signals are input, an abnormality is detected by determining whether the analog high level or the analog low level is detected as an analog voltage. The A detailed abnormality detection method will be described later.
In the above configuration, the analog input units 331A and 331B, the AD conversion units 332A and 332B, and the level abnormality detection units 333A and 333B constitute first abnormality detection means in the claims.

  On the other hand, the digital signal processing means 31A and 31B in FIG. 1 are a kind of AD conversion means, and the A-phase and B-phase digital signals SigA and SigB to be input to the microcomputer 33 are generated by comparing the analog signal with a threshold by a comparator or the like. To do. The signal synthesis means 32 calculates an exclusive OR of the digital signals SigA and SigB, and inputs this to the microcomputer 33 as a synthesis signal SigAB.

The digital signals SigA and SigB and the combined signal SigAB are input to digital input units 334A, 334B and 337 incorporated in the microcomputer 33, respectively.
Output signals of the digital input units 334A and 334B are input to the pulse number comparison abnormality detection unit 336 via the counters 335A and 335B, and an abnormality is detected by comparing the pulse numbers of the digital signals SigA and SigB.
The output signal of the digital input unit 337 is input to the pulse width comparison abnormality detection unit 339 via the timer 338, and abnormality is detected based on the “H” level pulse width (or period) of the composite signal SigAB. .
In the above configuration, the digital input units 334A and 334B, the counters 335A and 335B, and the pulse number comparison abnormality detection unit 336 constitute the second abnormality detection unit in the claims, and the signal synthesis unit 32, the digital input unit 337, the timer 338, and The pulse width comparison abnormality detection unit 339 constitutes third abnormality detection means.

Next, FIG. 3 shows the output signals (digital signals SigA and SigB) of the digital signal processing means 31A and 31B, the output signals of the signal synthesizing means 32 (synthesized signal SigAB), the outputs of the counters 335A and 335B, and the timer 338 in the normal state. It is a timing chart which shows a signal. Further, the control cycle T _s indicates a certain calculation processing cycle of the microcomputer 33.

Counter 335A of the A-phase counts the number rising edge of the digital signal SigA detected between the control cycle T _s, stores the count value in the internal memory in each control cycle T _s. In FIG. 3, the previous count value CountA ₀ and the count value CountA ₁ measured during the current control period T _s are shown. In this example, since the rising edge of the digital signal SigA is detected four times during the control period T _s , the count value is 4.
The counter 335B of B phase also counts the number of rising edges of the digital signal SigB detected between the control cycle T _s, stores the count value in the internal memory in each control cycle T _s. FIG. 3 shows the previous count value CountB ₀ and the count value CountB ₁ measured during the current control cycle T _s . In this example, the rising edge of the digital signal SigB is shown during the control cycle T _s. Since it was detected five times, the count value is 5.

The timer 338 measures the “H” level width of the composite signal SigAB. It is also possible to provide two channels of the timer 338 and measure and compare the “H” level width and the “L” level width of the combined signal SigAB. In the example of FIG. 3, every time the composite signal SigAB changes from the “H” level to the “L” level, the measured “H” level width is stored in the internal memory as the count value CountT _high .

Next, the abnormality detection method in this embodiment will be described.
First, an abnormality detection method capable of detecting an abnormality even when a rotating body such as an electric motor output shaft is stopped by monitoring the voltage level of an analog signal input to the microcomputer 33 will be described in detail.

4A to 4C are diagrams for explaining the voltage level of the A-phase analog signal SigAana at the time of abnormality. The same applies to the voltage level of the B-phase analog signal SigBana at the time of abnormality.
4A shows a case where the cable 20 (power supply line, signal line or ground line) is disconnected, FIG. 4B shows a case where the A phase signal line is short-circuited with the power supply line (power supply voltage V _c ), and FIG. Shows a case where is short-circuited (ie, ground fault) with the ground wire.

4A, when the transistors Tr ₁ and Tr ₂ are not turned on due to the stop of the rotating body or the like, the current is divided by the voltage dividing resistor R _x regardless of whether the power line, the signal line, or the ground line is disconnected. , _Ry only flows. Therefore, the voltage V _adet of the analog signal _SigAana is _expressed by Equation 3. Note that when the transistor Tr ₁ or Tr ₂ is turned on, the voltage should be equal to the above-described Equation 1 or Equation 2.

That is, the analog voltage V _adet becomes an intermediate level between Equation 1 and Equation 2 due to the disconnection of the cable. Accordingly, a lower limit value is set for the voltage on the right side of Formula 1 and an upper limit value is set for the voltage on the right side of Formula 2, and the level abnormality detection units 333A and 333B in FIG. It is possible to determine that the cable 20 is disconnected by detecting the analog voltage V _adet having a value between.

Then, at the time of short circuit between the signal line and the power supply of the A-phase, as shown in FIG. 4B, when the transistor Tr ₁ is turned on, no current flows to the voltage dividing resistor R _x, since the current through the short circuit path, the supply voltage V _c is not divided. Further, even when the transistor Tr ₂ is turned on, current does not flow in the same manner dividing resistors R _x, supply voltage V _c is not divided. Therefore, the analog voltage V _adet is expressed by Equation 4 regardless of whether the rotating body rotates or stops.

That is, since a voltage higher than the voltage on the right side of Equation 1 is detected as the analog voltage V _adet at the time of short circuit, an upper limit value is set in advance on the voltage on the right side of Equation 1 so that the level abnormality detection units 333A and 333B When the analog voltage V _adet higher than the upper limit value is detected, it can be determined that the signal line and the power supply are short-circuited.

The ground fault shown in Figure 4C, when the transistor Tr ₁ is turned on without a current to voltage dividing resistors R _y flows, current for passing through the short circuit path, the power supply voltage V _c is not divided. Further, even when the transistor Tr ₂ is turned on, since no current flows in the same manner dividing resistors R _y, the power supply voltage V _c is not divided. Therefore, the analog voltage V _adet is expressed by Equation 5 regardless of whether the rotating body is rotated or stopped.

That is, at the time of a ground fault, a voltage lower than the voltage on the right side of Equation 2 is detected as the analog voltage V _adet , so a lower limit value is set in advance on the voltage on the right side of Equation 2 and the level abnormality detection units 333A and 333B However, when the analog voltage V _adet lower than the lower limit value is detected, it can be determined that the signal line is _grounded .

As described above, according to the present embodiment, the level abnormality detection units 333A and 333B detect the voltage level of the analog input signal, thereby detecting an abnormality when the rotating body is stopped (disconnection of the cable 20, signal line). Can be detected. Further, even when the rotating body is rotating, it is possible to detect a short circuit and a ground fault between the signal line and the power supply line.
In addition, when the same phenomenon as the disconnection, short circuit, ground fault, etc. of the cable 20 occurs in the encoder 10 or occurs on the input side of the microcomputer 33 in the control device 30, an abnormality is detected in the same manner. Can do.

Next, an abnormality detection method for detecting an abnormality when the rotating body is rotating by monitoring a digital signal input to the microcomputer 33 will be described in detail.
FIG. 5 is a timing chart showing an output signal of each part when an abnormality occurs in the A-phase digital signal SigA (the output signal of the digital signal processing means 31A). The following description is the same when the B-phase digital signal SigB is abnormal.

First, if the A-phase digital signal SigA is fixed at the “H” level because the A-phase signal line is short-circuited with the power supply line or the like, the number of pulses output from the A-phase counter 335A in FIG. And an error occurs between the number of pulses output from the B-phase counter 335B. Accordingly, the pulse number comparison abnormality detection unit 336 in FIG. 1 compares the count values CountA ₁ and CountB ₁ of both counters 335A and 335B every control cycle T _s , and an abnormality occurs when the difference becomes larger than a predetermined threshold value. Judge.
It should be noted that the above threshold value is desirably set to a value larger than 2 because an error of about ± 1 occurs in both count values even at normal time _{depending on} the timing of the control cycle T _s . In the example of FIG. 5, since the count value CountA ₁ is 2 and the count value CountB ₁ is 5, for example, by setting the threshold value to 2, an abnormality can be detected.
Further, in addition to the short circuit between the signal line and the power supply line, the case where the digital signal is fixed at the “L” level due to the disconnection of the cable or the ground fault can be detected by the same principle.

FIG. 6 shows an operation when an abnormality occurs in both the A-phase digital signal SigA and the B-phase digital signal SigB.
In the example of FIG. 6, since the count values CountA ₁ and CountB ₁ are both 2, the pulse number comparison abnormality detection unit 336 and the second prior art cannot detect abnormality.
In this case, in this embodiment, the synthesized signal (output signal of the signal synthesizing means 32) SigAB which is an exclusive OR of the digital signals SigA and SigB is fixed at the “H” level as shown in FIG. Therefore, the timer 338 for measuring the width of the “H” level is not updated. Therefore, the pulse width comparison abnormality detection unit 339 in FIG. 1 compares the current timer value (pulse width) with the timer value in the previous control cycle T _s or detects the overflow of the cycle measurement timer. If executed, it is possible to easily detect that an abnormality has occurred in both the digital signals SigA and SigB.

FIG. 7 shows a case where an abnormality occurs in the phase of the A-phase digital signal SigA. Such a phase abnormality of the A-phase digital signal SigA may be, for example, a partial short-circuit with the B-phase side or a failure of the transistors Tr ₁ and Tr ₂ in the encoder 10.
In such a case, for example, in the second prior art, the number of pulses in each phase does not change, and it is considered that the abnormality is partially abnormal and has already shifted to the normal state, and abnormality detection is impossible. is there.
On the other hand, in this embodiment, since the timer 338 measures the width of the “H” level of the composite signal SigAB, the current timer value is compared with the timer value in the previous control cycle T _s and the time difference is calculated. By measuring, an abnormality can be easily detected.

FIG. 8 shows a flowchart of the above-described abnormality determination.
First, it is determined whether the rotating body is rotating or stopped (step S1). For example, when the rotating body is an output shaft of an electric motor and the motor speed and rotor position are detected using an encoder, whether or not one or more output pulses of the encoder are detected within a certain period, or the speed of the electric motor By referring to information such as the command value, operation command flag, voltage command value, and current detection value, it is easy to determine whether the vehicle is rotating or stopped.

When the operation is stopped, the level abnormality detection units 333A and 333B make an abnormality determination as described above based on the voltage level of the analog signal, and the detected analog voltage V _adet is within the threshold range based on Equation 1 and Equation 2. Whether or not there is an abnormality is determined based on whether or not (step S1, Yes, S2, S3).
If the rotation is in progress, the pulse number comparison abnormality detection unit 336 determines whether or not there is an abnormality depending on whether or not the difference in the number of pulses has exceeded a threshold value (steps S1 No, S6, S7). If the difference in the number of pulses does not exceed the threshold, the pulse width comparison abnormality detection unit 339 compares the timer value (pulse width) with the previous value or the like to determine whether there is an abnormality (steps S7 No, S9, S10).

When it is determined that there is an abnormality in each of the above determination steps (Yes in Step S3, or S7 Yes, or S10 Yes), the operation of the rotating body, that is, the electric motor is stopped, and an abnormality detection signal is output as an alarm to the outside. Processing at the time of abnormality is performed (steps S4, S8, S11). If it is determined that there is no abnormality (No in step S3 or S10), the operation is continued by performing normal control as normal mode processing (steps S5 and S12).
As apparent from FIG. 3, the measurement of the pulse width by the timer 338 is updated for each edge of the pulse (synthetic signal SigAB), so that the number of pulses can be measured using the multiple interrupt processing in the microcomputer 33. Can be executed at different interrupt levels. Thus, even when the phase error occurs in only part of the control period T _s, it can be detected without missing.

FIG. 9 is a circuit diagram showing a second embodiment of the present invention.
The second embodiment is different from the first embodiment in that the reliability of the abnormality monitoring device is improved by duplicating the microcomputers in the control device and performing mutual monitoring. The same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted. Hereinafter, different portions will be mainly described.

  In FIG. 9, the control apparatus 300 has two microcomputers 301X and 301Y built therein. As in FIG. 1, these microcomputers 301X and 301Y have a first abnormality detection comprising analog input units 331A and 331B, AD conversion units 332A and 332B, and level abnormality detection units 333A and 333B that process the analog signals SigAana and SigBana. A combined signal SigAB created by the signal synthesizer 32 and a second abnormality detecting means comprising digital input parts 334A and 334B for processing the digital signals SigA and SigB, counters 335A and 335B, and a pulse number comparison abnormality detecting part 336. And a third abnormality detection means including a signal digital input unit 337, a timer 338, and a pulse width comparison abnormality detection unit 339.

Further, one microcomputer 301X is provided with communication means 302X and data comparison means 303X, and the other microcomputer 301Y is provided with communication means 302Y and data comparison means 303Y.
Here, the communication means 302X and 302Y receive the detection data such as the abnormality detection result by the microcomputers 301X and 301Y, the voltage level of the analog signal, the number of pulses of the digital signal, the pulse width of the “H” level of the composite signal, and the like. To transmit / receive data to / from each other. Further, the data comparison means 303X and 303Y are for comparing the detected data of the other party received by itself with the detected data of the other party and outputting the abnormality detection signal 1 and the abnormality detection signal 2 according to the result. .

In the example of FIG. 9, the microcomputers 301X and 301Y are duplicated on the output side of the digital signal processing means 31A and 31B and the signal synthesis means 32. However, the digital signal processing means 31A and 31B and The signal synthesizing means 32 may be provided and duplicated.
Further, the communication form between the microcomputers 301X and 301Y may be synchronous or asynchronous, and is not particularly limited.

Since the abnormality detection operation by each of the microcomputers 301X and 301Y is the same as that in the first embodiment, detailed description thereof is omitted here.
However, in this embodiment, the data received from the other party is compared by the data comparison means 303X and 303Y with its own abnormality detection result, the voltage level of the analog signal, the number of pulses of the digital signal, and the pulse width, which are different from each other. In this case, or when the difference between the voltage level, the number of pulses, and the pulse width exceeds a predetermined threshold value, the abnormality detection signal 1 or the abnormality detection signal 2 is output. Since these abnormality detection signals can be regarded as wiring abnormality after duplication, microcomputer internal functions (AD converter, counter, timer, etc.) or communication system abnormality, abnormality detection signal 1 or abnormality detection signal 2 Thus, the functions of the microcomputers 301X and 301Y can be diagnosed.
Note that the above threshold value compared with the difference in voltage level, number of pulses, and pulse width can be set freely.However, since abnormality due to the function of the microcomputer is dominant, there is sufficient margin to prevent false detection. It is desirable to have a value.
Here, of course, the abnormality detection signal 1 and the abnormality detection signal 2 may include an abnormality detection result by original level abnormality detection, pulse number comparison abnormality detection, and pulse width comparison abnormality detection.

  As described above, according to the present embodiment, it is possible to detect an abnormality from the encoder to the microcomputer and an abnormality of the internal function of the microcomputer, and the reliability as the abnormality monitoring device compared to the first embodiment. Can be further improved.

Next, FIG. 10 is a circuit diagram showing a third embodiment of the present invention.
In the first and second embodiments described above, when the pulse width comparison abnormality detection unit 339 detects an abnormality based on the timer value (pulse width), the signal synthesizing unit 32 causes the A phase and B phase digital signals having different phases to be detected. It is necessary to synthesize SigA and SigB to create a synthesized signal SigAB. However, as is apparent from FIG. 3 and the like, the “H” level pulse width of the combined signal SigAB is ½ of the “H” level pulse width of the original digital signals SigA and SigB. For this reason, when the rotating body rotates at a high speed, the pulse width of the “H” level of the composite signal SigAB becomes short, and measurement becomes impossible when the pulse width becomes shorter than the time interval measured by the timer due to restrictions on the clock resolution of the microcomputer. In addition, in the first and second embodiments, the synthesized signal cannot be created inside the microcomputer, and the signal synthesizing means 32 must be realized by adding a logic circuit to the outside. It also becomes.
Therefore, the third embodiment is made to expand the speed range at the time of detecting an abnormality and further reduce the cost.

The circuit configuration of the third embodiment will be described below. In addition, the same code | symbol is attached | subjected to the component same as 1st, 2nd embodiment, and description is abbreviate | omitted.
In FIG. 10, reference numeral 310 denotes a control device. In this embodiment, the signal synthesizing unit 32 described above is not necessary, and the internal configuration of the microcomputer 311 is different from the first and second embodiments. That is, the A-phase and B-phase digital signals SigA and SigB output from the digital signal processing units 31A and 31B are input to the digital input units 337A and 337B in the microcomputer 311 without being synthesized. Timers 338A and 338B for measuring the width of the “H” level of the A-phase and B-phase digital signals SigA and SigB are connected to the output sides of the digital input units 337A and 337B, respectively, and the pulses are connected to the output sides of the timers 338A and 338B. A width comparison abnormality detection unit 340 is connected. Here, the pulse width comparison abnormality detection unit 340 compares the previous value of the timer value (the width of the “H” level of the digital signals SigA and SigB) with the current value for each of the A phase and the B phase, or The A-phase timer value and the B-phase timer value are compared, and an abnormality is detected when they exceed a predetermined threshold value.
In the above configuration, the digital input units 337A and 337B, the timers 338A and 338B, and the pulse width comparison abnormality detection unit 340 constitute the fourth abnormality detection means in the claims.

Next, the operation of the third embodiment will be described. Since abnormality detection when the rotating body is stopped is performed based on an analog signal, an abnormality detection operation based on the A-phase and B-phase digital signals SigA and SigB when the rotating body rotates will be described below.
FIG. 11 is a timing chart showing the output signals of the digital signal processing means 31A and 31B and the output signals of the counters 335A and 335B and the timers 338A and 338B at the normal time. For comparison, an output signal (synthesized signal SigAB) of the signal synthesis unit 32 in the first embodiment is also displayed.

Since the operations of the counters 335A and 335B in FIG. 11 are the same as those in FIG. 3, the operations of the timers 338A and 338B will be described.
The timer 338A starts the operation at the rising edge of the A-phase digital signal SigA and stores the timer value at the falling edge, thereby measuring the “H” level width of the A-phase digital signal SigA from the timer value. Similarly, the timer 338B starts the operation at the rising edge of the B phase digital signal SigB and stores the timer value at the falling edge, thereby measuring the “H” level width of the B phase digital signal SigB from the timer value. . 11, T _A0 , T _A1 ,..., T _B0 , T _B1 ,... Indicate timer values (widths of the “H” level of the digital signals SigA and SigB).
The pulse width comparison abnormality detection unit 340 compares the previous value and the current value of the timer values of the A phase and the B phase, respectively, and determines that the previous value and the current value are equal in the example of FIG.

FIG. 12 is a timing chart when an abnormality occurs in the A-phase digital signal SigA. When the A-phase digital signal SigA is fixed at the “H” level because the A-phase signal line is short-circuited with the power supply line, the count values CountA ₁ , A by the counters 335A and 335B are the same as in FIG. When the difference of CountB ₁ becomes larger than a predetermined threshold (for example, 2), it is determined that there is an abnormality. Even when the A-phase digital signal SigA is fixed at the “L” level due to a cable break or ground fault, or when an abnormality occurs in the B-phase digital signal SigB, the abnormality can be detected by the same principle.

FIG. 13 is a timing chart when abnormality occurs in both the A-phase and B-phase digital signals SigA and SigB.
In this case, in the example of FIG. 13, since the count values CountA ₁ and CountB ₁ are both 2, the pulse number comparison abnormality detection unit 336 cannot detect the abnormality. Therefore, in the present embodiment, the previous value and the current value of the timer values of the A phase and the B phase are respectively compared.
That is, in FIG. 13, the “H” level widths (that is, timer values) T _A1 and T _B1 of the digital signals SigA and SigB immediately before the occurrence of the abnormality are measured for both the A phase and the B phase. Since the falling edges of the digital signals SigA and SigB for storing the values do not appear, the timer values are added to both the A phase and the B phase after the abnormality occurs. Therefore, if the timer values T _A1 and T _B1 that are currently being added for the A phase and the B phase at a predetermined timing are compared with the previous timer values T _A0 and T _B0 , respectively, between T _A1 and T _A0 , T _B1 Since there is a large difference between T _B0 and T _B0 , it is detected that an abnormality has occurred in both the A-phase and B-phase digital signals SigA and SigB when these differences exceed a predetermined threshold.

FIG. 14 is a timing chart when an abnormality occurs in the phase of the A-phase digital signal SigA. As described in FIG. 7, such a phase abnormality is caused by a partial short circuit with the B phase side, a failure of the transistors Tr ₁ and Tr ₂ in the encoder 10, or the like.
In this case, the number of pulses of the A-phase and B-phase digital signals SigA and SigB does not differ by more than a threshold value (for example, 2), but between the abnormal A-phase timer value and the normal B-phase timer value, That is, there are differences between T _Aerr1 and T _B1 and between T _Aerr2 and T _B2 . Further, for example, a difference also occurs between the current timer value T _Aerr1 of the A-phase digital signal SigA and the previous timer value T _A1 .

Therefore, in the present embodiment, the pulse width comparison abnormality detection unit 340 determines that the difference between the timer values T _Aerr1 and T _B1 , the difference between the timer values T _Aerr2 and T _B2 , or the difference between the timer values T _Aerr1 and T _A1. Abnormality of the A-phase digital signal SigA is detected when it is larger than the predetermined threshold value.
The abnormality shown in FIGS. 13 and 14 can be detected by the first embodiment, for example, but in the third embodiment, the width of the “H” level of the A-phase and B-phase digital signals SigA and SigB is increased. In order to measure, this width is twice the width of the “H” level of the composite signal SigAB that is the measurement target of the first embodiment. Therefore, when microcomputers having the same clock frequency are used, it is possible to measure up to twice the rotational speed as compared with the first embodiment, and the speed range can be expanded.
Furthermore, according to the third embodiment, the logic circuit as the signal synthesizing means 32 in the first and second embodiments is not necessary, so that it is possible to reduce the size and cost by simplifying the circuit configuration.

  The flowchart of abnormality determination according to the third embodiment is basically the same as that of FIG. 8 described above, but in the third embodiment, synthesis is performed in the pulse width measurement step (S9) and abnormality determination step (S10) of FIG. The difference is that the signal SigAB is not targeted but the “H” level widths of the A-phase and B-phase digital signals SigA and SigB are individually measured to determine the abnormality.

Next, FIG. 15 is a circuit diagram showing a fourth embodiment of the present invention. This fourth embodiment enables mutual monitoring by duplicating the microcomputer in the control device in the third embodiment.
That is, in FIG. 15, the control device 320 includes two microcomputers 311X and 311Y. These microcomputers 311X and 311Y have the same detection blocks as those of the microcomputer 311 shown in FIG. 10 (analog input units 331A and 331B, AD conversion units 332A and 332B, level abnormality detection units 333A and 333B, digital input units 334A and 334B, Counter 335A, 335B, pulse number comparison abnormality detection unit 336, digital input units 337A, 337B, timers 338A, 338B, and pulse width comparison abnormality detection unit 340). One microcomputer 311X includes a communication unit 312X and a data comparison unit 313X, and the other microcomputer 311Y includes a communication unit 312Y and a data comparison unit 313Y.

The communication means 312X and 312Y exchange detection data such as the abnormality detection result by each microcomputer 311X and 311Y, the voltage level of the analog signal, the number of pulses of the digital signal, and the pulse width of the “H” level with each other. Send and receive. The data comparison means 313X, 313Y compares the detected data of the other party received by itself with its own detected data, and outputs an abnormality detection signal 1 and an abnormality detection signal 2 according to the result. .
The position at which the microcomputers 311X and 311Y are duplicated and the communication mode between the microcomputers 311X and 311Y can be arbitrarily selected as in the second embodiment of FIG.

Also in this embodiment, the data comparison means 313X, 313Y receives the data received by the communication means 312X, 312Y from the counterpart microcomputer, the abnormality detection result of itself, the voltage level of the analog signal, the number of pulses of the digital signal, and the pulse width. Compare. Then, when these data are different from each other, or when the difference in voltage level, number of pulses, and pulse width exceeds a predetermined threshold, the abnormality detection signal 1 or the abnormality detection signal 2 is output. Thereby, the functions of the microcomputers 311X and 311Y can be diagnosed.
Note that the abnormality detection signal 1 and the abnormality detection signal 2 may include an abnormality detection result by original level abnormality detection, pulse number comparison abnormality detection, and pulse width comparison abnormality detection.
According to the present embodiment, since the abnormality from the encoder to the microcomputer and the abnormality of the internal function of the microcomputer can be detected, the reliability as the abnormality monitoring device is further improved as compared with the third embodiment. be able to.

  INDUSTRIAL APPLICABILITY The present invention can be used not only for an electric motor but also for monitoring an abnormality of an encoder for detecting the rotational speed and position (angle) of various rotating bodies and its wiring system.

10: Encoder 20: Cable 30, 300, 310, 320: Controller 31A, 31B: Digital signal processing means 32: Signal synthesis means 33, 301X, 301Y, 311, 311X, 311Y: Microcomputer 302X, 302Y, 312X, 312Y: Communication means 303X, 303Y, 313X, 313Y: Data comparison means 331A, 331B: Analog input section 332A, 332B: AD conversion section 333A, 333B: Level abnormality detection section 334A, 334B: Digital input section 335A, 335B: Counter 336: Pulse Number comparison abnormality detection unit 337, 337A, 337B: Digital input unit 338, 338A, 338B: Timer 339, 340: Pulse width comparison abnormality detection unit Tr ₁ , Tr ₂ : Transistor R ₁ : Limiting resistor R _x , R _y : Voltage dividing resistance

Claims (11)

An output signal of an encoder that detects the position of the rotating body is input as an analog signal to a control device via a wiring system including a power supply line and a signal line, and the control device processes the analog input signal to output the encoder or the encoder. In an abnormality monitoring device that detects an abnormality in the wiring system,
The controller is
First abnormality detecting means for converting an analog input signal into a digital signal and detecting an abnormality in the encoder or the wiring system based on a voltage level of the analog input signal detected from the digital signal;
Second abnormality detection means for detecting an abnormality in the encoder or the wiring system based on the number of pulses of a digital signal obtained by converting at least two of the analog input signals;
A third abnormality detecting means for synthesizing at least two digital signals obtained in the second abnormality detecting means and detecting an abnormality of the encoder or the wiring system based on a pulse width of the synthesized signal;
Equipped with a,
An abnormality monitoring apparatus , wherein an abnormality is detected by a first abnormality detecting means when the rotating body is stopped, and an abnormality is detected by a second or third abnormality detecting means when the rotating body is rotating . An output signal of an encoder that detects the position of the rotating body is input as an analog signal to a control device via a wiring system including a power supply line and a signal line, and the control device processes the analog input signal to output the encoder or the encoder. In an abnormality monitoring device that detects an abnormality in the wiring system,
The controller is
First abnormality detecting means for converting an analog input signal into a digital signal and detecting an abnormality in the encoder or the wiring system based on a voltage level of the analog input signal detected from the digital signal;
Second abnormality detection means for detecting an abnormality in the encoder or the wiring system based on the number of pulses of a digital signal obtained by converting at least two of the analog input signals;
Fourth abnormality detection means for detecting an abnormality in the encoder or the wiring system based on a pulse width of a digital signal obtained by converting at least two of the analog input signals;
Equipped with a,
An abnormality monitoring apparatus , wherein an abnormality is detected by a first abnormality detecting means when the rotating body is stopped, and an abnormality is detected by a second or fourth abnormality detecting means when the rotating body is rotating . In the abnormality monitoring device according to claim 1 or 2 ,
The voltage level of the analog input signal of the control device is an analog high level obtained by subtracting a bias amount from the power supply voltage when the output of the encoder is “High” level, and the ground level when the output of the encoder is “Low” level. Bias generating means that becomes an analog low level by adding a bias amount to the level,
The first abnormality detection means is
When the voltage level of the analog input signal exists between the analog high level and the analog low level, it is determined that the signal line or the power supply line is disconnected, and the signal line is closer to the power supply voltage than the analog high level. And a power supply line, and when it is closer to the ground level than the analog low level, it is determined as a ground fault of the signal line . In the abnormality monitoring device according to any one of claims 1 to 3 ,
The second abnormality detection means detects the edge of each pulse of the digital signal converted from at least two analog input signals to determine the number of pulses, and the abnormality is detected when the difference between these pulse numbers is equal to or greater than a predetermined threshold value. An abnormality monitoring device characterized by detecting In the abnormality monitoring device according to claim 1 ,
The third abnormality detection means compares the pulse width of the composite signal in a fixed period with a pulse width in the same period as the previous fixed period, and detects an abnormality when both pulse widths are different. A feature abnormality monitoring device. In the abnormality monitoring device according to claim 2 ,
The fourth anomaly detection means compares the pulse width of the digital signal obtained by converting the analog input signal in a fixed period with the pulse width of the digital signal in the same period as the past fixed period. An abnormality monitoring device characterized by detecting an abnormality when there is a difference between the two . In the abnormality monitoring device according to claim 2 ,
The fourth abnormality detecting means detects an abnormality when a difference between pulse widths of digital signals obtained by converting two or more analog input signals in a fixed period is equal to or larger than a predetermined threshold value. Anomaly monitoring device. In the abnormality monitoring device according to claim 1 ,
The control device includes an arithmetic processing unit,
The arithmetic processing unit, to chromatic analog / digital conversion function of the first abnormality detecting means, the pulse number of a measurement function in the second abnormality detecting means, and a measurement function of the pulse width of the third abnormality detection means An abnormality monitoring device characterized by that. In the abnormality monitoring device according to claim 2 ,
The control device includes an arithmetic processing unit,
The arithmetic processing unit, to chromatic analog / digital conversion function of the first abnormality detecting means, the pulse number of a measurement function in the second abnormality detecting means, and a measurement function of the pulse width of the fourth abnormality detection means An abnormality monitoring device characterized by that. In the abnormality monitoring device according to claim 8 ,
The plurality of arithmetic processing units multiplexed are measured by the voltage level of the analog input signal detected by the first abnormality detecting means, the number of pulses measured by the second abnormality detecting means, and the third abnormality detecting means. An abnormality monitoring apparatus , wherein data including a pulse width is transmitted and received mutually, and each arithmetic processing unit detects the abnormality of the arithmetic processing unit by comparing the transmitted and received data . In the abnormality monitoring device according to claim 9 ,
The plurality of arithmetic processing units multiplexed are measured by the voltage level of the analog input signal detected by the first abnormality detecting means, the number of pulses measured by the second abnormality detecting means, and the fourth abnormality detecting means. An abnormality monitoring apparatus , wherein data including a pulse width is transmitted and received mutually, and each arithmetic processing unit detects the abnormality of the arithmetic processing unit by comparing the transmitted and received data .

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