JP5307532B2 - Frequency change measurement method and apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accurately measure frequency variations of a signal to be measured with low electric consumption. <P>SOLUTION: Each of a signal to be measured whose frequency changes according to change of the physical amount and an output signal from a reference oscillator are divided. Division periods of the respective signals are generated in different cycles, and cycle time differences between them are determined. The output signal from the reference oscillator in a plurality of close cycle time differences is counted, and frequency variations of the signal to be measured are measured from the total sum of the counted values. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a method for measuring a frequency change of a signal under measurement and a measuring apparatus.

  To measure the frequency change of the signal under measurement whose frequency changes in response to changes in the physical quantity, 1) create a gate time by dividing the frequency change of the signal under measurement, and measure within the gate time. A method of counting the internal reference clock, 2) A gate time is created by dividing the internal reference clock of the measuring device, and the frequency of the signal under measurement whose frequency changes in response to a change in physical quantity within the gate time. There are known methods such as counting.

  Conventionally, for example, as a precise temperature measurement device, a crystal resonator whose oscillation frequency changes in response to temperature changes is used as a temperature sensor, and the oscillation frequency of the oscillator connected to the crystal resonator is divided. Quartz thermometers that measure the temperature by creating a gate time using a signal and counting the reference clock inside the measuring device generated during the gate time are known.

  As shown in FIG. 1, this type of crystal thermometer generally includes a crystal resonator as a temperature sensor, an oscillation circuit that oscillates it, a frequency divider 3 that divides the oscillation frequency signal, and its frequency division. A gate circuit for generating a gate time based on a signal, a reference clock oscillator for generating a clock signal, a counter 6 for counting a clock during the gate time, and a counter 6 for reading a count value and performing various calculations to convert it into a temperature. It consists of a microcomputer (CPU) 7 etc. that is a computing means. However, in this type of crystal thermometer, the stability of the clock frequency of the reference clock oscillator 4 greatly affects the measurement accuracy. For this reason, in this type of quartz thermometer, it is necessary to stabilize the clock output frequency by placing the reference clock oscillator 4 in a thermostat in order to reduce measurement errors and maintain measurement accuracy.

In Patent Document 1, a very short period time difference time is obtained between the reference oscillator and the signal under measurement, and the reference clock inside the measuring device is counted by the counter by the short time difference specified by the signal corresponding to the period time difference. A method to do this is disclosed. This method is characterized in that the measurement result is less affected by the instability of the reference clock because the time for counting the reference clock in the measuring device is short. However, the method of Patent Document 1 has a drawback in that a digital error occurs due to a shift in the frequency division period at the time of resetting because the reference oscillator and the frequency-dividing circuit of the signal under measurement are reset for each measurement and the two signals are synchronized. . This digital error is an obstacle to improve the resolution of measured values. Patent Document 2 discloses a method of avoiding the synchronization of the frequency dividing period by reset and reducing the influence of the digital error generated at the time of reset.
Japanese Patent No. 2742642 JP 2002-214269 A

In the technique of Patent Document 2, in order to measure a signal under measurement with high resolution,
1) Increase the generation interval of the periodic time difference signal due to the action of the signal under measurement and the reference oscillator, count the reference clock inside the measuring device during the time difference signal, and increase the difference in count value related to frequency measurement.
2) Count the reference clock inside the measuring device that oscillates at high speed during the specified cycle time difference signal, and increase the difference in the count value related to frequency measurement.
Etc. are necessary. Although the resolution can be improved by 2 or 3 times, it is not easy to improve it by 20 times, for example. In the case of 1), the measurement interval is 20 times longer, making it unsuitable for applications that require a quick response. In the case of 2), it is necessary to increase the oscillation frequency of the reference clock 20 times, and the current consumption including the counter and the like becomes about 20 times, which is not preferable. It is also assumed that a reference clock that oscillates 20 times faster cannot be produced.

The present invention has been made to solve the above problems, and the first aspect of the present invention is defined as follows.
An oscillating means for outputting a frequency signal as a reference for measurement, a first frequency dividing means for dividing the output signal, and a second for dividing the signal under measurement whose frequency changes in response to a change in physical quantity. Frequency dividing means, a period time difference generating circuit for generating a period time difference signal from the frequency dividing signals of the first frequency dividing means and the second frequency dividing means, and a latch signal for generating a latch signal by the signal of the period time difference generating circuit A generation circuit, a reference oscillator that outputs a count signal, a counter that counts the output signal of the reference oscillator, and a calculation means that reads and calculates the count value;
A cycle time difference is generated by a cycle time difference generating circuit from a frequency-divided signal obtained by frequency-dividing the output signal from the oscillation unit by the first frequency-dividing unit and a frequency-divided signal obtained by frequency-dividing the signal under measurement by the second frequency-dividing unit. A counter that counts the output signal of a reference oscillator that generates a signal, generates a latch signal in a latch signal generation circuit in response to a plurality of adjacent time difference signals, and outputs a signal for counting the latch signal This is a frequency change measurement method that reads the value of the counter between multiple period time difference signals and measures the frequency change of the signal under measurement from the sum of these count values by means of arithmetic means.

  As shown in the block diagram of FIG. 2, the frequency change measuring method of the present invention is a first frequency dividing means for dividing an output signal from an oscillation means 13 for outputting a frequency signal serving as a measurement reference. Frequency divider 14, a second frequency divider 12 that is a frequency dividing means for frequency-dividing the signal under measurement 11, and frequency-divided signals output from the two frequency dividers 12 and 14. A period time difference generating circuit 15 for generating a period time difference signal having a period time difference, a latch signal generating circuit 17 for generating a latch signal at a time specified from the period time difference signal, a reference oscillator 16 for outputting a counting signal, The count value of the counter 18 that counts the output signal of 16 and the counter 18 latched by the latch signal based on the latch signal generation circuit 17 is fetched, and the frequency of the signal under measurement is calculated based on the count value. Configured to include an operation unit 19 for calculating a reduction, the.

  The frequency change measurement method of the first aspect defined in this way will be described based on the configuration diagram of FIG. 2 and the timing chart of FIG. 3 is a negative edge of the frequency-divided signal T that is the output of the first frequency divider 14 that divides the output signal of the oscillating means 13 that outputs the frequency signal serving as a measurement reference (the horizontal axis indicates The time shown is the vicinity of negative edges t0, t1 and t2 having a continuous frequency dividing period T), and the frequency divider is the output of the second frequency divider 12 that divides the signal under measurement 11 It is a time chart which shows change of signal Q. The middle part of FIG. 3 is a time chart in which the vicinity of the negative edge t0 of the frequency-divided signal T is enlarged, and the lower part of FIG. 3 is a time chart in which the vicinity of t1 is similarly enlarged. The case where the frequency-divided signal Q and the frequency-divided signal T have the relationship shown in FIG. 3 will be described as an example. The horizontal axis in FIG. 3 is a time axis, and at t0, the negative edge of the frequency-divided signal T and the negative edge of the frequency-divided signal Q are coincident (assuming that the time t0 coincides with the time q00). . Then, T ′ is the period of the frequency-divided signal T, Q ′ is the period of the frequency-divided signal Q, and the frequency change of the signal under measurement in a time close to N times Q ′ (hereinafter referred to as N * Q ′) is obtained. Assume that. Specifically, it is assumed that the output signal of the reference oscillator 16 that outputs a counting signal is counted, and the frequency change within this time is obtained by calculation from the difference between the count values counted at this time.

Assume that the relationship between the period T ′ and the period Q ′ is T ′ = N * Q ′, and the oscillation frequency of the oscillation means 13 that outputs the frequency signal serving as a measurement reference is stable, and the period T ′ of the divided signal is Assume that it is constant. The counts and count values described below mean counting the output signal of the reference oscillator 16 and the resulting count value. As shown in the middle diagram of FIG. 3, at time t0, it was assumed that the divided signal T of 13 components shown in FIG. 2 and the divided signal Q of the signal under measurement 11 coincide. Therefore, the time t0 on the time series of the divided signal T and the time q00 on the time series of the divided signal Q coincide. Although not shown, it is assumed that the relationship between the two time intervals is T ′ = N * Q ′, and the time interval T ′ is from t0 to t1 on the time axis. Then, a latch signal is output at the negative edge of the divided signal Q that changes simultaneously with or immediately after the times t0, t1, t2 corresponding to the negative edge of the divided signal T, and the value of the counter 18 is latched and read by the arithmetic means or the like. I will. In this case, if it is assumed that the output signal of the reference oscillator 16 that outputs a counting signal for the time of N * Q ′ is counted, if the frequency signal of the signal under measurement 11 changes during this time, it corresponds to the frequency change. A difference occurs in the count value. It is assumed that N = 1000, 1 second from time t0 to t1, and 16 output signals are 10 MHz. When counting 16 output signals continuously from t0 to t1,
10MHz * 1sec = 10000000 (1)
It becomes a count. Also, assuming that N = 1000 and the time from t0 to t1 is 1 second, q01-q00 is 1 msec.
10MHz * 1msec = 10000 (2)
It becomes a count. If the oscillation frequency of the signal under measurement 11 does not change in FIG. 3 (in this case, the times t1 and q10 shown in the lower part also overlap), the 16 output signals are counted from the time q00 to the time q10 and from the time q01 to the q11. Even so, the count value corresponding to N * Q ′ time is 10000000.

Suppose that the oscillation frequency of the signal under measurement 11 is changed, is delayed by about 10 ppm, and the frequency dividing period is long as shown in FIG. In either case, the negative edge of the frequency-divided signal T is used as a reference time for measurement, and the counter value is read at the negative edge of the frequency-divided signal Q that changes immediately thereafter. In this case, the count value from time t0 (corresponding to time q00) to q01 shown in the middle of FIG. 3 is k01, the count value from time t0 to q02 is k02, and the count value from t0 to q03 is k03. Do it. Similarly, the count values from time t1 to q10, q11, q12, q13 shown in the lower part of FIG. 3 are k10, k11, k12, k13. Since it is assumed that the oscillation frequency of the signal under measurement 11 has changed and the frequency dividing period has become longer, the time from time t0 to q01 is
1 msec * (1 + 0.000010) = 1.0001 msec (3)
The count value during this period is
10MHz * 1.00001msec = 10000.1 (4)
It is a count. Also, the time from q10 to q11 is
1 msec * (1 + 0.000010) = 1.0001 msec (5)
The count value during this period is
10 MHz * 1.00001 msec = 10000.1 (6)
It becomes a count. The time from time t1 to q10 is based on time t0.
1 sec * (1.000010) -1 sec = 0.01 msec (7)
The count value during this period is
10 MHz * 0.001 * 0.01 = 100 (8)
It is a count. Here, the rate of frequency change is assumed to be 10 ppm, but if the rate is an irrational value, the result of equation (8) will not be an integer. The time from time t0 to q10 is a time obtained by adding 1 second to the equation (7).
0.01msec + 1sec = 1.0001sec (9)
It is. And the count value during this period is
10 MHz * 1.00001 = 10000100 (10)
It becomes a count. Further, from the equations (3) and (5), the time difference q01-t0 and q11-q10 are the same and the time from t0 to t1 is 1 second, so the interval from time q01 to q11 is q10-t0. Is the same as Similarly, the interval from time q02 to q12 is the same as q10-t0. In this way, if the time difference is obtained individually for each negative edge of the frequency division period Q that changes immediately after the negative edge that continues the frequency division period T, the same value as in equation (9) is obtained. In other words, the time from q01 to q11 coincides with the result of equation (9), which is the time from t0 to q10. Similarly, the times from time q02 to q12 and from q03 to q13 also agree with equation (9).

  The output signal of the reference oscillator 16 may be continuously counted for the time indicated by the equation (9), and the change in frequency of the signal under measurement 11 may be obtained from the change in the count value. Since it is known, even if it is not counted during this period, if counting is started from the time t0, t1, t2 as the measurement reference time, and a count value that is known from the relationship of T ′ = N * Q ′ is added. Good. In other words, only when the count value is read in synchronization with the negative edge of the frequency division period T, which is the reference time of measurement, or at the time when the negative edge of the frequency division period Q is synchronized thereafter, the interval between T ′ = N * Q ′ Even if it is not counted by the counter, the frequency change of the signal under measurement during this period is required. The above discussion assumes that the frequency division period T is constant. If the frequency division period T, which is the measurement standard, changes, the measurement result changes at that rate. The above discussion assumes that the frequency division period Q is about 1000 times different from the frequency division period T, and that the times q00 and q01, the time q10 and q11, etc. are sufficiently shorter than the interval between the times t0 and t1. doing. Needless to say, if these assumptions break down, they can cause measurement errors.

  Specifically, the counting starts on the basis of the time t0 that is the negative edge of the frequency-divided signal T, and is the negative edge of the frequency-divided signal Q that changes in synchronization with or immediately after that, q01, q02. The count value up to q03, k01, k02, k03, etc. are read as many times as necessary. Then, counting is started with reference to the time t1, which is the negative edge of the frequency-divided signal T, and immediately after that, the negative edges of the frequency-divided signal Q, q10, q11, q12. The count values up to q13, k10, k11, k12, k13, etc. are read as many times as necessary. Thereafter, the frequency change of the signal under measurement 11 corresponding to the time t0 to t1, the time t1 to t2, etc. is obtained from the difference between the count values of the corresponding times by the calculation means.

  Even if the signal under measurement changes by about 10 ppm, if N is a large value such as 1000, the count values k01, k02, k03 are an integer multiple of the count value of Equation (4) within the range of digital error. The value is close. In addition, the values of k11-k01, k12-k02, k13-k03, etc. agree with the value of equation (8) within the range of digital error. Therefore, a reference oscillator that outputs a counting signal for a time corresponding to the time difference between the frequency-divided signal T of the oscillation means 13 that outputs a frequency signal serving as a measurement reference and the frequency-divided signal Q of the signal under measurement 11 in the vicinity thereof. 16 output signals are counted, and based on the relationship between the count value and T ′ = N * Q ′, the signal under measurement 11 can be calculated by calculation without counting the 16 output signals continuously from t0 to t1. The frequency change of is required. In other words, it is known from the relationship of equation (1) that T ′ = N * Q ′ is 10000000 counts when 16 output signals are counted. Just add.

  Even if the signal under measurement changes by about 20 ppm, the time q01-q00, q02-q00, q11-q10, q12-q10, etc. are counted if they are sufficiently small (short time) compared to the time t1-t0. The difference in values, k11-k01, k12-k02, and k13-k03 are almost the same, and reflect the frequency change from time t0 to q10. That is, even if the output signal of the reference oscillator 16 is not counted continuously from time t0 to q10, the reference signal that outputs a counting signal in synchronism with the frequency-divided signal of the signal to be measured 11 near the times t0 and t1. If the count value of the counter counting the output signal of the oscillator 16 is read, information on the frequency change of the signal under measurement 11 (corresponding to the count value k10 in this example) can be obtained. Moreover, if an average value of a plurality of adjacent data is obtained, such as a difference in count values, k11−k01, k12−k02, and k13−k03, a frequency division with higher resolution than the result obtained by one reading. Periodic change information is obtained, and as a result, frequency changes with high resolution are obtained. Since the time difference q10-t0 substantially coincides with t1-t0, it can be considered that the frequency change of the signal under measurement 11 from time t0 to time q10 is the same as the frequency change from time t0 to t1.

For example, if N is sufficiently large, such as 1000, the negative edge of the frequency-divided signal Q at a time about 10 pulses away from the negative edge of the frequency-divided signal T is used as a reference, and the difference in count value is individually used. And a simple integration of the difference between the count values, a frequency change with 10 times the resolution can be obtained compared to the methods of the previous patent documents 1 and 2. This is because the difference between the count values can be obtained only once in the conventional method, but the data according to the present invention can be obtained 10 times and can be integrated. In this embodiment, when N = 1000, the time corresponding to 10 pulses of the frequency-divided signal Q is 1% of the time corresponding to 1 pulse of the frequency-divided signal T, and a counting signal is output only during this time. The output signal of the reference oscillator 16 is counted. Specifically, when the output signal of the reference oscillator 16 is 10 MHz and there is a disturbance of about ± 20 ppm, the count value is
± 20ppm * 0.01 = ± 0.2ppm
A considerable impact will occur. Although it is desirable that the frequency of the 16 output signals is stable, even if there is a frequency disturbance equivalent to ± 20 ppm as in this example, the influence can be equivalent to ± 0.2 ppm. If 16 output signals are counted from time t0 to time t1, ± 0.2 ppm is required as the frequency stability of the 16 output signals in order to perform frequency measurement with the same accuracy as in this embodiment. A crystal oscillator with a thermostatic chamber is required. A crystal oscillator with a thermostatic chamber is expensive and has the disadvantage of increasing current consumption. However, even a cheap crystal oscillator that is mass-produced can easily obtain a stability of a frequency of about ± 20 ppm. If the method according to the present invention is used, even if the inexpensive crystal oscillator is used, the conventional method is used. Measurements can be performed with substantially the same accuracy as when using a crystal oscillator with a temperature chamber. This is a great practical advantage.
Even when the time measurement corresponding to 10 pulses is performed and the resolution is increased 10 times as in this example, the measurement interval is the same as in the case of 1 pulse, and the response speed is the same. In addition, it is not necessary to increase the oscillation frequency of the reference clock 10 times, the count time is increased by 0.9%, and the current consumption increases by the increased rate.

  Usually, since the output signal of the reference oscillator 16 that outputs a counting signal contains jitter, the influence of jitter is statistically reduced if the sum total counted using a plurality of division periods is used as a measurement value. Can improve the measurement accuracy. In the case of the present invention, the frequency change is measured by using the negative edge of the frequency-divided signal T of the oscillating means 13 that outputs a frequency signal as a measurement reference as the measurement reference, so that the output frequency of 13 is stabilized. It is preferable. Of course, the positive edge of the frequency-divided signal T can be used as a measurement reference, or the count value can be read by the positive edge of the frequency-divided signal Q.

The second aspect of the present invention is defined as follows. That is,
Provides signal synchronization means for synchronizing the output signal of the frequency dividing means for dividing the output signal of the oscillating means for outputting the frequency signal used as a measurement reference with the output signal of the clock means for clocking the standard time , A frequency change measurement method for measuring a frequency change of a signal under measurement in the process in the first aspect using a standard time as a measurement reference;
The frequency change measuring method of the present invention defined as described above includes an oscillating means 13 for outputting a frequency signal serving as a reference for measurement, and a first output for frequency-dividing the output signal from 13, as shown in the block diagram of FIG. 1 frequency divider 14, a signal synchronization means 13 A for synchronizing the output of the frequency of 14 and an output signal by a clocking means (not shown here) for clocking a standard time, and a measured signal which is a frequency signal A second frequency divider 12 that divides the signal 11, a period time difference generation circuit 15 that generates a period time difference signal having a period time difference between the frequency division signals output from the two frequency dividers 12 and 14, and a period Based on a latch signal generation circuit 17 that generates a latch signal at a time specified from a time difference signal, a counter 18 that counts an output signal from a reference oscillator 16 that outputs a counting signal, and the latch signal generation circuit 17 The pitch signal, captures the count value of the latched counter 18, and includes a calculating means 19 for processing the change of the signal under measurement based on the count value.

The frequency change measurement method of the second aspect defined in this way will be described with reference to the time chart of FIG. 3 and FIG. That is, in this frequency measurement method, the frequency divider 14 that divides the output signal of the oscillation means 13 that outputs the frequency signal serving as a reference of measurement in FIG. 2 is clocked with a standard time as shown in FIG. Control is performed by signal synchronization means 13A which is synchronized with the clock means. For example, the counter constituting the frequency divider 14 is reset with a signal synchronized with the standard time, and the output signal of the frequency divider 14 is synchronized with the standard time. In this way, frequency change data using the time synchronized with the standard time as the measurement reference in the same process as in the first phase can be obtained. If a signal synchronized with the means for clocking the standard time is used as a measurement reference, the reference oscillator can be used in combination with a clock used in a data logger or the like. In addition, even the measurement results at remote locations are data sampled in synchronization with the standard time and can be analyzed in time series on the same time axis. Here, as a clocking means for clocking the standard time, a GPS clock or the like that obtains standard time information by receiving radio waves from a geodetic satellite is assumed, but it is not shown here. If the GPS clock is used as a reference, the output signal of the frequency divider 14 that divides the output signal of the oscillating means 13 that outputs the absolute time and the frequency signal serving as a reference for measurement is always synchronized with an accuracy of about ± 5 μsec. It is possible to measure frequency changes with high accuracy over a long period of time. If there is an accuracy of ± 6μsec in 20 minutes (1200 seconds),
6μsec / 1200sec = 0.005ppm (11)
This accuracy cannot be easily achieved even with a crystal oscillator with a thermostatic chamber.

The third aspect of the present invention is defined as follows.
The signal under measurement whose output frequency changes in response to a change in physical quantity is the frequency output signal of the oscillation type temperature sensor, and is the same as in the first and second aspects described above. Temperature change measurement device that measures temperature change based on frequency change measurement method.

  The temperature change measuring apparatus of the third aspect defined in this way will be described with reference to FIG. As shown in the configuration diagram of FIG. 5, the temperature change measuring apparatus of the present invention includes an oscillation means 13 that outputs a frequency signal serving as a measurement reference, and a first frequency divider 14 that divides the output signal from the frequency divider 13. And a signal synchronization means 13A for synchronizing the frequency output of 14 with an output signal by a clock means (not shown here) for clocking a standard time, and an oscillation for generating a local wave number signal corresponding to the temperature to be measured Difference between the second frequency divider 12 that divides the frequency signal output from the temperature measuring oscillators 11B and 11B having a temperature sensor and the frequency divided signal output from the two frequency dividers 12 and 14 A period time difference generating circuit 15 for generating a period time difference signal having a reference time, a reference oscillator 16 for outputting a count signal, and an output signal from 16 at the time specified by the period time difference signal output from 15 as a count A latch signal generating circuit 17 for sending a latch signal to the counter 18; an arithmetic means 19 for taking in a count value from the counter 18 counting the output signals from 16 and calculating a change in the target temperature based on the count value; , Is configured.

  The temperature measuring method by the temperature change measuring apparatus of the third aspect defined in this way will be described with reference to the time chart of FIG. 3 and FIG. That is, if the signal under measurement in the first and second aspects is replaced with an oscillation type temperature sensor (in the figure, the temperature measuring oscillator 11B) whose oscillation frequency changes according to a change in environmental temperature, the first aspect and the first The frequency change corresponding to the temperature change can be measured in the same process as the process of 2 phases. If the frequency change can be measured, the measured frequency change is not shown here, but can be calculated using a relational expression or "conversion table" indicating the "relationship between frequency change and environmental temperature change" created in advance. The environmental temperature is obtained by means 19. With the configuration of FIG. 5, the timing of the output signal of the frequency divider 14 can be controlled by the signal synchronization means 13A, and the time synchronized with the standard time by the process described in FIG. 4 is used as the reference time for measurement. it can.

  In the case of the present invention, in the temperature change measuring apparatus, since the frequency dividing period T of the oscillation means 13 that outputs a frequency signal serving as a measurement reference is used as a measurement reference, when 13 is installed in the vicinity of the temperature measurement oscillator 11B, 11B and 13 change under the influence of the same environmental temperature, and the frequency change of 13 also reflects the environmental temperature. Therefore, when creating a “relation between frequency change and environmental temperature change” and a conversion table, not shown here, , 13 can be created in consideration of the influence of environmental temperature on the conversion and conversion table. If the environmental temperature changes between 11B and 13 are different, the frequency change of 13 due to the temperature change will affect the measurement result although it is slight.

In the present invention, in the first, second, and third aspects, the time during which the counter operates is the signal under measurement 11, the temperature measuring oscillator 11B, and the oscillating means 13 that outputs the frequency signal serving as a measurement reference. In the time chart shown in FIG. 3, only when the divided period is set to a ratio in which the value of N increases, the ratio occupied by the periodic time difference signal is shortened. The frequency change can be measured by counting the output signal of the reference oscillator 16 with a counter for a short time corresponding to. In the counter circuit, the power consumption can be reduced according to the proportion of the signal that oscillates at high speed. Therefore, if the frequency division period of the signal under measurement 11 and the temperature measuring oscillator 11B using the oscillation type temperature sensor as the measuring means and the frequency division period of 13 are set to be 1000 times different from each other, the measurement can be performed for one measurement. It is only necessary to count the time of 0.1% of the circumferential period with a counter. Even when the measurement is performed 10 times and the resolution is increased 10 times, the measurement time is compared with the method in which the count is maintained during the gate time t1 to t0.
10 * 0.1% = 1%
And the counter will operate only during this time, which has the effect of saving energy. In addition, since it counts only for a short time, it is not necessary to use a reference oscillator with high frequency output stability for counting.

  On the other hand, HC590, which is one of general-purpose counter ICs, has a function capable of latching the count value with an external signal as needed while maintaining the count. Using the counter circuit with this configuration, multiple measurements can be performed with the same counter circuit. That is, in the configuration shown in FIGS. 2, 4, and 5, the counter value is set as the reference value for the read time t0 based on the signal from the frequency divider 14 at time t0, and is divided in synchronization with or immediately after t0. For example, 10 count values are read and stored while latching the counter value at the negative edge of period Q. Further, based on the signal from the frequency divider 14 at time t1, the counter value is used as a reference value for reading time t1, and the counter value is latched at the negative edge of the frequency dividing period Q in synchronization with or immediately after t1. Read the count value of 10 times as before. If the difference between 10 sets of count values using the negative edges of the two adjacent frequency division periods T at times t0 and t1 as the measurement reference time is used in the calculation, the frequency change and the temperature change can be measured 10 times. Therefore, with the configuration of the present invention, it is possible to increase the number of measurements by changing the measurement method and calculation method without increasing the total number of circuit components, and the resolution is improved by averaging the obtained data. .

  Although not shown here, the signal of the frequency divider 14 that divides the output signal of the oscillating means 13 that outputs the frequency signal serving as a reference for measurement is applied to a plurality of period time difference generating circuits, and a plurality of frequency signals are used. If a periodic time difference signal is created with a plurality of frequency dividers 12 that divide a signal under test 11, the frequency divider 13 and the frequency divider 14 can be used together. This can be reduced and the printed circuit board can be downsized.

  As a first embodiment of the present invention, a frequency change measurement method using a CPU as a calculation means will be described with reference to the block diagram of the frequency change measurement means in FIG. In FIG. 6, the configuration from 11 to 19 is the same as that in FIG. 2, and the counter circuit 18 includes a latch circuit. Further, the bit of the counter which is the frequency divider 14 is selected by the bit selection circuit 20. Further, a power supply 21 for the circuit for measuring the frequency change is also shown. 6 in FIG. 6 is a sensor part of the frequency change measuring means as the first embodiment including 11, 12, 13, 14, 15, 17, 20 and 23 in FIG. 6 includes 16, 18, 19 A data processing unit of the frequency change measuring means.

  When a divided signal is created by dividing the signal under measurement 11, if a counter IC is used, a signal having a longer division cycle than the divided signal used for measurement can be easily created by selecting a bit. . For example, when the frequency divider 14 is a binary counter, the negative logic bit signal of the nth power is shorter than the negative logic AND signal of the nth power bit selected by the first bit selection circuit 20 and the mth power bit. To output. Temporarily, the CPU which is the arithmetic means 19 is woken up by an n-th power negative logic bit signal, and the data processor 23 is turned on by the signal. Thereafter, the negative logic AND signal of the n-th power and the m-th power is regarded as a timing at which the level of the frequency-divided signal T of the oscillating means 13 for outputting the frequency signal serving as a measurement reference shown in FIG. Is used as a reference to generate a latch signal by using the frequency-divided signal Q that is the output of the frequency divider 12, and the value of the counter is taken into the calculation means. It means 2 to the power of m.

  After the frequency-divided signal used for the measurement reaches a preset scheduled number of times, the data processing unit 23 is turned off under the control of the CPU as the calculation means. With such a configuration, measurement can be performed by operating the reference oscillator 16, the counter circuit 18, and the CPU, which is a calculation means, for a required time, which uses a signal that oscillates at high speed and consumes a large amount of power. As a result, the current consumption of the entire measuring device can be reduced, and long-time measurement using a battery as a power source in the field is possible.

  As a second embodiment of the present invention, a frequency change measuring means using a CPU as a calculating means will be described with reference to FIG. In FIG. 7, 11 to 23 have the same configuration as FIG. 6, the second bit selection circuit 24 is added, and the output signal of the first bit selection circuit 20 is input to the cycle time difference generation circuit 15. , 24 generate a negative logic AND signal of the n-th power bit and the k-th power bit and input it to the latch signal generation circuit 17. Further, a signal generated from 24 is regarded as a timing at which the level of the frequency-divided signal T of the oscillating means, which is the reference of the measurement time shown in the time chart of FIG. In this embodiment, the measurement standard signal is output a plurality of times, and the measurement standard is a plurality of times (see FIG. 8, not only t10 in FIG. 8, but t11, t12, t13, etc. are measurement reference times). Then, based on the latch signal generated by the cycle time difference generation circuit 15 and the latch signal generation circuit 17 generated thereafter, the value of the counter is taken into the calculation means, and the calculation process is performed to obtain the frequency change. In the calculation process, as shown in the timing chart of FIG. 8 (time corresponding to t1 neighborhood in the time chart of FIG. 3 is expanded), frequency signals serving as a measurement reference are output as t10, t11, and t12. A plurality of signals from the oscillating means 13 are output after being delayed based on the frequency division ratio of the frequency divider 14, and the measurement reference time for starting the counting is sequentially delayed. Therefore, when taking the sum of the latched data, it is necessary to take into account the timing at which the measurement reference time is delayed. If the frequency division period T of the oscillation means, which is the reference for the measurement time, is constant, the times t10, t11, t12, and t13 in FIG. 8 are constant intervals, and the count value due to the delay is a value that can be predicted in advance. is there.

  In this case, the division ratio is such that the timings (t10, t11, t12, etc.) as a plurality of measurement references used for the calculation end before q01 time in the time chart of FIG. 3, as shown in FIG. And the bit input to the bit selection circuits 20 and 24 are preferably selected. The n-th power and k-th power mentioned above mean 2 n power and 2 k power.

  In the frequency change measuring means according to the first embodiment, the counter value is calculated using the negative edge of the divided signal Q with reference to the timing at which the level of the divided signal T of the oscillating means 13 shown in FIG. 6 changes. Incorporated into the means, the temperature change was calculated. In this case, if there is a digital error in the detection of the measurement reference, which is the timing at which the level of the frequency-divided signal T changes, the digital error is superimposed on the count value measured based on this reference time. In other words, if the number of measurements using this reference time is 10, the sum of the 10 measurements measured based on this measurement reference may accumulate a digital error, which can be multiplied by ten. In order to avoid the influence of this digital error, if the measurement standard is provided a plurality of times as in the second embodiment shown in the time chart of FIG. 8, the digital error of the measurement standard is averaged, and accumulation of errors can be avoided. . In addition, even if an accidental error occurs in the measurement standard, it is possible to statistically reduce the magnitude of the random error by providing multiple measurement standards. On the other hand, there is also a method of delaying the reading of the count value corresponding to this delay by delaying the reference time of measurement so as to have a filter effect for the purpose of extracting the signal of the target frequency band.

  A third embodiment of the present invention will be described with reference to FIG. 9, which is a temperature change measuring apparatus using a frequency output means synchronized with a clocking means for clocking a standard time as a reference oscillator and a CPU as a computing means. In FIG. 9, the temperature measurement oscillator 11B and the output signal frequency divider 12 which are the components of FIG. 5 are used as the sensor unit 30, and the other components are moved to the second data processing unit 23A. In the same manner as described above, the signal synchronizing means 13A is controlled so that the output signal of the frequency divider 14 that divides the output signal of the oscillating means 13 that outputs the frequency signal to be used as a measurement reference is synchronized with the clocking means that clocks the standard time. The signal of the clock means for clocking the standard time (not shown) is synchronized with the 14 output signals. Although not shown in FIG. 9, if a bit selection circuit 20 is added as in FIG. 7, the n-th power negative bit signal of the frequency divider 14 is applied in accordance with the time chart shown in FIG. Then, the CPU which is the calculation means 19 is woken up, and the data processor 23 is turned on by the signal. In FIG. 9, the power supply 21 shown in FIGS. 6 and 7 is not shown.

  In this case, although not shown in FIG. 9, if the second bit selection circuit 24 is added in the same manner as in FIG. 7, the frequency divider 14 that divides the output signal of the oscillation means 13 by 24 is used. A negative logical AND signal of the nth power bit and the kth power bit is generated and input to the latch signal generation circuit 17. The plurality of latch signals according to 17 are regarded as timings at which the level of the divided signal T of the oscillating means 13 for outputting the frequency signal serving as a reference for measurement shown in FIG. 3 changes, and the plurality of change times are used as a reference. After that, a plurality of count values are obtained by using a latch by a plurality of negative AND logic signals of the nth power and mth power of the frequency divider 14. Then, in the calculation process, as shown in the time chart of FIG. 8 (FIG. 8 is an enlarged time corresponding to the t1 neighborhood in the time chart of FIG. 3), the measurement standards and t10, t11, t12 Based on the division ratio of the frequency divider 14 that divides the signal of the oscillation means 13 that outputs the frequency signal, the calculation is performed in consideration of the timing at which the measurement reference is delayed.

  In the third embodiment, the output signal of the standard clock is synchronized with the signal that is the measurement reference. In data logger measurement, data processing is usually performed according to the standard time. Therefore, based on the standard time of a GPS clock or the like, the data processing unit 23 is turned on, the reference oscillator is operated, and a plurality of frequency changes from a plurality of temperature measuring oscillators can be measured based on the signal. The current consumption can be reduced by turning on the data processing unit 23 for the required time. In the case of time-sharing processing, it is not necessary to provide all the constituent elements from 13 to 24, and many constituent elements can be shared. In this case, the timings (t10, t11, t12, etc.) as a plurality of measurement references used for the calculation are finished before q01 hours in the time chart of FIG. 3, as shown in the time chart of FIG. It is preferable to set the division ratio and select the bits to be input to the bit selection circuits 20 and 24. The above-mentioned n-th power, m-th power, and k-th power mean 2 n-th power, 2 m-th power, and 2 k-th power.

  The present invention is not limited to the description of the above embodiments. Various modifications are also included in the present invention within the scope that can be easily conceived by a party without departing from the scope of the claims.

  A block diagram of a crystal thermometer used in conventional technology.   The 1st block diagram which applies the frequency change measuring method by this invention.   The time chart for demonstrating the frequency change measuring method by this invention.   The 2nd block diagram which applies the frequency change measuring method by this invention.   The 3rd block diagram which applies the frequency change measuring method by this invention.   A first embodiment to which a frequency change measuring method according to the present invention is applied.   Second embodiment to which a frequency change measuring method according to the present invention is applied.   The time chart for demonstrating the frequency change measuring method by this invention.   Embodiment of temperature change measuring apparatus according to the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Crystal oscillator 2 ... Oscillation circuit 3, 12, 14 ... Divider 4 ... Reference clock oscillator 5 ... Gate circuit 6, 18 ... Counter 7 ... Microcomputer 11 ... Signal under test 13 ... Oscillating means 13A ... Signal synchronization means DESCRIPTION OF SYMBOLS 15 ... Period time difference generation circuit 16 ... Reference oscillator 17 ... Latch signal generation circuit 19 ... Arithmetic means 20, 24 ... Bit selection circuit 21 ... Power supply 22, 30 ... Sensor part 23, 23A ... Data processing part

Claims (3)

An oscillating means for outputting a frequency signal as a reference for measurement, a first frequency dividing means for dividing the output signal, and a second for dividing the signal under measurement whose frequency changes in response to a change in physical quantity. Frequency dividing means, a period time difference generating circuit for generating a period time difference signal from the frequency dividing signals of the first frequency dividing means and the second frequency dividing means, and a latch signal for generating a latch signal by the signal of the period time difference generating circuit A generation circuit, a reference oscillator that outputs a count signal, a counter that counts the output signal of the reference oscillator, and a calculation means that reads and calculates the count value;
A cycle time difference is generated by a cycle time difference generating circuit from a frequency-divided signal obtained by frequency-dividing the output signal from the oscillation unit by the first frequency-dividing unit and a frequency-divided signal obtained by frequency-dividing the signal under measurement by the second frequency-dividing unit. A counter that counts the output signal of a reference oscillator that generates a signal, generates a latch signal in a latch signal generation circuit in response to a plurality of adjacent time difference signals, and outputs a signal for counting the latch signal A frequency change measuring method, characterized in that a counter value between a plurality of cycle time difference signals is read and a frequency change of a signal under measurement is measured from a difference between these count values by a calculation means.   And a signal synchronizing means for synchronizing the output signal of the first frequency dividing means for outputting a frequency signal as a measurement reference with the output signal of the time-clocking means for clocking the standard time. The frequency change measuring method according to claim 1.   The signal under measurement whose output frequency changes in response to a change in physical quantity is a frequency output signal of an oscillation type temperature sensor, and is based on the frequency change measuring method according to claim 1 and 2. A temperature change measurement device that measures temperature changes.

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