JP5148662B2 - Electronic device and control program thereof - Google Patents

Description

  Embodiments described herein relate generally to an electronic device that activates an operating system (OS) using a basic input / output system (BIOS) and a control program therefor.

  2. Description of the Related Art Conventionally, an electronic device such as a personal computer has been activated by a BIOS immediately after operating power is supplied. In the boot process, after initialization of each device and abnormality diagnosis are performed, the boot sector of the auxiliary storage device is read and the OS is booted.

  In this type of electronic device, some abnormality may occur during the boot process by the BIOS, and the operation may stop before the OS is booted. In many cases, it is not possible to sufficiently cope with such anomaly before the OS is started. Therefore, there is a wide variety of techniques for operating a watch dog timer during execution of the boot process by the BIOS and resetting the boot process when the boot process by the BIOS is not completed before the timer finishes counting the monitoring time. It has been adopted.

  An option ROM is usually incorporated in the BIOS-ROM in which the BIOS is stored. The option ROM is firmware relating to, for example, VGA (Video Graphic Array), RAID (Redundant Arrays of Inexpensive Disks), PXE (Preboot Execution Environment), and the like read by the BIOS in order to cooperate with hardware.

JP 2008-140072 A

  When the option ROM as described above is read during the startup process by the BIOS, and the user executes a setting process related to the read option ROM, the watchdog timer times out depending on the time required, and any abnormality is detected. There is a risk that the start-up process is forcibly reset even though it has not occurred.

  As a method for coping with this, a method of stopping the operation of the watchdog timer during execution of the setting process related to the option ROM and restarting the operation after the setting process is completed can be considered. However, the current watchdog timer is independent from the processing related to the option ROM, and the operation cannot be stopped and restarted during the execution of the setting processing. Therefore, a technique has been adopted in which monitoring by the watchdog timer is terminated before processing relating to the option ROM is started, or counting of the watchdog timer is stopped only while processing relating to the option ROM is being performed.

  However, if the watchdog timer is stopped while the processing related to the option ROM is being executed, etc., if an error occurs during the processing related to the option ROM and the progress of the processing is stopped, the startup processing is automatically reset. Will not be. Therefore, when the process is stopped, the user must manually perform a forced reset.

  For the above reasons, during the execution of the setting process related to the option ROM, the forced reset by the watchdog timer is not performed, and even if the progress of the process related to the option ROM other than the setting process is stopped automatically There has been a demand for an electronic device in which the startup process is reset.

The electronic device in one embodiment includes a BIOS storage unit, a control unit, a first watchdog timer, and a second watchdog timer.
The BIOS storage means stores a BIOS program and an option ROM. The control means includes an initialization process of a device included in the electronic device, and relates to the option ROM that is executed during the startup process using the BIOS program and the initialization process, and includes the setting process of the option ROM Each process is executed. The first watchdog timer starts a time count at the start of the initialization process, suspends the time count at the start of the process related to the option ROM, and restarts the time count when the process related to the option ROM is completed, When the activation process is completed, the time count is stopped. When the time count reaches a predetermined first monitoring time, the activation process is reset. The second watchdog timer starts a time count at the start of the process related to the option ROM, suspends the time count at the start of the setting process of the option ROM, and restarts the time count when the setting process is completed, When the process relating to the option ROM is completed, the time count is stopped, and when the time count reaches a predetermined second monitoring time, the start-up process is reset.

The block diagram which shows the principal part structure of the electronic device in one Embodiment. The flowchart of the starting process in the embodiment. 6 is a flowchart of option ROM setting processing in the embodiment.

Hereinafter, an embodiment will be described with reference to the drawings.
In the following description, the same components are denoted by the same reference numerals, and redundant description will be given only when necessary.

  FIG. 1 is a block diagram illustrating a main configuration of an electronic device 1 according to the present embodiment. Here, the components related to the activation process are shown, and the other components are not shown.

  A motherboard 2 built in the electronic device 1 includes a CPU (Central Processing Unit) 10, a chip set 11, a main memory 12, a BIOS-ROM 13 (BIOS storage means), a first watchdog timer 20, and a second watchdog timer. 31 to 3n (n is a positive integer of 1 or more) is mounted.

The CPU 10 functions as a main control unit of the electronic device 1.
The chip set 11 includes a north bridge and a south bridge, and mediates data exchange between the CPU 10 and the main memory 12, the BIOS-ROM 13, the first watchdog timer 20, and the second watchdog timers 31 to 3n. To do. In addition to each device mounted on the motherboard 2, a power switch (SW) 40 provided in the housing of the electronic device 1 and an auxiliary storage device 50 are connected to the chip set 11. When the power switch 40 is depressed, a power signal is output. This power supply signal is sent to a power supply circuit (not shown) and the CPU 10. The power supply circuit starts power supply from the external power supply or the battery to each device in response to the input of the power supply signal. The auxiliary storage device 50 is, for example, a floppy (registered trademark) disk drive, and reads data from and writes data to the storage medium storing the boot sector of the OS.

  The main memory 12 includes a ROM (Read Only Memory) that stores fixed data and a RAM (Random Access Memory) that dynamically forms various working storage areas.

  The BIOS-ROM 13 is a rewritable nonvolatile memory such as a flash ROM. The BIOS-ROM 13 stores a BIOS program 100, an initialization program 200, a plurality of option ROMs 301 to 30n, and the like. The BIOS program 100 is a program that causes the CPU 10 to execute various processes related to activation of the electronic device 1. The initialization program 200 is a program that is called from the BIOS program 100 and causes the CPU 10 to execute POST (Power On Self Test), that is, initialization of each device, abnormality diagnosis processing, and the like. The option ROMs 301 to 30n are firmware for linking a display device, a storage device, an input device, a communication device, and the like with the BIOS and OS, such as VGA, RAID, and PXE.

  The first watchdog timer 20 counts the time during the execution of the start-up process using the BIOS program 100 except during the execution of the process related to the option ROMs 301 to 30n, and the time count reaches a predetermined first monitoring time. Then, a reset signal for forcibly resetting the activation process is output.

  The second watchdog timers 31 to 3n are provided one for each option ROM 301 to 30n, and time is counted during execution of processing related to the corresponding option ROM, and the time count is determined in advance. When the second monitoring time is reached, a reset signal for forcibly resetting the startup process is output. However, the second watchdog timers 31 to 3n interrupt the time count during the setting process of the corresponding option ROM.

  It should be noted that the first monitoring time is a time enough to determine that the progress of the process is difficult due to some trouble if the time required for the startup process excluding the processes related to the option ROMs 301 to 30n exceeds the first monitoring time. Is set to In addition, the second monitoring time is set to such a time that it can be determined that the progress of the processing is difficult due to some trouble if the required processing time of each option ROM 301 to 30n exceeds the second monitoring time. ing. The specific values of the first and second monitoring times may be determined empirically, experimentally or theoretically.

  The reset signals output from the first watchdog timer 20 and the second watchdog timers 31 to 3n are sent to the CPU 10 via the chipset 11. Upon receiving this reset signal, the CPU 10 forcibly resets the startup process.

  Next, the startup process of the electronic device 1 will be described with reference to the flowchart of FIG.

  When the power switch 40 is depressed, a power signal is sent to the power circuit and the CPU 10. When this power supply signal is received, the power supply circuit starts supplying power to each device. Further, the CPU 10 reads out and executes the BIOS program 100 from the BIOS-ROM 13 and starts the activation process (step S101). Thereafter, the CPU 10 operates in accordance with the BIOS program 100 and causes the first watchdog timer 20 to start time counting (step S102).

  Under the execution of the BIOS program 100, the CPU 10 reads the initialization program 200 from the BIOS-ROM 13, and executes abnormality diagnosis processing and initialization processing for each device included in the electronic device 1 (step S103). During these processes, the first watchdog timer 20 continues to count time.

  If an abnormality occurs during the execution of the abnormality diagnosis process and the initialization process and the progress of the process is stopped or significantly delayed, the time count of the first watchdog timer 20 eventually reaches the first monitoring time (Yes in step S104). ). In this case, a reset signal is output from the first watchdog timer 20 and the activation process is forcibly reset.

  On the other hand, if the process before the process related to the option ROM among the abnormality diagnosis process and the initialization process is completed before the time count of the first watchdog timer 20 reaches the first monitoring time (Yes in step S105), the CPU 10 Temporarily suspends the time count by the first watchdog timer 20 (step S106). Note that at least the abnormality diagnosis process and the initialization process of the input device such as the display and the keyboard are completed by the processes so far. Therefore, the display and the input device can be used in the subsequent processing.

  Subsequently, the CPU 10 starts processing relating to the option ROM 301 (step S107), and causes the second watchdog timer 31 corresponding to the option ROM 301 to start time counting (step S108). The processing related to the option ROM 301 includes reading of the option ROM 301 to the main memory 12, error checking of the read data, setting processing of the option ROM 301, and the like.

  When some abnormality occurs during execution of the process related to the option ROM 301 and the progress of the process is stopped or significantly delayed, the time count of the second watchdog timer 31 eventually reaches the second monitoring time (Yes in step S109). In this case, a reset signal is output from the second watchdog timer 31 and the activation process is forcibly reset.

  On the other hand, if the processing related to the option ROM 301 is completed before the time count of the second watchdog timer 31 reaches the second monitoring time (Yes in step S110), the CPU 10 stops the time count by the second watchdog timer 31. (Step S111).

  Here, the setting process of the option ROM 301 will be described with reference to the flowchart of FIG. When a predetermined operation is performed on an input device that has become usable through the abnormality diagnosis process and the initialization process during the process related to the option ROM 301, the CPU 10 starts a setting process related to the option ROM 301. At the beginning of this process, the CPU 10 interrupts the time count of the second watchdog timer 31 (step S201). Thereafter, the CPU 10 displays a screen for setting the option ROM 301 on the display included in the electronic device 1, accepts the setting using the input device or the like (step S202), and waits for the setting to be completed (No in step S203). The settings accepted at this time are, for example, settings for enabling / disabling functions provided by the option ROM 301, settings for operation patterns, and the like. When the setting is completed (Yes in step S203), the CPU 10 restarts the time count of the second watchdog timer 31 (step S204) and ends the setting process.

  The processes in steps S107 to S111 are also executed in order for the remaining option ROMs 302 to 30n. If the execution of the setting process is instructed in the process, the setting processes in steps S201 to S204 are executed. That is, when the processing related to any option ROM 30x (x is a positive integer of 2 or more) is started (step S107), the second watchdog timer 3x corresponding to the option ROM 30x starts time counting (step S108). If the time count reaches the second monitoring time (Yes in step S109), a reset signal is output, and if the processing related to the option ROM 30x is completed (Yes in step S110), the time count of the second watchdog timer 3x is set. Stop (step S111). If the setting process is started, the second watchdog timer 3x interrupts the time count (step S201), the setting is accepted (step S202), and if the setting is completed (Yes in step S203), the second The watchdog timer 3x resumes time counting (step S204).

  When the processing related to the option ROMs 301 to 30n is completed, the CPU 10 restarts the time count of the first watchdog timer 20 (step S112). Further, the CPU 10 resumes the abnormality diagnosis process and the initialization process for each device included in the electronic apparatus 1 (step S113).

  If any abnormality occurs during the execution of the restarted abnormality diagnosis process and initialization process and the progress of the process is stopped or significantly delayed, the time count of the first watchdog timer 20 eventually reaches the first monitoring time (step S114). Yes). In this case, a reset signal is output from the first watchdog timer 20 and the activation process is forcibly reset.

  On the other hand, if the abnormality diagnosis process and the initialization process are completed before the time count of the first watchdog timer 20 reaches the first monitoring time (Yes in step S115), the CPU 10 counts the time count by the first watchdog timer 20 Is stopped (step S116). Thereafter, the CPU 10 reads the boot sector from the auxiliary storage device 50, and starts the OS using a BIOS parameter block and IPL (Initial Program Loader) included in the boot sector. After the OS is started, the control right is transferred to the OS, and processing by the OS is performed.

  As described above, in the electronic device 1 according to the present embodiment, the second watchdog timers 31 to 3n count the time while the processing related to the option ROMs 301 to 30n is being executed, and the time count reaches the second monitoring time. Then, the startup process is forcibly reset. With such a configuration, even when an abnormality occurs during the execution of the process relating to the option ROMs 301 to 30n and the progress of the process is stopped, the activation process is automatically reset. Further, since the time counts of the second watchdog timers 31 to 3n are stopped during the setting process of the option ROMs 301 to 30n, the start-up process is not forcibly reset during the execution of the setting process.

  In addition, when the processing related to the option ROMs 301 to 30n is being executed in the start-up process, the time count of the first watchdog timer 20 is temporarily suspended and restarted after the processing related to the option ROMs 301 to 30n is completed. Here, even if the option ROM is added, the time required for processing other than the processing related to the option ROM is not substantially changed. Therefore, even when the option ROM is newly added, it is not necessary to change the first monitoring time of the first watchdog timer 20. Similarly, since the second watchdog timers 31 to 3n are provided for each option ROM 301 to 30n, even if the option ROM is added or removed, the second monitoring of each watchdog timer is performed. There is no need to change the time.

  Note that the configuration disclosed in each of the embodiments can be embodied by appropriately modifying each component in the implementation stage. Specific examples of modifications are as follows.

(1) In the said embodiment, the case where option ROM301-30n was integrated in BIOS-ROM13 was illustrated. However, any one or all of the option ROMs 301 to 30n may be mounted on the motherboard 2 or the like separately from the BIOS-ROM 13. The number of option ROMs may be one.

(2) In the above embodiment, the case where one watchdog timer is provided for each option ROM 301 to 30n is illustrated. However, one watchdog timer may be provided for a group composed of a plurality of option ROMs. In this case, it is only necessary to cause the watchdog timer provided for the group to count time during the execution of the processing related to the option ROM belonging to the group. At that time, the time count of the watchdog timer may be started at the start of the process related to each option ROM belonging to the group and the time count may be stopped at the end, or the process related to the first option ROM belonging to the group may be stopped. The time count of the watchdog timer may be started at the start, and the time count may be stopped at the end of the process related to the last option ROM belonging to the group.

(3) In the said embodiment, the case where all the monitoring time of each 2nd watchdog timer 31-3n was 2nd monitoring time was illustrated. However, each monitoring time may be set to a different value in accordance with the time required for processing related to the option ROM corresponding to each of the second watchdog timers 31 to 3n.

Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.
The description of the scope of claims at the beginning of the filing of the present application is appended below.
[1] BIOS storage means for storing a BIOS (Basic Input / Output System) program and an option ROM, a startup process using the BIOS program, and a process related to the option ROM including the option ROM setting process And a control unit that counts the time during execution of the start-up process except during the process related to the option ROM, and resets the start-up process when the time count reaches a predetermined first monitoring time. A watchdog timer, and a second watchdog timer that counts time during execution of the process related to the option ROM except for the setting process, and resets the start-up process when the time count reaches a predetermined second monitoring time; ,
An electronic device comprising:
[2] A plurality of the option ROMs are stored in the BIOS storage means, one second watchdog timer is provided for each option ROM, and each second watchdog timer is provided for each option ROM. The electronic device according to [1], wherein time counting is performed during execution of processing relating to the option ROM excluding the corresponding setting processing of the option ROM.
[3] The startup process includes an initialization process for a device included in the electronic device, a process related to the option ROM is executed in the middle of the initialization process, and the first watchdog timer Time count is started at the start of the process, the time count is temporarily interrupted when the process related to the option ROM is started, the time count is restarted when the process related to the option ROM is completed, and the time count is restarted when the startup process of the OS is completed. The electronic device according to [1] or [2], wherein the counting is stopped.
[4] The second watchdog timer starts a time count at the start of processing related to the option ROM, suspends the time count at the start of setting processing of the option ROM, and reaches the time when the setting processing is completed. The electronic device according to any one of [1] to [3], wherein the counting is restarted and the time count is stopped when the processing related to the option ROM is completed.
[5] The above-mentioned [1] to [1], wherein the option ROM relates to at least one of VGA (Video Graphic Array), RAID (Redundant Arrays of Inexpensive Disks), and PXE (Preboot Execution Environment). The electronic device according to any one of [4].
[6] A BIOS storage unit storing a BIOS program and an option ROM, a first watchdog timer that outputs a reset signal when the time count reaches the first monitoring time, and a reset signal when the time count reaches the second monitoring time A control program for an electronic device comprising a second watchdog timer that outputs a processing for the option ROM including a startup process using the BIOS program and a setting process for the option ROM. A function to be executed, a function to cause the first watchdog timer to count time during execution of the start-up process except during execution of the process related to the option ROM, and execution of a process related to the option ROM excluding the setting process During the second watchdog timer A function of Im counting, when the reset signal from one of the first dog watch timer and the second watchdog timer is output, a control program for realizing a function of resetting the activation process.

  DESCRIPTION OF SYMBOLS 1 ... Electronic device, 2 ... Mother board, 10 ... CPU, 11 ... Chip set, 12 ... Main memory, 13 ... BIOS-ROM, 20 ... 1st watchdog timer, 31-3n ... 2nd watchdog timer, 40 ... Power supply Switch 50 ... Auxiliary storage device 100 ... BIOS program 200 ... Initialization program 301-30n ... Option ROM

Claims (4)

BIOS storage means for storing a BIOS (Basic Input / Output System) program and an option ROM;
It includes a device initialization process with the electronic device, wherein the activation process using the BIOS program is executed in the course of the initialization process, a process related to the option ROM including the setting processing of the option ROM, respectively Control means to execute;
The time count is started at the start of the initialization process, the time count is temporarily suspended at the start of the process related to the option ROM, the time count is restarted when the process related to the option ROM is completed, and the time count is completed at the completion of the startup process. A first watchdog timer that resets the activation process when the time count reaches a predetermined first monitoring time;
The time count is started at the start of the process related to the option ROM, the time count is temporarily interrupted at the start of the setting process of the option ROM, the time count is restarted when the setting process is completed, and the process related to the option ROM is completed. A second watchdog timer that stops the time count and resets the start-up process when the time count reaches a predetermined second monitoring time;
An electronic device comprising: The BIOS storage means stores a plurality of option ROMs,
One second watchdog timer is provided for each option ROM,
Each of the second watchdog timers starts a time count at the start of the process related to the corresponding option ROM, and temporarily stops the time count at the start of the process of setting the corresponding option ROM. 2. The electronic device according to claim 1, wherein the time count is restarted when the setting process of the option ROM is completed, and the time count is stopped when the process related to the option ROM corresponding thereto is completed . The option ROM, VGA (Video Graphic Array), RAID (Redundant Arrays Of Inexpensive Disks), and PXE according to claim 1 or 2, characterized in that it relates to at least one of (Preboot Execution Environment) Electronics. A BIOS storage unit storing a BIOS program and an option ROM, a first watchdog timer that outputs a reset signal when the time count reaches the first monitoring time, and a reset signal that is output when the time count reaches the second monitoring time An electronic device control program comprising a second watchdog timer,
In the electronic device,
It includes a device initialization process with the electronic device, wherein the activation process using the BIOS program is executed in the course of the initialization process, a process related to the option ROM including the setting processing of the option ROM, respectively The function to perform,
When the initialization process starts, the first watchdog timer starts time counting, when the option ROM related process starts, the first watchdog timer temporarily stops time counting, and when the option ROM related process is completed A function of restarting the time count in the first watchdog timer and stopping the time count in the first watchdog timer upon completion of the startup process ;
When the processing related to the option ROM starts, the second watchdog timer starts time counting, when the setting processing of the option ROM starts, the second watchdog timer temporarily stops time counting, and when the setting processing is completed A function of causing the second watchdog timer to resume time counting and causing the second watchdog timer to stop time counting upon completion of processing related to the option ROM ;
When the reset signal is output from either one of the first dog watch timer and the second watch dog timer, a function of resetting the activation process;
Control program to realize.

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