JP5138927B2 - Flexible TFT substrate, manufacturing method thereof and flexible display - Google Patents

Description

  The present invention relates to a flexible TFT substrate, a manufacturing method thereof, and a flexible display, and more specifically, a flexible TFT substrate including an organic TFT element on a plastic film, a manufacturing method thereof, and the TFT substrate. The present invention relates to flexible displays such as organic EL displays and liquid crystal displays.

  Display devices such as organic EL (Electroluminescence) displays and liquid crystal displays are rapidly expanding their applications to information equipment. In recent years, a flexible display using a plastic film as a substrate has attracted attention. Such flexible displays can be used not only for ultra-thin and lightweight mobile devices that can be rolled up and stored, but also for large displays.

  However, the plastic film has a low rigidity and a low thermal deformation temperature, and thus is likely to undergo thermal deformation such as warping and expansion / contraction in a manufacturing process involving heat treatment. For this reason, in a manufacturing method in which various elements are formed directly on a plastic film, conditions such as a manufacturing process involving heat treatment are limited, and high-precision alignment becomes difficult, so that an element substrate having desired characteristics is manufactured. It may not be possible.

  In order to avoid such problems, a transfer layer is formed by aligning amorphous silicon TFT elements and color filters with high precision on a heat-resistant and rigid glass substrate without restricting manufacturing conditions. There is a method of manufacturing an element substrate for a liquid crystal display device by transferring and forming the transfer layer on a plastic film (Patent Document 1).

  Further, the flexible display requires a flexible TFT element that can follow the bending, and there is a possibility that sufficient reliability cannot be obtained with an amorphous silicon TFT or a low-temperature polysilicon TFT as a conventional driving transistor. For this reason, organic TFTs that use flexible organic semiconductors that can follow bending as active layers have attracted attention as driving transistors for flexible displays.

  In Patent Document 2, a gate electrode, a gate insulating film, an organic semiconductor layer, and a source / drain electrode are sequentially formed on a plastic substrate or the like, and an organic EL element is formed on an anode connected to the drain electrode. Describes a method for producing an organic EL display.

  Patent Document 3 describes that an organic TFT element can be easily formed not only on a glass substrate but also on a plastic substrate by forming a semiconductor layer from a polymer inclusion complex that does not require a high-temperature process. Yes.

Patent Document 4 describes that in the manufacture of an organic TFT, a gate electrode is formed from tantalum and the gate electrode is anodized to form a dense gate insulating layer with a thin film having a high relative dielectric constant. Has been.
JP 2001-356370 A JP 2003-255857 A JP 2003-298067 A JP 2003-258261 A

  By the way, the organic semiconductor layer and the organic EL layer have a problem in that their performance deteriorates or eventually becomes nonfunctional in a photolithography and etching process that involves processing such as an organic solvent, water, plasma, electron beam, or heat treatment. .

  In Patent Document 2 described above, after the organic semiconductor layer is formed, it is necessary to pattern the source / drain electrodes and the like, so there is a possibility that performance degradation of the organic semiconductor layer in the photolithography process may become a problem. Thus, the manufacturing method of the flexible TFT substrate provided with the organic TFT using the plastic film as the substrate has not been sufficiently established, and a method of stably forming the desired organic TFT on the plastic film with a high yield. Is anxious.

  Furthermore, when forming a highly reliable high-performance organic TFT element on a plastic film, the material of the gate insulating layer and the formation method thereof are particularly important factors, and optimization thereof is required. Although Patent Document 4 describes that the characteristics of the organic TFT are improved by forming the gate insulating layer by anodizing the gate electrode, the source / drain electrodes are formed after the organic semiconductor layer is formed. As in Patent Document 2, the performance of the organic semiconductor layer may deteriorate in the photolithography process for forming the source / drain electrodes.

  The present invention has been created in view of the above-mentioned problems, and a desired organic TFT element can be formed on a plastic film without causing any trouble, and a highly reliable high-performance organic TFT element. It aims at providing the flexible TFT board | substrate which has this, its manufacturing method, and a flexible display using the same.

  In order to solve the above-described problems, the present invention relates to a flexible TFT substrate, which is an active matrix type flexible TFT substrate in which a TFT is provided for each pixel, and includes a plastic film and an adhesive formed on the plastic film. A layer, a lower insulating layer formed on the adhesive layer, and the TFT embedded in the lower insulating layer, in order from the bottom: an organic active layer, a source electrode and a drain electrode, and a gate The TFT comprising an insulating layer and a gate electrode, and a pixel electrode provided in the pixel, electrically connected to the drain electrode of the TFT, and having the gate of the TFT The insulating layer is formed of a metal oxide layer obtained by anodizing the surface layer portion of the metal pattern layer constituting the gate electrode.

  In the flexible TFT substrate of the present invention, the pixel electrode, the TFT to which the drain electrode is electrically connected, and the insulating layer covering the pixel electrode are formed in a state where it can be peeled off on a temporary substrate (glass substrate, etc.) It is obtained by being transferred and formed on a film via an adhesive layer. For this reason, the TFT is transferred onto the plastic film while being inverted upside down from the structure formed on the temporary substrate, and the organic active layer, the source and drain electrodes, the gate insulating layer, and the gate electrode are formed in order from the bottom. Configured.

  In the present invention, since the organic active layer is formed after forming the gate electrode, the gate insulating layer, the source electrode, and the drain electrode on the temporary substrate, there is no possibility that the performance of the organic active layer is deteriorated by photolithography. In the TFT according to the present invention, since the TFT formed on the temporary substrate is turned upside down and formed on the plastic film, the source electrode and the drain electrode are disposed under the gate electrode and the gate insulating layer, and below that. An organic active layer is disposed.

  The gate insulating layer of the TFT of the flexible TFT substrate of the present invention comprises a metal oxide layer (such as a tantalum oxide layer) obtained by anodizing the surface layer portion of a metal pattern layer (such as a tantalum layer). A tantalum oxide layer or the like obtained by anodization has a relative dielectric constant larger than that of a silicon oxide layer or the like, so that a high-performance TFT having a low Vg and high transconductance can be configured. Moreover, since the surface of the tantalum oxide layer obtained by anodic oxidation has excellent flatness, a highly reliable TFT can be formed.

  In the TFT according to the present invention, since the TFT formed on the temporary substrate is turned upside down and formed on the plastic film, the gate insulating layer formed by anodizing the surface layer portion of the gate electrode is formed below the gate electrode. Is arranged.

  In one preferred embodiment of the present invention, the upper insulating layer is formed on the TFT, and the pixel electrode is embedded in the upper insulating layer. The TFT is arranged at a position overlapping the pattern region of the pixel electrode, and the drain electrode of the TFT is connected to the pixel electrode through a via hole provided in the upper insulating layer.

  In this aspect, since the arrangement area of the pixel electrode is not limited by the TFT, the pixel electrode can be arranged in the entire area of each pixel portion, and when applied to an organic EL display or a liquid crystal display, the aperture ratio is increased. It is possible to increase (occupation ratio of the light emitting unit). Thereby, in an organic EL display, a liquid crystal display, etc., high brightness and high definition can be achieved, and display characteristics can be improved.

  Alternatively, when a high aperture ratio is not considered, the upper insulating layer may be omitted, and the pixel electrode may be embedded in the lower insulating layer and arranged in the lateral direction of the TFT.

  A flexible organic EL display is formed by sequentially forming an organic EL layer, a counter electrode, and a sealing layer on the pixel electrode of the flexible TFT substrate of the present invention. In addition, an alignment film is formed on the pixel electrode of the flexible TFT substrate of the present invention, a counter substrate is bonded to the liquid crystal, and a liquid crystal is sealed between them to constitute a flexible liquid crystal display.

  In order to solve the above problems, the present invention relates to a method for manufacturing a flexible TFT substrate, and more particularly to a method for manufacturing an active matrix type flexible TFT substrate in which a TFT is provided for each pixel, and a release layer on a temporary substrate. A gate electrode made of a metal pattern layer, in order from the bottom above the release layer, and a gate insulating layer made of a metal oxide layer obtained by anodizing the upper surface and side surfaces of the metal pattern layer. Forming a TFT composed of a source electrode and a drain electrode and an organic active layer, and forming a pixel electrode electrically connected to the drain electrode of the TFT; and insulating the TFT on the TFT A step of forming a layer, a step of adhering a plastic film on the insulating layer via an adhesive layer, and the temporary substrate from the interface with the release layer The step of transferring and forming the insulating layer, the TFT, the pixel electrode, and the release layer on the plastic film via the adhesive layer, and removing the release layer, A step of exposing the pixel electrode.

  By using the manufacturing method of the present invention, the flexible TFT substrate of the above-described invention can be easily manufactured. Further, in the method for manufacturing a flexible TFT substrate of the present invention, a step of using photolithography (a step of forming a gate electrode, a source electrode and a drain electrode, and a via hole) is performed on the temporary substrate before forming the organic active layer. Therefore, the TFT can be formed with high alignment accuracy and the performance of the organic active layer is not deteriorated in the photolithography process.

  Furthermore, since the organic EL layer can be formed on the pixel electrode by a mask vapor deposition method or an ink jet method without using photolithography, the performance of the organic EL layer is prevented from being deteriorated, and a highly reliable flexible organic EL. A display can be manufactured.

  As described above, in the present invention, a desired organic TFT element can be formed on a plastic film without causing any trouble, and a gate insulating layer having a high relative dielectric constant and excellent flatness can be used. A flexible dis TFT substrate having a high performance organic TFT element is constructed.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

(First embodiment)
1 to 7 are cross-sectional views showing a method for manufacturing a flexible TFT substrate according to the first embodiment of the present invention, and FIG. 8 is a cross-sectional view showing the flexible TFT substrate.

In the manufacturing method of the flexible TFT substrate of this embodiment, as shown in FIG. 1A, first, a glass substrate 10 is prepared as a temporary substrate, and a release layer 22 made of polyimide resin or the like is provided on the glass substrate 10. Form. Thereafter, as shown in FIG. 1B, a base barrier layer 24 made of an inorganic insulating layer such as silicon nitride (SiN _x ) is formed on the release layer 22 by CVD or sputtering. Further, a conductive layer 26a having a thickness of 50 to 300 nm for forming a pixel electrode is formed on the base barrier layer 24 by sputtering.

  Next, as shown in FIG. 1C, a resist pattern (not shown) is formed on the conductive layer 26a, and the conductive layer 26a is etched using the resist pattern as a mask, whereby the pixel electrode 26 is obtained. Thereafter, the resist pattern is removed. The pixel electrode 26 may be formed of a transparent conductive layer such as an ITO (Indium Tin Oxide) layer or an IZO (Indium Zinc Oxide) layer, a gold (Au) layer, a platinum (Pt) layer, or a silver (Ag) layer. It may be formed from an opaque conductive layer. Alternatively, the pixel electrode 26 may be configured by forming a chromium (Cr) layer / ITO layer in order from the bottom.

In the present embodiment, since the pixel electrode 26 is formed on the glass substrate 10, the process conditions such as the film formation temperature are not limited unlike the case where the pixel electrode 26 is formed on the plastic film. For example, when an ITO layer is used as the pixel electrode 26, a sputtering method having a film forming temperature of about 200 ° C. can be employed. Thus, the pixel electrode 26 (ITO) is formed with low resistance (specific resistance value: 3 × 10 ⁻⁴ Ω · cm or less) electrical characteristics.

  Note that the base barrier layer 24 may be omitted, and the pixel electrode 26 may be formed directly on the release layer 22.

Subsequently, as illustrated in FIG. 1D, an interlayer insulating layer 28 that fills the step of the pixel electrode 26 is formed by applying polyimide resin or the like on the pixel electrode 26 by a spin coating method. Thereby, the step of the pixel electrode 26 is eliminated and the interlayer insulating layer 28 is formed with a flat upper surface. Further, a barrier insulating layer 30 having a gas barrier function of an inorganic insulating layer (such as silicon nitride (SiN _x )) is formed on the interlayer insulating layer 28 by CVD or sputtering. In the present embodiment, the interlayer insulating layer 28 and the barrier insulating layer 30 constitute a first insulating layer.

  Next, as shown in FIG. 2A, a tantalum (Ta) layer 32 having a thickness of about 250 nm is formed on the barrier insulating layer 30 by vapor deposition or sputtering. As an example of the film forming conditions of the tantalum layer 32, an RF sputtering method in which an applied power is 200 W and a sputtering pressure is 0.6 Pa is employed. Further, a resist pattern 33 is formed on the tantalum layer 32 by photolithography. Subsequently, after the tantalum layer 32 is etched using the resist pattern 33 as a mask, the resist pattern 33 is removed. Thereby, as shown in FIG. 2B, a tantalum pattern layer 32x for forming a gate electrode on the barrier insulating layer 30 is obtained.

Subsequently, the exposed surface of the tantalum pattern layer 32x is anodized. As an example of the conditions for anodization, a 1% ammonium borate aqueous solution is used as an electrolytic solution, the glass substrate 10 on which the tantalum pattern layer 32x is formed is immersed in the electrolytic solution, and the tantalum pattern layer 32x is connected to the anode. Energization is performed under the conditions of a voltage of 90 to 100 V and a current density of 1 mA / cm ² .

As a result, as shown in FIG. 3A, a tantalum oxide layer (Ta ₂ O ₅ ) is formed in a self-aligned manner on the surface layer portion (upper surface and side surface) of the tantalum pattern layer 32x, and the gate insulating layer 34 is obtained. . The film thickness of the gate insulating layer 34 (tantalum oxide layer) is set to 150 nm, for example.

At this time, the tantalum pattern layer 32x remaining under the gate insulating layer 34 becomes the gate electrodes 32a and 32b. In this manner, a gate electrode 32 a for a switching TFT (Thin Film Transistor) (hereinafter referred to as Sw-TFT) and a gate insulating layer 34 covering the gate electrode 32 a are formed on the barrier insulating layer 30. At the same time, a gate electrode 32 b for a driving TFT (hereinafter referred to as Dr-TFT) and a gate insulating layer 34 covering the gate electrode 32 b are formed on the barrier insulating layer 30. The relative permittivity of the tantalum oxide layer obtained by anodization is about 24, and the silicon oxide layer (SiO ₂ (relative permittivity: 3.9)) or silicon nitride layer (SiN _x (relative permittivity: 7)) is used. A gate insulating layer 34 having a higher dielectric constant than that used is obtained.

  The inventor of the present application investigated the roughness of each surface of the tantalum layer and the tantalum oxide layer formed under the above-described conditions using an atomic force microscope (AFM). As shown in FIG. 10, it was found that the surface of the tantalum layer before anodic oxidation was relatively rough and had micro unevenness of about 20 nm. On the other hand, as shown in FIG. 11, it was found that the surface of the tantalum oxide layer obtained by anodic oxidation has much less irregularities than the surface of the tantalum layer and has excellent flatness.

  As described above, the tantalum oxide layer obtained by anodizing the tantalum pattern layer has excellent surface flatness, and can be used as a gate insulating layer for a highly reliable high-performance TFT.

  In addition to tantalum, metals covered with an oxide film by anodization include aluminum (Al), niobium (Nb), titanium (Ti), hafnium (Hf), and zirconium (Zr), which are called valve metals. It is. In this embodiment, in addition to tantalum, the valve metal layer as described above may be anodized to form the gate insulating layer 34 and the gate electrodes 32a and 32b.

  Next, returning to FIG. 3B, the subsequent manufacturing method will be described. By processing the portions of the interlayer insulating layer 28 and the barrier insulating layer 30 on the required portions of the pixel electrode 26, the depth reaching the pixel electrode 26 is reached. The via hole VH is formed. In the via hole VH, after a resist pattern (not shown) having an opening is formed on the barrier insulating layer 30, the barrier insulating layer 30 and the interlayer insulating layer 28 are etched by dry etching or the like through the opening. It is formed.

  Subsequently, as shown in FIG. 4A, a chromium (Cr) layer and gold are formed on the upper surface side of the structure of FIG. 3B (on the barrier insulating layer 30 and the gate insulating layer 34 and in the via hole VH). After sequentially forming (Au) layers to form a metal layer, the metal layer is patterned by photolithography and etching. Accordingly, the source electrode 36a and the drain electrode 36b for the Sw-TFT are formed to extend from the upper surface end side to the side surface of the gate insulating layer 34 covering the gate electrode 32a.

  At the same time, a source electrode 36x and a drain electrode 36y for the Dr-TFT are formed extending from the upper surface end side to the side surface of the gate insulating layer 34 covering the gate electrode 32b. Further, the drain electrode 36y for the Dr-TFT is formed by being electrically connected to the pixel electrode 26 through the via hole VH.

  Next, as shown in FIG. 4B, an organic active layer 38 made of an organic semiconductor having a thickness of about 50 nm is formed on the entire top surface of the structure of FIG. As a material of the organic active layer 38, pentacene, sexithiophene, polythiophene, or the like is preferably used.

Further, as shown in FIG. 4C, a parylene (polyparaxylylene) resin layer 40 is formed on the organic active layer 38 by a vacuum deposition method or the like. Subsequently, as shown in FIG. 5A, an inorganic insulating layer 42 made of a silicon oxide layer (SiO ₂ ) or the like is formed on the parylene resin layer 40.

  Subsequently, as shown in FIG. 5B, a resist pattern 15 corresponding to the gate insulating layer 34 for Sw-TFT and Dr-TFT is formed on the inorganic insulating layer 42. Further, as shown in FIG. 5C, the resist pattern 15 is removed after etching the inorganic insulating layer 42, the parylene resin layer 40 and the organic active layer 38 using the resist pattern 15 as a mask.

  As a result, the Sw-TFT organic active layer 38a, the cap protective layer 40a made of the parylene resin layer 40, and the inorganic insulating layer 42 are formed on the Sw-TFT source electrode 36a, drain electrode 36b, and gate insulating layer 34. A cap barrier layer 42a is obtained by patterning. At the same time, the Dr-TFT organic active layer 38b, the cap protective layer 40b, and the cap barrier layer 42b are patterned on the source electrode 36x, the drain electrode 36y, and the gate insulating layer 34 for the Dr-TFT.

  At this time, the organic active layers 38a and 38b are covered and protected by the cap barrier layers 42a and 42b (inorganic insulating layers) and the cap protective layers 40a and 40b (parylene resin layers), so that they are wet in the photolithography process. Performance degradation due to processing or plasma is prevented. Note that the resist pattern 15 may be left without being removed.

  Thereby, the Sw-TFT 5 including the gate electrode 32a, the gate insulating layer 34, the source electrode 36a and the drain electrode 36b, and the organic active layer 38a electrically connected to the source electrode 36a and the drain electrode 36b is obtained. In addition, the Dr-TFT 6 including the gate electrode 32b, the gate insulating layer 34, the source electrode 36x and the drain electrode 36y, and the organic active layer 38b electrically connected to the source electrode 36x and the drain electrode 36y is obtained. The drain electrode 36y of the Dr-TFT 6 is electrically connected to the pixel electrode 26 disposed below the Dr-TFT 6 through the via hole VH.

  In this embodiment, since the Sw-TFT 5 and the Dr-TFT 6 are formed on the heat-resistant glass substrate 10, a desired TFT can be obtained with high alignment accuracy, unlike the case where it is directly formed on a plastic film. . Further, as described above, since the flatness of the surface of the gate insulating layer 34 is excellent, it is possible to obtain a highly reliable high-performance Sw-TFT 5 and Dr-TFT 6.

  For example, the channel length (the distance between the source electrode and the drain electrode) of the Sw-TFT 5 is set to 50 μm, and the channel width (the length in the direction orthogonal to the channel length) is set to 100 μm. Further, the channel length of the Dr-TFT 6 is set to 50 μm, and the channel width is set to 1000 μm.

  The organic active layers 38a and 38b, the cap protective layers 40a and 40b, and the cap barrier layers 42a and 42b may be formed by patterning by a mask vapor deposition method. The mask vapor deposition method is a method of forming a pattern simultaneously with film formation by moving a shadow mask with high accuracy in a vacuum vapor deposition apparatus. The patterned organic active layer 38a, 38b, cap protective layers 40a and 40b, and cap barrier layers 42a and 42b can be stacked in sequence.

  For this reason, there is no possibility that the performance of the organic active layers 38a and 38b deteriorates in the photolithography process. Alternatively, the organic active layers 38a and 38b may be patterned by an ink jet method.

  Here, the inventor of the present application investigated the drain current (Id) -drain voltage (Vd) characteristics of the TFT using the tantalum oxide layer (relative dielectric constant: 24) obtained by the anodic oxidation of this embodiment as a gate insulating layer. (FIG. 12). As a comparative example, the drain current (Id) -drain voltage (Vd) characteristics of a TFT using a silicon oxide layer (relative dielectric constant: 3.9) as a gate insulating layer were investigated (FIG. 13). 12 and 13, the drain current (Id) -drain voltage (Vd) characteristics when the gate voltage (Vg) is changed are shown. Note that pentacene having high mobility was used as the organic active layer of the TFT.

  As is clear from the comparison between FIGS. 12 and 13, it can be seen that the TFT of this embodiment can obtain a large drain current at a lower drain voltage than the TFT of the comparative example. In the TFT of this embodiment, a drain current that is two orders of magnitude larger than that of the TFT of the comparative example is obtained with a drain voltage of 1/5. As described above, in the TFT according to the present embodiment, a gate insulating layer having a high dielectric constant can be used, so that the operating voltage can be reduced and a low Vg can be used, and the mutual conductance serving as an index of amplification characteristics can be increased. Therefore, a high-performance TFT can be configured.

Subsequently, returning to the description of the manufacturing method, the manufacturing method after FIG. 5C will be described. As shown in FIG. 6A, protective insulation covering the Sw-TFT 5 and the Dr-TFT 6 is provided. A layer 44 (second insulating layer) is formed. As the protective insulating layer 44, a laminate of a parylene layer and an inorganic insulating layer such as a silicon oxide layer (SiO _x ), a silicon nitride layer (SiN _x ), or a silicon oxynitride layer (SiON) that can block entry of water vapor or gas. A film is preferably used and formed by a CVD method or a vacuum deposition method. Or you may form the protective insulating layer 44 from organic resin layers, such as polyimide resins other than parylene, an epoxy resin, an acrylic resin, polyvinyl alcohol, or polyparaxylene.

  After that, as shown in FIG. 6B, the plastic film 20 is disposed on the upper surface of the protective insulating layer 44 in FIG. Further, the adhesive layer 46 is cured by heat treatment, and the plastic film 20 is bonded onto the structure shown in FIG. As the plastic film 20, a polyethersulfone film or a polycarbonate film having a film thickness of 100 to 200 μm is preferably used.

  Note that, when the protective insulating layer 44 is formed by a CVD method or a vacuum evaporation method, a process becomes complicated in order to flatten the steps of the Sw-TFT 5 and the Dr-TFT 6, so that the protective insulating layer 44 has a step on its upper surface. Is often formed. However, since the level difference of the protective insulating layer 44 can be eliminated by being embedded in the adhesive layer 46, the plastic film 20 is bonded with the upper surface of the adhesive layer 46 being flat.

  Subsequently, as shown in FIG. 7A, the roll 17 is fixed to one end of the plastic film 20, and the glass substrate 10 is peeled while the roll 17 is rotated. At this time, it peels along the interface (A part of Fig.7 (a)) of the glass substrate 10 and the peeling layer 22, and the glass substrate 10 is discarded.

  FIG. 7B shows a state where the glass substrate 10 removed from the structure of FIG. 7A is turned upside down. As shown in FIG. 7B, an adhesive layer 46, a protective insulating layer 44, and cap barrier layers 42a, 42b and cap protective layers 40a, 40b are provided on the plastic film 20 in order from the bottom. Sw-TFT 5 and Dr-TFT 6, barrier insulating layer 30, interlayer insulating layer 28, pixel electrode 26, base barrier layer 24, and release layer 22 are transferred and formed.

Thereafter, as shown in FIG. 8, the underlying barrier layer 24 is exposed by removing the release layer 22 with oxygen gas plasma or the like. Further, the underlying barrier layer 24 is removed by etching with CF ₄ plasma or the like, thereby exposing the pixel electrode 26.

  As described above, the flexible TFT substrate 1 of the present embodiment is obtained.

  As shown in FIG. 8, in the flexible TFT substrate 1 of this embodiment, an adhesive layer 46 and a protective insulating layer 44 (lower insulating layer) are sequentially formed on the plastic film 20. A Sw-TFT 5 and a Dr-TFT 6 are embedded in the protective insulating layer 44, and the barrier insulating layer 30 is formed thereon.

  The Sw-TFT 5 includes an organic active layer 38a, a source electrode 36a and a drain electrode 36b, a gate insulating layer 34, and a gate electrode 32a formed in this order from the bottom, and a cap protection is provided on the lower surface of the organic active layer 38a. A layer 40a and a cap barrier layer 42a (cap insulating layer) are provided. Similarly, in the Dr-TFT 6, the organic active layer 38b, the source electrode 36x and the drain electrode 36y, the gate insulating layer 34, and the gate electrode 32b are formed in order from the bottom, and the lower surface of the organic active layer 38b is formed. Are provided with a cap protective layer 40b and a cap barrier layer 42b.

Each of the gate insulating layers 34 of the Sw-TFT 5 and the Dr-TFT 6 was obtained by anodizing the tantalum pattern layer 32x constituting the gate electrodes 32a and 32b, and remained without anodizing the tantalum pattern layer 32x. The portions are gate electrodes 32a and 32b.
In this embodiment, as described above, since a tantalum oxide layer obtained by anodic oxidation is used as the gate insulating layer 34, high-performance TFTs 5 and 6 are configured.

  In this embodiment, since the transfer technique described above is adopted, the Sw-TFT 5 and the Dr-TFT 6 are in a state in which the Sw-TFT 5 and the Dr-TFT 6 formed on the barrier insulating layer 30 are turned upside down. Has been placed.

  Therefore, in the Sw-TFT 5 and the Dr-TFT 6, the gate electrodes 32 a and 32 b are disposed so as to protrude downward from the lower surface of the barrier insulating layer 30 with the upper surfaces thereof being flush with the upper surface of the protective insulating layer 44. Yes. The lower and side surfaces of the gate electrodes 32a and 32b are covered with the gate insulating layer 34. Furthermore, the source electrodes 36a and 36x and the drain electrodes 36b and 36y extend upward from between the organic active layers 38a and 38b and the gate insulating layer 34 to the sides of the gate electrodes 32a and 32b, respectively.

  Organic active layers 38a and 38b are disposed below the source electrodes 36a and 36x and the drain electrodes 36b and 36y, and the organic active layers 38a and 38b between the source electrodes 36a and 36x and the drain electrodes 36b and 36y, The portion 38b is a TFT channel portion that contacts the gate insulating layer 34.

  Further, an interlayer insulating layer 28 is formed on the barrier insulating layer 30, and the pixel electrode 26 is formed to be buried in the interlayer insulating layer 28 with its upper surface exposed. The upper surfaces of the pixel electrode 26 and the interlayer insulating layer 28 are flattened to be the same surface. In the present embodiment, the interlayer insulating layer 28 and the barrier insulating layer 30 constitute an upper insulating layer. In addition, a via hole VH is provided in a portion of the interlayer insulating layer 28 and the barrier insulating layer 30 below a required portion of the pixel electrode 26. The drain electrode 36y of the Dr-TFT 6 is electrically connected to the pixel electrode 26 through the via hole VH.

  By adopting such a configuration, the pixel electrode 26 can be disposed in the entire region of each pixel unit without limiting the region in which the pixel electrode 26 is disposed by the Sw-TFT 5 and the Dr-TFT 6. The area of the pixel electrode 26 can be increased by arranging the pixel electrode 26 in the entire region.

  Further, since the organic active layers 38a and 38b are disposed between the barrier insulating layer 30 and the protective insulating layer 44, water vapor from outside air or moisture in the plastic film 20 can enter the organic active layers 38a and 38b. A highly reliable flexible TFT substrate is formed.

  FIG. 9 shows a flexible TFT substrate 1x according to a modification of the present embodiment. As shown in FIG. 9, unlike the flexible TFT substrate 1 of FIG. 8, when a high aperture ratio is not required, the pixel electrode 26 is arranged in the lateral direction of the Sw-TFT 5 and the Dr-TFT 6 to protect the protective insulating layer 44. It may be formed by being embedded in (lower insulating layer). Similarly, the pixel electrode 26 is connected to the drain electrode 36 y of the Dr-TFT 6.

  When the modified flexible TFT substrate 1x is employed, the interlayer insulating layer 28 and the barrier insulating layer 30 are omitted in FIG. 4A of the manufacturing method of the flexible TFT 1 described above, and the gate is formed on the base barrier layer 24. The electrodes 32a and 32b, the gate insulating layer 34, the source electrodes 36a and 36x, the drain electrodes 36b and 36y, and the pixel electrode 26 connected to the drain electrode 36y are formed.

  As described above, the pixel electrode 26 may be disposed in the pixel while being electrically connected to the drain electrode 36y of the Dr-TFT 6, and may be disposed so as to overlap the TFTs 5 and 6 above. The TFTs 5 and 6 may be arranged so as not to overlap with each other in the lateral direction.

  Next, a method for manufacturing an organic EL display using the flexible TFT substrate 1 of the present embodiment will be described. FIG. 14 is a cross-sectional view showing a method for manufacturing a flexible organic EL display according to the first embodiment of the present invention, and FIG. 15 is a cross-sectional view showing the flexible organic EL display.

  As shown in FIG. 14, first, a hole transport layer 52 having a film thickness of, for example, 30 nm is selectively formed on the pixel electrode 26 exposed on the upper surface side of the flexible TFT substrate 1 of FIG. . As the hole transport layer 52, α-NPD which is an aromatic tertiary amine derivative is preferably used. Further, as shown in FIG. 14, a low molecular light emitting layer 54 having a film thickness of, for example, 70 nm is selectively formed on the hole transport layer 52 by a mask vapor deposition method.

  In the present embodiment, an example in which the light emitting layer 54 of three primary colors is formed to form a full color is illustrated, so that the three primary colors (red (R), green (G), and blue (B) are described later with reference to FIG. ), A red light emitting layer, a green light emitting layer, and a blue light emitting layer are formed on the hole transport layer 52 of each pixel portion. As the low molecular light emitting layer 54, a host material mixed with a doping material is used, and the doping material (molecule) emits light. Examples of the host material include Alq3 and a distyrylarylene derivative (DPVBi), and examples of the doping material include green-emitting coumarin 6 and red-emitting DCJTB.

  Subsequently, as shown in FIG. 14, an electron transport layer 56 is formed on the light emitting layer 54 by mask vapor deposition. As the electron transport layer 56, quinolinol aluminum complex (Alq3) or the like is preferably used.

  Alternatively, the hole transport layer 52, the light emitting layer 54, and the electron transport layer 56 may be formed by an inkjet method.

  Thereby, the organic EL layer 50 comprised by the positive hole transport layer 52, the light emitting layer 54, and the electron carrying layer 56 is obtained.

  Note that only one of the hole transport layer 52 and the electron transport layer 56 may be formed, or both the hole transport layer 52 and the electron transport layer 56 may be omitted.

  Further, as shown in FIG. 14, a counter electrode 58 facing the pixel electrode 26 is formed on the electron transport layer 56 by mask vapor deposition. The counter electrode 58 is formed as a common electrode.

  As the counter electrode 58, a transparent electrode such as an ITO layer may be used, or an opaque electrode such as a lithium fluoride / aluminum (LiF / Al) laminated film may be used. When the counter electrode 58 is formed of a transparent electrode, an electrode in which a BCP layer, a BCP layer containing CS, or an ultrathin Al layer is formed below the ITO layer is preferably used.

  In the present embodiment, a mode in which light is emitted on the upper side of FIG. 14 is shown. Therefore, the pixel electrode 26 is formed from an opaque electrode, and the counter electrode 58 is formed from a transparent electrode. On the other hand, when light is emitted to the lower side of FIG. 14, the pixel electrode 26 is formed from a transparent electrode, and the counter electrode 58 is formed from an opaque electrode. Thereby, the organic EL element 2 comprised by the pixel electrode 26, the organic EL layer 50, and the counter electrode 58 is obtained.

  As described above, in this embodiment, in the step of forming the organic active layers 38a and 38b, the organic active layers 38a and 38b are protected by the cap protection layers 40a and 40b and the cap barrier layers 42a and 42b. Even if is used, there is no possibility that the performance of the organic active layers 38a and 38b is deteriorated. Further, since the organic EL layer 50 is formed without using photolithography, the performance of the organic EL layer 50 is not deteriorated.

Thereafter, as shown in FIG. 15, a sealing layer 59 covering the organic EL element 2 is formed. As the sealing layer 59, a silicon oxide layer (SiO _x ), a silicon nitride layer (SiN _x ), or the like is used. For example, the sealing layer 59 is formed by low-temperature CVD at a film forming temperature of about 100 ° C. Or it is good also as the sealing layer 59 by sticking the resin film in which the moisture-proof layer was formed.

  Thus, the flexible organic EL display 3 according to the first embodiment of the present invention is completed.

  FIG. 16 illustrates the three primary color pixel portions (red pixel portion (R), green pixel portion (G), and blue pixel portion (B)) of the flexible organic EL display 3 of the first embodiment. As shown in FIG. 16, in each of the three primary color pixel portions (R), (G), and (B), the above-described Sw-TFT 5 and the drain electrode 36y are connected to the pixel electrode 26 via the via hole VH. Each of the TFTs 6 is disposed.

  The organic EL layer 50 described above is formed on the pixel electrode 26 of each pixel portion (R), (G), (B), and each pixel portion (R), (G), (B ), A red light emitting layer 54R, a green light emitting layer 54G, and a blue light emitting layer 54B are respectively provided. These light emitting layers 54R, 54G, and 54B are obtained by being sequentially formed by a mask vapor deposition method. Alternatively, the red light emitting layer 54R, the green light emitting layer 54G, and the blue light emitting layer 54B may be separately applied by an inkjet method. A pixel portion (sub-pixel) of three primary colors constitutes a pixel as a display unit. Since other elements are the same as those in FIG. 15, the same reference numerals are given and description thereof is omitted.

  FIG. 17 is a diagram showing an equivalent circuit of the pixel portion of the flexible organic EL display of the first embodiment of the present invention, and FIG. 18 is a plan view showing an example of the layout of the pixel portion in the flexible display of the first embodiment of the present invention. is there.

  The equivalent circuit of FIG. 17 will be described with reference to the plan view of FIG. 18 as appropriate. The counter electrode 58 (cathode) of the organic EL element 2 is connected to the ground (GND) 66 and the pixel electrode 26 (anode) of the organic EL element 2 is connected. ) Is connected to the drain electrode 36y of the Dr-TFT 6 through the via hole VH. The source electrode 36 x of the Dr-TFT 6 is connected to a power supply (Vdd) line 60.

  Further, a storage capacitor Cs is formed between the gate electrode 32 b of the Dr-TFT 6 and the power supply (Vdd) line 60. Further, the drain electrode 36 b of the Sw-TFT 5 is connected to the gate electrode 32 b of the Dr-TFT 6, and the source electrode 36 a of the Sw-TFT 5 is connected to the data line 62. Further, the gate electrode 32 a of the Sw-TFT 5 is connected to the scanning line 64.

  The equivalent circuit of FIG. 17 operates as follows. First, when the potential of the scanning line 64 is selected and a writing potential is applied to the scanning line 64, the Sw-TFT 5 is turned on to charge or discharge the storage capacitor Cs, and the gate potential of the Dr-TFT 6 becomes the writing potential. Next, when the potential of the scanning line 64 is set to a non-selected state, the scanning line 64 and the Dr-TFT 6 are electrically disconnected, but the gate potential of the Dr-TFT 6 is stably held by the storage capacitor Cs.

  Then, the current flowing through the Dr-TFT 6 and the organic EL element 2 has a value corresponding to the gate-source voltage of the Dr-TFT 6, and the organic EL element 2 continues to emit light with the luminance corresponding to the current value.

  An active matrix organic EL display can be configured by arranging a plurality of pixels having such a configuration in a matrix and repeating writing through the data lines 62 while sequentially selecting the scanning lines 64. In this manner, light of a predetermined color is emitted from the light emitting layers 54R, 54G, 54B of the pixel portions (R), (G), (B) to the outside, and a color image is obtained (FIG. 16). Arrow direction).

  In the present embodiment, as shown in FIG. 18, pixel electrodes 26 (regions surrounded by thick lines) are respectively arranged on the entire pixel portions defined by the scanning lines 64, the data lines 62, and the power supply (Vdd) lines 60. In addition, the Sw-TFT 5 and the Dr-TFT 6 are arranged in a state of being overlapped under the pattern region of the pixel electrode 26.

  In particular, when light is emitted on the upper side of the display as shown in FIG. 16, the light amount is not affected at all by the arrangement of the Sw-TFT 5 and the Dr-TFT 6, so that the aperture ratio (occupation ratio of the light emitting part) is remarkably improved. be able to. As a result, it is possible to increase the brightness and definition of the flexible organic EL display.

  18 is a layout for improving the aperture ratio of the display. As described above, when the high aperture ratio is not considered, the flexible TFT substrate 1x of the modification shown in FIG. 9 is used. Is used, and the pixel electrode 26 (organic EL element 2) is arranged in the lateral direction so as not to overlap the Sw-TFT 5 and the Dr-TFT 6.

  Further, a white light emitting layer is formed as the light emitting layer 54, and between the pixel electrode 26 and the Sw-TFT 5 and the Dr-TFT 6 (between the interlayer insulating layer 28 and the barrier insulating layer 30) as in the second embodiment described later. A color filter layer may be formed to achieve full color. In this case, the via hole VH is formed in the interlayer insulating layer 28, the color filter layer, and the barrier insulating layer 30. Further, in this embodiment, since it is necessary to design so that light is emitted to the lower side of FIG. 16 (opposite to the direction of the arrow), the pixel electrode 26 is formed of a transparent conductive layer, and the counter electrode 58 is It is formed from an opaque conductive layer.

(Second Embodiment)
19 to 22 are cross-sectional views showing a method for manufacturing a flexible liquid crystal display according to the second embodiment of the present invention, and FIG. 23 is a cross-sectional view showing the flexible liquid crystal display. The second embodiment exemplifies a mode in which the flexible TFT substrate according to the embodiment of the present invention is applied to a liquid crystal display. In the second embodiment, detailed description of the same steps as those in the first embodiment is omitted. Moreover, the same code | symbol is attached | subjected to the same element and the description is abbreviate | omitted.

  As shown in FIG. 19A, first, a peeling layer 22, a base barrier layer 24, and a pixel electrode 26 are formed on a glass substrate 10, and the same structure as in FIG. 1C of the first embodiment. Get. Next, as shown in FIG. 19B, after forming an interlayer insulating layer 28 that covers the pixel electrode 26, a color filter layer 29 is formed on the interlayer insulating layer 28 corresponding to the pixel electrode 26.

  In the present embodiment, an example in which the color filter layer 29 is full-colored is illustrated. Although only one pixel portion is shown in FIG. 19B, the pixel electrodes 26 of the three primary color pixel portions (R), (G), and (B) as shown in FIG. 16 of the first embodiment. A red (R) color filter layer, a green (G) color filter layer, and a blue (B) color filter layer are respectively formed on the substrate.

  A pixel portion (sub-pixel) of three primary colors constitutes a pixel as a display unit. Each of the three primary color filter layers 29 is formed by sequentially patterning, for example, a pigment dispersion type photosensitive coating film by photolithography. Further, the barrier insulating layer 30 is formed on the color filter layer 29.

  The color filter layer 29 may be omitted, and a field color sequential drive type liquid crystal display that performs full color display by switching the three primary colors of the backlight in a time-division manner may be used.

  Next, as shown in FIG. 19C, a tantalum pattern layer is formed on the barrier insulating layer 30 by the same method as in the first embodiment, and then the surface layer portion is anodized to obtain a TFT-use layer. A gate electrode 32 and a gate insulating layer 34 covering the gate electrode 32 are formed. Further, as shown in FIG. 19D, via holes VH are formed in the portions of the interlayer insulating layer 28, the color filter layer 29, and the barrier insulating layer 30 on the required portions of the pixel electrode 26 by photolithography and etching.

  Subsequently, as shown in FIG. 20A, the source electrode 36a and the drain electrode 36b for TFT are formed from the upper surface end side to the side surface of the gate insulating layer 34 by the same method as in the first embodiment. The drain electrode 36b is electrically connected to the pixel electrode 26 through the via hole VH. Further, the organic active layer 38, the cap protection layer 40, and the cap barrier layer 42 are formed on the portion corresponding to the gate electrode 32 by the same method as in the first embodiment.

  Thereby, as in the first embodiment, the switching TFT 7 including the gate electrode 32, the gate insulating layer 34, the source electrode 36a and the drain electrode 36b, and the organic active layer 38 is formed. In the second embodiment, since a liquid crystal display is configured, one TFT 7 is provided in each pixel portion. Further, a protective insulating layer 44 in which the TFT 7 is embedded is formed.

  Next, as shown in FIG. 20B, the plastic film 20 is bonded onto the protective insulating layer 44 via the adhesive layer 46 by the same method as in the first embodiment. Further, as shown in FIG. 21A, as in the first embodiment, the glass substrate 10 is discarded from the interface between the glass substrate 10 and the release layer 22. FIG. 21A shows a state in which the structure in which the glass substrate 10 is discarded is turned upside down.

  Subsequently, as shown in FIG. 21B, the pixel electrode 26 is exposed by removing the peeling layer 22 and the underlying barrier layer 24 by the same method as in the first embodiment. Further, as shown in FIG. 22, an alignment film 25 for aligning liquid crystal is formed on the pixel electrode 26. Thereby, a plexable TFT substrate 1a for a liquid crystal display is obtained.

  As shown in FIG. 22, in the flexible TFT substrate 1a for a liquid crystal display, a plastic film 20 is used as a substrate, and an adhesive layer 46 and a protective insulating layer 44 are sequentially formed thereon. A TFT 7 having the same configuration as that of the first embodiment is embedded in the protective insulating layer 44. For example, the channel length of the TFT 7 is set to 20 μm and the channel width is set to 400 μm.

  Further, a barrier insulating layer 30, a color filter layer 29, an interlayer insulating layer 28, and a pixel electrode 26 are sequentially provided on the TFT 7. The drain electrode 36 b of the TFT 7 is electrically connected to the pixel electrode 26 through a via hole VH provided in the barrier insulating layer 30, the color filter layer 29 and the interlayer insulating layer 28. An alignment film 25 is provided on the pixel electrode 26.

  Thus, also in the flexible TFT substrate 1a for the liquid crystal display, the pixel electrode 26 is arranged in the entire region of each pixel portion and the TFT 7 is overlapped with the pixel electrode 26 as in FIG. 18 of the first embodiment. Therefore, a high aperture ratio can be obtained.

  In the second embodiment, the pixel electrode 26 may be arranged in the lateral direction of the TFT 7 and embedded in the protective insulating layer 44 as in the flexible TFT substrate 1x of the modification of the first embodiment.

  Subsequently, as shown in FIG. 23, a counter substrate 1b arranged to face the flexible TFT substrate 1a is prepared. The counter substrate 1b is basically composed of a plastic film 20a, a common electrode 26a made of ITO or the like formed thereon, and an alignment film 25a formed thereon.

  Then, the flexible TFT substrate 1a and the counter substrate 1b are bonded to each other with a sealant (not shown) provided in the periphery in a state where a predetermined interval is secured by a spacer, and the flexible TFT substrate 1a and the counter substrate 1b are further bonded. The liquid crystal 23 is sealed in the gap.

  Thus, the flexible liquid crystal display 4 of the second embodiment is completed.

  In the flexible liquid crystal display 4 of the second embodiment, as in the first embodiment, the tantalum oxide layer obtained by anodizing the surface portion of the tantalum pattern layer is used as the gate insulating layer 34 of the TFT 7. A high-performance TFT with a high level can be formed.

  In addition, although the example which applies the flexible TFT substrate of this embodiment to an organic EL display or a liquid crystal display was demonstrated, it can apply to various displays, such as electronic paper using an electrophoresis system.

1A to 1D are sectional views (No. 1) showing a method for manufacturing a flexible TFT substrate according to a first embodiment of the present invention. 2A and 2B are sectional views (No. 2) showing the method for manufacturing the flexible TFT substrate according to the first embodiment of the present invention. 3A and 3B are sectional views (No. 3) showing the method for manufacturing the flexible TFT substrate according to the first embodiment of the present invention. 4A to 4C are cross-sectional views (part 4) showing the method for manufacturing the flexible TFT substrate of the first embodiment of the present invention. 5A to 5C are sectional views (No. 5) showing the method for manufacturing the flexible TFT substrate according to the first embodiment of the present invention. 6A and 6B are cross-sectional views (No. 6) showing the method for manufacturing the flexible TFT substrate of the first embodiment of the present invention. 7A and 7B are cross-sectional views (No. 7) showing the method for manufacturing the flexible TFT substrate of the first embodiment of the present invention. FIG. 8 is a sectional view showing the flexible TFT substrate according to the first embodiment of the present invention. FIG. 9 is a sectional view showing a flexible TFT substrate according to a modification of the first embodiment of the present invention. FIG. 10 shows the flatness of the surface of the tantalum oxide layer. FIG. 11 is a diagram showing the flatness of the tantalum oxide layer obtained by anodic oxidation. FIG. 12 is a diagram showing drain current (Id) / drain voltage (Vd) characteristics of the TFT of this embodiment. FIG. 13 is a diagram showing the drain current (Id) / drain voltage (Vd) characteristics of the TFT of the comparative example. FIG. 14 is a cross-sectional view showing a state in which an organic EL element is formed on the flexible TFT substrate of the first embodiment of the present invention. FIG. 15 is a cross-sectional view showing the flexible organic EL display according to the first embodiment of the present invention. FIG. 16 is a cross-sectional view showing a red pixel portion (R), a green pixel portion (G), and a blue pixel portion (B) of the flexible organic EL display according to the first embodiment of the present invention. FIG. 17 is a diagram showing an equivalent circuit of one pixel portion of the flexible organic EL display according to the first embodiment of the invention. FIG. 18 is a plan view showing an example of the layout of the pixel portion in the flexible organic EL display according to the first embodiment of the invention. 19A to 19D are cross-sectional views (part 1) showing the method for manufacturing the flexible liquid crystal display according to the second embodiment of the present invention. 20A and 20B are sectional views (No. 2) showing the method for manufacturing the flexible liquid crystal display according to the second embodiment of the present invention. 21A and 21B are sectional views (No. 3) showing the method for manufacturing the flexible liquid crystal display according to the second embodiment of the present invention. FIG. 22 is a sectional view (No. 4) showing the method for manufacturing the flexible liquid crystal display according to the second embodiment of the present invention. FIG. 23 is a sectional view showing a flexible liquid crystal display according to a second embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,1x ... Flexible TFT substrate (for organic EL display), 1a ... Flexible TFT substrate (for liquid crystal display), 1b ... Opposite substrate, 2 ... Organic EL element, 3 ... Flexible organic EL display, 4 ... Flexible liquid crystal display, 5 ... Sw-TFT, 6 ... Dr-TFT, 7 ... TFT, 10 ... Glass substrate, 15, 33 ... Resist pattern, 17 ... Roll, 20, 20a ... Plastic film, 22 ... Peeling layer, 23 ... Liquid crystal, 24 ... Base Barrier layer, 25, 25a ... alignment film, 26 ... pixel electrode, 26a ... common electrode, 28 ... interlayer insulating layer, 29 ... color filter layer, 30 ... barrier insulating layer, 32 ... tantalum layer, 32x ... tantalum pattern layer, 32a 32b ... gate electrode, 34 ... gate insulating layer, 36a, 36x ... source electrode, 36b, 36y Drain electrode, 38a, 38b ... organic active layer, 40a, 40b ... cap protective layer (parylene resin layer), 42a, 42b ... cap barrier layer (inorganic insulating layer), 44 ... protective insulating layer, 46 ... adhesive layer, 50 ... Organic EL layer, 52 ... hole transport layer, 54 ... light emitting layer, 56 ... electron transport layer, VH ... via hole.

Claims (17)

An active matrix flexible TFT substrate in which a TFT is provided for each pixel,
Plastic film,
An adhesive layer formed on the plastic film;
A lower insulating layer formed on the adhesive layer;
The TFT embedded in the lower insulating layer, the TFT comprising an organic active layer, a source electrode and a drain electrode, a gate insulating layer, and a gate electrode in order from the bottom;
A pixel electrode electrically connected to a drain electrode of the TFT and provided in the pixel;
The flexible TFT substrate, wherein the gate insulating layer of the TFT comprises a metal oxide layer obtained by anodizing a surface portion of a metal pattern layer constituting the gate electrode.   The flexible TFT substrate according to claim 1, wherein the metal pattern layer constituting the gate electrode is a tantalum layer, and the gate insulating layer is a tantalum oxide layer. An upper insulating layer formed on the TFT;
The pixel electrode is formed to be embedded in the upper insulating layer, the TFT is disposed at a position overlapping the pattern region of the pixel electrode, and the pixel electrode is connected via a via hole provided in the upper insulating layer. The flexible TFT substrate according to claim 1, wherein the flexible TFT substrate is electrically connected to a drain electrode of the TFT.   The gate electrode of the TFT is arranged such that the upper surface thereof is flush with the upper surface of the lower insulating layer, and the source electrode and the drain electrode are disposed between the organic active layer and the gate insulating layer. The flexible TFT substrate according to claim 1, wherein the flexible TFT substrate extends upward from a side of the gate electrode to a side of the gate electrode.   4. The flexible TFT substrate according to claim 3, wherein each upper surface of the pixel electrode and the upper insulating layer is flattened to be the same surface. 5. The lower insulating layer is a protective layer made of an inorganic insulating layer or an organic insulating layer,
The upper insulating layer is composed of a barrier insulating layer made of an inorganic insulating layer and an interlayer insulating layer made of an organic insulating layer formed on the barrier insulating layer,
The flexible TFT substrate according to claim 3, wherein the pixel electrode is embedded in the interlayer insulating layer.   The flexible TFT substrate according to any one of claims 1 to 3, wherein a cap insulating layer for protecting the organic active layer is provided on a lower surface of the organic active layer of the TFT. A flexible TFT substrate according to any one of claims 1 to 7,
An organic EL layer formed on the pixel electrode of the flexible TFT substrate;
A counter electrode formed on the organic EL layer;
A flexible display comprising: a sealing layer covering the counter electrode.   9. The TFT includes a switching TFT and a driving TFT connected to the switching TFT, and the drain electrode of the driving TFT is connected to the pixel electrode. A flexible display according to 1.   The pixel is defined by a red pixel portion, a green pixel portion, and a blue pixel portion, and the organic EL layer is formed in a red (R) light emitting layer formed in the red pixel portion and the green pixel portion. The flexible display according to claim 8, further comprising: a green (G) light emitting layer; and a blue (B) light emitting layer formed in the blue pixel portion. The organic EL layer is
A light emitting layer;
It is constituted by at least one of a hole transport layer formed between the pixel electrode and the light-emitting layer and an electron transport layer formed between the light-emitting layer and the counter electrode. The flexible display according to claim 8. A flexible TFT substrate having a structure including a first alignment film on the pixel electrode of the flexible TFT substrate according to any one of claims 1 to 7,
A counter substrate, which is disposed by being bonded to the flexible TFT substrate at a predetermined interval, and includes a common electrode and a second alignment film on a plastic film;
A flexible display comprising: a liquid crystal sealed between the flexible TFT substrate and the counter substrate. An active matrix flexible TFT substrate manufacturing method in which a TFT is provided for each pixel,
Forming a release layer on the temporary substrate;
Above the release layer, in order from the bottom, a gate electrode made of a metal pattern layer, a gate insulating layer made of a metal oxide layer obtained by anodizing the surface layer portion of the metal pattern layer, a source electrode and a drain electrode Forming a TFT composed of an organic active layer and forming a pixel electrode electrically connected to the drain electrode of the TFT;
Forming a second insulating layer on the TFT;
Adhering a plastic film on the second insulating layer via an adhesive layer;
By peeling the temporary substrate from the interface with the release layer, the second insulating layer, the TFT, the pixel electrode, and the release layer are transferred and formed on the plastic film via the adhesive layer. And a process of
And a step of exposing the pixel electrode by removing the release layer. The step of forming the TFT and the pixel electrode includes:
Forming the pixel electrode above the release layer;
Forming a first insulating layer on the pixel electrode;
Forming the metal pattern layer on the first insulating layer;
The surface layer portion of the metal pattern layer is anodized to form a metal oxide layer, thereby obtaining the gate electrode made of the metal pattern layer and the gate insulating layer made of the metal oxide layer and covering the gate electrode. Process,
Forming a via hole reaching the pixel electrode in a required portion of the first insulating layer;
Forming the source electrode and the drain electrode connected to the pixel electrode through the via hole on the gate insulating layer covering the gate electrode;
The method according to claim 13, further comprising: forming the organic active layer on the source electrode and the drain electrode. The step of forming the first insulating layer includes:
Forming an interlayer insulating layer on the pixel electrode to fill the step of the pixel electrode;
The method for manufacturing a flexible TFT substrate according to claim 14 , further comprising: forming a barrier insulating layer on the interlayer insulating layer. After the step of exposing the pixel electrode,
15. The flexible TFT substrate according to claim 13, wherein a flexible organic EL display is formed by sequentially forming an organic EL layer, a counter electrode, and a sealing layer on the pixel electrode. Method. After the step of exposing the pixel electrode,
The method for manufacturing a flexible TFT substrate according to claim 13 or 14, wherein a flexible TFT substrate for a liquid crystal display is formed by forming an alignment film on the pixel electrode.

Images