JP4968996B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having a circuit including thin film transistors (hereinafter referred to as TFTs). For example, the present invention relates to an electro-optical device typified by a liquid crystal display device and a configuration of an electric apparatus in which the electro-optical device is mounted as a component. Further, the present invention relates to a method for manufacturing the device. Note that in this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and the electro-optical device and the electric appliance are also included in the category.
[0002]
[Prior art]
In recent years, a thin film transistor (TFT) is formed using a semiconductor thin film (thickness of about several to several hundred nm) formed on a substrate having an insulating surface, and a semiconductor device having a large-area integrated circuit formed using this TFT is developed. Is progressing. Active matrix liquid crystal display devices, EL display devices, and contact image sensors are known as representative examples. In particular, a TFT using a crystalline semiconductor film (typically a crystalline silicon film) as an active region has high field effect mobility, and thus various functional circuits can be formed.
[0003]
The crystallinity of the crystalline semiconductor film has a great influence on the electrical characteristics when a TFT is manufactured. At present, an amorphous semiconductor film is often crystallized to form a crystalline semiconductor film. Crystallinity expresses the degree of regularity of atomic arrangement in a crystal. When a TFT is manufactured using a crystalline semiconductor film having good crystallinity, its electrical characteristics are considered good. Become.
[0004]
Further, as a process that particularly affects the crystallinity of the semiconductor film, a doping process can be given. In the doping process, the energy of ions implanted into the semiconductor film is much larger than the binding energy of the elements forming the semiconductor film. For this reason, ions implanted into the semiconductor film blow off the elements forming the semiconductor film from the lattice points and cause defects in the crystal. Therefore, heat treatment is often performed after the doping treatment in order to recover the defects and activate the implanted ions at the same time.
[0005]
As described above, the crystallinity of the semiconductor film is affected in various ways during the process of manufacturing the TFT, but attempts have been made to manufacture a crystalline semiconductor film with good crystallinity.
[0006]
For example, it is described in “High-Performance Low-Temperature Poly-Silicon Thin Film Transistors Fabricated by New Metal-Induced Lateral Crystallization Process; Jpn. J. Appl. Phys. Vol. 37 (1998) pp. 4244-4247”. A method will be described. After an amorphous silicon layer having a desired shape is formed on the substrate, a gate insulating film and a gate electrode are formed. Next, nickel (Ni) is added, and then an impurity element doping process is performed. Here, since the gate electrode is formed on the semiconductor layer, nickel is added to the source region and the drain region, but not to the channel formation region. Thereafter, the amorphous silicon layer is crystallized and the impurity elements are activated simultaneously by heat treatment. As already described, nickel is not added to the channel formation region. (FIG. 3A) However, since the crystal is grown in the lateral direction using nickel added to the source region and the drain region as a nucleus, the channel formation region is also crystallized. (FIG. 3B) Further, in order to avoid crystal grains grown laterally from the source region and the drain region from colliding with each other in the channel formation region to form a large grain boundary, as shown in FIG. A method of crystallizing after partially providing a mask, adding nickel, removing the mask, has also been reported. (Fig. 3 (D))
[0007]
[Problems to be solved by the invention]
However, good electrical characteristics are not obtained in a TFT manufactured by the above method. In particular, the characteristics of the subthreshold coefficient (S value) and field effect mobility, which are important parameters for judging the performance of the TFT, are not good.
[0008]
The present invention is a technique for solving such problems. In an electro-optical device and a semiconductor device typified by an active matrix liquid crystal display device manufactured using TFTs, the operating characteristics and reliability of the semiconductor device are disclosed. It aims at realizing improvement.
[0009]
[Means for Solving the Problems]
The present invention is characterized in that the crystallinity of the semiconductor layer is further improved by irradiating a laser beam after performing crystallization by heat treatment on the semiconductor layer to which a metal element is selectively added. By the heat treatment, crystal growth is performed in a lateral direction from a region where the metal element is added to a region where the metal element is not added. Therefore, an amorphous region may remain without being crystallized in the semiconductor layer to which the metal element is not added. In addition, the semiconductor layer after the heat treatment has many defects in crystal grains. In view of this, the remaining amorphous region is crystallized and crystal defects are compensated by irradiating a laser beam after the heat treatment.
[0010]
In the half structure of the present invention disclosed in this specification, a semiconductor layer is formed over a substrate, an insulating film is formed over the semiconductor layer, a gate electrode is formed over the insulating film, and the gate electrode is used as a mask. An impurity element is introduced into the semiconductor layer, a metal element is selectively introduced into the semiconductor layer into which the impurity element is introduced, the semiconductor layer is crystallized by heat treatment, the impurity element is activated, and a laser beam It is characterized by irradiating.
[0011]
In the above structure, it is preferable to use a substrate through which a part of the laser beam is transmitted. However, the transmittance varies depending on the wavelength even on the same substrate. As an example, FIG. 2 shows the transmittance of Corning 1737 substrate and Asahi Glass synthetic quartz glass substrate with respect to wavelength. From FIG. 2, it can be seen that the transmittance varies depending on the wavelength. In this specification, the surface of the substrate is defined as a surface on which a film is formed, and the back surface of the substrate is defined as a surface on the opposite side to the surface on which the film is formed.
[0012]
In the above configuration, the metal element is selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, Ag, Au, Al, In, Sn, Pb, P, As, and Sb. One or more elements may be used, and details of the crystallization method using the metal element are described in JP-A-7-183540. Here, the contents of the publication will be briefly described. First, a trace amount of a metal element such as nickel, palladium, or lead is added to the amorphous semiconductor film. As the addition method, a plasma treatment method, a vapor deposition method, an ion implantation method, a sputtering method, a solution coating method, or the like may be used. When heat treatment is performed after the addition, a crystalline semiconductor film with good crystallinity can be obtained. The optimal heating temperature, heating time, etc. for crystallization depend on the amount of the metal element added and the state of the amorphous semiconductor film.
[0013]
In the above structure, the impurity element is an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity.
[0014]
In the above structure, the laser beam may be a pulsed or continuous wave gas laser or a laser beam oscillated from a solid-state laser. For example, there are excimer laser, Ar laser, Kr laser, etc. as gas laser, and YAG laser, YVO as solid laser. _Four Laser, YLF laser, YAlO _Three A laser, a glass laser, a ruby laser, an alexandride laser, a Ti: sapphire laser, or the like can be used. Moreover, you may use the harmonic converted by the nonlinear optical element.
[0015]
In the above structure, the laser beam is irradiated from the front surface side, the back surface side, or both the front surface side and the back surface side of the substrate. The channel formation region existing below the gate electrode is required to have particularly good crystallinity among the semiconductor layers. However, a gate electrode exists above the channel formation region, and does not reach the semiconductor layer unless the gate electrode is transparent to the laser beam. Therefore, depending on the material of the gate electrode, it is necessary to irradiate the laser beam from the front surface side, the back surface side, or both the front surface side and the back surface side. Of course, when the laser beam is irradiated from the surface side, it is necessary to use a gate electrode having transparency to the laser beam. In addition, in the case of irradiating the laser beam from the back side, it is necessary to use a substrate that is transmissive to the laser beam. In the case of irradiating the laser beam from the front surface side and the back surface side, it is necessary to use a substrate having transparency to the laser beam and to form a gate electrode having transparency to the laser beam.
[0016]
In addition, a semiconductor device device typified by a liquid crystal display device or an EL display device is manufactured using the TFT manufactured with the above structure.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described with reference to a cross-sectional view of FIG.
[0018]
In FIG. 1A, a glass substrate such as a non-alkali glass such as a synthetic quartz glass substrate, a barium borosilicate glass, or an aluminoborosilicate glass may be used as the substrate 11. For example, Corning 7059 glass or 1737 glass can be suitably used. However, if irradiation is performed from the rear surface side of the substrate or from the front surface side and the rear surface side in the subsequent laser beam irradiation, the substrate 11 needs to have transparency to the wavelength of the laser beam.
[0019]
A base insulating film 12 is formed of a silicon nitride film, a silicon oxynitride film, a silicon oxide film, or the like on a substrate 11 by a known means (LPCVD method, plasma CVD method, or the like). However, the base insulating film 12 needs to be transparent to the wavelength of a laser oscillator used in a later process.
[0020]
Next, after forming the semiconductor film 12 to a thickness of 10 to 200 nm (preferably 30 to 100 nm) by a known means such as plasma CVD or sputtering, the semiconductor layers 13 and 14 are patterned to a desired shape. Form. Here, the semiconductor layer 13 is an n-channel TFT, and the semiconductor layer 14 is a p-channel TFT. The semiconductor film 12 includes an amorphous semiconductor film and a microcrystalline semiconductor film, and a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film may be applied.
[0021]
Next, a gate insulating film 15 covering the semiconductor layers 13 and 14 is formed. The gate insulating film 15 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm using a plasma CVD method or a sputtering method.
[0022]
Next, as illustrated in FIG. 1B, a conductive film 16 having a thickness of 100 to 500 nm is formed over the gate insulating film 15. The conductive film may be formed of an element selected from Ta, W, Ti, Mo, Cu, Cr, and Nd, or an alloy material or a compound material containing the element as a main component, or a polycrystalline silicon film. A representative semiconductor film may be used. Further, an AgPdCu alloy may be used. Alternatively, an oxide conductive film (typically an ITO film) that is transparent to visible light may be used.
[0023]
Next, a resist mask (not shown) is formed by photolithography, and an etching process for forming electrodes and wirings is performed to form the conductive layers 17 and 18.
[0024]
Next, using the conductive layers 17 and 18 as a mask, the gate insulating film 15 is selectively removed to form insulating layers 19 and 20. (Figure 1 (C))
[0025]
Then, first and second doping processes are performed to add an impurity element to the semiconductor layer. (FIG. 1C) The doping process may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁵ / Cm ² The acceleration voltage is set to 5 to 100 keV. In this case, the conductive layers 17 and 18 serve as a mask for the impurity element, and the impurity regions 21 and 22 are formed in a self-aligning manner. First, an impurity element imparting n-type is added, and then an impurity element imparting p-type is added to form impurity regions 26 and 27. However, as shown in FIGS. 1C and 1D, when an impurity element imparting n-type is added, the semiconductor layer forming the p-channel TFT is covered with a mask 23 made of resist, and p-type is added. When the impurity element imparting is added, the semiconductor layer for forming the n-channel TFT is covered with a mask 25 made of resist.
[0026]
Next, a metal element is added to form the metal-containing layer 28. The metal element is one or more selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, Ag, Au, Al, In, Sn, Pb, P, As, and Sb. These elements may be used, and the addition method may be a plasma treatment method, a vapor deposition method, an ion implantation method, a sputtering method, a solution coating method, or the like. At this time, as shown in FIG. 3C, a mask is partially formed, and a crystal grain boundary formed when the semiconductor layer is crystallized by heat treatment is not a channel formation region but a source region or There is also a method of forming in the drain region.
[0027]
Next, as shown in FIG. 1E, the semiconductor layer is crystallized and the impurity element is activated by heat treatment. This heat treatment is performed by a thermal annealing method using a furnace annealing furnace or a rapid thermal annealing method (RTA method). In crystallization, a metal element selectively added to the semiconductor layer is used as a nucleus for crystal growth, and a crystal is also grown in the lateral direction in the channel formation region to which the metal element is not added.
[0028]
FIG. 1F illustrates a process of improving the crystallinity of a semiconductor layer by irradiating a laser beam from the back side of the substrate. In this case, here, the case where the laser beam is irradiated from the back surface side is illustrated, but if the conductive layers 17 and 18 are formed of a material that is transmissive to the laser beam, the surface side of the substrate, Alternatively, irradiation can be performed from the front side and the back side. Further, the optimum conditions differ depending on the substrate used, the film thickness of the base insulating film, and the like.
[0029]
First, a laser oscillator used in the laser annealing method will be described. For example, an excimer laser has a high output and can oscillate a high-frequency pulse of about 300 Hz at present. In addition to a pulsed excimer laser, a continuous wave excimer laser or other pulsed or continuous wave gas laser or solid-state laser can be used. For example, there are Ar laser, Kr laser, etc. as gas laser, and YAG laser, YVO as solid laser. _Four Laser, YLF laser, YAlO _Three A laser, a glass laser, a ruby laser, an alexandride laser, a Ti: sapphire laser, or the like can also be used. Of course, harmonics converted by a non-linear element may be used. Laser beam irradiation can be performed in a vacuum, in the air, in a nitrogen atmosphere, or the like. Further, the substrate may be heated to about 500 degrees when irradiating with a laser beam. By doing so, a decrease in the heat outflow rate in the semiconductor film is expected, and the grain size of the crystal grains can be increased.
[0030]
The semiconductor layer is crystallized by using any of the laser oscillators described above and irradiating a laser beam in any atmosphere.
[0031]
The crystalline semiconductor film formed by irradiating a laser beam is heat-treated at 300 to 450 ° C. in an atmosphere containing 3 to 100% hydrogen, or 200 to 200 in an atmosphere containing hydrogen generated by plasma. Residual defects can be reduced by heat treatment at 450 ° C.
[0032]
In addition, it is known that when a TFT is manufactured using a semiconductor layer in which the metal element remains in a channel formation region, the off-state current value of the electrical characteristics increases. Therefore, the present applicant has developed a technique (gettering technique) for removing a metal element from a semiconductor layer and has disclosed it in Japanese Patent Laid-Open No. 10-270363. The gettering technique refers to a region (getter) in which an element belonging to Group 15 is introduced by selectively introducing an element belonging to Group 15 into the semiconductor layer in which the metal element remains. By capturing the metal element in the ring region), the metal element can be removed or reduced in a region where the element belonging to Group 15 is not introduced (gettering region).
[0033]
Also in the present invention, the gettering technique may be used after the laser beam irradiation. That is, using the gate electrode as a mask, an element belonging to Group 15 may be selectively introduced into the semiconductor layer, and heat treatment may be performed to remove or reduce the metal element from the channel formation region.
[0034]
By manufacturing a TFT using the crystalline semiconductor layer thus manufactured, the electrical characteristics of the TFT can be improved.
[0035]
【Example】
[Example 1]
An embodiment of the present invention will be described with reference to the cross-sectional view of FIG.
[0036]
In FIG. 1A, a glass substrate such as a non-alkali glass such as a synthetic quartz glass substrate, a barium borosilicate glass, or an aluminoborosilicate glass may be used as the substrate 11. For example, Corning 7059 glass or 1737 glass can be suitably used. In this example, a 1737 glass substrate was used.
[0037]
A base insulating film 12 is formed on the substrate 11 by a known means (LPCVD method, plasma CVD method, etc.) using a silicon nitride film, a silicon oxynitride film, a silicon oxide film, or the like. In this embodiment, a 50 nm thick silicon oxynitride film (composition ratio Si = 32%, O = 27%, N = 24%, H = 17%) was formed.
[0038]
Next, after forming the semiconductor film 12 to a thickness of 10 to 200 nm (preferably 30 to 100 nm) by a known means such as a plasma CVD method or a sputtering method, the semiconductor layers 13 and 14 are patterned by a desired shape. Form. Here, the semiconductor layer 13 is an n-channel TFT, and the semiconductor layer 14 is a p-channel TFT. The semiconductor film 12 includes an amorphous semiconductor film and a microcrystalline semiconductor film, and a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film may be applied. In this example, a 55 nm amorphous silicon film was formed by plasma CVD.
[0039]
Next, a gate insulating film 15 covering the semiconductor layers 13 and 14 is formed. The gate insulating film 15 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm using a plasma CVD method or a sputtering method. In this embodiment, a silicon oxynitride film (composition ratio: Si = 32%, O = 59%, N = 7%, H = 2%) with a thickness of 110 nm is formed by plasma CVD. Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.
[0040]
Next, as illustrated in FIG. 1B, a conductive film 16 having a thickness of 100 to 500 nm is formed over the gate insulating film 15. In this example, a conductive film made of a TaN film having a thickness of 30 nm was formed. The TaN film was formed by sputtering, and was sputtered in a nitrogen-containing atmosphere using a Ta target. The conductive film may be formed of an element selected from Ta, W, Ti, Mo, Cu, Cr, and Nd, or an alloy material or a compound material containing the element as a main component, or polycrystalline silicon. A semiconductor film typified by a film may be used. Further, an AgPdCu alloy may be used. Alternatively, an oxide conductive film (typically an ITO film) that is transparent to visible light may be used.
[0041]
Next, a resist mask (not shown) is formed by photolithography, and an etching process for forming electrodes and wirings is performed to form the conductive layers 17 and 18.
[0042]
Next, using the conductive layers 17 and 18 as a mask, the gate insulating film 15 is selectively removed to form insulating layers 19 and 20. (Figure 1 (C))
[0043]
Then, first and second doping processes are performed to add an impurity element to the semiconductor layer. (FIG. 1C) The doping process may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁵ / Cm ² The acceleration voltage is set to 5 to 100 keV. In this case, the conductive layers 17 and 18 serve as a mask for the impurity element, and the impurity regions 21 to 24 are formed in a self-aligning manner. In this embodiment, phosphorus (P) is added as an impurity element imparting n-type as the first doping treatment, and the phosphorus concentration in the impurity regions 21 to 24 is 1 × 10 6. ²⁰ ~ 5x10 ^{twenty one} / Cm ^Three I tried to become. Subsequently, a second doping process is performed, boron (B) is added as an impurity element imparting p-type conductivity, and the boron concentration in the impurity regions 26 and 27 is 1 × 10 6. ²⁰ ~ 1x10 ^{twenty two} / Cm ^Three I tried to become. However, as shown in FIG. 1D, in the second doping process, the semiconductor layer for forming the n-channel TFT is covered with a mask 25 made of resist.
[0044]
Next, a metal element is added to form the metal-containing layer 28. As the metal element, there is a metal element such as nickel, palladium, or lead, and an addition method may be a plasma treatment method, a vapor deposition method, an ion implantation method, a sputtering method, a solution coating method, or the like. In this example, a solution containing nickel was held in the semiconductor layer and the conductive layer.
[0045]
Next, as shown in FIG. 1E, the semiconductor layer is crystallized and the impurity element is activated by heat treatment. This heat treatment is performed by a thermal annealing method using a furnace annealing furnace or a rapid thermal annealing method (RTA method). In crystallization, a metal element selectively added to the semiconductor layer is used as a nucleus for crystal growth, and a crystal is also grown in the lateral direction in the channel formation region to which the metal element is not added. In this embodiment, the heat treatment was performed at a temperature of 550 degrees for 4 hours.
[0046]
FIG. 1F illustrates a process for improving the crystallinity of a semiconductor layer by irradiation with a laser beam. Further, the optimum conditions differ depending on the substrate used, the film thickness of the base insulating film, and the like. First, a laser oscillator used in the laser annealing method will be described. For example, an excimer laser has a high output and can oscillate a high-frequency pulse of about 300 Hz at present. In addition to a pulsed excimer laser, a continuous wave excimer laser or other pulsed or continuous wave gas laser or solid-state laser can be used. For example, there are Ar laser, Kr laser, etc. as gas laser, and YAG laser, YVO as solid laser. _Four Laser, YLF laser, YAlO _Three A laser, a glass laser, a ruby laser, an alexandride laser, a Ti: sapphire laser, or the like can also be used. Of course, harmonics converted by a non-linear element may be used. Laser beam irradiation can be performed in a vacuum, in the air, in a nitrogen atmosphere, or the like. Further, the substrate may be heated to about 500 degrees when irradiating with a laser beam. By doing so, a decrease in the heat outflow rate in the semiconductor film is expected, and the grain size of the crystal grains can be increased.
[0047]
In this embodiment, the second harmonic (wavelength: 532 nm) of a YAG laser was used and the laser beam was irradiated in the atmosphere. In this embodiment, a 1737 glass substrate is used as the substrate, and the transmittance of the YAG laser with respect to the second harmonic is 90% or more as shown in FIG. For this reason, the second harmonic of the YAG laser is sufficiently transmitted through the substrate. In this embodiment, TaN is used for the conductive layers 17 and 18, and it does not have transparency to the second harmonic of the YAG laser. Therefore, in this example, the semiconductor film was crystallized by irradiating a laser beam from the back side of the substrate.
[0048]
The crystalline semiconductor layer formed by irradiating a laser beam is heated at 300 to 450 ° C. in an atmosphere containing 3 to 100% hydrogen, or 200 to 200 in an atmosphere containing hydrogen generated by plasma. Residual defects can be reduced by heat treatment at 450 ° C.
[0049]
By producing a TFT using the crystalline semiconductor layer thus produced, the electrical characteristics of the TFT can be improved.
[0050]
[Example 2]
In this embodiment, a method for manufacturing an active matrix substrate will be described with reference to FIGS.
[0051]
In FIG. 1A, a glass substrate such as a non-alkali glass such as a synthetic quartz glass substrate, a barium borosilicate glass, or an aluminoborosilicate glass may be used as the substrate 300. For example, Corning 7059 glass or 1737 glass can be suitably used. In this example, a 1737 glass substrate was used.
[0052]
Next, a base film 301 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed over the substrate 300. Although a two-layer structure is used as the base film 301 in this embodiment, a single-layer film of the insulating film or a structure in which two or more layers are stacked may be used. As the first layer of the base film 301, a plasma CVD method is used, and SiH _Four , NH _Three And N ₂ A silicon oxynitride film 301a formed using O as a reactive gas is formed to a thickness of 10 to 200 nm (preferably 50 to 100 nm). In this embodiment, a 50 nm thick silicon oxynitride film 301a (composition ratio Si = 32%, O = 27%, N = 24%, H = 17%) was formed. Next, as the second layer of the base film 301, a plasma CVD method is used, and SiH _Four And N ₂ A silicon oxynitride film 301b formed using O as a reaction gas is stacked to a thickness of 50 to 200 nm (preferably 100 to 150 nm). In this embodiment, a silicon oxynitride film 401b (composition ratio Si = 32%, O = 59%, N = 7%, H = 2%) having a thickness of 100 nm is formed.
[0053]
Next, a semiconductor film 302 is formed over the base film by a known means (sputtering method, LPCVD method, plasma CVD method, or the like) to a thickness of 10 to 200 nm (preferably 30 to 100 nm), and then formed into a desired shape. The semiconductor layers 402 to 406 are formed by patterning. There is no limitation on the material of the semiconductor film, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy. In this example, after a 55 nm amorphous silicon film was formed using a plasma CVD method, semiconductor layers 402 to 406 were formed by a patterning process using a photolithography method.
[0054]
Further, after forming the semiconductor layers 402 to 406, a small amount of impurity element (boron or phosphorus) may be doped in order to control the threshold value of the TFT.
[0055]
Next, a gate insulating film 407 covering the semiconductor layers 402 to 406 is formed. The gate insulating film 407 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by plasma CVD or sputtering. In this embodiment, a silicon oxynitride film (composition ratio: Si = 32%, O = 59%, N = 7%, H = 2%) with a thickness of 110 nm is formed by plasma CVD. Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.
[0056]
When a silicon oxide film is used, TEOS (Tetraethyl Orthosilicate) and O ₂ The reaction pressure is 40 Pa, the substrate temperature is 300 to 400 ° C., and the high frequency (13.56 MHz) power density is 0.5 to 0.8 W / cm. ² And can be formed by discharging. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by thermal annealing at 400 to 500 ° C. thereafter.
[0057]
Next, as illustrated in FIG. 4B, a first conductive film 408 with a thickness of 20 to 100 nm and a second conductive film 409 with a thickness of 100 to 400 nm are stacked over the gate insulating film 407. In this embodiment, a first conductive film 408 made of a TaN film with a thickness of 30 nm and a second conductive film 409 made of a W film with a thickness of 370 nm are stacked. The TaN film was formed by sputtering, and was sputtered in a nitrogen-containing atmosphere using a Ta target. The W film was formed by sputtering using a W target. In addition, tungsten hexafluoride (WF ₆ It can also be formed by a thermal CVD method using In any case, in order to use as a gate electrode, it is necessary to reduce the resistance, and the resistivity of the W film is desirably 20 μΩcm or less. The resistivity of the W film can be reduced by increasing the crystal grains. However, when there are many impurity elements such as oxygen in the W film, the crystallization is hindered and the resistance is increased. Therefore, in this embodiment, a sputtering method using a target of high purity W (purity 99.9999%) is used, and the W film is formed with sufficient consideration so that impurities are not mixed in from the gas phase during film formation. By forming, a resistivity of 9 to 20 μΩcm could be realized.
[0058]
In this embodiment, the first conductive film 408 is TaN and the second conductive film 409 is W. However, there is no particular limitation, and any of them is selected from Ta, W, Ti, Mo, Cu, Cr, and Nd. Or an alloy material or a compound material containing the element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Further, an AgPdCu alloy may be used. In addition, the first conductive film is formed using a tantalum (Ta) film, the second conductive film is formed using a W film, the first conductive film is formed using a titanium nitride (TiN) film, and the second conductive film is formed. The first conductive film is formed of a tantalum nitride (TaN) film, the second conductive film is formed of an Al film, and the first conductive film is formed of a tantalum nitride (TaN) film. The second conductive film may be a combination of Cu films.
[0059]
Next, resist masks 410 to 415 are formed by photolithography, and a first etching process for forming electrodes and wirings is performed. The first etching process is performed under the first and second etching conditions. In this embodiment, an ICP (Inductively Coupled Plasma) etching method is used as the first etching condition, and CF is used as an etching gas. _Four And Cl ₂ And O ₂ The gas flow ratio was 25:25:10 (sccm), and 500 W RF (13.56 MHz) power was applied to the coil-type electrode at a pressure of 1 Pa to generate plasma and perform etching. . Here, a dry etching apparatus (Model E645- □ ICP) using ICP manufactured by Matsushita Electric Industrial Co., Ltd. was used. 150 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. The W film is etched under this first etching condition so that the end portion of the first conductive layer is tapered.
[0060]
Thereafter, the resist masks 410 to 415 are not removed and the second etching condition is changed, and the etching gas is changed to CF. _Four And Cl ₂ The gas flow ratio is 30:30 (sccm), and 500 W of RF (13.56 MHz) power is applied to the coil-type electrode at a pressure of 1 Pa to generate plasma and etching for about 30 seconds. Went. 20 W of RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. CF _Four And Cl ₂ Under the second etching condition in which is mixed, the W film and the TaN film are etched to the same extent. Note that in order to perform etching without leaving a residue on the gate insulating film, it is preferable to increase the etching time at a rate of about 10 to 20%.
[0061]
In the first etching process, the shape of the mask made of resist is made suitable, and the end portions of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. It becomes. The angle of this taper portion is 15 to 45 °. Thus, the first shape conductive layers 417 to 422 (the first conductive layers 417 a to 422 a and the second conductive layers 417 b to 422 b) composed of the first conductive layer and the second conductive layer by the first etching treatment. Form. Reference numeral 416 denotes a gate insulating film, and a region not covered with the first shape conductive layers 417 to 422 is etched and thinned by about 20 to 50 nm.
[0062]
Then, a first doping process is performed without removing the resist mask, and an impurity element imparting n-type conductivity is added to the semiconductor layer. (FIG. 5A) The doping process may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁵ atoms / cm ² The acceleration voltage is set to 60 to 100 keV. In this embodiment, the dose is 1.5 × 10 ¹⁵ / Cm ² The acceleration voltage was 80 keV. As an impurity element imparting n-type, an element belonging to Group 15, typically phosphorus (P) or arsenic (As), is used here, but phosphorus (P) is used. In this case, the conductive layers 417 to 421 serve as a mask for the impurity element imparting n-type, and the first high-concentration impurity regions 306 to 310 are formed in a self-aligning manner. The first high-concentration impurity regions 306 to 310 have 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atoms / cm ^Three An impurity element imparting n-type is added in a concentration range of.
[0063]
Next, a second etching process is performed without removing the resist mask. Here, CF is used as an etching gas. _Four And Cl ₂ And O ₂ Then, the W film is selectively etched. At this time, second conductive layers 428b to 433b are formed by a second etching process. On the other hand, the first conductive layers 417a to 422a are hardly etched, and the second shape conductive layers 428 to 433 are formed.
[0064]
Next, a second doping process is performed as shown in FIG. 5C without removing the resist mask. In this case, an impurity element imparting n-type conductivity is introduced at a high acceleration voltage of 70 to 120 keV with a lower dose than in the first doping treatment. In this embodiment, the dose is 1.5 × 10 ¹⁴ / Cm ² Then, the acceleration voltage is set to 90 keV, and a new impurity region is formed in the semiconductor layer inside the first high-concentration impurity regions 306 to 310 formed in FIG. The second doping process uses the second shape conductive layers 428 to 433 as a mask, and an impurity element is also introduced into the semiconductor layer below the second conductive layers 428 b to 433 b to newly add a second high concentration impurity. Regions 423a to 427a and low concentration impurity regions 423b to 427b are formed.
[0065]
Next, after removing the resist mask, new resist masks 434a and 434b are formed, and a third etching process is performed as shown in FIG. SF for etching gas ₆ And Cl ₂ And a gas flow rate ratio of 50/10 (sccm), 500 W of RF (13.56 MHz) power is applied to the coil-type electrode at a pressure of 1.3 Pa, plasma is generated, and etching is performed for about 30 seconds. Perform processing. 10 W of RF (13.56 MHz) power is applied to the substrate side (the material stage), and a substantially self-bias voltage that is not substantially applied is applied. In this manner, the TaN film of the p-channel TFT and the pixel portion TFT (pixel TFT) is etched by the third etching process to form third shape conductive layers 435 to 438.
[0066]
Next, after removing the resist mask, the gate insulating film 416 is selectively removed by using the second shape conductive layers 428 and 430 and the second shape conductive layers 435 to 438 as masks. 439 to 444 are formed. (Fig. 6 (B))
[0067]
Next, new resist masks 445a to 445c are formed, and a third doping process is performed. By this third doping treatment, impurity regions 446 and 447 in which an impurity element imparting a conductivity type opposite to the one conductivity type is added to the semiconductor layer that becomes the active layer of the p-channel TFT. The second conductive layers 435a and 438a are used as masks against the impurity element, and an impurity element imparting p-type is added to form an impurity region in a self-aligning manner. In this embodiment, the impurity regions 446 and 447 are diborane (B ₂ H ₆ ) Using an ion doping method. (FIG. 6C) In the third doping process, the semiconductor layer forming the n-channel TFT is covered with masks 445a to 445c made of resist. In the first doping process and the second doping process, phosphorus is added to the impurity regions 446 and 447 at different concentrations, respectively, and the concentration of the impurity element imparting p-type in each of the regions is 2 ×. 10 ²⁰ ~ 2x10 ^{twenty one} atoms / cm ^Three By performing the doping treatment so as to become, no problem arises because it functions as the source region and drain region of the p-channel TFT. In this embodiment, since a part of the semiconductor layer serving as an active layer of the p-channel TFT is exposed, there is an advantage that an impurity element (boron) can be easily added.
[0068]
Through the above steps, impurity regions are formed in the respective semiconductor layers.
[0069]
Next, the masks 445 a to 445 c made of resist are removed and a metal element is added to form a metal-containing layer 361. As the metal element, there is a metal element such as nickel, palladium, or lead, and an addition method may be a plasma treatment method, a vapor deposition method, an ion implantation method, a sputtering method, a solution coating method, or the like. In this example, a solution containing nickel was held in the semiconductor layer and the conductive layer.
[0070]
Next, as shown in FIG. 7A, the semiconductor layer is crystallized and the impurity element is activated by heat treatment. This activation step is performed by a thermal annealing method using a furnace annealing furnace or a rapid thermal annealing method (RTA method). As the thermal annealing method, it may be performed at 400 to 700 ° C., typically 500 to 550 ° C. in a nitrogen atmosphere having an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less. The activation treatment was performed by heat treatment.
[0071]
FIG. 7B illustrates a step of improving the crystallinity of the semiconductor layer by irradiation with a laser beam. The optimum conditions differ depending on the substrate used, the thickness of the base insulating film, and the like. First, a laser oscillator used in the laser annealing method will be described. For example, an excimer laser has a high output and can oscillate a high-frequency pulse of about 300 Hz at present. In addition to a pulsed excimer laser, a continuous wave excimer laser or other pulsed or continuous wave gas laser or solid-state laser can be used. For example, there are Ar laser, Kr laser, etc. as gas laser, and YAG laser, YVO as solid laser. _Four Laser, YLF laser, YAlO _Three A laser, a glass laser, a ruby laser, an alexandride laser, a Ti: sapphire laser, or the like can also be used. Of course, harmonics converted by a non-linear element may be used. Laser beam irradiation can be performed in a vacuum, in the air, in a nitrogen atmosphere, or the like. Further, the substrate may be heated to about 500 degrees when irradiating with a laser beam. By doing so, a decrease in the heat outflow rate in the semiconductor film is expected, and the grain size of the crystal grains can be increased.
[0072]
In this embodiment, the second harmonic (wavelength: 532 nm) of a YAG laser was used and the laser beam was irradiated in the atmosphere. In this embodiment, a 1737 glass substrate is used as the substrate, and the transmittance of the YAG laser with respect to the second harmonic is 90% or more as shown in FIG. For this reason, the second harmonic of the YAG laser is sufficiently transmitted through the substrate. In this embodiment, TaN and W are used for the conductive layers 428, 430, 435, 436, 437, and 438, and they are not transmissive to the second harmonic of the YAG laser. Therefore, in this example, the semiconductor film was crystallized by irradiating a laser beam from the back side of the substrate.
[0073]
Next, a first interlayer insulating film 461 is formed. The first interlayer insulating film 461 is formed of an insulating film containing silicon with a thickness of 100 to 200 nm using a plasma CVD method or a sputtering method. In this embodiment, a silicon oxynitride film having a thickness of 150 nm is formed by a plasma CVD method. Needless to say, the first interlayer insulating film 461 is not limited to a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.
[0074]
Then, heat treatment is performed at 300 to 550 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to perform a step of hydrogenating the semiconductor layer. In this embodiment, heat treatment was performed at 410 ° C. for 1 hour in a nitrogen atmosphere containing about 3% hydrogen. This step is a step of terminating dangling bonds in the semiconductor layer with hydrogen contained in the interlayer insulating film. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.
[0075]
Next, a second interlayer insulating film 462 made of an inorganic insulating film material or an organic insulating material is formed over the first interlayer insulating film 461. In this example, an acrylic resin film having a film thickness of 1.6 μm was formed, but a film having a viscosity of 10 to 1000 cp, preferably 40 to 200 cp, and having an uneven surface formed.
[0076]
In this embodiment, in order to prevent specular reflection, the surface of the pixel electrode is formed with the unevenness by forming the second interlayer insulating film having the unevenness on the surface. In addition, a convex portion may be formed in a region below the pixel electrode in order to make the surface of the pixel electrode uneven to achieve light scattering. In that case, since the convex portion can be formed using the same photomask as that of the TFT, the convex portion can be formed without increasing the number of steps. In addition, this convex part should just be suitably provided on the board | substrate of pixel part area | regions other than wiring and a TFT part. Thus, irregularities are formed on the surface of the pixel electrode along the irregularities formed on the surface of the insulating film covering the convex portions.
[0077]
Alternatively, a film whose surface is planarized may be used as the second interlayer insulating film 462. In that case, after forming the pixel electrode, adding a step such as a known sandblasting method or etching method to make the surface uneven, prevent specular reflection, and increase the whiteness by scattering the reflected light Is preferred.
[0078]
In the driver circuit 506, wirings 463 to 467 that are electrically connected to the impurity regions are formed. Note that these wirings are formed by patterning a laminated film of a Ti film having a thickness of 50 nm and an alloy film (alloy film of Al and Ti) having a thickness of 500 nm.
[0079]
In the pixel portion 507, a pixel electrode 470, a gate wiring 469, and a connection electrode 468 are formed. (FIG. 7B) With this connection electrode 468, the source wiring (lamination of 443b and 449) is electrically connected to the pixel TFT. In addition, the gate wiring 469 is electrically connected to the gate electrode of the pixel TFT. In addition, the pixel electrode 470 is electrically connected to the drain region 442 of the pixel TFT and further electrically connected to the semiconductor layer 458 functioning as one electrode forming a storage capacitor. Further, as the pixel electrode 471, it is desirable to use a highly reflective material such as a film containing Al or Ag as a main component or a laminated film thereof.
[0080]
As described above, a CMOS circuit including an n-channel TFT 501 and a p-channel TFT 502, a driver circuit 506 having an n-channel TFT 503, and a pixel portion 507 having a pixel TFT 504 and a storage capacitor 505 are formed over the same substrate. can do. Thus, the active matrix substrate is completed.
[0081]
The n-channel TFT 501 of the driver circuit 506 includes a channel formation region 423c, a low-concentration impurity region 423b (GOLD region) that overlaps with the first conductive layer 428a which forms part of the gate electrode, and a high function as a source region or a drain region. A concentration impurity region 423a is provided. The p-channel TFT 502 which is connected to the n-channel TFT 501 and the electrode 466 to form a CMOS circuit functions as a channel formation region 446d, impurity regions 446b and 446c formed outside the gate electrode, and a source region or a drain region. A high concentration impurity region 446a is provided. In addition, the n-channel TFT 503 includes a channel formation region 425c, a low-concentration impurity region 425b (GOLD region) that overlaps with the first conductive layer 430a that forms part of the gate electrode, and a high-concentration function as a source region or a drain region. An impurity region 425a is provided.
[0082]
The pixel TFT 504 in the pixel portion includes a channel formation region 426c, a low concentration impurity region 426b (LDD region) formed outside the gate electrode, and a high concentration impurity region 426a functioning as a source region or a drain region. In addition, an impurity element imparting p-type conductivity is added to each of the semiconductor layers 447a and 447b functioning as one electrode of the storage capacitor 505. The storage capacitor 505 is formed using an electrode (a stack of 438a and 438b) and semiconductor layers 447a to 447c using the insulating film 444 as a dielectric.
[0083]
In the pixel structure of this embodiment, the end of the pixel electrode overlaps with the source wiring so that the gap between the pixel electrodes is shielded from light without using a black matrix.
[0084]
A top view of a pixel portion of an active matrix substrate manufactured in this embodiment is shown in FIG. In addition, the same code | symbol is used for the part corresponding to FIGS. A chain line AA ′ in FIG. 7 corresponds to a cross-sectional view taken along the chain line AA ′ in FIG. Further, a chain line BB ′ in FIG. 7 corresponds to a cross-sectional view taken along the chain line BB ′ in FIG.
[0085]
[Example 3]
In this embodiment, a process for manufacturing a reflective liquid crystal display device from the active matrix substrate manufactured in Embodiment 2 will be described below. FIG. 9 is used for the description.
[0086]
First, after obtaining the active matrix substrate in the state of FIG. 7 according to the second embodiment, an alignment film 471 is formed on at least the pixel electrode 470 on the active matrix substrate of FIG. In this embodiment, before forming the alignment film 471, an organic resin film such as an acrylic resin film is patterned to form columnar spacers (not shown) for maintaining the substrate interval at a desired position. Further, instead of the columnar spacers, spherical spacers may be scattered over the entire surface of the substrate.
[0087]
Next, a counter substrate 471 is prepared. Next, colored layers 472 and 473 and a planarization film 474 are formed over the counter substrate 471. The red colored layer 472 and the blue colored layer 473 are overlapped to form a light shielding portion. Further, the light shielding portion may be formed by partially overlapping the red colored layer and the green colored layer.
[0088]
In this embodiment, the substrate shown in Embodiment 2 is used. Therefore, in FIG. 8 showing a top view of the pixel portion of Example 2, at least the gap between the gate wiring 469 and the pixel electrode 470, the gap between the gate wiring 469 and the connection electrode 468, and the gap between the connection electrode 468 and the pixel electrode 470 are shown. It is necessary to shield the light. In this example, the respective colored layers were arranged so that the light-shielding portions formed by the lamination of the colored layers overlapped at the positions where light shielding should be performed, and the counter substrate was bonded.
[0089]
As described above, the number of steps can be reduced by shielding the gap between the pixels with the light shielding portion formed by the lamination of the colored layers without forming a light shielding layer such as a black mask.
[0090]
Next, a counter electrode 475 made of a transparent conductive film was formed over the planarization film 474 in at least the pixel portion, an alignment film 476 was formed over the entire surface of the counter substrate, and a rubbing process was performed.
[0091]
Then, the active matrix substrate on which the pixel portion and the driver circuit are formed and the counter substrate are attached to each other with a sealant 477. A filler is mixed in the sealing material 477, and two substrates are bonded to each other with a uniform interval by the filler and the columnar spacer. Thereafter, a liquid crystal material 478 is injected between both substrates and completely sealed with a sealant (not shown). A known liquid crystal material may be used for the liquid crystal material 478. In this way, the reflection type liquid crystal display device shown in FIG. 9 is completed. If necessary, the active matrix substrate or the counter substrate is divided into a desired shape. Further, a polarizing plate (not shown) was attached only to the counter substrate. And FPC was affixed using the well-known technique.
[0092]
The liquid crystal display panel manufactured as described above can be used as a display portion of various electronic devices.
[0093]
Note that this embodiment can be freely combined with Embodiment 1 or Embodiment 2.
[0094]
[Example 4]
In this example, an example in which an EL (electroluminescence) display device is manufactured using the method for manufacturing a TFT when manufacturing an active matrix substrate shown in Example 2 will be described. FIG. 10 is a cross-sectional view of the EL display device of the present invention.
[0095]
In this specification, an EL display device is a generic term for a display panel in which a light-emitting element formed on a substrate is sealed between the substrate and a cover material, and a display module in which TFTs are mounted on the display panel. It is. Note that the light-emitting element includes a layer (light-emitting layer) containing an organic compound from which luminescence (Electro Luminescence) generated by applying an electric field is obtained, an anode layer, and a cathode layer. In addition, luminescence in an organic compound includes light emission (fluorescence) when returning from a singlet excited state to a ground state and light emission (phosphorescence) when returning from a triplet excited state to a ground state, one of these, Or both luminescence is included.
[0096]
In FIG. 10, a switching TFT 603 provided over a substrate 700 is formed using the n-channel TFT 503 in FIG. Therefore, the description of the n-channel TFT 503 may be referred to for the description of the structure.
[0097]
Note that although a double gate structure in which two channel formation regions are formed is used in this embodiment, a single gate structure in which one channel formation region is formed or a triple gate structure in which three channel formation regions are formed may be used.
[0098]
The driver circuit provided on the substrate 700 is formed using the CMOS circuit of FIG. Therefore, for the description of the structure, the description of the n-channel TFT 501 and the p-channel TFT 502 may be referred to. In this embodiment, a single gate structure is used, but a double gate structure or a triple gate structure may be used.
[0099]
Further, the wirings 701 and 703 function as source wirings of the CMOS circuit, and the wiring 702 functions as a drain wiring. The wiring 704 functions as a wiring that electrically connects the source wiring 708 and the source region of the switching TFT, and the wiring 705 functions as a wiring that electrically connects the drain wiring 709 and the drain region of the switching TFT.
[0100]
Note that the current control TFT 604 is formed using the p-channel TFT 502 of FIG. Accordingly, the description of the p-channel TFT 502 may be referred to for the description of the structure. In this embodiment, a single gate structure is used, but a double gate structure or a triple gate structure may be used.
[0101]
A wiring 706 is a source wiring (corresponding to a current supply line) of the current control TFT, and 707 is an electrode that is electrically connected to the pixel electrode 710 by being overlaid on the pixel electrode 710 of the current control TFT.
[0102]
Reference numeral 710 denotes a pixel electrode (EL element anode) made of a transparent conductive film. As the transparent conductive film, a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, zinc oxide, tin oxide, or indium oxide can be used. Moreover, you may use what added the gallium to the said transparent conductive film. The pixel electrode 710 is formed on the flat interlayer insulating film 711 before forming the wiring. In this embodiment, it is very important to flatten the step due to the TFT using the flattening film 711 made of resin. Since an EL layer to be formed later is very thin, a light emission defect may occur due to the presence of a step. Therefore, it is desirable to planarize the pixel electrode before forming the pixel electrode so that the EL layer can be formed as flat as possible.
[0103]
After the wirings 701 to 707 are formed, a bank 712 is formed as shown in FIG. The bank 712 may be formed by patterning an insulating film or organic resin film containing silicon of 100 to 400 nm.
[0104]
Note that since the bank 712 is an insulating film, attention must be paid to electrostatic breakdown of elements during film formation. In this embodiment, carbon particles or metal particles are added to the insulating film that is the material of the bank 712 to reduce the resistivity and suppress the generation of static electricity. At this time, the resistivity is 1 × 10 ⁶ ~ 1x10 ¹² Ωm (preferably 1 × 10 ⁸ ~ 1x10 ^Ten The added amount of carbon particles and metal particles may be adjusted so that the resistance becomes Ωm).
[0105]
An EL layer 713 is formed over the pixel electrode 710. Although only one pixel is shown in FIG. 10, in this embodiment, EL layers corresponding to each color of R (red), G (green), and B (blue) are separately formed. In this embodiment, a low molecular organic EL material is formed by a vapor deposition method. Specifically, a copper phthalocyanine (CuPc) film having a thickness of 20 nm is provided as a hole injection layer, and a tris-8-quinolinolato aluminum complex (Alq) having a thickness of 70 nm is formed thereon as a light emitting layer. _Three ) A laminated structure provided with a film. Alq _Three The emission color can be controlled by adding a fluorescent dye such as quinacridone, perylene, or DCM1.
[0106]
However, the above example is an example of an organic EL material that can be used as an EL layer, and is not necessarily limited to this. An EL layer (a layer for emitting light and moving carriers therefor) may be formed by freely combining a light emitting layer, a charge transport layer, or a charge injection layer. For example, in this embodiment, an example in which a low molecular weight organic EL material is used as an EL layer is shown, but a high molecular weight organic EL material may be used. It is also possible to use an inorganic material such as silicon carbide for the charge transport layer or the charge injection layer. As these organic EL materials and inorganic materials, known materials can be used.
However, the above example is an example of an organic EL material that can be used as an EL layer, and is not necessarily limited to this. An EL layer (a layer for emitting light and moving carriers therefor) may be formed by freely combining a light-emitting layer, a charge transport layer, or a charge injection layer. For example, in this embodiment, an example in which a low molecular weight organic EL material is used as an EL layer is shown, but a medium molecular weight organic EL material or a high molecular weight organic EL material may be used. Note that in this specification, an organic EL material having no sublimation property and having a number of molecules of 20 or less or a chained molecule length of 10 μm or less is defined as a medium molecular organic EL material. As an example of using a polymer organic EL material, a 20 nm polythiophene (PEDOT) film is provided by a spin coating method as a hole injection layer, and a paraphenylene vinylene (PPV) film of about 100 nm is provided thereon as an EL layer. Alternatively, a laminated structure may be used. If a PPV π-conjugated polymer is used, the emission wavelength can be selected from red to blue. It is also possible to use an inorganic material such as silicon carbide for the charge transport layer or the charge injection layer. As these organic EL materials and inorganic materials, known materials can be used.
[0107]
Next, a cathode 714 made of a conductive film is provided over the EL layer 713. In this embodiment, an alloy film of aluminum and lithium is used as the conductive film. Of course, a known MgAg film (magnesium and silver alloy film) may be used. As the cathode material, a conductive film made of an element belonging to Group 1 or Group 2 of the periodic table or a conductive film added with these elements may be used.
[0108]
When the cathode 714 is formed, the EL element 715 is completed. Note that the EL element 715 here refers to a capacitor formed by a pixel electrode (anode) 710, an EL layer 713, and a cathode 714.
[0109]
It is effective to provide a passivation film 716 so as to completely cover the EL element 715. As the passivation film 716, an insulating film including a carbon film, a silicon nitride film, or a silicon nitride oxide film is used, and the insulating film is used as a single layer or a combination thereof.
[0110]
At this time, it is preferable to use a film with good coverage as the passivation film, and it is effective to use a carbon film, particularly a DLC (diamond-like carbon) film. Since the DLC film can be formed in a temperature range from room temperature to 100 ° C., it can be easily formed over the EL layer 713 having low heat resistance. In addition, the DLC film has a high blocking effect against oxygen and can suppress oxidation of the EL layer 713. Therefore, the problem that the EL layer 713 is oxidized during the subsequent sealing process can be prevented.
[0111]
Further, a sealing material 717 is provided over the passivation film 716 and a cover material 718 is attached thereto. As the sealing material 717, an ultraviolet curable resin may be used, and it is effective to provide a substance having a hygroscopic effect or a substance having an antioxidant effect inside. In this embodiment, the cover material 718 is formed by forming a carbon film (preferably a diamond-like carbon film) on both surfaces of a glass substrate, a quartz substrate, or a plastic substrate (including a plastic film).
[0112]
Thus, an EL display device having a structure as shown in FIG. 10 is completed. Note that it is effective to continuously process the steps from the formation of the bank 712 to the formation of the passivation film 716 using a multi-chamber type (or in-line type) film formation apparatus without releasing to the atmosphere. . Further, it is possible to continuously process the process up to the step of bonding the cover material 718 without releasing to the atmosphere.
[0113]
Thus, the n-channel TFTs 601 and 602, the switching TFT (n-channel TFT) 603, and the current control TFT (n-channel TFT) 604 are formed on the insulator 501 having the plastic substrate as a base. The number of masks required in the manufacturing process so far is smaller than that of a general active matrix EL display device.
[0114]
That is, the TFT manufacturing process is greatly simplified, and the yield can be improved and the manufacturing cost can be reduced.
[0115]
Furthermore, as described with reference to FIGS. 10A and 10B, an n-channel TFT which is resistant to deterioration due to the hot carrier effect can be formed by providing an impurity region overlapping with the gate electrode through an insulating film. Therefore, a highly reliable EL display device can be realized.
[0116]
Further, in this embodiment, only the configuration of the pixel portion and the drive circuit is shown. However, according to the manufacturing process of this embodiment, other logic circuits such as a signal dividing circuit, a D / A converter, an operational amplifier, and a γ correction circuit are provided. Can be formed on the same insulator, and a memory and a microprocessor can also be formed.
[0117]
Further, the EL light-emitting device of this example after performing the sealing (or sealing) process for protecting the EL element will be described with reference to FIG. In addition, the code | symbol used in FIG. 10 is quoted as needed.
[0118]
FIG. 11A is a top view showing a state where EL elements are sealed, and FIG. 11B is a cross-sectional view taken along line CC ′ of FIG. 11A. Reference numeral 801 indicated by a dotted line denotes a source side driver circuit, 806 denotes a pixel portion, and 807 denotes a gate side driver circuit. Reference numeral 901 denotes a cover material, reference numeral 902 denotes a first sealing material, reference numeral 903 denotes a second sealing material, and a sealing material 907 is provided on the inner side surrounded by the first sealing material 902.
[0119]
Reference numeral 904 denotes a wiring for transmitting signals input to the source side driver circuit 801 and the gate side driver circuit 807, and receives a video signal and a clock signal from an FPC (flexible printed circuit) 905 serving as an external input terminal. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC. The EL display device in this specification includes not only the EL display device main body but also a state in which an FPC or PWB is attached thereto.
[0120]
Next, a cross-sectional structure is described with reference to FIG. A pixel portion 806 and a gate side driver circuit 807 are formed above the substrate 700, and the pixel portion 806 is formed by a plurality of pixels including a current control TFT 604 and a pixel electrode 710 electrically connected to a drain thereof. . The gate side driver circuit 807 is formed using a CMOS circuit (see FIG. 14) in which an n-channel TFT 601 and a p-channel TFT 602 are combined.
[0121]
The pixel electrode 710 functions as an anode of the EL element. A bank 712 is formed at both ends of the pixel electrode 710, and an EL layer 713 and a cathode 714 of the EL element are formed on the pixel electrode 710.
[0122]
The cathode 714 also functions as a wiring common to all pixels, and is electrically connected to the FPC 905 via the connection wiring 904. Further, all elements included in the pixel portion 806 and the gate side driver circuit 807 are covered with a cathode 714 and a passivation film 567.
[0123]
Further, a cover material 901 is bonded to the first seal material 902. Note that a spacer made of a resin film may be provided in order to secure a gap between the cover material 901 and the EL element. A sealing material 907 is filled inside the first sealing material 902. Note that an epoxy-based resin is preferably used as the first sealing material 902 and the sealing material 907. The first sealing material 902 is desirably a material that does not transmit moisture and oxygen as much as possible. Further, a substance having a hygroscopic effect or a substance having an antioxidant effect may be contained in the sealing material 907.
[0124]
The sealing material 907 provided so as to cover the EL element also functions as an adhesive for bonding the cover material 901. In this embodiment, FRP (Fiberglass-Reinforced Plastics), PVF (polyvinyl fluoride), Mylar, polyester, or acrylic can be used as the material of the plastic substrate 901a constituting the cover material 901.
[0125]
In addition, after the cover material 901 is bonded using the sealing material 907, the second sealing material 903 is provided so as to cover the side surface (exposed surface) of the sealing material 907. The second sealing material 903 can use the same material as the first sealing material 902.
[0126]
By encapsulating the EL element in the sealing material 907 with the above structure, the EL element can be completely shut off from the outside, and a substance that promotes deterioration due to oxidation of the EL layer such as moisture or oxygen enters from the outside. Can be prevented. Therefore, an EL display device with high reliability can be obtained.
[0127]
Note that this embodiment can be freely combined with Embodiment 1 or Embodiment 2.
[0128]
[Example 5]
The CMOS circuit and the pixel portion formed by implementing the present invention can be used for various semiconductor devices (active matrix liquid crystal display, active matrix EC display, active matrix EL display). That is, the present invention can be implemented in all electronic devices in which these electro-optical devices are incorporated in the display unit.
[0129]
Such electronic devices include video cameras, digital cameras, projectors (rear type or front type), head mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, personal digital assistants (mobile computers, mobile phones) Or an electronic book). Examples of these are shown in FIGS.
[0130]
FIG. 12A illustrates a personal computer, which includes a main body 3001, an image input portion 3002, a display portion 3003, a keyboard 3004, and the like. The present invention can be applied to the image input unit 3002, the display unit 3003, and other signal control circuits.
[0131]
FIG. 12B illustrates a video camera, which includes a main body 3101, a display portion 3102, an audio input portion 3103, operation switches 3104, a battery 3105, an image receiving portion 3106, and the like. The present invention can be applied to the display portion 3102 and other signal control circuits.
[0132]
FIG. 12C illustrates a mobile computer, which includes a main body 3201, a camera unit 3202, an image receiving unit 3203, an operation switch 3204, a display unit 3205, and the like. The present invention can be applied to the display portion 3205 and other signal control circuits.
[0133]
FIG. 12D illustrates a goggle type display, which includes a main body 3301, a display portion 3302, an arm portion 3303, and the like. The present invention can be applied to the display portion 3302 and other signal control circuits.
[0134]
FIG. 12E shows a player that uses a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 3401, a display portion 3402, a speaker portion 3403, a recording medium 3404, an operation switch 3405, and the like. This player uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 3402 and other signal control circuits.
[0135]
FIG. 12F illustrates a digital camera, which includes a main body 3501, a display portion 3502, an eyepiece portion 3503, an operation switch 3504, an image receiving portion (not shown), and the like. The present invention can be applied to the display portion 3502 and other signal control circuits.
[0136]
FIG. 13A illustrates a front projector, which includes a projection device 3601, a screen 3602, and the like. The present invention can be applied to a liquid crystal display device 3808 constituting a part of the projection device 3601 and other signal control circuits.
[0137]
FIG. 13B illustrates a rear projector, which includes a main body 3701, a projection device 3702, a mirror 3703, a screen 3704, and the like. The present invention can be applied to the liquid crystal display device 3808 constituting a part of the projection device 3702 and other signal control circuits.
[0138]
Note that FIG. 13C is a diagram illustrating an example of the structure of the projection devices 3601 and 3702 in FIGS. 13A and 13B. The projection devices 3601 and 3702 include a light source optical system 3801, mirrors 3802 and 3804 to 3806, a dichroic mirror 3803, a prism 3807, a liquid crystal display device 3808, a phase difference plate 3809, and a projection optical system 3810. The projection optical system 3810 is composed of an optical system including a projection lens. Although the present embodiment shows a three-plate type example, it is not particularly limited, and for example, a single-plate type may be used. In addition, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the optical path indicated by an arrow in FIG. Good.
[0139]
FIG. 13D illustrates an example of the structure of the light source optical system 3801 in FIG. In this embodiment, the light source optical system 3801 includes a reflector 3811, a light source 3812, lens arrays 3813 and 3814, a polarization conversion element 3815, and a condenser lens 3816. Note that the light source optical system illustrated in FIG. 13D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.
[0140]
However, the projector shown in FIG. 13 shows a case where a transmissive electro-optical device is used, and an application example in a reflective electro-optical device is not shown.
[0141]
FIG. 14A shows a cellular phone, which includes a main body 3901, an audio output portion 3902, an audio input portion 3903, a display portion 3904, operation switches 3905, an antenna 3906, and the like. The present invention can be applied to the audio output unit 3902, the audio input unit 3903, the display unit 3904, and other signal control circuits.
[0142]
FIG. 14B illustrates a portable book (electronic book), which includes a main body 4001, display portions 4002 and 4003, a storage medium 4004, operation switches 4005, an antenna 4006, and the like. The present invention can be applied to the display portions 4002 and 4003 and other signal circuits.
[0143]
FIG. 14C illustrates a display, which includes a main body 4101, a support base 4102, a display portion 4103, and the like. The present invention can be applied to the display portion 4103. The display of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for displays having a diagonal of 10 inches or more (particularly 30 inches or more).
[0144]
As described above, the application range of the present invention is extremely wide and can be applied to electronic devices in various fields. Further, the electronic device of the present embodiment can be realized by using any combination of the first to fourth embodiments.
[0145]
【Effect of the invention】
By adopting the configuration of the present invention, the following basic significance can be obtained.
(A) A simple structure suitable for a conventional TFT manufacturing process.
(B) For positioning of the slit and the like, the laser irradiation device does not require a special precise positioning technique in the micron order, and a normal laser irradiation device can be used as it is.
(C) It is a method by which a semiconductor layer with good crystallinity can be manufactured while satisfying the above advantages.
[Brief description of the drawings]
FIGS. 1A and 1B illustrate an example of a manufacturing method of a TFT disclosed in the present invention. FIGS.
FIG. 2 is a diagram showing an example of transmittance of a substrate with respect to wavelength.
FIG. 3 is a diagram showing an example of a conventional technique.
FIG. 4 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.
FIG. 5 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.
FIG. 6 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.
FIG. 7 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.
FIG. 8 is a top view illustrating a structure of a pixel TFT.
FIG. 9 is a cross-sectional view illustrating a manufacturing process of an active matrix liquid crystal display device.
FIG. 10 is a cross-sectional structure diagram of a driving circuit and a pixel portion of an EL display device.
FIG. 11A is a top view of an EL display device.
FIG. 5B is a cross-sectional structure diagram of a driver circuit and a pixel portion of an EL display device.
FIG. 12 illustrates an example of a semiconductor device.
FIG 13 illustrates an example of a semiconductor device.
FIG 14 illustrates an example of a semiconductor device.

Claims (9)

Forming a semiconductor layer on the surface of the substrate;
Forming an insulating film on the semiconductor layer;
Forming a gate electrode on the insulating film;
An impurity element is introduced into the semiconductor layer using the gate electrode as a mask,
Selectively introducing a metal element into the semiconductor layer into which the impurity element has been introduced;
Crystallizing the semiconductor layer and activating the impurity element by heat treatment,
Irradiating the semiconductor layer with a laser beam from the surface side of the substrate,
A method for manufacturing a semiconductor device, wherein part of the laser beam is transmitted through the gate electrode. Forming a semiconductor layer on the surface of the substrate;
Forming an insulating film on the semiconductor layer;
Forming a gate electrode on the insulating film;
An impurity element is introduced into the semiconductor layer using the gate electrode as a mask,
Selectively introducing a metal element into the semiconductor layer into which the impurity element has been introduced;
Crystallizing the semiconductor layer and activating the impurity element by heat treatment,
Irradiating the semiconductor layer with a laser beam from both the front side and the back side of the substrate,
Part of the laser beam is transmitted through the substrate or the gate electrode. Forming a semiconductor layer on the surface of the substrate;
Forming an insulating film on the semiconductor layer;
Forming a gate electrode on the insulating film;
An impurity element is introduced into the semiconductor layer using the gate electrode as a mask,
Selectively introducing a metal element into the semiconductor layer into which the impurity element has been introduced;
Crystallization of the semiconductor layer and activation of the impurity element by a first heat treatment,
Irradiating the semiconductor layer with a laser beam from the surface side of the substrate,
Introducing an element belonging to Group 15 into the semiconductor layer using the gate electrode as a mask;
Gettering the metal element into the region into which the element belonging to Group 15 is introduced by the second heat treatment;
A method for manufacturing a semiconductor device, wherein part of the laser beam is transmitted through the gate electrode. Forming a semiconductor layer on the surface of the substrate;
Forming an insulating film on the semiconductor layer;
Forming a gate electrode on the insulating film;
An impurity element is introduced into the semiconductor layer using the gate electrode as a mask,
Selectively introducing a metal element into the semiconductor layer into which the impurity element has been introduced;
Crystallization of the semiconductor layer and activation of the impurity element by a first heat treatment,
Irradiating the semiconductor layer with a laser beam from both the front side and the back side of the substrate,
Introducing an element belonging to Group 15 into the semiconductor layer using the gate electrode as a mask;
Gettering the metal element into the region into which the element belonging to Group 15 is introduced by the second heat treatment;
Part of the laser beam is transmitted through the substrate or the gate electrode. In any one of Claims 1 thru | or 4 ,
The metal element is one or more selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, Ag, Au, Al, In, Sn, Pb, P, As, and Sb. A method for manufacturing a semiconductor device, wherein the semiconductor device is an element. In any one of Claims 1 thru | or 5 ,
The method for manufacturing a semiconductor device, wherein the impurity element is an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity. In any one of Claims 1 thru | or 6 ,
The method of manufacturing a semiconductor device, wherein the laser beam is a laser beam oscillated from a pulsed oscillation or a continuous oscillation gas laser or a solid-state laser. In any one of Claims 1 thru | or 7 ,
The method of manufacturing a semiconductor device, wherein the laser beam is a laser beam oscillated from one selected from a pulsed or continuous wave excimer laser, an Ar laser, and a Kr laser. In any one of Claims 1 thru | or 7 ,
The laser beam is a laser beam oscillated from one selected from a pulse oscillation or continuous oscillation YAG laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandride laser, and Ti: sapphire laser. A method for manufacturing a semiconductor device.

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