JP4914568B2 - Photodetector - Google Patents

Description

  The present invention relates to a high-sensitivity light receiving device that is applied to, for example, a laser scanning microscope and performs measurement of a minute amount of light.

  Conventionally, laser light from a laser light source is focused on a specimen by an objective lens, and the focal point is optically two-dimensionally scanned using a scanner, and detection light (particularly fluorescence) from the specimen is detected through the objective lens. 2. Description of the Related Art A laser scanning microscope that is detected by means and obtains two-dimensional information is known.

  In such a laser scanning microscope, as detection means for detecting detection light from a specimen as an electric signal, photoelectric conversion means such as a photodiode or a photomultiplier tube, and an electric signal output from the photoelectric conversion means are used as light. A photoelectric signal processing circuit for converting into a measurement signal is used. In this photoelectric signal processing circuit, a light receiving device having an integration circuit as disclosed in Patent Document 1 is used in order to reduce the noise component of the electric signal output from the photoelectric converter.

  FIG. 8 shows a schematic configuration of the integrating circuit disclosed in Permitted Document 1. An inverting input terminal 301a of an operational amplifier 301 is connected to an input terminal t1 to which an electrical image input signal Vi is input via a resistor R. The parallel circuit of the capacitor 310 and the charge / discharge switch 320 is connected between the inverting input terminal 301a and the output terminal 301c of the operational amplifier 301, and the non-inverting input terminal 301b of the operational amplifier 301 is grounded, and the image is output from the output terminal t2. An output signal Vo is output. When the image input signal Vi is converted into the image current signal I (= Vi / R) through the resistor R and input to the inverting input terminal 301a of the operational amplifier 301, the input resistance of the inverting input terminal 301a here is high. The image current signal I flows into the capacitor 310 and is charged. Charging and discharging of the capacitor 310 is controlled by giving a reset signal for driving the charging / discharging switch 320 to the charging / discharging switch 320 that opens and closes both ends of the capacitor 310.

As a result, the noise component of the image current signal I is averaged and reduced during the charging period of the capacitor 310 to be converted into the image output signal Vo and output from the output terminal t2 of the operational amplifier 1. Further, in order to charge the capacitor 310 with the next image current signal I, the charge / discharge switch 320 is controlled to be closed for a predetermined time before this charge, so that the accumulated charge of the capacitor 310 is discharged. . In this way, an image corresponding to the image current signal I is generated by repeatedly charging and discharging the capacitor 310 of the integrating circuit at a predetermined sampling period.
Japanese Patent Laid-Open No. 6-331892

  However, in the integration circuit configured as described above, for example, as shown in the equivalent circuit of FIG. 9, when the contact resistance 320 r exists in the charge / discharge switch 320 that opens and closes both ends of the capacitor 310, the accumulation of the capacitor 310 is performed. When the electric charge is discharged, the time for which the capacitor 310 is discharged to zero volts becomes infinite, causing a problem that the integration start voltage does not return to zero level.

  As a result, for example, when integration is performed from a negative level integration start voltage lower than zero level, the image current signal I cannot be imaged unless the integration result of the image current signal I reaches zero level. Imaging may be difficult.

  For this reason, it is necessary to allocate several% to several tens of% of the measurement period of one data to the discharge operation, and it takes time until image generation. In addition, since the discharge characteristics of the capacitor 310 depend on the capacitor voltage at the start of discharge, and the discharge is stopped at a predetermined time and integration of the next image signal is started, the capacitor voltage (residual charge) at the start of discharge. There is a problem that the integration start voltage of the image signal varies depending on the amount. This variation in the integration start voltage not only causes variations in the image, but also reduces the reproducibility of the image.

  On the other hand, the light receiving device is applied to a laser scanning microscope that scans a sample at high speed using a resonance scanner. However, in such a laser scanning microscope, the sample surface is equally spaced with respect to the trajectory S of the scanning position by the sinusoidal motion as shown in FIG. 10A, and the data is obtained at the timings S1, S2, and S5. However, at this time, the sampling period is not constant. Therefore, in order to obtain such a sampling period, it is necessary to vary the sampling frequency as shown in FIG. However, in the integration circuit described above, since the time for integrating the image current signal I in the capacitor 310 is constant, if the sampling frequency is made variable, the charging / discharging time of the capacitor 310 is different on the same screen, and charging / discharging occurs. There is a problem that a gradation having a brightness different from that of other portions is generated in a portion where the discharge time is insufficient.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a light receiving device having an integration circuit capable of realizing an integration operation with high accuracy.

The invention according to claim 1 is a light-receiving device used in a laser scanning microscope, which stores photoelectric conversion means for converting input light into an electric signal, and electric charge corresponding to the electric signal output from the photoelectric conversion means. First and second detection means each having a capacitive element, an opening / closing means for controlling charge accumulation and discharge of the capacitive element, and a detection unit for detecting a charging voltage of the capacitive element,
A sampling clock generating means with variable frequency; and a switching means for switching the first and second detection means connected to the photoelectric conversion means at a cycle of a predetermined sampling clock, and for one cycle of the sampling clock. In each period divided into a plurality of times, the opening / closing means of one detecting means is operated to accumulate charges corresponding to the electric signal in the capacitive element, and at the same time, the opening / closing means of the other detecting means is operated. The operation of discharging the charge of the capacitive element is performed alternately by the first and second detection means while switching the switching means for each period .

  According to a second aspect of the invention, in the first aspect of the invention, there is further provided an addition means for adding the outputs of the first and second detection means.

  According to a third aspect of the present invention, in the first aspect of the present invention, the first and second detection means output corresponding to the charge accumulated in the capacitive element of one detection means by the current sampling. The present invention is characterized in that it has an arithmetic means for acquiring an output and subtracting an output corresponding to the electric charge remaining at the time of discharging of the capacitive element of the other detection means from the output by the previous sampling.

According to a fourth aspect of the present invention, in the first aspect of the present invention, the A / D conversion means for converting the output signals from the first and second detection means into digital signals, respectively, and the A / D conversion means An arithmetic means for calculating an output digital signal, and the arithmetic means is performed immediately before the accumulation operation from a digital output signal corresponding to the charge accumulation operation to the capacitive element in each detection means. The digital output signal corresponding to the discharge operation is subtracted .

  ADVANTAGE OF THE INVENTION According to this invention, the light-receiving device which has an integration circuit which can implement | achieve highly accurate integration operation can be provided.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 shows a schematic configuration of a light receiving device to which the first embodiment of the present invention is applied.

  In the figure, reference numeral 1 denotes a photoelectric conversion means such as a photodiode or a photomultiplier tube that detects detection light from a sample (not shown) and converts it into a photocurrent. A switching means 2 is connected to the output terminal of the photoelectric conversion means 1. It is connected. The switching means 2 has output terminals 2a and 2b, and can selectively output the photocurrent from the photoelectric conversion means 1 to the output terminals 2a or 2b.

  The output terminal 2a of the switching means 2 has one end of a parallel circuit of a capacitive element 3A for accumulating charges by the photocurrent of the photoelectric conversion means 1 and an opening / closing means 4A for controlling charge accumulation and discharge of the capacitive element 3A. It is connected. The other end of the parallel circuit of the capacitive element 3A and the opening / closing means 4A is grounded. The output terminal 2a of the switching means 2 is connected to the input terminal of a detection circuit 5A that detects the charging voltage of the capacitive element 3A.

  A parallel circuit of the capacitive element 3B and the opening / closing means 4B is connected to the output terminal 2b of the switching means 2 in the same manner as described above, and a detection circuit 5B is also connected.

  An adding means 6 for adding outputs from the detection circuits 5A and 5B is connected to the detection circuits 5A and 5B.

  In such a configuration, when the switching means 2 is switched to the output terminal 2a side by the sampling clock PLS in the period A shown in FIG. 2 (shown as ON in the drawing), the light of the photoelectric conversion means 1 is displayed. Electric charges are accumulated in the capacitive element 3A through the output terminal 2a of the switching means 2 due to the current. Then, after a lapse of a certain time (timing when the next sampling clock PLS is given), the total amount of charges stored in the capacitive element 3A is detected by the detection circuit 5A as the charging voltage V1 shown in FIG. Immediately after this, the electric charge stored in the capacitive element 3A is discharged by the closing operation of the opening / closing means 4A. Further, the charge amount (voltage) of the capacitive element 3A after discharge is also detected by the detection circuit 5A.

  Next, when the period B shown in FIG. 2 is entered, the switching means 2 is switched to the output terminal 2b side by the sampling clock PLS (shown as ON in the drawing). In this state, charges are accumulated in the other capacitive element 3B through the output terminal 2b of the switching means 2 by the photocurrent of the photoelectric conversion means 1. Then, after a lapse of a certain time (timing when the next sampling clock PLS is given), the total amount of charges stored in the capacitive element 3B is detected by the detection circuit 5B as the charging voltage V2 shown in FIG. Immediately after this, the electric charge stored in the capacitive element 3B is discharged by the closing operation of the opening / closing means 4B. Further, the amount of charge (voltage) of the capacitive element 3B after discharge is also detected by the detection circuit 5B.

  Thereafter, the same operation is alternately repeated every time the sampling clock PLS is switched. The detection signals from the detection circuits 5A and 5B are input to the adding means 6 and added. In this case, the output signal V0 of the adding means 6 has a temporal change as shown in FIG. 2D, and attention is paid to the points (a0) to (e0) of the output signal V0. Data that compensates for residual charges during discharge in the elements 3A and 3B can be acquired. That is, by having a plurality of capacitive elements 3A and 3B, it is possible to compensate for an offset of measurement data due to a discharge operation in these capacitive elements 3A and 3B, and to realize a highly accurate integration operation.

  FIG. 3 shows a more specific configuration of such a light receiving device.

  In the figure, reference numeral 101 denotes a photomultiplier tube (PMT) as a photoelectric conversion means. This photomultiplier tube 101 detects detection light from a sample (not shown) and converts it into a photocurrent. The photomultiplier tube 101 is connected to a first switching element 102 and a second switching element 103 which are constituted by transistors. A sampling clock (hereinafter referred to as PLS) generation source 104 is connected to the first switching element 102. The PLS generation source 104 generates a sampling clock having a predetermined period as shown in FIG. 2A, and the first switching element 102 and the second switching element 103 are switched according to the signal level of the sampling clock. It turns on and off alternately.

  The first switching element 102 is connected to an inverting input terminal of a buffer amplifier 105 configured with an operational amplifier as a detection unit. In the buffer amplifier 105, a parallel circuit of a capacitor 106 serving as a capacitive element and a charge / discharge switch 107 serving as an opening / closing means is connected between an inverting input terminal and an output terminal, and a non-inverting input terminal is grounded and connected to an output terminal. An output signal V1 is output. In this case, the buffer amplifier 105, the capacitor 106, and the charge / discharge switch 107 constitute first detection means.

  The second switching element 103 is connected to an inverting input terminal of a buffer amplifier 108 composed of an operational amplifier as a detection unit. In the buffer amplifier 108, a parallel circuit of a capacitor 109 as a capacitive element and a charge / discharge switch 110 as an opening / closing means is connected between an inverting input terminal and an output terminal, and a non-inverting input terminal is grounded and connected to an output terminal. An output signal V2 is output. In this case, the buffer amplifier 108, the capacitor 109, and the charge / discharge switch 110 constitute second detection means.

  In this case, the buffer amplifiers 105 and 108, the capacitors 106 and 109, and the switches 107 and 110 constituting the first and second detection means are assumed to have the same electrical characteristics.

  The output terminals of the buffer amplifiers 105 and 108 are connected to an adder circuit 111 composed of an operational amplifier as an adding means. The adder circuit 111 adds outputs from the buffer amplifiers 105 and 108.

  In such a configuration, when detection light from a sample (not shown) is incident on the photomultiplier tube 101, a photocurrent i corresponding to the detection light is output from the photomultiplier tube 101.

  In this state, in the period A shown in FIG. 2A, when the sampling clock PLS becomes H level and the switching element 102 is turned on, the photocurrent i of the photomultiplier tube 101 causes the capacitor 106 on the buffer amplifier 105 side to Charge is accumulated. In this case, the switch 107 is open, and the charge flowing through the capacitor 106 is accumulated without being discharged. On the other hand, on the buffer amplifier 108 side, the switch 110 is closed and the capacitor 109 is discharged.

  After a certain time has elapsed (timing at which the next sampling clock PLS is applied), the voltage across the capacitor 106 is detected by the buffer amplifier 105, and the total amount of charge stored in the capacitor 106 is the charging voltage V1 shown in FIG. Is output as Immediately after this, the switch 107 is closed and the charge stored in the capacitor 106 is discharged.

  Next, the period B shown in FIG. 2A is entered, and when the sampling clock PLS becomes L level, the switching element 102 is turned off. At the same time, the switch 107 is closed on the buffer amplifier 105 side to discharge the capacitor 106. State and do not accumulate charge. At the same time, when the switching element 103 is turned on, charges are accumulated in the capacitor 109 on the buffer amplifier 108 side by the photocurrent i of the photomultiplier tube 101. In this case, the switch 110 is open, and the charge flowing through the capacitor 106 is accumulated without being discharged.

  Then, after a certain time has elapsed (timing at which the next sampling clock PLS is given), the voltage across the capacitor 109 is detected by the buffer amplifier 108, and the total amount of charge stored in the capacitor 109 is charged as shown in FIG. It is output as voltage V2. Immediately after this, the switch 110 closes, and the charge stored in the capacitor 109 is discharged.

  Thereafter, similarly, the switches 107 and 109 are opened and closed in synchronization with the sampling clock PLS, whereby the charging and discharging processes in the capacitors 106 and 109 are alternately repeated. The potentials generated at both ends of the capacitors 106 and 109 at this time are detected by the buffer amplifiers 105 and 108 and are output as the waveforms of V1 and V2 in FIGS. The outputs of the buffer amplifiers 105 and 108 are given to the adder circuit 111 at the next stage, where they are combined, and an output signal having a waveform of Vo shown in FIG.

  In this state, by paying attention to the points (a0) to (e0) of the output signal V0, it is possible to obtain a voltage value (output) that compensates for the electric charge remaining when the capacitors 106 and 109 are discharged. . That is, since the buffer amplifiers 105 and 108, the capacitors 106 and 109, and the switches 107 and 110 described above have the same electrical characteristics, the photocurrent corresponding to the light intensity detected by the photomultiplier tube 101 is used. When i is constant, the charge remaining when the capacitors 106 and 109 are discharged can be considered to be equal to V2 at point (a0) and V1 at point (b0) shown in FIG. . As a result, the amount of charge remaining at the time of discharge at the point (a0) can be compensated by using the V2 signal, and highly accurate measurement data can be obtained.

  Further, for example, while the capacitor 106 of the first detection means is charged by the photocurrent i of the photomultiplier tube 101, the capacitor 109 of the second detection means is discharged. Since the charging and discharging processes are alternately executed repeatedly, the detection light during this period is not reflected in the measurement data during the capacitor discharge time as in the conventional method. Compared to the above, it is possible to effectively use the detection light from the specimen without wasting it, and to obtain accurate measurement data.

  In the above-described embodiment, the amount of charge remaining at the time of discharge is compensated, but the offset level of the detection potential that causes drift due to environmental changes such as the temperature and humidity of the input characteristics of the buffer amplifier and the electrical characteristics of the capacitor. Variations can be compensated.

(Second Embodiment)
Next, a second embodiment of the present invention will be described.

  FIG. 4 shows a schematic configuration of a light receiving device to which the second embodiment of the present invention is applied, and the same parts as those in FIG.

  In this case, A / D converters 7A and 7B are connected to the detection circuits 5A and 5B, respectively. These A / D converters 7A and 7B convert the output signals from the detection circuits 5A and 5B into digital signals. An arithmetic circuit 8 is connected to these A / D converters 7A and 7B. This arithmetic circuit 8 performs a subtraction process between the previously sampled signal of the output signals from the detection circuits 5A and 5B and the signal sampled this time, and using this result, the capacitive elements 3A and 3B are discharged. The accumulated charge is compensated for.

  FIG. 5 shows a more specific configuration of the light receiving device of the second embodiment, and the same reference numerals are given to the same parts as those in FIG.

  In this case, an A / D converter 112 is connected to the output terminal of the buffer amplifier 105, and similarly, an A / D converter 113 is connected to the output terminal of the buffer amplifier 108. These A / D converters 112 and 113 convert output signals from the buffer amplifiers 105 and 108 into digital signals.

  An arithmetic circuit 114 is connected to the output terminals of the A / D converters 112 and 113. The arithmetic circuit 114 outputs the digital signal output from the previous sampling (for example, A period) from the output digital signal obtained from the current sampling (for example, B period) among the outputs from the buffer amplifiers 105 and 108. Is obtained as a true measurement value.

  Also in this case, when detection light from a sample (not shown) enters the photomultiplier tube 101, a photocurrent i corresponding to the detection light is output from the photomultiplier tube 101. In this state, the switches 107 and 109 are opened and closed in synchronization with the sampling clock PLS, whereby the charging and discharging processes in the capacitors 106 and 109 are alternately repeated. The potentials generated at both ends of the capacitors 106 and 109 at this time are detected by the buffer amplifiers 105 and 108, and are output as waveforms of V1 and V2 at the timings shown in FIGS. 2 (a0) to (e0).

  The outputs of these buffer amplifiers 105 and 108 are supplied to A / D converters 112 and 113, converted into digital signals, and then input to the arithmetic circuit 114. In this case, V1 at the point (a0) shown in FIG. 2 is the total amount of the photocurrent i accumulated in the capacitor 106, and V2 at this time indicates the amount of charge remaining when the capacitor 109 is completely discharged. Yes. Further, V2 at the next point (b0) is the total amount of photocurrent i accumulated in the capacitor 109, and V1 at this point of time indicates the amount of electric charge remaining at the completion of discharging of the capacitor 106.

  Here, the data (measured value) of the true detection light at the point (b0) is based on the charge amount remaining at the point (a0), and the charge amount corresponding to the total amount of the photocurrent i accumulated therefrom. Become. Thereby, the arithmetic circuit 114 outputs the true measurement value by subtracting the digital signal obtained from the previous sampling (for example, A period) from the digital signal obtained from the current sampling (for example, B period). It will be. Such arithmetic processing is alternately performed on the outputs V1 and V2 of the buffer amplifiers 105 and 108, so that a true measurement value for each sampling can be output.

  In this way, for example, when the assumption that the amount of electric charge remaining at the completion of the discharge of the capacitors 106 and 109 is the same under the condition that the sampling frequency is variable can be lost By using the amount of residual charge, it is possible to sufficiently compensate for changes in discharge conditions. Of course, if the contents described in the first embodiment are further applied to the second embodiment as they are, the effects described in the first embodiment can be obtained.

(Modification)
For example, in the above-described embodiment, a general integration circuit in which a parallel circuit of the capacitor 106 (109) and the charge / discharge switch 107 (110) is connected between the inverting input terminal and the output terminal of the buffer amplifier 105 (108). However, as shown in FIG. 6, for example, one end of a parallel circuit of a capacitor 106a (109a) and a charge / discharge switch 107a (110a) is connected to the non-inverting input terminal of the buffer amplifier 105a (108a). The other end of the circuit may be grounded. Further, since the first switching element 102 may generate a charge jump when performing ON / OFF operation, the same parts as those in FIG. 3 are denoted by the same reference numerals as shown in FIG. In addition, a charge injection prevention circuit 200 configured by a transistor may be connected in series to the first and second switching elements 102 and 103. Furthermore, when variations occur in the detection circuit including the buffer amplifier 105 (108), a gain correction trimmer for performing sensitivity correction may be arranged in the preceding stage of the addition circuit 111. Further, in the above description, a photomultiplier tube (PMT) is used as a representative example of the photoelectric conversion element. However, a photodiode, an avalanche photodiode, a CMOS sensor, or the like can also be used. Further, although the switching element 102 (103) is formed of a transistor, a packaged analog SWIC may be used. The same applies to the charge / discharge switch 107 (110). In the first and second embodiments described above, only the light receiving device is described. Such a light receiving device is applied to a light receiving device for receiving detection light from a specimen in a laser scanning microscope. Of course you can.

  In addition, this invention is not limited to the said embodiment, In the implementation stage, it can change variously in the range which does not change the summary.

  Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and is described in the column of the effect of the invention. If the above effect is obtained, a configuration from which this configuration requirement is deleted can be extracted as an invention.

The figure which shows schematic structure of the light-receiving device to which the 1st Embodiment of this invention is applied. The time chart for demonstrating operation | movement of 1st Embodiment. The figure which shows the specific structure of the light-receiving device of 1st Embodiment. The figure which shows schematic structure of the light-receiving device to which the 2nd Embodiment of this invention is applied. The figure which shows the specific structure of the light-receiving device of 2nd Embodiment. The figure which shows schematic structure of the modification of this invention. The figure which shows schematic structure of the other modification of this invention. The figure which shows schematic structure of an example of the conventional light-receiving device. The figure for demonstrating the conventional light-receiving device. The figure explaining the problem at the time of applying the conventional light-receiving device to a laser scanning microscope.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Photoelectric conversion means, 2 ... Switching means 2a. 2b: Output terminal, 3A, 3B: Capacitance element 4A, 4B: Opening / closing means, 5A. 5B ... Detection circuit 6 ... Adding means, 7A, 7B ... A / D converter 8 ... Operation circuit, 101 ... Photomultiplier tube 102 ... First switching element, 103 ... Second switching element 104 ... PLS source, 105.108 ... Buffer amplifier 106 ... Capacitor, 107 ... Charge / discharge switch 105a, 108a ... Buffer amplifier 106a ... Capacitor, 107a ... Charge / discharge switch 109 ... Capacitor, 110 ... Charge / discharge switch 111 ... Addition circuit, 112, 113 ... A / D converter 114 ... arithmetic circuit, 200 ... charge injection prevention circuit

Claims (4)

A light receiving device used in a laser scanning microscope,
Photoelectric conversion means for converting input light into an electrical signal;
A capacitive element for accumulating charges according to an electrical signal output from the photoelectric conversion means; an opening / closing means for controlling charge accumulation and discharge of the capacitive elements; and a detector for detecting a charging voltage of the capacitive element. First and second detection means;
A variable frequency sampling clock generating means;
Switching means for switching the first and second detection means connected to the photoelectric conversion means at a cycle of a predetermined sampling clock ;
During each period in which one cycle of the sampling clock is divided into a plurality of times, the opening / closing means of one detection means is operated to accumulate charges corresponding to the electric signal in the capacitive element, and at the same time, the other detection means An operation of operating the opening / closing means to discharge the charge of the capacitive element is alternately performed by the first and second detection means while switching the switching means for each period .   2. The light receiving device according to claim 1, further comprising adding means for adding outputs of the first and second detecting means.   Further, of the outputs of the first and second detection means, an output corresponding to the charge accumulated in the capacitive element of one detection means is obtained by the current sampling, and the other detection means is obtained from the output by the previous sampling. 2. The light receiving device according to claim 1, further comprising arithmetic means for subtracting an output corresponding to the electric charge remaining during discharge of the capacitive element. A / D conversion means for converting the output signals from the first and second detection means into digital signals, respectively, and arithmetic means for calculating the digital signals output from the A / D conversion means,
The arithmetic means subtracts a digital output signal corresponding to a discharge operation performed immediately before the accumulation operation from a digital output signal corresponding to an accumulation operation of electric charge in the capacitive element in each detection means. The light receiving device according to claim 1.

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