JP4722655B2 - Power supply circuit and microphone unit using the same - Google Patents

Description

  The present invention relates to a power supply circuit used for a condenser microphone or the like, and a microphone unit using the same.

  The type in which a bias voltage is applied as a condenser microphone device (hereinafter also referred to as a condenser microphone unit) has an advantage that sensitivity can be adjusted within a considerable range by applying the bias voltage. This is due to the characteristic that sensitivity increases when the bias voltage of a condenser microphone (hereinafter also abbreviated as a condenser microphone), that is, a kind of sensor, is increased, and it has been widely used.

  A configuration of a conventional condenser microphone unit 100 is shown in FIG. The capacitor microphone unit includes a bias power source 2a, a capacitor microphone (hereinafter referred to as a capacitor microphone) 1 including a vibration film and a fixed electrode, a capacitor 4, a resistor 3, and a JFET (junction field effect transistor) 5. The bias power source 2a is a circuit that applies a bias voltage to the capacitor microphone. The capacitor microphone to which the bias voltage is applied is connected to the gate terminal of the JFET 5 via the capacitor 4, and the JFET 5 amplifies the current by shifting the potential according to the sound pressure received by the capacitor microphone, that is, the sound pressure sensor, and outputs the output unit. The output voltage is taken out from the load resistor 6. This is a sound that can be heard by a human ear through a speaker (not shown).

  When applying a bias voltage to the condenser microphone, the gate impedance of the JFET 5 is high. Therefore, in order to eliminate the influence of the impedance on the bias power source side, the high resistance 3, which is a resistance having a high resistance value of about 1 GΩ, that is, impedance adjustment In general, it is necessary to insert a resistor in series, which is widely used.

  Further, the JFET has a high gate impedance as described above. For this reason, it is difficult to discharge the gate side charge. For this reason, the JFET 5 has been conventionally inserted with a discharge resistor of the order of giga Ω (10 9 ohms) between its gate and source (not shown). Further, this discharge resistance is generally made of polysilicon or the like.

PA acoustic system: Engineering book: 1996 publication

  However, setting the value of the polysilicon resistor appropriately has a problem in manufacturing. Further, if the resistance value is a little lower, the manufacture is easy. In this case, the electric charge charged in the gate is quickly removed, but the current flowing through the resistance is increased accordingly. In addition, since this current becomes a thermal noise and has a problem that the noise voltage becomes large, it is necessary to keep the high resistance value as described above, but its manufacture is not always easy.

  The present invention relates to an improvement in a power supply circuit that increases the degree of freedom of discharge resistance of a JFET used in a sound pressure sensor such as a capacitor microphone.

  Furthermore, with the recent evolution of portable information terminals, there are cases where a plurality of sensitivities are required for cellular phones and the like. In this case, providing a plurality of microphone units is not preferable because the apparatus becomes large. Therefore, it has been proposed to provide a plurality of sensitivities with a single microphone. This is an application of the inventors of the present application, and is disclosed in Japanese Patent Application No. 2005-001380 which has not been published at present. When switching the sensitivity of the condenser microphone unit, the bias voltage applied to the condenser microphone is switched by the bias power supply circuit output voltage.

  In this case, for example, when the bias voltage is to be switched from the high sensitivity 24V to the low sensitivity 12V, as described above, the JFET has a high impedance between the gate and the source and a high resistance. Therefore, immediately after the sensitivity is lowered, problems such as the generation of noise may occur. The present invention can also provide a power supply circuit that can solve these problems.

  The power supply circuit of the present invention is a power supply circuit that supplies a bias voltage to a microphone unit including an amplifying element, a capacitor, and a capacitor microphone, and the power supply circuit receives a voltage from the outside and generates a predetermined bias voltage. Bias power supply circuit, a high resistance having one end connected to the output end of the bias power supply circuit, and a rapid discharge means having one end connected to the other end of the high resistance, and the other end of the rapid discharge means Is connected to the ground terminal of the power supply circuit or to the output terminal of the bias power supply circuit, and outputs the bias voltage of the bias power supply circuit to the capacitor microphone via the high resistance. . As a result, the present invention can be said further without worrying about the resistance value provided in the amplifying element by quickly removing unnecessary charges from the gate portion of the amplifying element when the power is turned on and off using the rapid discharge means. For example, it is not necessary to provide a resistor in the amplifying element, and generation of noise can be prevented.

  In addition, a microphone unit of the present invention includes the above-described power supply circuit.

  ADVANTAGE OF THE INVENTION According to this invention, the power supply circuit which can discharge JFET appropriately, and is hard to produce noise etc., and a microphone unit using the same are provided.

  The best mode for carrying out the present invention will be described below. FIG. 1 shows a condenser microphone unit 101 according to the first embodiment of the present invention. The capacitor microphone unit of the present invention includes a power supply circuit 15, a capacitor microphone 1, a capacitor 4, a JFET 5, and an output load resistor 6.

  The power supply circuit 15 further includes a bias power supply circuit 10 that generates a bias voltage, a high resistance 3, and a discharge circuit 30. The high resistance 3 is a resistance having a high resistance value of about 1 GΩ to 10 GΩ, and a resistance value of about 1 GΩ is particularly preferable. The bias power supply circuit 10 includes, for example, a constant voltage source (BGR) 111 and a non-inverting amplifier 112, and further includes a booster circuit (not shown). The bias power supply circuit 10 operates upon receiving an external power supply voltage VDD2.

  Here, VDD2 may be the same voltage as VDD1 applied to JFET 5. Further, the power supply circuit 15 is constituted by one chip of LSI (semiconductor integrated circuit). Note that the configuration of the bias power supply circuit 10 is not limited to the above-described configuration, and may have a function capable of supplying a boosted and stabilized output.

  The discharge circuit 30 includes, for example, a discharge resistor 31 having a resistance value of about 100 kΩ to 1000 kΩ and a switch 32 made of an Nch FET, and is inserted between one end of the high resistance 3, the capacitor microphone 1 and the capacitor 4 and the ground. Yes. The switch 32 is connected to the timer 40 and is configured to be turned on and off in response to a command from the timer 40. The discharge circuit 30 functions as a rapid discharge means.

  Further, the timer 40 receives an external control signal and issues an operation command to the switch 32. This is configured to be controlled as a separate signal from a CPU (not shown), for example. That is, control is performed by detecting ON / OFF of the power supply voltage using a CPU (not shown) and the like, and sending a control signal to the timer.

  The operation of the discharge circuit 30 of the first embodiment will be described with reference to FIG. As described above, when a voltage is applied to the power supply circuit 15, the timer 40 responds by receiving an external control signal, and closes the discharge switch 32 of the discharge circuit 30 for D1 time. As a result, the charge remaining at the gate is rapidly discharged, and noise or the like is not generated. When the power supply circuit is turned off, the timer 40 receives and responds to the control signal from the outside before the power supply voltage decreases, and closes the discharge circuit for D2 time, and rapidly discharges the charge remaining on the gate. .

  With the above configuration, the charge remaining on the gate can be quickly extracted. Specifically, a timer is set so as to close, for example, about 1 to 100 μsec as the times D1 and D2.

  Therefore, when the power supply circuit according to this embodiment is used, the discharge can be reliably performed even if the input impedance of the JFET is high. For this reason, since there is no problem in the operation of the microphone even if there is no resistance added between the gate and the source, the resistance can be deleted. Accordingly, there is an effect that strict resistance value management of the polysilicon resistance inserted between the gate and source of the JFET is not required. Of course, there is no problem.

  Next, a second embodiment of the present invention will be described with reference to FIGS. FIG. 3 is a diagram illustrating the microphone unit 201 and the power supply circuit 16 according to the second embodiment. The power supply circuit 16 according to the second embodiment has a bias power supply circuit 11 that supplies two or more, that is, a plurality of bias voltages, as compared with the first embodiment, and a charging circuit in addition to the discharge circuit 30. 35, the discharge circuit, and the timer 41 for controlling the switching time of the switch of the charging circuit are different.

  In FIG. 3, the timer 41 is described as one block for the sake of brevity of description, but actually has two timers: a timer for opening / closing the discharge circuit 30 and a timer for opening / closing the charging circuit 35. Therefore, two signal lines from the timer 41 are also shown. The charging circuit 35 further includes, for example, a charging resistor 36 of about 100 KΩ to 1000 KΩ and a switch 37 formed of a Pch FET, which are inserted between the output of the bias power supply circuit 11 and the high resistance 3. The bias power supply circuit 11 will be described later.

  The operation of the timer 41 and each switch will be described in the description of the operation described later. The charging resistance and the discharging resistance preferably have a resistance value of about 100 kΩ to 1000 kΩ.

  The bias power supply circuit 11 of FIG. 3 includes a reference voltage source 222, a non-inverting amplifier 221, a power boosting unit, an output voltage setting unit, and the like (not shown), and receives a sensitivity switching signal from an external control unit (CPU). The bias voltage is changed.

  The bias power supply circuit 11 is provided, for example, with a configuration as shown in FIG. FIG. 4 is an example of a power supply circuit capable of supplying two types of output bias voltages described in Japanese Patent Application No. 2005-001380, which is an earlier application of the present inventors. Although the drawings described in the aforementioned application are used, the configuration will be briefly described within the scope necessary for the description of the present invention. As shown in FIG. 4, a high voltage obtained by boosting the voltage from VDD 2 by the power boosting unit 21 is applied to the non-inverting amplifier 221 of the regulator unit 22. The non-inverting amplifier 221 sets the output voltage by comparing the reference voltage of the reference voltage source (BGR) 222 with the feedback input through the feedback resistor set by the output voltage setting unit 23.

  The point of this bias power supply circuit 11 has two feedback resistors corresponding to two output bias voltages, and which feedback resistor is selected is a sensitivity switching signal, in FIG. 4, a signal from DATAIN and DATA_CL. Is to be selected.

  For example, this sensitivity switching is appropriately selected depending on the distance from the speaker's microphone. For example, the sensitivity is increased when the subject is far away or the subject is far away, and the sensitivity is decreased (normally set) when the subject is close. In addition, there are various ways to judge whether the phone is far or near. For example, in a mobile phone, when the speaker is talking while looking at the screen or talking hands-free, the phone recognizes that it is far and directly When talking near the ear, that is, when the speaker's face cannot be recognized on the screen, it is recognized as far and the sensitivity is increased. In other words, the CPU of the mobile phone or the like sends a sensitivity switching signal based on criteria such as whether or not the speaker's face appears on the screen and whether or not the device is in a hands-free state. As a result, the bias voltage is raised or lowered, that is, the sensitivity is changed.

In such a case, depending on the situation, the bias voltage is frequently raised and lowered, and the above-described discharge becomes more important. In addition, since it is preferable to perform charging quickly, a charging circuit is also provided in the second embodiment.
The operation of the second embodiment will be described below with reference to the timing chart of FIG. As described above, the condenser microphone unit according to the present invention has a configuration in which the sensitivity switching signal 50 is received from the outside, and the timer 41 is operated by the signal and the charging circuit 35 and the discharging circuit 30 are operated for a predetermined time. Yes. Note that the timer 41 has charging and discharging timers as described above, and the predetermined time for charging and discharging the timers, C1 and D1, are approximately 1 μs to 100 μs.

  For example, in order to switch the sensitivity of the microphone, when the output voltage of the bias power supply circuit 10 is increased by an external switching signal, the charging circuit switch 37 is turned on for a certain time interval, for example, C1. This interval is created by an IC internal timer. When this switch is turned on and the circuit is closed, the capacitor microphone 1 and the gate capacitance of the JFET 5 are charged instantly. Further, when the output voltage of the bias power supply circuit drops, the switch 32 of the discharge circuit 30 is turned on for a certain time interval, for example, D2. This interval is similarly created by the IC internal timer. When the switch 32 is closed, the capacitor microphone and the JFET gate capacitance are instantaneously discharged, and the time delay that was a problem of the prior art is eliminated.

  This will be described more specifically with reference to the timing chart of FIG. For example, when a sensitivity switching signal for raising the bias voltage from about 12V to about 24V is received, the switch 37 of the charging circuit 35 is closed and the output of the bias power supply circuit 11 is applied to the high resistance 3. The timer 41 operates simultaneously, and for example, charging is performed rapidly via the charging resistor 36 for about 1 u seconds to 100 u seconds. When the preset charging time ends, the switch 37 is opened and the charging circuit 35 is opened. The above is an example, and the charging circuit 35 operates in the same manner when the bias voltage is increased even when switching the sensitivity to two or more, that is, a plurality of preset bias voltages.

  Further, for example, when a sensitivity switching signal that is lowered from about 24V to about 12V is received, the discharge circuit 30 operates, the switch 32 is closed, and the discharge is performed rapidly via the discharge resistor 31. The time during which the switch 32 is closed is also determined by the setting of the timer 41. For example, rapid discharge is performed for about 1 to 100 u seconds. This discharge is also employed as a rapid discharge operation when a setting change that lowers the voltage value, that is, a change that lowers the sensitivity, is performed when selecting a plurality of preset bias voltages. Accordingly, it can be said that a discharge circuit as a rapid discharge means is provided. For example, in order to enable switching between three types of bias voltages, that is, three bias voltages, the feedback resistor portion of the bias power supply circuit 11, that is, portions corresponding to 231 and 232 in FIG. By adding another one, it is possible to easily change the data processing unit 235, the storage unit 236, the switching circuit, and the like as three feedback resistor units correspondingly.

  As a result, there is no need for a high resistance of about 1 GΩ for discharge between the JFET gate and source for discharging the capacitor microphone capacity and the JFET gate capacity in the conventional configuration, and there is no noise source due to this high resistance. The characteristics can be improved. In addition, a low-pass filter can be configured with a high bias resistance, condenser microphone, and JFET gate capacitance, and wow and flutter outside the audible range can be removed.

  The power supply circuit 16 can also be configured by one chip of an LSI or a semiconductor device. In this case, as viewed from the output terminal, a resistor is inserted in series with the charging circuit, the bias power supply circuit, and the discharge circuit, and the electrostatic withstand voltage of the output terminal of the power supply circuit (not shown) is increased.

    Next, a third embodiment will be described with reference to the control timing chart of FIG. The circuit configuration of the third embodiment is the same as that of the second embodiment, but the discharge circuit 30 is also controlled when the power supply voltage is raised and lowered, as in the first embodiment. That is, when the power supply voltage is raised and lowered, the control unit (CPU) turns on the switch 32 of the discharge circuit 30 so that the bias voltage to the capacitor microphone is not instantaneously applied. For this reason, the generation of noise can be suppressed without applying a transient overshoot voltage for bias application to the condenser microphone. In this case, the time during which the switch is closed is set by a timer.

  It should be noted that the set times by the timer 41, that is, the D3 and D4 times, are preferably set to be approximately the time during which a transient bias fluctuation occurs at the rise and fall of the power supply. Specifically, it is determined depending on the characteristics of each power supply, but the time may be approximately the same for both rising and falling. More simply, it may be closed, for example, for about 1 to 100 μs, similarly to the D1 and D2 times of the first embodiment. Further, it may be the same as the D2 time of the second embodiment, that is, for example, it may be closed for about 1 to 100 μsec.

  A fourth embodiment is shown in FIG. In this embodiment, a charge / discharge switch 38 is provided as a rapid discharge means. The charge / discharge switch 38 is connected in parallel to both ends of the high resistance 3. Here, since the output impedance of the bias power supply circuit 11 is normally a low value of about 100 kΩ to 1000 kΩ, when the high resistance 3 is bypassed by the switch 38, charging and discharging are performed in a short time. A resistor 39 having a resistance value of about 100 kΩ to 1000 kΩ is provided between the high resistance 3 and an output terminal (not shown). This resistor 39 may be omitted.

  With the above configuration, since the capacitor is biased with low impedance, the functions of the discharging circuit 30 and the charging circuit 35 are substituted. Therefore, it can be said that both the rapid discharge means and the rapid charge means are provided. Also, the output of the bias power supply circuit in this case can be expressed as a push-pull configuration, that is, a configuration capable of discharging and sucking current with respect to the capacitor microphone bias. Next, the switch 38 is connected to both ends of the high resistance, and when switching the bias voltage, the instantaneous time switch 38 is closed and then opened, that is, opened and closed, by a sensitivity switching signal from a control unit (CPU or the like). When the switch 38 is closed, the high resistance 3 is bypassed and the step-up / step-down is performed in a short time.

  Although the present invention has been described with reference to some embodiments, the present invention is not limited only to the configuration of the above embodiments, and various types that can be made by those skilled in the art within the scope of the present invention. Of course, it includes deformation and correction. For example, in each of the above embodiments of the present invention, the power supply 1C circuits 15 and 16 are each configured as one semiconductor chip. However, they are not necessarily limited to one chip, and are configured as separate chips. Of course, the high resistance 3 may be externally attached. In the second to fourth embodiments, examples of bias power supply circuits having two sensitivities are introduced. For example, the present invention is applied to a bias power supply circuit having two or more such as three sensitivities, that is, a plurality of sensitivities. Of course, it may be.

  Furthermore, the condenser microphone referred to in the present invention refers to a so-called capacitance type microphone. Accordingly, it is needless to say that the capacitor microphone (portion corresponding to reference numeral 1 in FIGS. 3, 4 and 7) may be constituted by a semiconductor element or a semiconductor integrated circuit.

1 shows a power supply circuit and a condenser microphone device according to a first embodiment of the present invention. The control timing diagram of the discharge circuit by the 1st Embodiment of this invention is shown. 3 shows a power supply circuit and a condenser microphone device according to a second embodiment of the present invention. 5 shows a bias power supply circuit used in a second embodiment of the present invention. The control timing diagram of the discharge circuit by the 2nd Embodiment of this invention and a charging circuit is shown. The control timing diagram of the discharge circuit by the 3rd Embodiment of this invention and a charging circuit is shown. The modification of a charging circuit is shown among the power supply circuits by the 4th Embodiment of this invention. 1 shows a schematic configuration of a conventional condenser microphone device.

Explanation of symbols

1 Capacitor microphone 3 Resistor 4 Capacitor 5 JFET
6 Load resistance
10, 11, 12 Bias power supply circuit 15, 16, 17 Power supply circuit
DESCRIPTION OF SYMBOLS 21 Power supply booster 22 Regulator part 23 Output voltage setting part 30 Discharge circuit 31 Discharge resistance 32, 37, 38 Switch 35, Charging circuit 36, Charging resistance 39 Resistance 40, 41, 42 Timer-
50 Sensitivity switching signal 100, 101, 201, 202 Condenser microphone unit

Claims (11)

A power supply circuit for supplying a bias voltage to a microphone unit including an amplifying element, a capacitor, and a condenser microphone,
The power supply circuit is
To generate a predetermined bias voltage by receiving power supply voltage, and a bias power supply circuit for supplying the bias voltage to the condenser microphone,
A high resistance connected between the bias power supply circuit and the condenser microphone ;
A discharge circuit having one end connected to a node between the high resistance and the condenser microphone, and the other end connected to a ground terminal of the power supply circuit ,
The discharge circuit includes a discharge resistor and a discharge switch connected in series between the node between the high resistance and the condenser microphone and the ground terminal of the power supply circuit,
The bias power supply circuit is connected to a control terminal of the amplifying element through the high resistance,
A power supply circuit that discharges electric charge staying at the control terminal of the amplification element by closing the discharge switch for a predetermined time . According to claim 1, wherein the bias power supply circuit in response to the sensitivity switching signal from the external power supply circuit, characterized in that for outputting one of the plurality of bias voltages selectively. 3. The first timer according to claim 2, further comprising: a first timer that closes the discharge switch for a predetermined time from the start of the decrease in the bias voltage in response to the sensitivity switching signal when the bias voltage selected by the bias power supply circuit decreases. A power supply circuit comprising: The charging circuit according to claim 2 or 3 , further comprising a charging circuit connected in parallel between both terminals of the high resistance,
The charging circuit includes a charging switch and a charging resistor ,
A power supply circuit that charges the capacity of the control terminal of the amplifying element by closing the charging switch for a predetermined time . 5. The power supply circuit according to claim 4, further comprising a second timer that closes the charging switch for a predetermined time in response to the sensitivity switching signal when a bias voltage selected by the bias power supply circuit increases. . A power supply circuit for supplying a bias voltage to a microphone unit including an amplifying element, a capacitor, and a condenser microphone,
The power supply circuit is
A bias power supply circuit that receives a power supply voltage, generates a predetermined bias voltage, and supplies the bias voltage to the capacitor microphone;
A high resistance connected between the bias power supply circuit and the condenser microphone;
A charge / discharge switch connected in parallel with the high resistance between both terminals of the high resistance ,
The power supply circuit is connected to the control terminal of the amplification element via the high resistance,
The power supply circuit according to claim 1, wherein the charge / discharge switch is closed for a predetermined time to discharge a charge accumulated in the control terminal of the amplifying element or to charge a capacity of the control terminal of the amplifying element . The bias power supply circuit according to claim 6 , wherein the bias power supply circuit selectively outputs any one of a plurality of bias voltages in response to an external sensitivity switching signal.
The power supply circuit further comprising: a third timer for closing the charge / discharge switch for a predetermined time in response to the sensitivity switching signal when a bias voltage selected by the bias power supply circuit changes . In claim 7,
When the bias voltage selected by the bias power supply circuit rises, the third timer closes the charge switch for a predetermined time in response to the sensitivity switching signal, so that the capacitance of the control terminal of the amplifying element is charged. And
When the bias voltage selected by the bias power supply circuit drops, the third timer closes the charge switch for a predetermined time in response to the sensitivity switching signal, so that the charge accumulated in the control terminal of the amplifying element. A power supply circuit characterized in that is discharged . In claim 1, the predetermined time and the bias power supply circuit from the start of application of a voltage to the bias supply circuit a predetermined time before turning off, in response to an external control signal, the closing of the fourth the discharge switch A power supply circuit further comprising a timer. In any of claims 1 to 9, wherein the power supply circuit, power supply circuit, characterized in that it is constituted by a one-chip LSI. A microphone unit comprising the power supply circuit according to any one of claims 1 to 10.

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