JP4691127B2 - Amplifier circuit - Google Patents

Description

  The present invention relates to an amplifier circuit technique, and more particularly to a technique for amplifying and outputting a burst signal including the same code continuous section.

  In optical transmission circuits such as optical transmission systems, optical interconnections, and passive optical network (hereinafter referred to as PON) systems that enable high-speed data transmission, amplification is performed in optical receiving circuits that convert optical signals into electrical signals. Use a circuit. As this amplifier circuit, there is a case where a limiting amplifier that amplifies an input signal whose amplitude changes and saturates the amplitude to output with a constant amplitude may be used.

In particular, the PON system requires high sensitivity, a wide input dynamic range, and burst response. FIG. 7 shows a configuration example of the PON system. This PON system includes one station side device (OLT: Optical Line Terminal) 60 and a plurality of home side devices (ONU: Optical Network Unit) 51, and includes a passive device such as an optical coupler 52 and an optical fiber 53. Connected through.
At this time, the upstream (from ONU to OLT) packet from each home-side device 51 to the station-side device 60 has different optical power when reaching the station-side device 60 due to the difference in each path. For this reason, a wide dynamic range is required for the optical receiving circuit of the station side device 60.

FIG. 8 is a configuration example of a packet transmitted as uplink data of the PON system. In the PON system, while a home device is sending packets (packet period), other home devices cannot send packets. Therefore, to increase transmission efficiency, it is necessary to shorten the time between packets. is there. Therefore, as shown in FIG. 8, a specific bit called a preamble 71 is prepared at the head of the packet 70 and is used by the station side device 60 for packet synchronization.
As described above, due to the optical power difference Pd when reaching the station-side device 60, the signal amplitude of each packet 70 is different for each packet. Further, in order to increase the transmission efficiency, it is necessary to synchronize the packet with the short preamble 71 and receive the subsequent payload 72, and an optical receiving circuit capable of switching the gain in the period of the preamble 72 is required. .

  FIG. 9 is a configuration example of a main part of the optical receiving circuit of the station side device. FIG. 10 is a signal waveform diagram in each part of the optical receiving circuit of the station side device. As shown in FIGS. 9 and 10, the station side device 60 separates an optical signal received via the optical fiber 53 by a coupler (WDM) 61 and performs photoelectric conversion by a light receiving element of a transimpedance amplifier (TIA) 62. After that, it is differentially output as a burst signal having an amplitude corresponding to the received light intensity, and is amplified by the amplifier circuit (LA) 63 so as to have a constant amplitude.

  FIG. 11 is a block diagram showing an amplifier circuit of a feedback type automatic offset compensation system. The amplifying circuit amplifies burst signals having different amplitudes and saturates the amplitudes to output them at a constant amplitude. At this time, the differential signal from the transimpedance amplifier 62 does not necessarily match the direct-current offset voltage of the positive phase signal and the negative phase signal completely, and has a waveform as shown in FIG. Entered. Therefore, in order to output a burst signal without distortion in the amplifier circuit 63, it is necessary to automatically compensate the DC offset voltage appropriately and in a short period for each burst waveform corresponding to the packet.

  One such automatic offset compensation method (AOC: Auto-Offset Compensation) is a feedback type method. As shown in FIG. 11, this feedback type AOC circuit 80 has an offset voltage holding circuit composed of, for example, a plurality of amplifiers (differential amplifiers) 82 to 84 connected in series and a low-pass filter provided between these amplifiers 82 to 84. And a circuit 85. In this example, the DC offset voltage from the output signal of the amplifier 84 is held by the capacitive element of the offset voltage holding circuit 85, and the DC offset voltage of the input signal to the amplifier 82 is compensated by the DC offset voltage. .

  At this time, since the DC offset voltage differs for each burst waveform, it is necessary to detect the DC offset voltage optimum for the burst waveform in the preamble period at the head of the burst waveform and hold it by the capacitive element of the offset voltage holding circuit 80. For this reason, the time constant of the offset voltage holding circuit 80 depends on the length of the preamble period, and when the preamble period is shortened in order to increase the transmission efficiency, the time constant of the offset voltage holding circuit 80 is reduced and the response is improved. There was a need to improve.

"High-Speed CMOS Circuits for Optical Receivers", J. Savoj and B. Razavi, pp16-19, Kluwer Academic Publishers, (2001)

  However, in such a conventional technology, when the time constant of the offset voltage holding circuit is reduced in the feedback type automatic offset compensation method, the offset holding circuit 85 holds the capacitor in the same code continuous section that may occur in the burst signal. Since the generated voltage fluctuates in the same sign continuous voltage direction in a short time, there is a problem that it is impossible to achieve both responsiveness to the DC offset voltage and the same code continuous resistance.

  In general, in an optical signal, a maximum same code continuous section in which the same code can be used as a continuous bit is defined. Therefore, when the time constant of the offset voltage holding circuit is reduced, the DC offset can be detected in a short preamble period, but the DC offset varies in the same code continuous section. Further, when the time constant of the offset voltage holding circuit is increased, the DC offset voltage cannot be detected in a short preamble period, although the fluctuation of the DC offset in the same code continuous section can be suppressed.

  An object of the present invention is to solve such a problem, and an object of the present invention is to provide an amplifier circuit capable of achieving both responsiveness to a DC offset voltage and the same code continuity tolerance.

  In order to achieve such an object, the amplifier circuit according to the present invention calculates the DC offset voltage of the input burst signal based on the DC offset voltage detected and held by the time constant variably controlled by the time constant control signal. A feedback type offset compensation circuit that compensates and outputs, a pulse detection circuit that detects the presence or absence of a pulse from a burst signal and outputs it as a pulse detection signal, and a time constant is set in the pulse detection period according to the pulse detection signal. And a time constant control circuit that outputs a time constant control signal for increasing the time constant to the offset compensation circuit during a pulse non-detection period.

  At this time, the pulse detection circuit may be provided with a feedback type pulse detection offset compensation circuit that compensates and outputs the DC offset voltage of the burst signal with a time constant smaller than the minimum time constant of the offset compensation circuit.

  The pulse detection circuit may further include an edge detection circuit that detects a pulse edge included in the output signal of the pulse detection offset compensation circuit and outputs a pulse synchronized with the edge as a pulse detection signal.

  In addition, the time constant control circuit includes a capacitive element that holds a voltage corresponding to the magnitude of the time constant, a charging time constant circuit that charges the voltage with a predetermined charging time constant, and discharges the voltage according to the pulse detection signal. Active elements may be provided.

According to the present invention, when a burst waveform arrives, the pulse is detected and the offset voltage detection time constant of the offset compensation circuit is controlled to a small value, and an output burst signal having a stable waveform is output in a short time. Is possible. Further, when the same code continuous section arrives, the pulse is not detected, and the offset voltage detection time constant of the offset compensation circuit is controlled to a large value, and the fluctuation of the offset voltage detection time constant in the same code continuous section is suppressed. It becomes possible.
Therefore, in the amplifier circuit, it is possible to achieve both responsiveness to the DC offset voltage and the same code continuity tolerance, and it is possible to improve transmission efficiency by shortening the preamble period.

Next, embodiments of the present invention will be described with reference to the drawings.
[Configuration of the embodiment]
First, an amplifier circuit according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram showing a configuration of an amplifier circuit according to an embodiment of the present invention. FIG. 2 is a block diagram showing a configuration of an AOC circuit used in the amplifier circuit according to the embodiment of the present invention. FIG. 3 is a configuration example of a variable capacitance element used in the AOC circuit of FIG. FIG. 4 is a block diagram showing a configuration of a pulse detection circuit used in the amplifier circuit according to the embodiment of the present invention. FIG. 5 is a configuration example of a time constant control circuit used in the amplifier circuit according to the embodiment of the present invention.

  The amplifier circuit 1 is an amplifier circuit that amplifies the input burst signal Vin and outputs an output burst signal Vout having a constant amplitude. As a specific application example of the amplifier circuit 1, in the optical receiver circuit of the home side apparatus used in the PON system as described in FIG. 7 described above, the signal is transmitted from the home side apparatus by the transimpedance amplifier (TIA). There is a limiting amplifier (LA) that photoelectrically converts the optical signal and differentially outputs it as a burst signal having an amplitude corresponding to the received light intensity, and then amplifies the burst signal to have a constant amplitude.

  The amplifier circuit 1 according to the present embodiment includes a pulse detection circuit 20 and a time constant control circuit 30. The pulse detection circuit 20 detects the presence / absence of a pulse from the burst signal n and outputs it as a pulse detection signal. The circuit 30 outputs to the AOC circuit 10 a time constant control signal for reducing the time constant during the pulse detection period and increasing the time constant during the pulse non-detection period according to the pulse detection signal. Yes.

  The AOC circuit 10 is a feedback type offset compensation circuit, and has a function of compensating and amplifying the DC offset voltage of the input burst signal Vin and outputting it as an output burst signal Vout. Specifically, as shown in FIG. 2, the AOC circuit 10 includes a plurality of amplifiers (differential amplifiers) 11 to 12 connected in multiple stages and an output burst signal Vout of the amplifier 12 at the last stage, at a predetermined time. Offset voltage holding circuits 13 and 14 composed of a low-pass filter or the like for detecting and holding the DC offset voltage 15 with a constant ta, and based on the DC offset voltage detected by the offset voltage holding circuits 13 and 14, In the amplifier 11, the DC offset voltage of the input burst signal Vin is compensated.

  Further, the offset voltage holding circuits 13 and 14 include variable capacitance elements C1 and C2 in their time constant circuits, respectively, and the magnitude of the capacitance of the variable capacitance elements C1 and C2 is controlled by the time constant control signal 30S. The magnitude of the time constant of the voltage holding circuits 13 and 14 can be controlled. As a specific configuration example of the variable capacitance elements C1 and C2, for example, there is a MOS varactor as shown in FIG. In this MOS varactor, the drain terminals and the source terminals of the MOSFETs M1 and M2 are connected in common, and the capacitance between the gate terminals of the MOSFETs M1 and M2 changes by changing the voltage of the common connection node by a time constant control signal. .

  The pulse detection circuit 20 has a function of detecting the presence or absence of a bit pulse included in the input burst signal Vin and outputting it as a pulse detection signal. Specifically, as shown in FIG. 4, a feedback type AOC circuit 21 equivalent to the AOC circuit 10 and an edge detection circuit 27 may be used.

  The AOC circuit 21 of FIG. 4 has a time constant tb smaller than the minimum value of the time constant ta of the AOC circuit 10 from the output signals of a plurality of amplifiers (differential amplifiers) 22 to 23 connected in multiple stages and the amplifier 23 of the last stage. Offset voltage holding circuits 24 and 25 made of a low-pass filter or the like for detecting and holding the DC offset voltage at the first and second amplifiers 22 based on the DC offset voltage from the offset voltage holding circuits 24 and 25. The DC offset voltage of the input burst signal Vin is compensated.

One of the positive output and the negative output of the output signal of the amplifier 23 at the last stage of the AOC circuit 21 is output to the edge detection circuit 27 as the pulse signal 26.
The edge detection circuit 27 has a function of detecting an edge of the pulse signal 26 output from the AOC circuit 21 and outputting a pulse synchronized with the edge as the pulse detection signal 20S.

  The input burst signal Vin input to the amplifier circuit 1 is a signal in which a burst waveform consisting of a bit signal group corresponding to a packet intermittently appears with a predetermined interval or more as shown in FIG. I am doing. These burst waveforms are assumed to have different amplitudes. The burst waveform of the input burst signal Vin may include the same code continuously, and its section length is defined in advance as the maximum same code continuous section length. Further, the maximum length of the same code continuous section is assumed to be shorter than the minimum of the burst waveform, that is, the minimum length between the bursts (guard time).

  In response to the pulse detection signal from the pulse detection circuit 20, the time constant control circuit 30 decreases the time constant of the AOC circuit 10 during the pulse detection period in which the pulse is detected from the input burst signal Vin, and the pulse from the input burst signal Vin. This function has a function of outputting a time constant control signal for increasing the time constant of the AOC circuit 10 to the AOC circuit 10 during a pulse non-detection period during which no detection is possible. Specifically, the time constant control circuit 30 may be configured by a charge / discharge circuit that charges and discharges the time constant control voltage based on the pulse detection signal 20S, as shown in FIG.

  The time constant control circuit 30 of FIG. 5 includes a capacitive element C3 that holds a time constant control voltage corresponding to the magnitude of the time constant of the AOC circuit 10, and a resistance element that charges the time constant control voltage with a predetermined charging time constant. R1 and a MOSFET (active element) M3 connected to both ends of the capacitive element C3 and discharging a time constant control voltage in response to the pulse detection signal 20S. The voltage charged in the capacitive element C3 is It is output as a time constant control signal 30S.

As a result, during the pulse detection period of the input burst signal Vin, the MOSFET M3 is turned on by the pulse detection signal 20S, and the time constant control voltage of the capacitive element C3 is discharged, and a low voltage is applied to the variable capacitive elements C1 and C2 of the AOC circuit 10. (Ground potential) is applied. As a result, the capacitances of the variable capacitance elements C1 and C2 are reduced, and the time constants of the offset voltage holding circuits 13 and 14 are reduced.
On the other hand, during the pulse non-detection period of the input burst signal Vin, the MOSFET M3 is rendered non-conductive by the pulse detection signal 20S and the time constant control voltage of the capacitive element C3 is charged, and the high voltage is applied to the variable capacitive elements C1 and C2 of the AOC circuit 10. (Power supply potential) is applied. Thereby, the capacitances of the variable capacitance elements C1 and C2 are increased, and the time constants of the offset voltage holding circuits 13 and 14 are increased.

[Operation of this embodiment]
Next, the operation of the amplifier circuit according to the embodiment of the present invention will be described with reference to FIG. FIG. 6 is a signal waveform diagram showing the operation of the amplifier circuit according to the embodiment of the present invention.

  In FIG. 6, since the period before time T1 is the interval between bursts, the pulse detection signal 20S indicates that no pulse is detected, and the time constant control signal 30S indicates a high voltage. Therefore, the offset voltage detection time constant ta of the AOC circuit 10 is controlled to a large value.

  When a burst waveform arrives at time T1, detection of the DC offset voltage is started in the AOC circuit 10 and the AOC circuit 21 of the pulse detection circuit 20. At this time, the offset voltage detection time constant tb of the AOC circuit 21 is smaller than the time constant ta of the AOC circuit 10. Therefore, the DC offset voltage of the AOC circuit 21 converges earlier, the pulse detection signal 20S is output earlier, and the time constant control signal 30S corresponding to a smaller time constant is output from the time constant control circuit 30.

  Therefore, in the pulse detection period after time T1, the time constant of the AOC circuit 10 is small, and therefore the output burst signal Vout of the AOC circuit 10 is compared with the time Tb when the output burst signal Vout ′ in the case of a large time constant is stabilized. Thus, a stable waveform is obtained at a time Ta, which is a short time from the beginning of the burst.

Subsequently, at time T3, when the same code continuous section arrives, the pulse detection signal 20S indicates that no pulse is detected, and the voltage of the time constant control signal 30S increases. Therefore, the offset voltage detection time constant ta of the AOC circuit 10 is controlled to a large value.
Thereafter, when the same code continuation period ends at time T4, the pulse detection signal 20S indicates pulse detection, and the voltage of the time constant control signal 30S decreases. Therefore, the offset voltage detection time constant ta of the AOC circuit 10 is controlled to a small value.

Accordingly, in the same code continuous section, the offset voltage detection time constant ta of the AOC circuit 10 is temporarily controlled to a large value, and the fluctuation of the DC offset voltage in the same code continuous section is suppressed. Further, the value is immediately controlled to a small value according to the burst waveform resumed at time T3. As a result, the AOC circuit 10 can detect and hold an appropriate DC offset voltage in a short time from the time T3, and the output burst signal Vout has a stable waveform.
Thereafter, when the rear end of a series of burst waveforms appears at time T4, the pulse detection signal 20S indicates that no pulse is detected, and the voltage of the time constant control signal 30S increases. Therefore, the offset voltage detection time constant ta of the AOC circuit 10 is controlled to a large value.

[Effects of the present embodiment]
As described above, in the present embodiment, the pulse detection circuit 20 and the time constant control circuit 30 are provided, and the pulse detection circuit 20 detects the presence / absence of a pulse from the burst signal n and outputs it as a pulse detection signal. The circuit 30 outputs to the AOC circuit 10 a time constant control signal for reducing the time constant during the pulse detection period and increasing the time constant during the pulse non-detection period according to the pulse detection signal. Yes.

Thereby, when a burst waveform arrives, the pulse is detected and the time constant for detecting the offset voltage of the AOC circuit 10 is controlled to a small value, and the output burst signal Vout having a stable waveform can be output in a short time. It becomes. Further, when the same code continuous section arrives, the pulse is not detected and the offset voltage detection time constant of the AOC circuit 10 is controlled to a large value, and the fluctuation of the offset voltage detection time constant in the same code continuous section is suppressed. It becomes possible.
Therefore, in the amplifier circuit, it is possible to achieve both responsiveness to the DC offset voltage and the same code continuity tolerance, and it is possible to improve transmission efficiency by shortening the preamble period.

[Extended embodiment]
The above embodiment is based on the premise that the amplifier circuit is used in the optical receiver circuit of the home-side apparatus used in the PON system. Further, when the burst signal is a differential signal, the amplitude is saturated to obtain a constant amplitude. Although the description has been made on the assumption that the limiting amplifier is obtained, the specific application example is not limited to this, and the burst signal in which the minimum inter-burst section length and the maximum same code continuous section length are defined as described above is used. Each embodiment of the present invention can be applied to the amplifier circuit for amplifying the signal in the same manner as described above, and the same operational effects can be obtained.

  In the above embodiment, as shown in FIG. 1, the configuration in which the input burst signal Vin is directly input to the AOC circuit 10 has been described as an example. However, the input burst signal Vin is input to the AOC circuit 10 via an amplifier. Each of the embodiments of the present invention can also be applied to the configuration example inputted to the same manner as described above.

  Further, in the above embodiment, as shown in FIG. 4, the configuration using the feedback type AOC circuit 21 in the pulse detection circuit 20 has been described as an example. For example, the positive output and the negative output of the input burst signal Vin are described. The pulse of the input burst signal Vin may be detected and output as the pulse signal 26 by comparing any one of the signals and the threshold voltage with a comparator.

It is a block diagram which shows the structure of the amplifier circuit concerning one embodiment of this invention. It is a block diagram which shows the structure of the AOC circuit used with the amplifier circuit concerning one embodiment of this invention. 3 is a configuration example of a variable capacitance element used in the AOC circuit of FIG. 2. It is a block diagram which shows the structure of the pulse detection circuit used with the amplifier circuit concerning one embodiment of this invention. It is a structural example of the time constant control circuit used with the amplifier circuit concerning one embodiment of this invention. It is a signal waveform diagram which shows operation | movement of the amplifier circuit concerning one embodiment of this invention. It is a structural example of a PON system. It is an example of a structure of the packet transmitted as upstream data of a PON system. It is a principal part structural example of the optical receiver circuit of a station side apparatus. It is a signal waveform diagram in each part of the optical receiver circuit of the station side device. It is a block diagram which shows the amplifier circuit of a feedback type automatic offset compensation system.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Amplifier circuit, 10 ... AOC circuit, 11, 12 ... Amplifier, 13, 14 ... Offset voltage holding circuit, 20 ... Pulse detection circuit, 20S ... Pulse detection signal, 21 ... AOC circuit, 22, 23 ... Amplifier, 24, 25 ... offset voltage holding circuit, 26 ... pulse signal, 27 ... edge detection circuit, 30 ... time constant control circuit, 30S ... time constant control signal, C1, C2 ... variable capacitance elements.

Claims (4)

A feedback type offset compensation circuit that compensates and outputs the DC offset voltage of the input burst signal based on the DC offset voltage detected and held by the time constant variably controlled by the time constant control signal;
A pulse detection circuit that detects the presence or absence of a pulse from the burst signal and outputs it as a pulse detection signal;
In response to the pulse detection signal, the time constant is decreased during the pulse detection period, and the time constant control signal for increasing the time constant is output to the offset compensation circuit during the non-detection period of the pulse. An amplifier circuit comprising: a time constant control circuit. The amplifier circuit according to claim 1,
The pulse detection circuit includes a feedback type pulse detection offset compensation circuit that compensates and outputs a DC offset voltage of the burst signal with a time constant smaller than a minimum time constant of the offset compensation circuit. circuit. The amplifier circuit according to claim 2,
The pulse detection circuit further includes an edge detection circuit that detects an edge of a pulse included in an output signal of the pulse detection offset compensation circuit and outputs a pulse synchronized with the edge as the pulse detection signal. Amplifying circuit. The amplifier circuit according to claim 1,
The time constant control circuit includes a capacitive element that holds a voltage according to the magnitude of the time constant, a charging time constant circuit that charges the voltage with a predetermined charging time constant, and the voltage according to the pulse detection signal. An amplifier circuit comprising: an active element that discharges the current.

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