JP4578826B2 - Method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a conductor film by a plasma CVD method, a semiconductor device having a circuit including a thin film transistor (hereinafter referred to as TFT) using the semiconductor film, and a method for manufacturing the semiconductor device. For example, the present invention relates to a photoelectric conversion device typified by a solar cell or a sensor, an electro-optical device typified by a liquid crystal display panel, or an electronic device in which a light emitting device is mounted as a component.

  Note that in this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and an electro-optical device, a light-emitting device, a semiconductor circuit, and an electronic device are all semiconductor devices.

  In recent years, a technique for forming a thin film transistor (TFT) using a semiconductor thin film (having a thickness of about several to several hundred nm) formed on a substrate having an insulating surface has attracted attention. TFTs are widely applied to electronic devices such as ICs and electro-optical devices, and development of switching elements for image display devices (display panels) is urgently required.

  Silicon is mainly used as the material for the active layer of the TFT. Conventionally, a TFT has been formed using an amorphous silicon film (amorphous silicon film).

  In the past, production techniques have been employed in which a plurality of panels are cut out from a single mother glass substrate to efficiently perform mass production. The size of the mother glass substrate was increased from 300 x 400 mm of the first generation in early 1990 to the fourth generation in 2000 and increased to 680 x 880 mm or 730 x 920 mm. Production technology has progressed so that

  At the same time as increasing the substrate size, there is an increasing demand for improved productivity and lower costs.

  In recent years, in order to obtain higher performance, an attempt has been made to fabricate a TFT having a polysilicon film as an active layer (hereinafter also referred to as a polysilicon TFT) instead of an amorphous silicon film. Since this polysilicon TFT has high field effect mobility, it is also possible to form circuits having various functions.

  In the prior art, a polysilicon film is produced by heat treatment or laser annealing (a technique for crystallizing a semiconductor film by laser irradiation) on an amorphous semiconductor film deposited by plasma CVD or low pressure CVD. ing. In the plasma CVD method, an amorphous semiconductor film can be formed at a relatively low temperature (about 400 ° C.).

  In the case of manufacturing by heat treatment, in order to crystallize the amorphous silicon film, heat treatment for 10 hours or more is required at a temperature of 600 ° C. or higher, and this treatment temperature uses a glass substrate having low heat resistance. Making it difficult. This processing temperature and processing time are not necessarily considered appropriate methods in consideration of TFT productivity.

  In the case of manufacturing by laser annealing, laser light irradiation is performed after dehydrogenation in which hydrogen in the amorphous silicon film is reduced by heat treatment. Although there is no problem of processing temperature, a laser irradiation apparatus for dealing with a large-area substrate requires a precise optical design and a large-scale optical system (lens, etc.), and equipment costs are increased. In addition, since it is difficult to irradiate a large area substrate with uniform laser light, it is difficult to obtain a uniform crystal over a wide area. Therefore, considering the productivity when using a large area substrate, it is not always considered an appropriate method.

In addition, the present applicant discloses a technique described in Patent Document 1 as one technique for obtaining a polysilicon film on a glass substrate. The technology described in this publication is a technique in which a metal element (typically nickel) that promotes crystallization is selectively added to an amorphous silicon film, and heat treatment is performed to expand polysilicon starting from the added region. A film is formed, and the size of the obtained crystal grains is very large. In addition, the above publication technique can lower the crystallization temperature of the amorphous silicon film by about 50 to 100 ° C. by the action of the metal element as compared with the case where crystallization is performed without using the metal element. The time required for this can be reduced to 1/5 to 1/10 compared to the case of performing crystallization without using a metal element, and the productivity is also excellent.
JP-A-8-78329

  If the description in Patent Document 1 is used, a glass substrate can be used. However, since a metal element that promotes crystallization is added, the metal element remains in the polysilicon film or in the film surface. However, there is a problem that the characteristics of the obtained element are varied. Therefore, a gettering process must be performed as a method for removing a metal element that promotes crystallization, and the number of processes has increased.

  In order to form a polysilicon film produced by the conventional method at a low temperature on an inexpensive transparent insulating substrate having a large area, it is not suitable for mass production.

  In addition, when using a plasma CVD method in which film formation is performed while heating at 480 ° C. or more in order to reduce the hydrogen concentration in the film, a film formed from a material having low heat resistance as a base film, typically In the case where an organic resin such as acrylic, aluminum wiring, or the like is used, conventionally, it has not been possible to form a semiconductor film including a crystal structure directly on these using a plasma CVD method.

  In addition, when sputtering is used, film formation can be performed at a low temperature, so that the film can be directly formed on an organic resin substrate or an organic resin member having a low heat resistance temperature.

  However, the sputtering method is difficult and expensive to produce a target for a large area substrate, and the chamber cannot be self-cleaned, and the chamber must be opened for maintenance. There are problems such as that the impurities in the atmosphere are easily mixed in the film during film formation, and impurities in the target are mixed in the product.

Accordingly, an object of the present invention is to provide a film forming method for directly depositing a semiconductor film including a crystal structure at a low temperature on an inexpensive large-area transparent insulating substrate. Another object is to form a semiconductor film including a crystal structure in a short processing time without increasing the number of steps.

In addition, the present invention also provides a semiconductor device using a semiconductor film including the obtained crystal structure and a manufacturing method thereof.

The present invention uses a plasma CVD method to introduce a silicide gas (monosilane, disilane, trisilane, etc.) and fluorine (or halogen fluoride gas) as source gases into a film formation chamber and generate plasma to generate a semiconductor having a crystal structure. A film is directly formed on a substrate to be processed. Rather than reducing the hydrogen concentration in the film by high-temperature heating to form a semiconductor film containing a crystal structure, in the present invention, the film growth reaction by the deposition of SiH ₃ radicals and the extraction (etching) reaction by F radicals And a semiconductor film including a crystal structure is formed. The film formation method of the present invention is a film formation method that can directly obtain a film having characteristics superior to those of an amorphous semiconductor film on a substrate to be processed, has a short tact time, and is suitable for mass production.

  According to the present invention, a semiconductor film including a crystal structure can be formed at a low temperature over an inexpensive large-area transparent insulating substrate. The low temperature here refers to a temperature within a range that an inexpensive glass substrate can withstand. Further, a semiconductor film including a crystal structure can be directly formed even when a film formed of a material having low heat resistance, typically an organic resin such as acrylic, an aluminum wiring, or the like is used as the base film. The obtained film is a semiconductor having an intermediate structure between an amorphous structure and a crystalline structure (including single crystal and polycrystal) and having a third state that is stable in terms of free energy, and has a short-range order. And a semi-amorphous semiconductor film (also referred to as a microcrystalline semiconductor film or a microcrystal semiconductor film) including a crystalline region having lattice distortion.

  In addition, the present invention realizes various semiconductor devices by using a semi-amorphous semiconductor film (also referred to as a microcrystalline semiconductor film or a microcrystalline semiconductor film) as an active layer of a TFT.

The configuration of the invention disclosed in this specification is as follows.
A semiconductor characterized by introducing a silicide gas and fluorine or halogen fluoride gas as a source gas into a film formation chamber and generating a plasma to form a semiconductor film including a crystal structure on a surface of a substrate to be processed This is a film forming method.

In addition, the inner wall of the film formation chamber may be coated before film formation.
After introducing monosilane gas into the film formation chamber and generating plasma to form a thin film on the wall of the film formation chamber,
A semiconductor film forming method is characterized in that monosilane gas and fluorine or halogen fluoride gas are introduced as source gases, plasma is generated, and a semiconductor film including a crystal structure is formed on a substrate to be processed.

  By coating the inside wall of the film formation with an amorphous silicon film before film formation, a coating for containing contaminants and foreign matters is performed, and then film formation is performed, whereby the impurity concentration in the film can be reduced. Further, cleaning may be performed before coating.

Further, a rare gas (one or a plurality selected from He, Ne, Ar, Kr, and Xe) may be used for diluting the carrier gas and the raw material gas.
Introducing a silicide gas, a rare gas, and fluorine or halogen fluoride gas into a film formation chamber as a source gas and generating plasma to form a semiconductor film including a crystal structure on the surface of the substrate to be processed This is a feature of a method for forming a semiconductor film.

Further, hydrogen may be used for diluting the raw material gas.
A semiconductor film including a crystal structure is formed on the surface of a substrate to be processed by introducing silicide gas, hydrogen, fluorine or halogen fluoride gas as source gases into a film formation chamber, and generating plasma. A method for forming a semiconductor film.

Further, hydrogen and a rare gas may be used for dilution of the carrier gas or the raw material gas.
A semiconductor film including a crystal structure is formed on the surface of the substrate to be processed by introducing silicide gas, rare gas, hydrogen, fluorine or halogen fluoride gas as source gases into the deposition chamber and generating plasma. A method for forming a semiconductor film, comprising:

However, when hydrogen is used, the ratio of the flow rate of hydrogen to the flow rate of the fluorine or halogen fluoride gas (H ₂ / F ₂ ) is controlled to 0.1 or less to form a semiconductor film including a crystal structure. It is a feature.

In each of the above structures, the silicide gas is any gas of monosilane, disilane, or trisilane. In each of the above structures, the halogen fluoride gas is any one of ClF, ClF ₃ , BrF, BrF ₃ , IF, and IF ₃ .

  In each of the above structures, the film formation is performed using a parallel plate plasma CVD apparatus.

Further, a semiconductor film obtained by the present invention is also one of the present invention, and the configuration of the present invention is as follows.
A semiconductor film having a crystal structure, which is deposited on a surface of a substrate to be processed by a plasma reaction between a silicide gas and fluorine or halogen fluoride gas using a parallel plate plasma CVD apparatus.

Further, a semiconductor device obtained by the present invention is also one of the present invention, and the configuration of the present invention is as follows.
On a substrate having an insulating surface, a gate electrode, and a gate insulating film thereon,
A semiconductor device comprising a TFT having, as an active layer, a semiconductor film including a crystal structure deposited by a plasma reaction between a silicide gas and fluorine or halogen fluoride gas on a gate insulating film .

In order to control the threshold voltage of the TFT, an element that imparts p-type to a semiconductor such as boron may be added to the active layer.
On a substrate having an insulating surface, a gate electrode, and a gate insulating film thereon,
On the gate insulating film, a semiconductor film including a crystal structure deposited by a plasma reaction between a silicide gas and fluorine or halogen fluoride gas is used as an active layer, and p-type is imparted to the semiconductor film. A semiconductor device comprising a TFT to which an element to be added is added to control a threshold voltage.

In the above structure, the gate electrode includes Ag, Al, Cu, Au, or a resin. Even after the gate electrode is formed of these low heat resistant materials, a semiconductor film including a crystal structure at a low temperature can be formed by a plasma CVD method using SiH ₄ and F ₂ as source gases.

  The semiconductor device is a video / audio bidirectional communication device or a general-purpose remote control device, an example of which is shown in FIG.

The semi-amorphous semiconductor film includes crystal grains of 0.5 to 20 nm in at least a part of the film. As for the semi-amorphous semiconductor film, the Raman spectrum is shifted to a lower wave number side than 520 cm ⁻¹ peculiar to the single crystal. In addition, diffraction peaks of (111) and (220) that are derived from the Si crystal lattice in X-ray diffraction are observed in the semi-amorphous semiconductor film. In addition, the semi-amorphous semiconductor film contains at least 1 atomic% or more of hydrogen or halogen as a neutralizing agent for dangling bonds. As a method for manufacturing a semi-amorphous semiconductor film, a silicide gas is formed by glow discharge decomposition (plasma CVD). The pressure is in the range of approximately 0.1 Pa to 133 Pa, and the power supply frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature may be 300 ° C. or less, preferably 100 to 250 ° C.

As the impurity element in the film, the impurity concentration of an atmospheric constituent such as carbon is preferably set to 3 × 10 ²¹ / cm ³ or less, in particular, oxygen concentration is 5 × 10 ¹⁹ / cm ³ or less, preferably 1 × 10 ¹⁹ / cm ³ or less. In order to reduce the impurity element in the film, it is desirable to increase the purity of the source gas, particularly the purity of fluorine or halogen fluoride gas. For example, F ₂ gas (10% dilution) having a purity of 3N or more is used. Alternatively, it is preferable to use _two gas systems without using carrier gas, and use F ₂ gas (1% dilution) using a balance gas with a purity of 4N or higher.

The field effect mobility μ of a TFT using a semi-amorphous semiconductor film as an active layer is ^{2 to 20} cm ² / Vsec.

  Further, the present invention can be applied regardless of the TFT structure, and for example, a bottom gate type (reverse stagger type) TFT or a forward stagger type TFT can be used. Further, the TFT is not limited to a single-gate TFT, and may be a multi-gate TFT having a plurality of channel formation regions, such as a double-gate TFT.

In addition, in order to reduce the number of gas supply systems of the film forming apparatus, film formation may be performed after using fluorine or halogen fluoride gas as a cleaning gas.
After introducing fluorine or halogen fluoride gas into the film formation chamber as a cleaning gas and cleaning the inside of the film formation chamber,
Monosilane gas and fluorine or halogen fluoride gas are introduced into the film forming chamber as source gases,
Forming a semiconductor film including a crystal structure by generating plasma on the surface of the substrate to be processed;
And forming a semiconductor film having a crystal structure by irradiating a semiconductor film having a crystal structure with laser light.

In addition to fluorine or halogen fluoride gas, a fluorine-based gas cleaning gas typified by CF ₄ , SF ₆ , NF ₃ or the like may be used. Further, as the cleaning gas, a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ , CCl ₄ or the like may be used.

  According to the present invention, a semiconductor film including a crystal structure with excellent characteristics can be directly formed at a low temperature on an inexpensive large-area transparent insulating substrate at a high film formation rate. In particular, when a TFT having a gate electrode made of a material having low heat resistance, for example, a metal wiring containing a resin, a semiconductor film including a crystal structure with excellent characteristics above the gate electrode without exceeding the heat resistant temperature of the gate electrode To form an active layer of a TFT. In addition, a semiconductor film including a crystal structure can be directly formed over a plastic substrate.

  Embodiments of the present invention will be described below.

(Embodiment 1)
A cross-sectional view of a processing chamber (also referred to as a chamber) of a parallel plate type plasma CVD apparatus used in the present invention will be described with reference to FIG. In FIG. 1, in a grounded chamber 108, a first electrode (upper electrode, shower electrode, high-frequency electrode) 121 connected to a high-frequency power source 105 and a second electrode (lower electrode, ground electrode) connected to a high-frequency power source 105. ) 125 is provided. A substrate 127 to be processed is placed on the second electrode.

  The first electrode 121 has a hollow structure, and the source gas supplied from the supply system 106a passes through the electrode, is ionized, and is supplied into the chamber. Although only one supply system is shown here, a plurality of gas supply systems can be provided as necessary.

  The chamber is provided with an exhaust system 107a for exhausting the exhaust gas after the reaction. In the present embodiment, the electrode structure is a hollow structure (a structure in which a plurality of shower plates overlap to disperse gas, a so-called shower head structure), but is not limited to this structure. A supply system may be provided separately from the first electrode. Further, the supply system 106a and the exhaust system 107a are provided with valves (106c, 107c) to control the gas pressure to be supplied and the pressure in the chamber.

  The heater 126 is provided in contact with the second electrode 125, but is not limited to this structure. Further, a heater (not shown) may be provided for the first electrode 121. Further, a heater may be provided on the outer wall of the chamber so that the chamber has a hot wall structure.

  In addition, a window (not shown) is provided on the side surface of the chamber, and the window can be opened and closed to transfer the substrate into the chamber from a cassette chamber in which the substrate is stored via a transport mechanism such as a robot arm. it can.

  Next, a film forming method will be described with reference to FIG. In this embodiment, a method for forming a silicon film having a crystal structure directly on a glass substrate will be described.

Silicide gas (monosilane, disilane, trisilane, etc.) and fluorine (or halogen fluoride gas) are used as source gases. Examples of the halogen fluoride gas include ClF, ClF ₃ , BrF, BrF ₃ , IF, and IF ₃ . Among them, the combination of monosilane gas and fluorine gas is an inexpensive gas combination and is suitable for mass production. Here, an example in which monosilane gas and fluorine gas are used as the source gas will be described.

Further, as other fluorine-based gas, fluorinated monosilane (SiH _m F _n : where m + n = 4) and tetrafluorosilane (SiF ₄ ) can be used, but the gas becomes expensive. Further, since the bond (dissociation) energy of Si—H is 76 kcal / mol, the bond (dissociation) energy of Si—F is as high as 142 kcal / mol. The energy consumption at will increase.

The film formation conditions were as follows: the pressure in the chamber was 1.33 × 10 ¹ to 1.33 × 10 ³ Pa (1 × 10 ⁻¹ to 1 × 10 ¹ torr), the film formation temperature was 80 to 600 ° C., The power frequency of the high frequency power source is set to 10 to 500 MHz. In the case where the substrate to be processed or the base film is formed of a material having low heat resistance, the temperature is set to 80 to 300 ° C.

  As shown in FIG. 1, a silicide gas and fluorine are introduced into a chamber from a supply system, a power switch 122 is connected, a high-frequency voltage is applied to the electrodes, and plasma 123 is generated. A chemically active excited species such as silicide or fluorine ions or radicals generated in the plasma reacts to form a silicon film 124 having a crystal structure as a product.

It is considered that the film growth reaction due to the deposition of SiH ₃ radicals and the extraction (etching) reaction due to F radicals occur competitively, whereby the Si film network is reconfigured and a silicon film including a crystal structure is formed. .

  There are actually a wide variety of reactions. Here, an example of a reaction that occurs in the chamber is shown.

  The gas decomposition reaction due to the high frequency can be expressed by Equations 1 and 2.

  Further, the reaction in the gas phase can be expressed by Equation 3.

The SiH ₃ radicals generated in Equation ₃ are generally said to be the main chemical species for Si film growth. Further, in Equation 3, since a highly corrosive fluorine-based gas such as HF is formed, in the plasma CVD apparatus, it is desirable to cover the inner surface of the apparatus with a material having excellent corrosion resistance.

  Further, the hydrogen atom extraction reaction on the silicon film surface can be expressed by the following equations (4), (5), and (6).

  Further, the bond (etching reaction) to the dangling bond on the surface of the silicon film can be expressed by Equation 7.

Actual film formation conditions (gas flow rate, RF power, gap between electrodes) were used for film formation, and the experimental results (film thickness rate, Raman optical characteristics (Raman peak (Pc, Pa), Raman half width ( Table 1 shows Wc, Wa), integrated intensity (Ic, Ia), etc.). A substrate to be processed on which a silicon oxide film 100 nm by LPCVD was previously formed was used on the surface. The film formation is performed with an electrode area of 380 cm ² , an RF power source frequency of 27 MHz, an upper heater set temperature of 65 ° C., and a lower heater set temperature of 300 ° C.

  In Table 1, when the spectrum obtained by the Raman scattering spectroscopy is separated into two exponential curves, the peak of the low wavenumber side curve (the center position of the curve) is Pa, and the Raman half width of the low wavenumber side curve is Wa. The integrated intensity of the low wavenumber side curve is Ia. Further, the peak of the high wave number side curve is Pc, the Raman half width of the high wave number side curve is Wc, and the integrated intensity of the high wave number side curve is Ic.

From Table 1, it can be confirmed that a silicon film having a crystal structure called a semi-amorphous silicon film, a microcrystalline silicon film, or a microcrystalline silicon film is formed at a low temperature of 300 ° C. The silicon film including the obtained crystal structure has Pa of 487 to 490 cm ⁻¹ , Pc of 514 to 517 cm ⁻¹ , Wa of 42 to 47.3 cm ⁻¹ , and Wc of 9.6 to 14.7 cm ^−1. It is a thin film. In addition, the film formation rate (deposition rate) is 5 nm / min to 20 nm / min. The film thickness is after 10 minutes of film formation.

Further, monosilane gas is 100%, the fluorine gas is a mixed gas diluted with He, fluorine content 10.1%, impurity (CF _4, HF, air, etc.) total content of 0.1% And the purity is 99.9%.

  In addition, FIG. 2 shows Raman spectrum data of a sample (Sample 9) having the highest crystallization rate.

As a comparative example, Table 2 shows experimental results (comparative samples 1 to 3) in which an amorphous silicon film was formed at a pressure of 0.3 Torr among film forming conditions. From these results, it can be seen that the higher the F ₂ partial pressure, total pressure, and RF power, the easier it is to crystallize.

  In the above experiment, a semi-amorphous silicon film is formed on the silicon oxide film by the LPCVD method as the base film. However, the same Raman can be obtained by forming a semi-amorphous silicon film on the silicon nitride film by the PCVD method as the base film. Spectral data was obtained.

  Furthermore, the results of experiments conducted under different film forming conditions are shown in FIGS.

FIG. 18 is a graph in which the SiH ₄ gas flow rate condition (1 sccm to 8 sccm) is varied, the left vertical axis is the film deposition rate DR (Depo Rate), and the right vertical axis is Ic / Ia. In addition, the F ₂ gas also uses two conditions of 4 sccm and 8 sccm. Note that other film forming conditions are shown beside the graph. The F ₂ gas is a mixed gas diluted to 10% with He.

  FIG. 19 is a graph in which the gap condition between electrodes (15 mm to 35 mm) is varied, the left vertical axis is the film deposition rate DR (Depo Rate), and the right vertical axis is Ic / Ia. Note that other film forming conditions are shown beside the graph.

  FIG. 20 is a graph in which pressure conditions (0.3 Torr to 1.0 Torr) are varied, the left vertical axis is the film deposition rate DR (Depo Rate), and the right vertical axis is Ic / Ia. Note that other film forming conditions are shown beside the graph.

  In addition, here, three systems of gas supply are performed using Ar as the carrier gas, but it is not particularly necessary to use the carrier gas, and the film formation can be performed only with the two systems of gas supply. By using a few gas systems, it is possible to easily adjust the film forming conditions.

Further, hydrogen gas may be supplied to supply three systems of gas, or a carrier gas may be supplied to supply four systems of gas. However, when supplying hydrogen gas, it is preferable to control the flow rate ratio of hydrogen to fluorine (H ₂ : F ₂ ) to 1:10 or to lower the flow rate to reduce the hydrogen flow rate.

FIG. 21A shows a cross-sectional TEM photograph, and FIG. 21B shows a schematic diagram thereof. The deposition conditions of the semi-amorphous silicon film shown in FIG. 21A are as follows: SiH ₄ gas flow rate 4 sccm, F ₂ gas flow rate 8 sccm, Ar gas flow rate 500 sccm, RF power 100 W, pressure 1 Torr, interelectrode gap 30 mm, and Ic / Ia was 4.8. As shown in FIG. 21A, an amorphous state cannot be confirmed at the base interface (interface with the base insulating film), and a semi-amorphous silicon film having a columnar crystal structure is formed from the start of film formation. I understand. In the bottom gate type TFT, the higher the crystallinity near the base interface can improve the field effect mobility of the TFT, so the semi-amorphous silicon film of the present invention is effective.

  According to the present invention, a semiconductor film including a crystal structure with excellent characteristics can be directly formed at a low temperature on an inexpensive large-area transparent insulating substrate at a high film formation rate.

Further, the obtained semi-amorphous silicon film may be irradiated with laser light to increase the crystallization rate. As a laser oscillator used for the laser light, a laser oscillator that can oscillate ultraviolet light, visible light, or infrared light can be used. As the laser oscillator, excimer laser oscillators such as KrF, ArF, KrF, XeCl, and Xe, gas laser oscillators such as He, He—Cd, Ar, He—Ne, and HF, YAG, GdVO ₄ , YVO ₄ , YLF, and YAlO Cr crystal such as _{3, Nd, Er, Ho,} Ce, Co, solid-state laser oscillator using a crystal doped with Ti or Tm, can be used GaN, GaAs, GaAlAs, a semiconductor laser oscillator of InGaAsP or the like. In the solid-state laser oscillator, it is preferable to apply the first to fifth harmonics of the fundamental wave.

Typically, excimer laser light having a wavelength of 400 nm or less or second harmonic and third harmonic of a YAG laser are used as the laser light. For example, a pulsed laser beam with a repetition frequency of about 10 Hz to 100 MHz is used, the laser beam is condensed to 100 to 500 mJ / cm ² by an optical system, and irradiated with an overlap rate of 90 to 95%, and a semi-amorphous silicon film The surface may be scanned.

(Embodiment 2)
In order to improve tact time and improve film thickness uniformity, a plasma CVD apparatus in which a heater is provided on the outer wall of the chamber and a chamber with a hot wall structure inside the chamber is vertically stacked is used. Thus, film formation can be performed.

  FIG. 3 shows an example of a chamber having a hot wall structure. The chamber 208a shown in FIG. 3 is different from the first embodiment in the heater installation position. A heater 226 is provided on the outer wall of the chamber, and the chamber has a hot wall structure.

In FIG. 3, 208a is a grounded chamber, 205a is a high frequency power source, 221 is a hollow first electrode (upper electrode, shower electrode, high frequency electrode) through which the source gas passes through the electrode, and 225 is grounded. A second electrode (lower electrode, ground electrode), 206a is a supply system, 207a is an exhaust system, and 206c and 207c are valves.

  In addition, since the description regarding the chamber structure is partly described in the first embodiment, the same portions are the same, and thus detailed description thereof is omitted here.

  FIG. 4 shows a perspective view of an example of a plasma CVD apparatus in which the chambers shown in FIG. 3 are arranged in the vertical direction, and FIG. 5 shows a top view thereof.

  4 and 5 includes a film formation chamber and a transfer chamber, a transfer chamber 202b is disposed between the film formation chambers 204a and 204b, and the transfer chambers 202a and 202b are disposed adjacent to each other. It has a structure. Each film forming chamber is provided with ten chambers 208a and 208b arranged in the vertical direction, and each of the chambers 208a and 208b is supplied with a supply system 206a and 206b for supplying a film forming gas, and exhaust gas is exhausted. Exhaust systems 207a and 207b and power supplies 205a and 205b.

  This apparatus is characterized in that in each of the film forming chambers 204a and 204b, all the supply systems of the plurality of chambers 208a and 208b are connected to one supply source. Similarly, all the exhaust systems of the plurality of chambers 208a and 208b are connected to one exhaust port. This feature makes it possible to easily arrange the supply systems 206a and 206b and the exhaust systems 207a and 207b in spite of the fact that the plurality of chambers 208a and 208b are vertically stacked in this apparatus. The film formation chambers 204a and 204b are provided with an exhaust system (not shown) for reducing the pressure in each film formation chamber. By controlling the pressure in the chamber and the pressure in the film formation chamber, film formation and cleaning in the chamber can be performed alternately, and film formation can be performed efficiently.

  As in the first embodiment, a silicide gas (monosilane, disilane, trisilane, or the like) and fluorine (or halogen fluoride gas) are introduced as source gases, and plasma is generated to form a semiconductor film having a crystal structure. It is possible to form a film directly.

  In FIG. 5, a substrate having an insulating surface such as a glass substrate of a desired size or a resin substrate typified by a plastic substrate is set in the cassette chambers 201a and 201b. As the substrate transfer method, horizontal transfer is adopted in the equipment shown in the figure, but when using a meter angle substrate of the fifth generation or later, vertical transfer with the substrate placed vertically is used for the purpose of reducing the area occupied by the transfer machine. You may go.

  Each of the transfer chambers 202a and 202b is provided with transfer mechanisms (robot arms) 203a and 203b. The substrate set in the cassette chambers 201a and 201b is transferred to the film forming chambers 204a and 204b by the transfer mechanism. Then, in the chambers 208a and 208b of the film formation chambers 204a and 204b, predetermined processing is performed on the processing target surface of the transferred substrate. In FIG. 5, a plurality of transfer chambers are provided, but one transfer chamber may be provided.

  Here, a batch type apparatus that processes several tens of substrates at a time is illustrated, but the present invention can also be applied to a single wafer type apparatus that processes substrates one by one.

  As shown in FIG. 4, by forming a film with a film forming apparatus having a plurality of chambers, films formed under the same conditions on a large number of substrates can be formed at the same time. For this reason, it becomes possible to reduce the variation between substrates, and to improve a yield. In addition, throughput can be improved.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1.

  The present invention having the above-described configuration will be described in more detail with the following examples.

  In this embodiment, a method for manufacturing an active matrix liquid crystal display device using an inverted staggered TFT as a switching element will be described. FIG. 6 shows a cross section of the manufacturing process.

First, a base insulating film 611 is formed over the substrate 610. As the base insulating film 611, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ) is preferably used. Note that as the substrate 610, a non-alkali glass substrate, a plastic substrate having heat resistance that can withstand the processing temperature in this manufacturing process, or the like can be used. In the case of a reflective liquid crystal display device, a semiconductor substrate such as single crystal silicon, a metal substrate such as stainless steel, or a substrate provided with an insulating layer on the surface of a ceramic substrate may be applied.

  Next, a conductive film with a thickness of 100 to 600 nm is formed over the base insulating film 611. As the conductive film, an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), chromium (Cr), silicon (Si), scandium (Sc), Nd, Al, Cu Alternatively, an alloy film (typically, a Mo—W alloy or a Mo—Ta alloy) in which the above elements are combined can be used.

  Next, a resist mask is formed using a photomask, and etching is performed using a dry etching method or a wet etching method. Through this etching step, the conductive film is etched to obtain conductive layers 612 and 640. Note that the conductive layer 612 serves as a gate electrode of the TFT, and the conductive layer 640 serves as a terminal electrode. In order to form a thin semiconductor film in a later step, it is preferable to perform etching so that the end surface of the conductive layer has a tapered shape so that coverage failure does not occur. Although not shown here, a capacitor electrode or a capacitor wiring for forming a storage capacitor is also formed.

Next, after removing the resist mask, an insulating film 613 is formed to cover the conductive layer. The insulating film 613 is a single layer or a stacked layer of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ) obtained by plasma CVD or sputtering, and has a thickness of 50 to 50. 200 nm. For example, a stacked structure in which the lower layer is a silicon nitride film and the upper layer is a silicon oxide film may be used. Note that the insulating film 613 serves as a gate insulating film of the TFT. Of course, the gate insulating film is not limited to the above materials, and other insulating films such as a tantalum oxide film may be used. Note that the conductive layers 612 and 640 are not damaged at the deposition temperature of the insulating film 613.

Next, a semiconductor film 614a including a crystal structure with a thickness of 50 to 200 nm (preferably 100 to 150 nm) is formed over the entire surface of the insulating film 613 by a plasma CVD method according to the method described in Embodiment Mode. In this embodiment, a semi-amorphous silicon film is formed using SiH ₄ gas and F ₂ gas as source gases. According to the embodiment, the semi-amorphous semiconductor film can be directly formed at a low temperature at a high film formation rate. Note that the concentrations of C, N, and O contained in the obtained semi-amorphous silicon film are 3 × 10 ²¹ / cm ³ or less, preferably 3 × 10 ²⁰ / cm ³ or less. The concentration of hydrogen contained in the obtained semi-amorphous silicon film is 1 × 10 ²¹ / cm ^3, which is about the same as that of the amorphous silicon film.

  Next, after an insulating film is formed over the entire surface of the semiconductor film 614 a including a crystal structure, patterning is performed to form a channel protective film 616. Patterning may be performed using a normal photolithography technique, or patterning may be performed by forming a resist mask in a self-aligning manner using a backside exposure method using a conductive layer as a mask. In addition, the channel protective film 616 is formed of a dense film in order to ensure the cleanliness of the interface and to prevent the semiconductor layer from being contaminated with impurities such as organic substances, metal substances, and water vapor. Is preferred.

  Next, a resist mask 615 is formed using a photomask in order to pattern the semiconductor layer. (FIG. 6A) Next, etching is performed to form a semiconductor layer 614b which becomes an active layer of the TFT.

Next, after removing the resist mask, an amorphous semiconductor film 617 containing an impurity element of one conductivity type (n-type or p-type) is formed to a thickness of 20 to 80 nm. The amorphous semiconductor film 617 containing an impurity element imparting one conductivity type (n-type or p-type) is formed over the entire surface by a known method such as a plasma CVD method or a sputtering method. Note that instead of an amorphous semiconductor film containing an impurity element imparting one conductivity type (n-type or p-type), a semi-amorphous semiconductor film containing an impurity element imparting one conductivity type (n-type or p-type) is used. Also good. In this embodiment, an amorphous semiconductor film containing an impurity element imparting n-type (phosphorus) is used as the amorphous semiconductor film 617, which is also referred to as an n + layer (ohmic contact layer). In this embodiment, an amorphous semiconductor film 617 is obtained by CVD using SiH ₄ gas, hydrogen gas, and PH ₃ (0.2% diluted) gas as source gases.

  Next, a first conductive film made of a metal material is formed by a sputtering method or a vacuum evaporation method. The material of the first conductive film is not particularly limited as long as it is a metal material that can be in ohmic contact with the amorphous semiconductor film 617, or an element selected from Al, Cr, Ta, and Ti, or the element as a component. Or an alloy film in which the above elements are combined. In this embodiment, a sputtering method is used to form a Ti film having a thickness of 50 to 150 nm as the first conductive film, and aluminum (Al) is formed to a thickness of 300 to 400 nm on the Ti film. Further, a Ti film is formed thereon with a thickness of 100 to 150 nm.

  Next, a photolithography process is performed to form a resist mask 621, and unnecessary portions are removed by etching to form wirings 618a and 618b (which will be source wirings and drain electrodes in a later process). (Fig. 6 (B))

  Next, using the resist mask as it is, the amorphous semiconductor film containing an impurity element imparting one conductivity type is etched to form source or drain regions 619a and 619b. In this embodiment, the n + layer is called a source region or a drain region. Next, the resist mask is removed. (Fig. 6 (C))

  Next, an interlayer insulating film 622 is formed. As the interlayer insulating film 622, a light-transmitting inorganic material (silicon oxide, silicon nitride, silicon oxynitride, or the like), a photosensitive or non-photosensitive organic material (polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclohexane) is used. Butene) or a laminate of these. Other material films that can be used as the interlayer insulating film 622 include insulating films made of SiOx films containing alkyl groups obtained by a coating method, such as silica glass, alkylsiloxane polymers, alkylsilsesquioxane polymers, hydrogenated films. Silsesquioxane polymers and the like. Examples of siloxane-based polymers include PSB-K1 and PSB-K31, which are Toray-made coating insulating film materials, and ZRS-5PH, which is a catalytic chemical-made coating insulating film material.

  Note that the interlayer insulating film 622 is not necessarily provided if not necessary. Further, if necessary, a protective film may be formed.

  Next, a resist mask is formed using a photomask, and part of the interlayer insulating film is removed by etching to form an opening (contact hole). Note that the bottoms of the openings reach the wirings 618a and 618b. Note that part of the insulating film 613 is also removed from the terminal portion. The step of removing part of the insulating film 613 may be performed before the formation of the interlayer insulating film.

Next, after removing the resist mask, a second conductive film is formed over the entire surface. Next, the second conductive film is patterned using a photomask, so that the pixel electrode 623 and the terminal electrode 644 are formed. (FIG. 6D) In this embodiment, since a transmissive liquid crystal display panel is manufactured, indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO) ) And a transparent conductive film such as tin oxide (SnO ₂ ), and the pixel electrode 623 and the terminal electrode 644 are formed.

  In the case of manufacturing a reflective liquid crystal display panel, Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) are formed on the pixel electrode 623 and the terminal electrode 644 by sputtering. For example, a metal material having light reflectivity such as the above may be used.

  Note that FIG. 7 shows an enlarged top view of a part of the pixel portion. FIG. 7 shows a state where the pixel electrode is being formed. In the left pixel, the pixel electrode is formed, but in the right pixel, the pixel electrode is not formed. In FIG. 7, a diagram cut along a solid line A-A ′ corresponds to the cross section of the pixel portion in FIG. 6D, and the same reference numerals are used for portions corresponding to FIG. 6D. In addition, a capacitor wiring 631 is provided, and the storage capacitor is formed of a pixel electrode 623 and a capacitor wiring 631 overlapping with the pixel electrode using a gate insulating film as a dielectric.

  Through the above steps, a TFT substrate for a liquid crystal display panel in which a bottom-gate (also referred to as an inverted staggered) TFT and a pixel electrode are formed over a substrate 610 is completed.

  In this embodiment, one TFT has a structure (double gate structure) having two channel formation regions between a source region and a drain region. The active layer of this embodiment is a semi-amorphous silicon film, and there is a problem that the off-current of the TFT increases as compared with the amorphous silicon film. Therefore, in this embodiment, a double gate structure is used to solve this problem. Note that the present embodiment is not limited to the double gate structure, and a multi-gate structure such as a triple gate structure may be used in order to further reduce variation in off current. Further, a single gate structure may be used in order to improve the aperture ratio.

  Next, an alignment film 624 a is formed so as to cover the pixel electrode 623. Note that the alignment film 624a may be formed using a droplet discharge method, a screen printing method, or an offset printing method. Thereafter, a rubbing process is performed on the surface of the alignment film 624a.

  The counter substrate 625 is provided with a color filter composed of a colored layer 626a, a light shielding layer (black matrix) 626b, and an overcoat layer 627, and a counter electrode composed of a transparent electrode and an alignment film 624b formed thereon. . Then, a sealing material (not shown) as a closed pattern is formed so as to surround a region overlapping with the pixel portion by a droplet discharge method. Here, an example of drawing a sealing material with a closed pattern for dripping liquid crystal is shown, but a dip type (pumping) is used in which a sealing pattern having an opening is provided and liquid crystal is injected using a capillary phenomenon after bonding the TFT substrate. Formula) may also be used.

  Next, liquid crystal is dropped under reduced pressure so that bubbles do not enter, and both substrates are bonded together. The liquid crystal is dropped once or a plurality of times in the closed loop seal pattern. As the alignment mode of the liquid crystal, a TN mode in which the alignment of liquid crystal molecules is twisted by 90 ° from the incident light to the emitted light is often used. When a TN mode liquid crystal display device is manufactured, the substrates are bonded so that the rubbing directions of the substrates are orthogonal.

  Note that the distance between the pair of substrates may be maintained by spraying spherical spacers, forming columnar spacers made of resin, or including a filler in the sealing material. The columnar spacer is made of an organic resin material mainly containing at least one of acrylic, polyimide, polyimide amide, and epoxy, or any one of silicon oxide, silicon nitride, and silicon oxynitride, or a laminated film thereof. It is characterized by being an inorganic material.

  Next, the substrate is divided. In case of multi-chamfering, each panel is divided. In the case of one-sided chamfering, the dividing step can be omitted by attaching a counter substrate that has been cut in advance.

  Then, the FPC 646 is attached through the anisotropic conductor layer 645 using a known technique. The liquid crystal module is completed through the above steps. (FIG. 6E) If necessary, an optical film is attached. In the case of a transmissive liquid crystal display device, the polarizing plate is attached to both the active matrix substrate and the counter substrate.

  As described above, in this embodiment, a semi-amorphous silicon film serving as an active layer is formed by a plasma CVD method at a film forming temperature of 300 ° C. and a film forming speed of 5 nm / min to 20 nm / min. By forming a film with this, the cost can be reduced and the process time can be shortened. Moreover, even if it uses the glass substrate after the 5th generation in which one side exceeds 1000 mm, a liquid crystal display panel can be manufactured easily.

  In this embodiment, an example of manufacturing an active matrix liquid crystal display device using a channel etch type TFT will be described. FIG. 8 shows a cross section of a manufacturing process of this embodiment.

  First, as in Example 1, a base insulating film 511, a conductive layer 512, and a wiring 540 extending to a terminal portion are formed over a substrate 510, and an insulating film 513 to be a gate insulating film is formed.

  Next, a semiconductor film 514a and an n + layer 515a are stacked. As the semiconductor film 514a, a semi-amorphous semiconductor film obtained by the deposition method described in Embodiment 1 or 2 is used. The n + layer 515a may be formed by a PCVD method using silane gas and phosphine gas, and can be formed of an amorphous semiconductor film or a semi-amorphous semiconductor film. Note that the gate insulating film 513, the semiconductor film 514a, and the n + layer 515a can be formed continuously without being exposed to the air by using a PCVD method. By not exposing to the atmosphere, contamination of impurities can be prevented.

  Next, a mask 517 for patterning the semiconductor layer is formed using a photomask. (Fig. 8 (A))

  Next, the semiconductor film 514a and the n + layer 515a other than the region covered with the mask 517 are removed by dry etching or wet etching to form a semiconductor layer serving as an active layer.

  Next, after the mask 517 is removed, a mask 521 for selectively removing the insulating film 513 is formed using a photomask. Next, the insulating film 513 other than the region covered with the mask 521 is removed by dry etching or wet etching to form an opening (contact hole). (Fig. 8 (B))

  Next, after removing the mask, a first conductive film made of a metal material is formed by a sputtering method or a vacuum evaporation method. The material of the first conductive film is not particularly limited as long as it is a metal material that can be in ohmic contact with the amorphous semiconductor film 515a, and an element selected from Al, Cr, Ta, Ti, or the element as a component. Or an alloy film in which the above elements are combined. In this embodiment, a sputtering method is used to form a Ti film having a thickness of 50 to 150 nm as the first conductive film, and aluminum (Al) is formed to a thickness of 300 to 400 nm on the Ti film. Further, a Ti film is formed thereon with a thickness of 100 to 150 nm.

  Next, a mask is formed by performing a photolithography process, and unnecessary portions are removed by etching to form wirings 516 and 541. (Fig. 8 (C))

  Next, a mask for removing part of the semiconductor layer which overlaps with the conductive layer 512 which is a gate electrode through the insulating film 513 is formed, and etching is performed. By etching, a semiconductor layer 514c from which part of the conductive layer 512 and the insulating film 513 are removed is formed, and at the same time, n + layers 519a and 519b, wirings (which become source wirings and drain electrodes in a later step) 518a, 518b is formed. At this stage, a channel etch type TFT is completed.

  Next, an interlayer insulating film 522 is formed. As the interlayer insulating film 522, a light-transmitting inorganic material, a photosensitive or non-photosensitive organic material, an insulating film made of an SiOx film containing an alkyl group obtained by a coating method, or a stacked layer thereof is used.

  Note that the interlayer insulating film 522 is not necessarily provided if not necessary. Further, if necessary, a protective film may be formed before the interlayer insulating film 522 is formed.

  Next, a resist mask is formed using a photomask, and part of the interlayer insulating film is removed by etching to form an opening (contact hole). Note that the bottoms of the openings reach the wirings 518a, 518b, and 541.

Next, after removing the resist mask, a second conductive film is formed over the entire surface. Next, the second conductive film is patterned using a photomask to form the pixel electrode 523 and the terminal electrode 544. (Fig. 8 (D))

  Through the above steps, a TFT substrate for a liquid crystal display panel in which a bottom-gate (also referred to as an inverted staggered) TFT and a pixel electrode are formed over the substrate 510 is completed.

  The subsequent steps may be performed in the same manner as in the first embodiment. This embodiment is the same as the first embodiment except for the TFT structure.

  Next, an alignment film 524a is formed so as to cover the pixel electrode 523. Note that the alignment film 524a may be formed using a droplet discharge method, a screen printing method, or an offset printing method. Thereafter, a rubbing process is performed on the surface of the alignment film 524a.

  The counter substrate 525 is provided with a color filter composed of a colored layer 526a, a light shielding layer (black matrix) 526b, and an overcoat layer 527, and a counter electrode composed of a transparent electrode and an alignment film 524b formed thereon. . Then, a sealing material (not shown) as a closed pattern is formed so as to surround a region overlapping with the pixel portion by a droplet discharge method.

  Next, liquid crystal is dropped under reduced pressure so that bubbles do not enter, and both substrates are bonded together. Note that the distance between the pair of substrates may be maintained by spraying spherical spacers, forming columnar spacers made of resin, or including a filler in the sealing material. Next, the substrate is divided.

  Then, the FPC 546 is attached through the anisotropic conductor layer 545 using a known technique. The liquid crystal module is completed through the above steps. (Fig. 8 (E))

  This embodiment can be freely combined with Embodiment Mode 1, Embodiment Mode 2, or Example 1.

  In this embodiment, an example of manufacturing a reflective liquid crystal display device is shown in FIGS.

  Since the process up to the middle of the TFT manufacturing process is the same as that of the second embodiment, detailed description thereof is omitted here. The steps up to the formation of the interlayer insulating film are the same as those in the second embodiment.

  First, as in Example 2, a base insulating film, a conductive layer, and a wiring extending to a terminal portion are formed on a substrate, and an insulating film to be a gate insulating film is formed. Next, a semiconductor film and an n + layer are stacked. Note that as the semiconductor film, a semi-amorphous semiconductor film obtained by the deposition method described in Embodiment 1 or 2 is used. Next, a mask for patterning the semiconductor layer is formed using a photomask. Next, the semiconductor film other than the region covered with the mask and the n + layer are removed by dry etching or wet etching to form a semiconductor layer to be an active layer. Next, after removing the mask, a mask for selectively removing the insulating film is formed using a photomask. Next, the insulating film other than the region covered with the mask is removed by dry etching or wet etching to form an opening (contact hole). Next, after removing the mask, a first conductive film made of a metal material is formed by a sputtering method or a vacuum evaporation method. Next, a photolithography process is performed to form a mask, and unnecessary portions are removed by etching to form wiring. Next, a mask for removing a part of the semiconductor layer which overlaps with the conductive layer which is the gate electrode through the insulating film is formed, and etching is performed. By this etching, a semiconductor layer 714 from which part of the conductive layer and the insulating film are removed is formed, and at the same time, n + layers 719a and 719b and wirings (which will become source wirings and drain electrodes in a later step) 718a and 718b Form.

  Next, an interlayer insulating film 722a is formed. The interlayer insulating film 722a is formed using an organic resin containing a photosensitive compound. After exposure and development using the first mask to form contact holes, exposure is performed using the second mask on which the light shielding pattern 721 is disposed. (FIG. 9B) Note that only a shallow region is exposed by reducing the exposure amount for the second time. At least a part of the light shielding pattern overlaps with the contact hole.

  Next, development is performed to form an interlayer insulating film 722b having unevenness on the surface. . (FIG. 9C) Concavities and convexities are formed on the surface of the interlayer insulating film 722b due to light scattering during exposure.

  Next, a metal material having light reflectivity such as Al (aluminum), Ag (silver), Au (gold), Cu (copper), W (tungsten) is formed on the pixel electrode 723 and the terminal electrode 744 by sputtering or vapor deposition. After forming, patterning is performed. Since the pixel portion is formed along the unevenness of the interlayer insulating film, the surface of the pixel electrode 723 is uneven. The unevenness of the surface of the pixel electrode 723 prevents specular reflection and increases the whiteness by scattering the reflected light. Although the example in which the size of the unevenness is uniform has been shown, it is not particularly limited, and it is desirable that the size of the unevenness is random because scattered light is scattered more. Further, the cross section in the radial direction may be a polygon or a shape that is not symmetrical.

  Through the above steps, a TFT substrate for a liquid crystal display panel in which a bottom gate type (also referred to as an inverted stagger type) TFT and a reflective electrode are formed on the substrate is completed.

  Next, an alignment film 724 a is formed so as to cover the pixel electrode 723. Note that the alignment film 724a may be formed using a droplet discharge method, a screen printing method, or an offset printing method. Thereafter, a rubbing process is performed on the surface of the alignment film 724a.

  The counter substrate 725 is provided with a color filter composed of a colored layer 726a, a light shielding layer (black matrix) 726b, and an overcoat layer 727, and a counter electrode composed of a transparent electrode and an alignment film 724b formed thereon. . Then, a sealing material (not shown) as a closed pattern is formed so as to surround a region overlapping with the pixel portion by a droplet discharge method.

  Next, liquid crystal is dropped under reduced pressure so that bubbles do not enter, and both substrates are bonded together. Note that the distance between the pair of substrates may be maintained by spraying spherical spacers, forming columnar spacers made of resin, or including a filler in the sealing material. Next, the substrate is divided.

  Then, the FPC 746 is attached using a known technique through the anisotropic conductor layer 745. The liquid crystal module is completed through the above steps. (FIG. 9D) Since this is a reflective liquid crystal display device, an optical film such as a polarizing plate is attached only to the counter substrate side.

  This embodiment can be freely combined with Embodiment Mode 1, Embodiment Mode 2, Embodiment Mode 1, or Example 2.

  In this embodiment, an example in which a droplet discharge method is used for liquid crystal dropping is described. In this embodiment, a large-area substrate is used and an example of manufacturing four panels is shown in FIG.

FIG. 10A is a cross-sectional view in the middle of forming a liquid crystal layer by a dispenser (or ink jet). A liquid crystal material 1114 is applied to a droplet discharge device 1116 so as to cover a pixel portion 1111 surrounded by a sealant 1112 . The nozzle 1118 discharges, jets, or drops. The droplet discharge device 1116 is moved in the direction of the arrow in FIG. Although the example in which the nozzle 1118 is moved is shown here, the liquid crystal layer may be formed by fixing the nozzle and moving the substrate.

  FIG. 10B shows a perspective view. A state is shown in which the liquid crystal material 1114 is selectively ejected, jetted, or dropped only in a region surrounded by the seal 1112, and the dropping surface 1115 moves in accordance with the nozzle scanning direction 1113.

  10C and 10D are enlarged cross-sectional views of a portion 1119 surrounded by a dotted line in FIG. When the viscosity of the liquid crystal material is high, the liquid crystal material is continuously discharged and attached while being connected as shown in FIG. On the other hand, when the viscosity of the liquid crystal material is low, the liquid crystal material is discharged intermittently, and droplets are dropped as shown in FIG.

  In FIG. 10C, reference numeral 1120 denotes an inverted staggered TFT, and 1121 denotes a pixel electrode. The pixel portion 1111 includes pixel electrodes arranged in a matrix, switching elements connected to the pixel electrodes, here inverted staggered TFTs, and a storage capacitor (not shown).

  Here, the flow of panel manufacture will be described below with reference to FIGS.

  First, a first substrate 1035 having a pixel portion 1034 formed on an insulating surface is prepared. The first substrate 1035 is previously subjected to formation of an alignment film, rubbing treatment, spherical spacer dispersion, columnar spacer formation, or color filter formation. Next, as illustrated in FIG. 11A, a sealant 1032 is formed at a predetermined position (a pattern surrounding the pixel portion 1034) with a dispenser device or an inkjet device over the first substrate 1035 in an inert gas atmosphere or under reduced pressure. . The translucent sealing material 1032 includes a filler (diameter: 6 μm to 24 μm) and a viscosity of 40 to 400 Pa · s. It is preferable to select a sealing material that does not dissolve in the liquid crystal that comes into contact later. As the sealing material, an acrylic photo-curing resin or an acrylic thermosetting resin may be used. Moreover, since it is a simple sealing pattern, the sealing material 32 can also be formed by a printing method.

  Next, a liquid crystal 1033 is dropped in a region surrounded by the sealant 1032 by an ink jet method. (FIG. 11B) As the liquid crystal 1033, a known liquid crystal material having a viscosity that can be discharged by an inkjet method may be used. In addition, since the viscosity of the liquid crystal material can be set by adjusting the temperature, it is suitable for the ink jet method. A necessary amount of the liquid crystal 1033 can be held in a region surrounded by the sealant 1032 without waste by an inkjet method.

  Next, the first substrate 1035 provided with the pixel portion 1034 and the second substrate 1031 provided with the counter electrode and the alignment film are attached under reduced pressure so that bubbles do not enter. Here, the sealing material 1032 is cured by performing ultraviolet irradiation and heat treatment at the same time as bonding. In addition to ultraviolet irradiation, heat treatment may be performed.

  FIG. 12 shows an example of a bonding apparatus capable of performing ultraviolet irradiation or heat treatment at the time of bonding or after bonding.

  In FIG. 12, reference numeral 1041 denotes a first substrate support, 1042 denotes a second substrate support, 1044 denotes a window, 1048 denotes a lower surface plate, and 1049 denotes a light source. In FIG. 12, the same reference numerals are used for portions corresponding to those in FIG.

  The lower surface plate 1048 incorporates a heater and hardens the sealing material. The second substrate support is provided with a window 1044 so that ultraviolet light or the like from the light source 1049 can pass therethrough. Although not shown here, the substrate is aligned through the window 1044. In addition, the second substrate 1031 to be the counter substrate is cut into a desired size in advance and fixed to the table 1042 with a vacuum chuck or the like. FIG. 12A shows a state before bonding.

At the time of bonding, after lowering the first substrate support base and the second substrate support base, pressure is applied to bond the first substrate 1035 and the second substrate 1031 together, and curing is performed by irradiating ultraviolet light as it is. The state after pasting is shown in FIG.

  Next, the first substrate 1035 is cut using a cutting device such as a scriber device, a breaker device, or a roll cutter. (FIG. 11D) Thus, four panels can be manufactured from one substrate. Then, the FPC is pasted using a known technique.

The first substrate 1035, as the second substrate 1031 may be a glass substrate or a plastic substrate.

  FIG. 13A shows a top view of the liquid crystal module obtained through the above steps, and FIG. 13B shows an example of a top view of another liquid crystal module.

  In FIG. 13A, reference numeral 1201 denotes an active matrix substrate, 1206 denotes a counter substrate, 1204 denotes a pixel portion, 1207 denotes a sealing material, and 1205 denotes an FPC. Note that liquid crystal is discharged by a droplet discharge method, and a pair of substrates 1201 and 1206 are attached to each other with a sealant 1207 under reduced pressure.

  In the case of using a TFT having an active layer made of a semi-amorphous silicon film, a part of a driver circuit can be manufactured, and a liquid crystal module as shown in FIG. 13B can be manufactured. Note that an IC chip (not shown) is mounted on a drive circuit that cannot be formed by a TFT having an active layer made of a semi-amorphous silicon film.

  In FIG. 13B, reference numeral 1211 denotes an active matrix substrate, 1216 denotes a counter substrate, 1212 denotes a source signal line driver circuit, 1213 denotes a gate signal line driver circuit, 1214 denotes a pixel portion, 1217 denotes a first sealant, and 1215 denotes an FPC. It is. Note that liquid crystal is discharged by a droplet discharge method, and the pair of substrates 1211 and 1216 are bonded to each other with the first sealant 1217 and the second sealant. Since the driver circuit portions 1212 and 1213 do not require liquid crystal, only the pixel portion 1214 holds the liquid crystal, and the second sealant 1218 is provided to reinforce the entire panel.

  Further, when the obtained liquid crystal module is provided with a backlight 1304 and a light guide plate 1305 and covered with a cover 1306, an active matrix liquid crystal display device (transmission type) as shown in a part of the cross-sectional view in FIG. 14 is completed. To do. The cover and the liquid crystal module are fixed using an adhesive or an organic resin. Further, since it is a transmissive type, the polarizing plate 1303 is attached to both the active matrix substrate and the counter substrate.

 In FIG. 14, 1300 is a substrate, 1301 is a pixel electrode, 1302 is a columnar spacer, 1307 is a sealing material, 1320 is a colored layer, a color filter in which a light shielding layer is arranged corresponding to each pixel, 1321 is a counter electrode, Reference numerals 1322 and 1323 denote alignment films, 1324 denotes a liquid crystal layer, and 1319 denotes a protective film.

  In addition, this embodiment can be freely combined with any one of Embodiment Mode 1, Embodiment Mode 2, and Embodiments 1 to 3.

  In this embodiment, a light-emitting device having a thin film transistor is described with reference to FIG.

  As shown in FIG. 15A, a top gate type N-channel TFT having a semi-amorphous silicon film as an active layer is formed in the driver circuit portion 310 and the pixel portion 311. In particular, an N-channel TFT connected to a light emitting element formed in the pixel portion 311 is referred to as a driving TFT 301. An insulating film 302 called a bank or a partition is formed so as to cover an end portion of an electrode (referred to as a first electrode) included in the driving TFT 301. The insulating film 302 includes an inorganic material (silicon oxide, silicon nitride, silicon oxynitride, or the like), a photosensitive or non-photosensitive organic material (polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene), silicon (Si ) And oxygen (O) are combined to form a skeletal structure, and the substituent contains at least hydrogen, or the substituent has at least one of fluorine, alkyl group, or aromatic hydrocarbon, so-called siloxane, And a stacked structure thereof can be used. As the organic material, a positive photosensitive organic resin or a negative photosensitive organic resin can be used.

  An opening is formed in the insulating film 302 over the first electrode. An electroluminescent layer 303 is provided in the opening, and a second electrode 304 of the light emitting element is provided so as to cover the electroluminescent layer and the insulating film 302.

  Note that the type of molecular exciton formed by the electroluminescent layer can be a singlet excited state or a triplet excited state, and since the ground state is usually a singlet state, light emitted from the singlet excited state is fluorescence, triplet. Light emission from the term excited state is called phosphorescence. The light emission from the electroluminescent layer includes the case where either excited state contributes. Furthermore, fluorescence and phosphorescence may be used in combination, and can be selected according to the emission characteristics (emission luminance, lifetime, etc.) of each RGB.

The electroluminescent layer 303 is formed in the order of HIL (hole injection layer), HTL (hole transport layer), EML (light emitting layer), ETL (electron transport layer), and EIL (electron injection layer) in this order from the first electrode 215 side. Are stacked. Note that the electroluminescent layer can have a single-layer structure or a mixed structure in addition to the stacked structure.

In addition, in the case of full-color display as the electroluminescent layer 303, materials that emit red (R), green (G), and blue (B) light are selected by an evaporation method using an evaporation mask or an inkjet method, respectively. It may be formed automatically.

Specifically, CuPc or PEDOT is used as HIL, α-NPD is used as HTL, BCP or Alq _{3 is used} as ETL, and BCP: Li or CaF ₂ is used as EIL. Further, for example, EML may be Alq ₃ doped with a dopant corresponding to each emission color of R, G, and B (DCM in the case of R, DMQD in the case of G). Note that the electroluminescent layer is not limited to the material having the above stacked structure. For example, instead of CuPc or PEDOT, an oxide such as molybdenum oxide (MoOx: x = 2 to 3) and α-NPD or rubrene can be co-evaporated to improve the hole injection property. As such a material, an organic material (including a low molecule or a polymer) or a composite material of an organic material and an inorganic material can be used.

In the case of forming an electroluminescent layer that emits white light, full color display can be performed by separately providing a color filter or a color filter and a color conversion layer. The color filter and the color conversion layer may be attached to each other after being provided on the second substrate (sealing substrate), for example. The color filter and the color conversion layer can be formed by an ink jet method. Of course, a monochromatic light emitting device may be formed by forming an electroluminescent layer that emits light other than white light. Further, an area color type display device capable of monochromatic display may be formed.

  In addition, it is necessary to select materials for the first electrode and the second electrode 304 in consideration of a work function. However, each of the first electrode and the second electrode can be an anode or a cathode depending on the pixel configuration. In this embodiment, since the polarity of the driving TFT is an N-channel type, it is preferable that the first electrode be a cathode and the second electrode be an anode. In the case where the polarity of the driving TFT is a p-channel type, the first electrode may be an anode and the second electrode may be a cathode.

  In particular, in this embodiment, the polarity of the driving TFT is an N-channel type. Therefore, in consideration of the electron moving direction, the first electrode is a cathode, EIL (electron injection layer), ETL (electron transport layer), EML (EML) The light emitting layer), the HTL (hole transport layer), the HIL (hole injection layer), and the second electrode are preferably used as the anode.

  After that, a passivation film containing nitrogen, DLC, or the like may be formed by a sputtering method or a CVD method. As a result, moisture and oxygen can be prevented from entering. In addition, the first electrode, the second electrode, and other electrodes can cover the side surface of the display means to prevent oxygen and moisture from entering. Next, the sealing substrate is attached. In the space formed by the sealing substrate, nitrogen may be sealed or a desiccant may be disposed. Further, a resin having translucency and high water absorption may be filled.

  In order to increase the contrast, a polarizing plate or a circular polarizing plate may be provided. For example, a polarizing plate or a circularly polarizing plate can be provided on one surface or both surfaces of the display surface.

  In the light-emitting device having the structure thus formed, in this embodiment, a light-transmitting material (ITO or ITSO) is used for the first electrode and the second electrode. Therefore, light is emitted from the electroluminescent layer in the directions indicated by double arrows 305 and 306 with luminance according to the video signal input from the signal line.

  FIG. 15B illustrates another structural example which is partly different from FIG. 15A.

  In the structure of the light-emitting device illustrated in FIG. 15B, channel-etched N-channel TFTs are formed in the driver circuit portion 310 and the pixel portion 311. A method for manufacturing a channel-etched N-channel TFT is shown in Example 2.

  Similarly to FIG. 15A, an N-channel TFT connected to a light-emitting element formed in the pixel portion 311 is referred to as a driving TFT 301. FIG. 15A is different from FIG. 15A in that the first electrode is a light-transmitting conductive film, preferably a highly reflective conductive film, and the second electrode 304 is a light-transmitting conductive film. Therefore, the light emission direction 305 is only on the sealing substrate side.

  FIG. 15C illustrates another structural example which is partly different from the structure illustrated in FIG.

  In the structure of the light-emitting device illustrated in FIG. 15C, a channel protection type N-channel TFT is formed in the driver circuit portion 310 and the pixel portion 311. A manufacturing method of a channel protection type N-channel TFT is shown in Embodiment 1.

  Similarly to FIG. 15A, an N-channel TFT connected to a light-emitting element formed in the pixel portion 311 is referred to as a driving TFT 301. FIG. 15A is different from FIG. 15A in that the first electrode is a light-transmitting conductive film and the second electrode 304 is a light-transmitting conductive film, preferably a highly reflective conductive film. Therefore, the light emission direction 306 is only on the substrate side.

  Although the structure of the light-emitting device is described using each thin film transistor, the structure of the thin film transistor and the structure of the light-emitting device may be combined in any way.

  An equivalent circuit diagram and a top view of the light-emitting device are described with reference to FIG. A TFT has three terminals of a gate, a source, and a drain, but the source terminal (source electrode) and the drain terminal (drain electrode) cannot be clearly distinguished due to the structure of the transistor. Therefore, when describing connection between elements, one of a source electrode and a drain electrode is referred to as a first electrode, and the other is referred to as a second electrode.

FIG. 16A illustrates an equivalent circuit diagram of a pixel portion of a light-emitting device. One pixel includes a switching TFT (switching TFT) 1600, a driving TFT (driving TFT) 1601, and a current control TFT (current control TFT) 1602. These TFTs have an N-channel type. . One electrode and the gate electrode of the switching TFT 1600 is connected to the signal line 1603 and a scan line 1605, respectively. One electrode of the current control TFT 1602 is connected to the first power supply line 1604, and the gate electrode is connected to the other electrode of the switching TFT.

The capacitor element 1608 may be provided so as to hold the voltage between the gate and the source of the current control TFT. In this embodiment, for example, when the potential of the first power supply line is set to a low potential and the light emitting element is set to a high potential, the current control TFT has an N-channel type, so that the source electrode and the first power supply line are connected. . Therefore, the capacitor can be provided between the gate electrode of the current control TFT and the source electrode, that is, the first power supply line. Note that in the case where the gate capacitance of the switching TFT, the driving TFT, or the current control TFT is large and the leakage current from each TFT is within an allowable range, the capacitor 1608 is not necessarily provided.

One electrode of the driving TFT 1601 is connected to the other electrode of the current control TFT, and the gate electrode is connected to the second power supply line 1606. The second power supply line 1606 has a fixed potential. Therefore, the gate potential of the driving TFT can be set to a fixed potential, and operation can be performed so that the gate-source voltage Vgs due to parasitic capacitance or wiring capacitance does not change.

A light emitting element 1607 is connected to the other electrode of the driving TFT. In this embodiment mode, for example, when the potential of the first power supply line is set to a low potential and the light emitting element is set to a high potential, the cathode of the light emitting element is connected to the drain electrode of the driving TFT. Therefore, as described above, it is preferable to stack the cathode, the electroluminescent layer, and the anode in this order. As described above, in the case of a TFT having a semi-amorphous semiconductor film and having an N-channel type, it is preferable to connect the drain electrode and the cathode of the TFT and stack the layers in the order of EIL, ETL, EML, HTL, HIL, and anode. is there.

The operation of such a pixel circuit will be described below.

  When the scanning line 1605 is selected, when the switching TFT is turned on, electric charge starts to be accumulated in the capacitor 1608. The electric charge of the capacitor 1608 is accumulated until it becomes equal to the gate-source voltage of the current control TFT. When equal, the current control TFT is turned on, and the driving TFTs connected in series are turned on. At this time, since the gate potential of the driving TFT is a fixed potential, a constant gate-source voltage Vgs is applied to the light emitting element regardless of the parasitic capacitance or the wiring capacitance, that is, the constant gate-source voltage Vgs. Minute current can be supplied.

  As described above, since the light-emitting element is a current-driven element, it is preferable to use analog driving when there is little variation in TFT characteristics in the pixel, particularly Vth variation. As in this embodiment mode, a TFT having an amorphous semiconductor film has low characteristic variation, and thus analog driving can be used. On the other hand, even in digital driving, a constant current value can be supplied to the light emitting element by operating the driving TFT in a saturation region (region satisfying | Vgs−Vth | <| Vds |).

  FIG. 16B illustrates an example of a top view of a pixel portion of a light-emitting device having the above equivalent circuit.

  First, the gate electrode, the scanning line, and the second power supply line of each TFT are formed in the same layer by a known method.

  Although not shown, a gate insulating film is formed thereafter.

Then, a semiconductor film of each TFT is formed on the gate insulating film. In this embodiment, a semi-amorphous semiconductor film is formed on the entire surface by a plasma CVD method using SiH ₄ and F ₂ as source gases, and etching is performed using a mask to form an active layer of each TFT. Then, a semiconductor film having one conductivity type is formed by a plasma CVD method, and etching is performed using a mask to form a source region or a drain region of each TFT.

  Then, the source electrode, the drain electrode, the signal line, and the first power supply line are formed in the same layer. The source electrode, the drain electrode, the signal line, and the first power supply line can be formed by a sputtering method or the like.

  In order to connect one wiring of the switching TFT and the gate electrode of the current control TFT, a contact hole is formed in the gate insulating film.

  In this embodiment, the capacitor element 1608 is formed by a gate wiring and a source / drain wiring provided through a gate insulating film.

  An electrode 1610 of the light emitting element 1607 is formed so as to be connected to one electrode of the driving TFT.

  Since the driving TFT has an amorphous semiconductor film, the channel width (W) of the driving TFT is designed to be wide.

  In this manner, a pixel portion of the light emitting device can be formed.

According to the present invention, a relatively inexpensive light emitting device can be realized by using a semi-amorphous semiconductor film obtained by a PCVD method using SiH ₄ and F ₂ as source gases at a low film formation temperature as an active layer of a TFT.

  This embodiment can be freely combined with Embodiment Mode 1 or Embodiment Mode 2.

  As a liquid crystal display device, a light emitting device, and an electronic device of the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, an acoustic playback device (car audio, audio component, etc.), a notebook type personal computer, Reproducing a recording medium such as a game machine, a portable information terminal (mobile computer, cellular phone, portable game machine, electronic book, etc.), an image reproducing apparatus (specifically, Digital Versatile Disc (DVD)) equipped with a recording medium, And a device provided with a display capable of displaying the image). In particular, it is desirable to use the present invention for a large TV having a large screen. Specific examples of these electronic devices are shown in FIGS.

FIG. 17A illustrates a large display device having a large screen of 22 inches to 50 inches, which includes a housing 2001, a support base 2002, a display portion 2003, a video input terminal 2005, and the like. The display device includes all information display devices such as a personal computer, a TV broadcast receiver, and an interactive TV. According to the present invention, a semi-amorphous semiconductor film obtained by a PCVD method using SiH ₄ and F ₂ as raw material gases at a low film formation temperature can be obtained even if a glass substrate of the fifth generation or more with a side exceeding 1000 mm is used. By using the active layer, a relatively inexpensive large-sized display device can be realized.

FIG. 17B illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. According to the present invention, a relatively inexpensive notebook personal computer can be realized by using a semi-amorphous semiconductor film obtained by a PCVD method using SiH ₄ and F ₂ as source gases at a low film formation temperature as an active layer of a TFT. .

FIG. 17C illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. A display portion A2403 mainly displays image information, and a display portion B2404 mainly displays character information. Note that an image reproducing device provided with a recording medium includes a home game machine and the like. According to the present invention, a relatively inexpensive image reproducing device can be realized by using a semi-amorphous semiconductor film obtained by a PCVD method using SiH ₄ and F ₂ as source gases at a low film forming temperature as an active layer of a TFT.

FIG. 17D illustrates a TV that can carry only a display wirelessly. The housing 2602 includes a battery and a signal receiver, and the display portion 2604 and the speaker portion 2607 are driven by the battery. The battery can be repeatedly charged by the charger 2600. The charger 2600 can transmit and receive a video signal, and can transmit the video signal to a signal receiver of the display. The housing 2602 is controlled by operation keys 2606. The device illustrated in FIG. 17D can also be referred to as a video / audio two-way communication device because a signal can be transmitted from the housing 2602 to the charger 2600 by operating the operation key 2606. Further, by operating the operation key 2606, a signal is transmitted from the housing 2602 to the charger 2600, and further, a signal that can be transmitted by the charger 2600 is received by another electronic device, so that communication control of the other electronic device can be performed. It can be said to be a general-purpose remote control device. According to the present invention, a semi-amorphous semiconductor film obtained by a PCVD method using SiH ₄ and F ₂ as a source gas at a low film formation temperature is used as a TFT active layer, so that a relatively large size (22 inches to 50 inches) is obtained. A portable TV can be provided by an inexpensive manufacturing process.

  As described above, the liquid crystal display device and the light emitting device obtained by implementing the present invention may be used as a display portion of any electronic device.

  In addition, this embodiment can be freely combined with any one of Embodiment Mode 1, Embodiment Mode 2, and Embodiments 1 to 5.

According to the present invention, the total energy required for forming a semiconductor film including a crystal structure can be reduced, and energy consumption in the production process can be significantly suppressed.

Further, even when a film formed of a material having low heat resistance as a base film, typically an organic resin such as acrylic, aluminum wiring, or the like is used, a semiconductor film including a crystal structure is directly formed using a plasma CVD method. Making it feasible.

It is sectional drawing which shows a plasma CVD apparatus. It is a graph which shows Raman spectrum data. It is sectional drawing which shows a plasma CVD apparatus. (Embodiment 2) It is a perspective view which shows a plasma CVD apparatus. It is a top view which shows a plasma CVD apparatus. It is sectional drawing of the manufacturing process of a liquid crystal display device. Example 1 It is a figure which shows the pixel top view of a liquid crystal display device. Example 1 It is sectional drawing of the manufacturing process of a liquid crystal display device. (Example 2) It is sectional drawing of the manufacturing process of a liquid crystal display device. (Example 3) It is the perspective view and sectional drawing which perform liquid crystal dropping by the droplet discharge method. The figure which shows a process top view. Sectional drawing which shows the bonding apparatus and the bonding process. The top view of a liquid crystal module. Sectional drawing which shows an active matrix liquid crystal display device. The figure which shows the cross-section of a light-emitting device. (Example 5) 4A and 4B are a circuit diagram and a top view of a pixel in a pixel of a light-emitting device. (Example 5) FIG. 11 illustrates an example of an electronic device. SiH ₄ is a graph showing the relationship between the gas flow rate and deposition rate and Ic / Ia. It is a graph which shows the relationship between a gap space | interval, the film-forming speed | rate, and Ic / Ia. It is a graph which shows the relationship between film-forming pressure, film-forming speed, and Ic / Ia. It is a cross-sectional TEM photograph of the semi-amorphous silicon film formed on the substrate.

Explanation of symbols

108: Chamber 105: High frequency power supply 123: Plasma

Claims (5)

Forming a first conductive film on the substrate;
Forming a first resist mask on the first conductive film using a first photomask;
Forming a gate electrode by etching the first conductive film using the first resist mask;
After removing the first resist mask, a gate insulating film is formed to cover the gate electrode,
Using the monosilane gas and fluorine or halogen fluoride gas as the source gas , plasma is generated under the conditions of a pressure of 0.1 to 133 Pa, a substrate heating temperature of 100 to 250 ° C., and an RF power supply frequency of 13 to 60 MHz , and the gate A semi-amorphous semiconductor film is formed on the insulating film,
Forming a channel protective film on the semiconductor film;
Forming a second resist mask on the semi-amorphous semiconductor film and the channel protective film using a second photomask;
Patterning the semi-amorphous semiconductor film using the second resist mask to form a semiconductor layer to be an active layer;
After removing the second resist mask, an N + layer is formed on the semiconductor layer and the channel protective film,
Forming a second conductive film on the N + layer;
Performing a photolithography process to form a third resist mask on the second conductive film;
A source wiring and a drain electrode are formed by etching the second conductive film using the third resist mask,
Using the third resist mask, the N + layer is etched to form a source region and a drain region,
Forming a pixel electrode connected to the drain electrode;
Through the above steps, a thin film transistor having a channel formation region between the source region and the drain region and a pixel electrode are formed on the substrate,
The oxygen concentration in the semi-amorphous semiconductor film is 5 × 10 ¹⁹ / cm ³ or less,
The semi-amorphous semiconductor film contains 1 atomic% or more of hydrogen or halogen,
The Raman spectrum of the semi-amorphous semiconductor film is shifted to a lower wave number side than 520 cm ⁻¹ .
The semi-amorphous semiconductor film includes crystal grains of at least 0.5 to 20 nm,
The method for manufacturing a semiconductor device, wherein the thin film transistor has a field-effect mobility of ^{2 to 20} cm ² / Vsec. Forming a first conductive film on the substrate;
Forming a first resist mask on the first conductive film using a first photomask;
Forming a gate electrode by etching the first conductive film using the first resist mask;
After removing the first resist mask, a gate insulating film is formed to cover the gate electrode,
Using the monosilane gas and fluorine or halogen fluoride gas as the source gas , plasma is generated under the conditions of a pressure of 0.1 to 133 Pa, a substrate heating temperature of 100 to 250 ° C., and an RF power supply frequency of 13 to 60 MHz , and the gate A semi-amorphous semiconductor film is formed on the insulating film,
Forming an N + layer on the semiconductor film;
Forming a first mask on the N + layer using a second photomask;
Patterning the N + layer and the semi-amorphous semiconductor film using the first mask to form a semiconductor layer to be an active layer and the N + layer having the same shape as the semiconductor layer;
After removing the first mask, a second conductive film is formed to cover the N + layer,
Performing a photolithography process to form a second mask on the second conductive film;
Etching using the second mask forms source wiring and drain electrodes from the second conductive film, forms the semiconductor layer partially removed, and simultaneously etches the N + layer,
Forming a pixel electrode connected to the drain electrode;
Through the above steps, a thin film transistor having a channel formation region between the source region and the drain region and a pixel electrode are formed on the substrate,
The oxygen concentration in the semi-amorphous semiconductor film is 5 × 10 ¹⁹ / cm ³ or less,
The semi-amorphous semiconductor film contains 1 atomic% or more of hydrogen or halogen,
The Raman spectrum of the semi-amorphous semiconductor film is shifted to a lower wave number side than 520 cm ⁻¹ .
The semi-amorphous semiconductor film includes crystal grains of at least 0.5 to 20 nm,
The method for manufacturing a semiconductor device, wherein the thin film transistor has a field-effect mobility of ^{2 to 20} cm ² / Vsec. _3. The method for manufacturing a semiconductor device according to claim 1, wherein the halogen fluoride gas is any one of ClF, ClF ₃ , BrF, BrF ₃ , IF, and IF ₃ .   4. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor film is formed using a parallel plate plasma CVD apparatus.   5. The semiconductor according to claim 1, wherein the semi-amorphous semiconductor film is irradiated with laser light from a semiconductor laser oscillator that oscillates infrared light to increase a crystallization rate. Device fabrication method.