JP4545956B2 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

Info

Publication number
JP4545956B2
JP4545956B2 JP2001004434A JP2001004434A JP4545956B2 JP 4545956 B2 JP4545956 B2 JP 4545956B2 JP 2001004434 A JP2001004434 A JP 2001004434A JP 2001004434 A JP2001004434 A JP 2001004434A JP 4545956 B2 JP4545956 B2 JP 4545956B2
Authority
JP
Japan
Prior art keywords
light emitting
internal lead
semiconductor device
wire
led light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001004434A
Other languages
Japanese (ja)
Other versions
JP2002208739A (en
Inventor
孝史 上田
清浩 五十川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2001004434A priority Critical patent/JP4545956B2/en
Priority to US10/043,898 priority patent/US6940184B2/en
Publication of JP2002208739A publication Critical patent/JP2002208739A/en
Priority to US11/036,508 priority patent/US7071034B2/en
Application granted granted Critical
Publication of JP4545956B2 publication Critical patent/JP4545956B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0203Containers; Encapsulations, e.g. encapsulation of photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • H01L33/56Materials, e.g. epoxy or silicone resin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12043Photo diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Led Device Packages (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Led Devices (AREA)

Description

【0001】
【発明の属する技術分野】
本願発明は、たとえばLED発光素子などの光学半導体素子を封入するようにして形成された樹脂パッケージを有する半導体装置、およびその製造方法に関する。
【0002】
【従来の技術】
光学半導体装置には、半導体素子としてLED発光素子を用いた発光ダイオードがある。従来の発光ダイオードの代表的な構成例を図7に示す。また、図7のVIII-VIII線に沿う断面図を図8に示す。この発光ダイオード100は、たとえば、携帯型電話機におけるプッシュボタンのバックライト用の光源や、フォトインタラプタの発光部などに適用されるタイプのものである。図7および図8に示すように、この発光ダイオード100は、LED発光素子1が搭載された第1の内部リード2と、上記LED発光素子1とワイヤ4を介して導通接続された第2の内部リード3と、上記LED発光素子1とワイヤ4とを封入するようにして形成された透光性の樹脂パッケージ5と、を備えている。また、この発光ダイオード100では、上記パッケージ5内において、LED発光素子1は、緩衝材107によって包囲されている。
【0003】
上記LED発光素子1は、P型半導体層、発光層、およびn型半導体層を順次エピタキシャル成長させてなる半導体ウエハに対し、電極を形成した上、ダイシングによって所望のサイズにカットされたチップに分割するという手法によって製造される。
【0004】
上記緩衝材107は、上記樹脂パッケージ5を形成する際に上記LED発光素子1が破損するのを防止するために形成される部品であり、上記樹脂パッケージ5を形成する前に形成される。このような緩衝材107は、JCR(Junction Coating Resin)と呼ばれる軟質樹脂から形成される。
【0005】
上記樹脂パッケージ5は、材料コストが比較的安価である点、ならびに加熱硬化により容易に形成することができる点などから、フィラを含有しない透光性エポキシ樹脂から形成されるのが一般的である。
【0006】
エポキシ樹脂用いて樹脂パッケージ5を形成するには、型枠に所定の形状に形成されたキャビティ内に、LED発光素子1、ワイヤ4、第1の内部リード2および第2の内部リード3をセットし、溶融した上記エポキシ樹脂を注入し、これを加熱硬化させる。このとき、エポキシ樹脂は、キャビティ内で熱膨張しようとするため、LED発光素子1を押圧する。このLED発光素子1は、上記したように、ウエハをカットすることにより形成されているため、カット時の応力によってカット面にひずみが生じている場合がある。したがって、LED発光素子1は、エポキシ樹脂で押圧されることにより、カット面が破損してしまうことがある。特に、発光ダイオードを製造する場合には、黒色エポキシ樹脂に比して線膨張係数がかなり大きい透光性エポキシ樹脂を使用しているため、樹脂パッケージ5内の半導体素子(LED発光素子1)が破損する可能性が高くなる。
【0007】
しかし、この従来例では、LED発光素子1は、樹脂パッケージ5を形成する前に予め上記緩衝材107によって包み込まれているので、樹脂パッケージ5の形成時におけるLED発光素子1への押圧力は、緩衝材107の弾性により吸収される。このようにして、緩衝材料107は、LED発光素子1を保護することができる。軟質樹脂としては、具体的には、透光性のあるシリコーンレジンが採用されるのが一般的である。
【0008】
しかしながら、シリコーンレジンは、ゲル状材料を用いて形成されるため、緩衝材107の厚みが大となってしまう。さらに、緩衝材107の形状を均一にするのが困難となる。これにより、LED発光素子1から発せられた光を屈折させてしまうレンズ効果が緩衝材107に生じてしまうとともに、このレンズ効果が個々の発光ダイオードごとに異なってしまう。
【0009】
また、シリコーンレジンを用いて緩衝材107を形成するには、ゲル状材料でLED発光素子1を包囲し、これを炉などで加熱硬化させなければならず、発光ダイオード100の製造効率が悪い。
【0010】
【発明が解決しようとする課題】
本願発明は、上記した事情のもとで考え出されたものであって、樹脂パッケージ内において、半導体素子が破損するのを防止するための保護材にレンズ効果が生じるのを防止することができる半導体装置、およびその製造方法を提供することをその課題とする。
【0011】
【発明の開示】
上記課題を解決するため、本願発明では、次の技術的手段を講じている。
【0012】
すなわち、本願発明の第1の側面により提供される半導体装置は、半導体素子が搭載された第1の内部リードと、上記半導体素子とワイヤを介して導通接続された第2の内部リードと、上記半導体素子と上記ワイヤとを封入するようにして形成された樹脂パッケージと、を備えている半導体装置であって、上記樹脂パッケージ内において、上記第1の内部リードと、上記半導体素子と、上記ワイヤと、上記第2の内部リードとは、非晶性フッ素樹脂を含有した被膜でコーティングされていることを特徴としている。
【0013】
本願発明の第1の側面においては、非晶性フッ素樹脂は、一般的に耐圧縮性に優れ、かつディッピングや吹き付けなどのコーティング加工に適した樹脂であることから、上記被膜を、上記樹脂パッケージ形成時における半導体素子の保護材として、厚みが薄くなるように形成することが可能となる。したがって、被膜にレンズ効果が生じるのを防止することができる。
【0014】
本願発明の第2の側面により提供される半導体装置の製造方法は、半導体素子が搭載された第1の内部リードと、上記半導体素子とワイヤを介して導通接続された第2の内部リードと、上記半導体素子と上記ワイヤとを封入するようにして形成された樹脂パッケージと、を備えている半導体装置を製造する方法であって、上記樹脂パッケージを形成する前に、上記第1の内部リードと、上記半導体素子と、上記ワイヤと、上記第2の内部リードとを、非晶性フッ素樹脂が含有された被膜でコーティングすることを特徴としている。
【0015】
具体的には、上記半導体素子は、LED発光素子であり、かつ、上記樹脂パッケージは、透光性樹脂により形成される。
【0016】
好ましい実施の形態においては、上記非晶性フッ素樹脂は、PTFEである。
【0017】
この製造方法は、上記した本願発明の第1の側面に係る半導体装置の製造方法である。したがって、本願発明の第1の側面に係る半導体装置について上述したのと同様の利点を享受することができる。
【0018】
好ましい実施の形態においてはまた、上記被膜は、揮発性の溶剤に非晶性フッ素樹脂を含有させたものを塗布し、それを乾燥させることによって形成される。
【0019】
このような構成によれば、粘度が低い状態で塗布することができるので、薄状の緩衝被膜を簡便に形成することができる。また、従来の緩衝材に用いられるシリコーンレジンのように硬化用の炉などを用いて加熱硬化させる必要がなく、自然乾燥によって形成されるので、半導体装置の製造効率を向上させることができる。
【0020】
本願発明のその他の特徴および利点については、以下に行う発明の実施の形態の説明から、より明らかになるであろう。
【0021】
【発明の実施の形態】
以下、本願発明の好ましい実施の形態について、図面を参照して具体的に説明する。
【0022】
図1は、本願発明に係る半導体装置の一例を示す概略斜視図、図2は、図1のII-II線に沿う断面図、図3は、図2における半導体素子を拡大して示す断面図である。図4ないし図6は、本願発明に係る半導体装置の製造方法を説明するための図であり、図5は、図4のV-V線に沿う断面図である。なお、これらの図において、従来例を示す図7および図8に表された部材、部分等と同等のものにはそれぞれ同一の符号を付してある。
【0023】
図1および図2に表れているように、本願発明の半導体装置は、半導体素子1が搭載された第1の内部リード2と、上記半導体素子1とワイヤ4を介して導通接続された第2の内部リード3と、上記半導体素子1と上記ワイヤ4とを封入するようにして形成された樹脂パッケージ5と、を備えている。この半導体装置は、本実施形態では、半導体素子1としてLED発光素子を用いた発光ダイオードAである。
【0024】
上記半導体素子(LED発光素子)1は、図3に示すように、n型(またはp型)半導体層10a、p型(またはn型)半導体層10b、およびこれらの間に介在する活性層10cを備えるチップ本体10と、チップ本体の下面に形成された全面電極1bと、チップ本体の上面に形成された電極パッド1aとを備えている。このLED発光素子1は、第1の内部リード2に対して全面電極1b側でチップボンディングされ、第2の内部リード3に対して電極パッド1aがワイヤボンディングされ、各電極1a,1b間に電流を流すと活性層10cが発光するように構成されている。
【0025】
このようなLED発光素子1は、P型半導体層、発光層、およびn型半導体層を順次エピタキシャル成長させてなる半導体ウエハに対し、上記全面電極1bおよび電極パッド1aを形成した上、ダイシングによって所望のサイズにカットされたチップに分割するという手法によって製造される。
【0026】
上記ワイヤ4は、上記ワイヤボンディングの際に形成される。ワイヤ4は、電導性の優れた金線などから形成されている。
【0027】
上記第1の内部リード2は、樹脂パッケージ5の外側に配置された第1の外部リード2aと連続して、第1リード20を構成している。これと同様に、上記第2の内部リード3は、第2の外部リード3aとともに第2リード30を構成している。これらの第1リード20および第2リード30は、銅や鉄などの金属板を打ち抜き形成して得られるリードフレームの一部として形成される。より詳細には、図4に示すように、リードフレーム6は、横方向に延びるサイドフレーム60を有しており、複数の第1および第2リード20…,30…は、サイドフレーム60の一長辺から縦方向に延びるように形成されている。
【0028】
上記樹脂パッケージ5は、本実施形態では、透光性樹脂により形成されている。具体的には、材料コストが比較的安価である点、ならびに加熱により容易に硬化させることができる点などから、フィラを含有しない透光性エポキシ樹脂が用いられている。
【0029】
また、上記樹脂パッケージ5内において、上記第1の内部リード2と、LED発光素子1と、ワイヤ4と、第2の内部リード3とは、非晶性フッ素樹脂を含有した被膜7でコーティングされている。
【0030】
上記被膜7は、上記樹脂パッケージ5の形成時におけるLED発光素子1の保護材として形成されるものである。一般的に、非晶性フッ素樹脂は、耐圧縮性に優れ、かつディッピングや吹き付けによってコーティング加工が可能な樹脂であるので、被膜7の厚みを薄く(たとえば、約10μm程度)することができる。
【0031】
なお、非晶性フッ素樹脂としては、具体的には、PTFEが使用される。PTFEは、圧縮強さが非常に大である透明なフッ素樹脂である。
【0032】
以下、半導体装置(発光ダイオード)Aの製造方法を順を追って説明する。なお、以下の工程は、第1の内部リード2および第2の内部リード3が上記リードフレーム6に形成された状態で行なわれる。
【0033】
発光ダイオードAを製造するには、まず、第1の内部リード2にLED発光素子1を搭載する。この工程において、LED発光素子1は、上記第1の内部リード2に形成されたチップボンディング領域(図示略)に下面側でチップボンディングされる。これによって、LED発光素子1と第1の内部リード2とが導通接続されるとともに、LED発光素子1が第1の内部リード2上に機械的に支持される。
【0034】
次いで、LED発光素子1の電極パッド1cと第2の内部リード3とをワイヤ4を介して導通接続する。この工程において、LED発光素子1の電極パッド1cは、上記第2の内部リード3に形成されたワイヤボンディング領域(図示略)に金線などからなるワイヤ4によって結線される。これによって、LED発光素子1と第2の内部リード3とが導通接続される。ワイヤ4は、LED発光素子1の電極パッド1cに対しては、いわゆるボールボンディングされ、第2の内部リード3に対しては、いわゆるスティッチボンディングされる。
【0035】
次いで、図5に示すように、第1の内部リード2と、LED発光素子1と、ワイヤ4と、第2の内部リード3とを、非晶性フッ素樹脂が含有された被膜7でコーティングする。この工程において、被膜7は、揮発性の溶剤に非晶性フッ素樹脂を含有させたもの(被膜剤70)を塗布し、それを乾燥させることによって形成される。このとき、被膜剤70を粘度が低い状態で塗布することができるので、薄状の緩衝被膜を簡便に形成することができる。
【0036】
上記被膜剤70の塗布は、本実施形態では、図4に示すように、LED発光素子1、ワイヤ4、内部リード2、および第2の内部リード3を被膜剤70を入れた溶液槽中に浸漬する、いわゆるディッピングにより行うことができる。この方法では、上記リードフレーム6に複数形成された状態の第1および第2の内部リード2…,3…に対して、一括して被膜剤70の塗布を行うことができる。また、被膜剤70には、揮発性の溶剤が用いられていることから、これを自然乾燥するだけでよい。したがって、従来のように、硬化用の炉などを用いて加熱硬化させる必要がないため、発光ダイオードの製造効率を向上させることができる。
【0037】
なお、被膜剤70の塗布は、本実施形態では、ディッピングにより行なわれているが、第1および第2の内部リード2,3に対して、被膜剤70を吹き付けるようにしてもよい。
【0038】
次いで、上記樹脂パッケージ5を形成する。この工程では、図6に示すように、型枠8を用いる注型法などが採用される。この方法では、まず、型枠8に所定の形状に形成されたキャビティ80内に、上記被膜7のコーティング工程を終えた第1および第2の内部リード2,3をセットする。その後、このキャビティ80内に溶融したエポキシ樹脂50を注入し、これを加熱硬化させる。
【0039】
そして、上記第1および第2リード20…,30…をリードフレーム6から切り離すことにより、発光ダイオードAが得られる。
【0040】
次に、上述した半導体装置(発光ダイオード)の製造方法における作用について簡単に説明する。
【0041】
上記樹脂パッケージ5を形成する際、上記エポキシ樹脂50を加熱硬化させるときに、エポキシ樹脂50がキャビティ80内で熱膨張しようとし、上記LED発光素子1がエポキシ樹脂50により押圧される。このLED発光素子1は、上記被膜7によりコーティングされているので、被膜7の耐圧縮性により破損するのが防止される。すなわち、上記被膜7は、従来における緩衝材107の代わりに形成されるものである。
【0042】
そして、上記被膜7は、耐圧縮性に優れ、かつディッピングや吹き付けによるコーティング加工が可能である非晶性フッ素樹脂から形成されているので、LED発光素子の保護材としての効果を維持したままの状態で、厚みが薄くなるように形成されうる。したがって、LED発光素子1から発せられた光を屈折させてしまうレンズ効果が上記被膜7に生じるのを防止することができる。
【0043】
以上、説明したように、本願発明によれば、樹脂パッケージ内において、半導体素子が破損するのを防止するための保護材にレンズ効果が生じるのを防止することができる。
【0044】
もちろん、本願発明の範囲は、上述した実施形態に限定されるものではない。
たとえば、上記実施形態では、光学半導体素子として、LED発光素子が用いられているが、フォトダイオードあるいはフォトトランジスタなどの受光素子に用いてもよい。
【図面の簡単な説明】
【図1】本願発明に係る半導体装置の一例を示す概略斜視図である。
【図2】図1のII-II線に沿う断面図である。
【図3】図2における半導体素子を拡大して示す断面図である。
【図4】本願発明に係る半導体装置の製造方法を説明するための図である。
【図5】図4のV-V線に沿う断面図である。
【図6】本願発明に係る半導体装置の製造方法を説明するための図である。
【図7】従来の半導体装置の一例を示す概略斜視図である。
【図8】図7のVIII-VIII線に沿う断面図である。
【符号の説明】
1 半導体素子
2 第1の内部リード
3 第2の内部リード
4 ワイヤ
5 樹脂パッケージ
7 被膜
A 半導体装置
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a resin package formed so as to enclose an optical semiconductor element such as an LED light emitting element, and a method for manufacturing the same.
[0002]
[Prior art]
An optical semiconductor device includes a light emitting diode using an LED light emitting element as a semiconductor element. A typical configuration example of a conventional light emitting diode is shown in FIG. Further, FIG. 8 shows a cross-sectional view taken along line VIII-VIII in FIG. The light emitting diode 100 is of a type applied to, for example, a light source for a backlight of a push button in a mobile phone or a light emitting portion of a photo interrupter. As shown in FIGS. 7 and 8, the light emitting diode 100 includes a first internal lead 2 on which the LED light emitting element 1 is mounted, and a second conductively connected to the LED light emitting element 1 via the wire 4. An internal lead 3 and a translucent resin package 5 formed so as to enclose the LED light emitting element 1 and the wire 4 are provided. In the light emitting diode 100, the LED light emitting element 1 is surrounded by the buffer material 107 in the package 5.
[0003]
The LED light-emitting element 1 is formed by dividing electrodes into chips cut to a desired size by dicing after forming electrodes on a semiconductor wafer formed by sequentially epitaxially growing a P-type semiconductor layer, a light-emitting layer, and an n-type semiconductor layer. It is manufactured by the method.
[0004]
The buffer material 107 is a component formed to prevent the LED light emitting element 1 from being damaged when the resin package 5 is formed, and is formed before the resin package 5 is formed. Such a buffer material 107 is made of a soft resin called JCR (Junction Coating Resin).
[0005]
The resin package 5 is generally formed from a translucent epoxy resin that does not contain a filler because the material cost is relatively low and the resin package 5 can be easily formed by heat curing. .
[0006]
In order to form the resin package 5 using an epoxy resin, the LED light emitting element 1, the wire 4, the first internal lead 2 and the second internal lead 3 are set in a cavity formed in a predetermined shape on the mold. Then, the molten epoxy resin is poured and this is heated and cured. At this time, since the epoxy resin tends to thermally expand in the cavity, the LED light emitting element 1 is pressed. Since the LED light emitting element 1 is formed by cutting a wafer as described above, there is a case where the cut surface is distorted due to stress at the time of cutting. Therefore, the cut surface of the LED light emitting element 1 may be damaged by being pressed with the epoxy resin. In particular, when a light emitting diode is manufactured, a translucent epoxy resin having a considerably large linear expansion coefficient as compared with a black epoxy resin is used. Therefore, a semiconductor element (LED light emitting element 1) in the resin package 5 is provided. The possibility of breakage increases.
[0007]
However, in this conventional example, the LED light-emitting element 1 is wrapped in advance by the buffer material 107 before the resin package 5 is formed. Therefore, the pressing force applied to the LED light-emitting element 1 when the resin package 5 is formed is It is absorbed by the elasticity of the buffer material 107. In this way, the buffer material 107 can protect the LED light emitting element 1. As the soft resin, specifically, a translucent silicone resin is generally used.
[0008]
However, since the silicone resin is formed using a gel material, the thickness of the buffer material 107 is increased. Furthermore, it is difficult to make the shape of the buffer material 107 uniform. As a result, a lens effect that refracts the light emitted from the LED light emitting element 1 is generated in the buffer material 107, and this lens effect is different for each light emitting diode.
[0009]
Moreover, in order to form the buffer material 107 using a silicone resin, the LED light-emitting element 1 must be surrounded by a gel material and heated and cured in a furnace or the like, and the manufacturing efficiency of the light-emitting diode 100 is poor.
[0010]
[Problems to be solved by the invention]
The present invention has been conceived under the circumstances described above, and can prevent the lens effect from occurring in the protective material for preventing the semiconductor element from being damaged in the resin package. It is an object to provide a semiconductor device and a manufacturing method thereof.
[0011]
DISCLOSURE OF THE INVENTION
In order to solve the above problems, the present invention takes the following technical means.
[0012]
That is, a semiconductor device provided by the first aspect of the present invention includes a first internal lead on which a semiconductor element is mounted, a second internal lead electrically connected to the semiconductor element through a wire, A semiconductor device comprising: a resin package formed so as to enclose a semiconductor element and the wire, wherein the first internal lead, the semiconductor element, and the wire are provided in the resin package. The second internal lead is coated with a film containing an amorphous fluororesin.
[0013]
In the first aspect of the present invention, the amorphous fluororesin is generally a resin excellent in compression resistance and suitable for coating processing such as dipping and spraying. As a protective material for the semiconductor element at the time of formation, it can be formed to have a small thickness. Therefore, it is possible to prevent the lens effect from occurring in the coating.
[0014]
A method of manufacturing a semiconductor device provided by the second aspect of the present invention includes a first internal lead on which a semiconductor element is mounted, a second internal lead electrically connected to the semiconductor element via a wire, A method of manufacturing a semiconductor device comprising: a resin package formed so as to enclose the semiconductor element and the wire, wherein the first internal lead is formed before the resin package is formed. The semiconductor element, the wire, and the second internal lead are coated with a film containing an amorphous fluororesin.
[0015]
Specifically, the semiconductor element is an LED light emitting element, and the resin package is formed of a translucent resin.
[0016]
In a preferred embodiment, the amorphous fluororesin is PTFE.
[0017]
This manufacturing method is a method for manufacturing a semiconductor device according to the first aspect of the present invention described above. Therefore, the same advantages as those described above for the semiconductor device according to the first aspect of the present invention can be obtained.
[0018]
In a preferred embodiment, the coating is formed by applying a volatile solvent containing an amorphous fluororesin and drying it.
[0019]
According to such a structure, since it can apply | coat in a state with low viscosity, a thin buffer film can be formed easily. In addition, it is not necessary to heat and cure using a curing furnace or the like like a silicone resin used in a conventional cushioning material, and since it is formed by natural drying, the manufacturing efficiency of the semiconductor device can be improved.
[0020]
Other features and advantages of the present invention will become more apparent from the following description of embodiments of the invention.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, preferred embodiments of the present invention will be specifically described with reference to the drawings.
[0022]
1 is a schematic perspective view showing an example of a semiconductor device according to the present invention, FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1, and FIG. 3 is an enlarged cross-sectional view showing a semiconductor element in FIG. It is. 4 to 6 are views for explaining a method of manufacturing a semiconductor device according to the present invention, and FIG. 5 is a cross-sectional view taken along line VV in FIG. In these drawings, the same reference numerals are given to the equivalents of the members, portions, etc. shown in FIGS. 7 and 8 showing the conventional example.
[0023]
As shown in FIGS. 1 and 2, the semiconductor device of the present invention includes a first internal lead 2 on which a semiconductor element 1 is mounted, and a second conductively connected to the semiconductor element 1 via a wire 4. And a resin package 5 formed so as to enclose the semiconductor element 1 and the wire 4. In this embodiment, this semiconductor device is a light emitting diode A using an LED light emitting element as the semiconductor element 1.
[0024]
As shown in FIG. 3, the semiconductor element (LED light emitting element) 1 includes an n-type (or p-type) semiconductor layer 10a, a p-type (or n-type) semiconductor layer 10b, and an active layer 10c interposed therebetween. , A full-surface electrode 1b formed on the lower surface of the chip main body, and an electrode pad 1a formed on the upper surface of the chip main body. The LED light-emitting element 1 is chip-bonded to the first internal lead 2 on the entire surface electrode 1b side, the electrode pad 1a is wire-bonded to the second internal lead 3, and a current is passed between the electrodes 1a and 1b. The active layer 10c is configured to emit light when flowing.
[0025]
Such an LED light-emitting element 1 is formed by forming the entire surface electrode 1b and the electrode pad 1a on a semiconductor wafer formed by sequentially epitaxially growing a P-type semiconductor layer, a light-emitting layer, and an n-type semiconductor layer, and then dicing with a desired one. It is manufactured by a technique of dividing into chips cut into sizes.
[0026]
The wire 4 is formed during the wire bonding. The wire 4 is formed of a gold wire having excellent electrical conductivity.
[0027]
The first internal lead 2 is connected to the first external lead 2 a arranged outside the resin package 5 to constitute a first lead 20. Similarly, the second internal lead 3 constitutes the second lead 30 together with the second external lead 3a. The first lead 20 and the second lead 30 are formed as part of a lead frame obtained by punching and forming a metal plate such as copper or iron. More specifically, as shown in FIG. 4, the lead frame 6 has a side frame 60 extending in the lateral direction, and the plurality of first and second leads 20, 30. It is formed to extend in the vertical direction from the long side.
[0028]
In the present embodiment, the resin package 5 is made of a translucent resin. Specifically, a translucent epoxy resin containing no filler is used because the material cost is relatively low and it can be easily cured by heating.
[0029]
Further, in the resin package 5, the first internal lead 2, the LED light emitting element 1, the wire 4, and the second internal lead 3 are coated with a film 7 containing an amorphous fluororesin. ing.
[0030]
The coating 7 is formed as a protective material for the LED light emitting element 1 when the resin package 5 is formed. In general, the amorphous fluororesin is a resin that is excellent in compression resistance and can be coated by dipping or spraying, so that the thickness of the film 7 can be reduced (for example, about 10 μm).
[0031]
Specifically, PTFE is used as the amorphous fluororesin. PTFE is a transparent fluororesin having a very high compressive strength.
[0032]
Hereinafter, a method for manufacturing the semiconductor device (light emitting diode) A will be described in order. The following steps are performed in a state where the first internal lead 2 and the second internal lead 3 are formed on the lead frame 6.
[0033]
To manufacture the light emitting diode A, first, the LED light emitting element 1 is mounted on the first internal lead 2. In this step, the LED light emitting element 1 is chip-bonded on the lower surface side to a chip bonding region (not shown) formed in the first internal lead 2. As a result, the LED light emitting element 1 and the first internal lead 2 are conductively connected, and the LED light emitting element 1 is mechanically supported on the first internal lead 2.
[0034]
Next, the electrode pad 1 c of the LED light emitting element 1 and the second internal lead 3 are electrically connected via the wire 4. In this step, the electrode pad 1c of the LED light emitting element 1 is connected to a wire bonding region (not shown) formed on the second internal lead 3 by a wire 4 made of a gold wire or the like. Thereby, the LED light emitting element 1 and the second internal lead 3 are conductively connected. The wire 4 is so-called ball bonded to the electrode pad 1 c of the LED light emitting element 1, and is so-called stitch bonded to the second internal lead 3.
[0035]
Next, as shown in FIG. 5, the first internal lead 2, the LED light emitting element 1, the wire 4, and the second internal lead 3 are coated with a film 7 containing an amorphous fluororesin. . In this step, the film 7 is formed by applying a volatile solvent containing an amorphous fluororesin (film agent 70) and drying it. At this time, since the coating agent 70 can be applied in a state of low viscosity, a thin buffer coating can be easily formed.
[0036]
In the present embodiment, the coating agent 70 is applied to the LED light emitting element 1, the wire 4, the internal lead 2, and the second internal lead 3 in a solution tank containing the coating agent 70, as shown in FIG. It can be performed by so-called dipping. In this method, the coating agent 70 can be applied collectively to the first and second internal leads 2... 3 formed in the lead frame 6. Moreover, since the volatile solvent is used for the film agent 70, it only needs to dry naturally. Therefore, unlike the conventional case, it is not necessary to heat and cure using a curing furnace or the like, so that the manufacturing efficiency of the light emitting diode can be improved.
[0037]
In this embodiment, the coating agent 70 is applied by dipping. However, the coating agent 70 may be sprayed onto the first and second internal leads 2 and 3.
[0038]
Next, the resin package 5 is formed. In this step, as shown in FIG. 6, a casting method using a mold 8 is employed. In this method, first, the first and second internal leads 2 and 3 that have finished the coating process of the film 7 are set in a cavity 80 formed in a predetermined shape in the mold 8. Thereafter, the melted epoxy resin 50 is injected into the cavity 80 and is cured by heating.
[0039]
Then, the light emitting diode A is obtained by separating the first and second leads 20... 30 from the lead frame 6.
[0040]
Next, the operation of the semiconductor device (light emitting diode) manufacturing method described above will be briefly described.
[0041]
When the resin package 5 is formed, when the epoxy resin 50 is heated and cured, the epoxy resin 50 tends to thermally expand in the cavity 80, and the LED light emitting element 1 is pressed by the epoxy resin 50. Since this LED light emitting element 1 is coated with the coating film 7, it is prevented from being damaged by the compression resistance of the coating film 7. That is, the film 7 is formed in place of the conventional buffer material 107.
[0042]
And since the said film 7 is formed from the amorphous fluororesin which is excellent in compression resistance and can be coated by dipping or spraying, the effect as a protective material of an LED light emitting element is maintained. In the state, it can be formed to be thin. Therefore, it is possible to prevent the lens effect that refracts the light emitted from the LED light emitting element 1 from occurring in the coating film 7.
[0043]
As described above, according to the present invention, it is possible to prevent the lens effect from occurring in the protective material for preventing the semiconductor element from being damaged in the resin package.
[0044]
Of course, the scope of the present invention is not limited to the embodiment described above.
For example, in the above embodiment, an LED light emitting element is used as the optical semiconductor element, but it may be used for a light receiving element such as a photodiode or a phototransistor.
[Brief description of the drawings]
FIG. 1 is a schematic perspective view showing an example of a semiconductor device according to the present invention.
2 is a cross-sectional view taken along line II-II in FIG.
3 is an enlarged cross-sectional view of the semiconductor element in FIG. 2;
FIG. 4 is a drawing for explaining the method for manufacturing a semiconductor device according to the present invention.
5 is a cross-sectional view taken along line VV in FIG.
FIG. 6 is a drawing for explaining the method for manufacturing a semiconductor device according to the present invention.
FIG. 7 is a schematic perspective view showing an example of a conventional semiconductor device.
8 is a cross-sectional view taken along line VIII-VIII in FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 1st internal lead 3 2nd internal lead 4 Wire 5 Resin package 7 Coating A Semiconductor device

Claims (5)

半導体素子が搭載された第1の内部リードと、上記半導体素子とワイヤを介して導通接続された第2の内部リードと、上記半導体素子と上記ワイヤとを封入するようにして形成された樹脂パッケージと、を備えている半導体装置であって、
上記樹脂パッケージ内において、上記第1の内部リードと、上記半導体素子と、上記ワイヤと、上記第2の内部リードとは、非晶性フッ素樹脂を含有した被膜でコーティングされていることを特徴とする、半導体装置。
A first internal lead on which a semiconductor element is mounted, a second internal lead electrically connected to the semiconductor element through a wire, and a resin package formed so as to enclose the semiconductor element and the wire A semiconductor device comprising:
In the resin package, the first internal lead, the semiconductor element, the wire, and the second internal lead are coated with a film containing an amorphous fluororesin. A semiconductor device.
半導体素子が搭載された第1の内部リードと、上記半導体素子とワイヤを介して導通接続された第2の内部リードと、上記半導体素子と上記ワイヤとを封入するようにして形成された樹脂パッケージと、を備えている半導体装置を製造する方法であって、
上記樹脂パッケージを形成する前に、上記第1の内部リードと、上記半導体素子と、上記ワイヤと、上記第2の内部リードとを、非晶性フッ素樹脂が含有された被膜でコーティングすることを特徴とする、半導体装置の製造方法。
A first internal lead on which a semiconductor element is mounted, a second internal lead electrically connected to the semiconductor element through a wire, and a resin package formed so as to enclose the semiconductor element and the wire A method of manufacturing a semiconductor device comprising:
Before forming the resin package, the first internal lead, the semiconductor element, the wire, and the second internal lead are coated with a film containing an amorphous fluororesin. A method for manufacturing a semiconductor device.
上記非晶性フッ素樹脂は、PTFEである、請求項2に記載の半導体装置の製造方法。The method for manufacturing a semiconductor device according to claim 2, wherein the amorphous fluororesin is PTFE. 上記被膜は、揮発性の溶剤に非晶性フッ素樹脂を含有させたものを塗布し、それを乾燥させることによって形成される、請求項2または3に記載の半導体装置の製造方法。4. The method of manufacturing a semiconductor device according to claim 2, wherein the coating is formed by applying a volatile solvent containing an amorphous fluororesin and drying the coating. 上記半導体素子は、LED発光素子であり、かつ、
上記樹脂パッケージは、透光性樹脂により形成される、請求項2ないし4のいずれかに記載の半導体装置の製造方法。
The semiconductor element is an LED light emitting element, and
The method for manufacturing a semiconductor device according to claim 2, wherein the resin package is formed of a light-transmitting resin.
JP2001004434A 2001-01-12 2001-01-12 Semiconductor device and manufacturing method thereof Expired - Fee Related JP4545956B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001004434A JP4545956B2 (en) 2001-01-12 2001-01-12 Semiconductor device and manufacturing method thereof
US10/043,898 US6940184B2 (en) 2001-01-12 2002-01-11 Semiconductor device with coated semiconductor chip
US11/036,508 US7071034B2 (en) 2001-01-12 2005-01-12 Method of making semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001004434A JP4545956B2 (en) 2001-01-12 2001-01-12 Semiconductor device and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JP2002208739A JP2002208739A (en) 2002-07-26
JP4545956B2 true JP4545956B2 (en) 2010-09-15

Family

ID=18872626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001004434A Expired - Fee Related JP4545956B2 (en) 2001-01-12 2001-01-12 Semiconductor device and manufacturing method thereof

Country Status (2)

Country Link
US (2) US6940184B2 (en)
JP (1) JP4545956B2 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7262074B2 (en) * 2002-07-08 2007-08-28 Micron Technology, Inc. Methods of fabricating underfilled, encapsulated semiconductor die assemblies
JP4885426B2 (en) * 2004-03-12 2012-02-29 ルネサスエレクトロニクス株式会社 Semiconductor memory device, semiconductor device and manufacturing method thereof
KR100612322B1 (en) * 2004-07-16 2006-08-16 삼성전자주식회사 Ink jet cartridge
DE102005034485B4 (en) * 2005-07-20 2013-08-29 Infineon Technologies Ag Connecting element for a semiconductor device and method for producing a semiconductor power device
DE102005039165B4 (en) * 2005-08-17 2010-12-02 Infineon Technologies Ag Wire and strip bonded semiconductor power device and method of making the same
DE102005041064B4 (en) * 2005-08-30 2023-01-19 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Surface-mountable optoelectronic component and method for its production
TWI460881B (en) 2006-12-11 2014-11-11 Univ California Transparent light emitting diodes
JP2009094189A (en) * 2007-10-05 2009-04-30 Tokai Rika Co Ltd Semiconductor package with connector
TW201025675A (en) * 2008-12-31 2010-07-01 Jess Link Products Co Ltd Light emitting diode light strip and method of making the same
JP5744386B2 (en) * 2009-10-07 2015-07-08 日東電工株式会社 Optical semiconductor encapsulant
DE102009058796A1 (en) 2009-12-18 2011-06-22 OSRAM Opto Semiconductors GmbH, 93055 Optoelectronic component and method for producing an optoelectronic component
KR101142015B1 (en) * 2010-03-18 2012-05-17 한국광기술원 Light Emitting Diode package with dehumidity and heat-resisting structure and Method thereof
TW201205745A (en) * 2010-07-23 2012-02-01 Global Unichip Corp Semiconductor packaging structure and the forming method
DE102011016567B4 (en) * 2011-04-08 2023-05-11 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Method for producing an optoelectronic component and component produced in this way
DE102011100028A1 (en) 2011-04-29 2012-10-31 Osram Opto Semiconductors Gmbh Component and method for manufacturing a device
US8941962B2 (en) * 2011-09-13 2015-01-27 Fsp Technology Inc. Snubber circuit and method of using bipolar junction transistor in snubber circuit
CN103178191B (en) * 2011-12-24 2015-10-28 展晶科技(深圳)有限公司 Light-emitting diode
JP2014130963A (en) * 2012-12-28 2014-07-10 Nichia Chem Ind Ltd Light emitting device
US9129951B2 (en) * 2013-10-17 2015-09-08 Freescale Semiconductor, Inc. Coated lead frame bond finger
US11592166B2 (en) 2020-05-12 2023-02-28 Feit Electric Company, Inc. Light emitting device having improved illumination and manufacturing flexibility
US11876042B2 (en) 2020-08-03 2024-01-16 Feit Electric Company, Inc. Omnidirectional flexible light emitting device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04363032A (en) * 1991-03-18 1992-12-15 Japan Gore Tex Inc Semiconductor device
JPH06132330A (en) * 1992-10-15 1994-05-13 Toshiba Chem Corp Optical semiconductor device sealing method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5170009A (en) * 1990-03-22 1992-12-08 Canon Kabushiki Kaisha Electrically conductive covers and electrically conductive covers of electronic equipment
JPH0462042A (en) * 1990-06-25 1992-02-27 Gasket Seisakusho:Yugen Composite gasket material
DE69132525T2 (en) * 1990-10-26 2001-07-12 Canon Kk Image-permeable, transparent films and processes for image production with them
JPH04196601A (en) * 1990-11-26 1992-07-16 Nippon Telegr & Teleph Corp <Ntt> Oxide superconducting microwave passive element and manufacture thereof
DE4437685A1 (en) * 1994-10-21 1996-04-25 Hoechst Ag Free-flowing polytetrafluoroethylene molding powder
US5571152A (en) 1995-05-26 1996-11-05 Light Sciences Limited Partnership Microminiature illuminator for administering photodynamic therapy
DE19638667C2 (en) * 1996-09-20 2001-05-17 Osram Opto Semiconductors Gmbh Mixed-color light-emitting semiconductor component with luminescence conversion element
US6046075A (en) * 1997-12-23 2000-04-04 Vlsi Technology, Inc. Oxide wire bond insulation in semiconductor assemblies
US6177726B1 (en) * 1999-02-11 2001-01-23 Philips Electronics North America Corporation SiO2 wire bond insulation in semiconductor assemblies
JP2001057321A (en) * 1999-08-18 2001-02-27 Nec Corp Chip type solid electrolytic capacitor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04363032A (en) * 1991-03-18 1992-12-15 Japan Gore Tex Inc Semiconductor device
JPH06132330A (en) * 1992-10-15 1994-05-13 Toshiba Chem Corp Optical semiconductor device sealing method

Also Published As

Publication number Publication date
US20020093081A1 (en) 2002-07-18
US7071034B2 (en) 2006-07-04
US6940184B2 (en) 2005-09-06
US20050127507A1 (en) 2005-06-16
JP2002208739A (en) 2002-07-26

Similar Documents

Publication Publication Date Title
JP4545956B2 (en) Semiconductor device and manufacturing method thereof
US9666776B2 (en) Semiconductor light emitting device and multiple lead frame for semiconductor light emitting device
US8222059B2 (en) Method transparent member, optical device using transparent member and method of manufacturing optical device
KR101620113B1 (en) Optoelectronic component and method for producing an optoelectronic component
JP3618551B2 (en) Optical semiconductor module
KR101418397B1 (en) Semiconductor package, and method for fabricating the same
US20100127288A1 (en) Light-emitting diode devices and methods for fabricating the same
US20070267643A1 (en) Semiconductor light emitting device and method for manufacturing the same
WO1999063594A1 (en) Semiconductor device
KR102409220B1 (en) Light emitting device package
TWI466336B (en) Led manufacturing method
JPH11195794A (en) Photoelectric element and manufacture thereof
JP2000174350A (en) Optical semiconductor module
TWI414028B (en) Injection molding system and method of chip package
JP3908383B2 (en) Semiconductor device
US20170288109A1 (en) Light emitting device package
US20120001312A1 (en) Package for semiconductor device, method of manufacturing the same and semiconductor device
US7350988B2 (en) Optical module and method of manufacturing the same
US20130015488A1 (en) Light emitting diode package and method for fabricating the same
JP2002222992A (en) Led light emitting element and device thereof
CN109671834B (en) LED chip CSP packaging structure with double-side light emitting and packaging method thereof
TW201448286A (en) Light emitting diode package and method for manufacturing the same
KR101380388B1 (en) Light emitting diode having flexibility and method for manufacturing the same
JP4409074B2 (en) Semiconductor device
KR102051478B1 (en) Semiconductor light emitting device and method of manufacturing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20071204

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100615

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100629

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100701

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130709

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees