JP4543897B2 - Signal transmission system - Google Patents

Description

  The present invention relates to a signal transmission system for electrically exchanging signals between devices, and more particularly to a signal transmission system for exchanging electrical signals between devices via an input / output interface.

  More particularly, the present invention relates to a signal transmission system that performs data transmission between IC chips mounted on a printed circuit board, and more particularly to a signal transmission system that optimizes power consumption at an interface between IC chips that perform data transmission. About.

  Along with recent technological innovation, various electric and electronic devices have become widespread. Most electronic devices are mainly composed of a semiconductor integrated circuit, that is, an IC chip in which countless fine circuit patterns are mounted on a semiconductor. The IC chip is an SSI (Small Scale IC), MSI (Medium Scale ID), or LSI (Large Scale IC) depending on the number of elements on the chip, that is, the degree of integration. ), VLSI (Very Large Scale IC: VLSI), but in this specification, these may be collectively referred to simply as “LSI” for convenience.

  An LSI is basically designed and manufactured, that is, customized based on a required specification for each application. On the other hand, a method of semi-customizing using gate arrays and standard cells to reduce design time, production cost, and production days is widely adopted.

  In recent years, a functional system block, which is a core specialized in various digital signal processing such as data encoding, is mounted on a single chip together with a general-purpose memory and processor, and a specific system is realized by one chip. A “system LSI” has emerged that realizes a function close to. In this type of system LSI, the scale is large, design time is required, and the manufacturing cost is high. For this reason, design efficiency is improved by handling mounting data related to functional circuit blocks that are cores in the chip in the form of digital information such as hardware macros (megacells) or software macros.

  In addition, these hardware macros and software macros are distributed and traded as IP (Intellectual Property: design assets), and a unique market is formed. Therefore, LSI manufacturers can realize high-performance and high-performance system LSIs in a short time by combining not only their own IPs but also effective IPs provided by other companies, users, and IP vendors. It becomes.

  Here, various IC chips including the system LSI are generally provided with an interface for signal transmission / reception with the outside. There are various methods for this inter-chip interface.

  FIG. 15 illustrates the simplest interface configuration example. In the illustrated interface, inverters INV1 and INV2 are used for a transmission side driver and a reception side receiver, respectively. The operation of this interface will be described below. However, the voltage swing is 3.3V, 2.0V or higher is high, and 0.8V or lower is low.

The transmission-side inverter INV1 outputs high (power supply voltage V _DD ) or low (0 V) according to the transmission data. On the other hand, when the output level arriving from the transmission line exceeds the threshold, the receiving side inverter INV2 inverts its own output.

The interface having the configuration shown in FIG. 15 has little problem when operating at a low frequency, but various problems occur when operating at a high frequency, that is, as the bit rate of transmitted data increases. Specifically, since the transmitted level changes between V _DD and 0 V, the response time is long and the bit rate is limited. In addition, there is a delay between the entrance and exit of the transmission line, and the identity of the potential is not strictly guaranteed, but the effect increases as the frequency increases. Therefore, impedance matching is necessary. However, in the interface shown in FIG. 15, impedance matching of the transmission path is not considered, signal reflection occurs, distortion occurs in the transmission waveform, and electromagnetic wave radiation increases. .

  In order to cope with these problems, an interface method called LVDS (Low Voltage Differential Signal) is often used in recent years. According to the LVDS system, voltage signals are converted into current signals and transmitted, so that they are not affected by power loss or voltage effects on the transmission path. In addition, there are features such as low-amplitude transmission by current, impedance matching by termination resistance, and differential transmission. Therefore, by adopting the LVDS method, it is possible to realize the correspondence to a high bit rate, the reduction of signal reflection, the reduction of electromagnetic wave radiation, and the improvement of noise resistance (for example, see Non-Patent Document 1). ).

  FIG. 16 shows a configuration example of an LVDS interface. In the LDVS interface, one transmission path connecting the IC chips includes a pair of current signal paths. However, the current source is 3.5 mA, the terminating resistance is 100Ω, and the output amplitude is 350 mV. The operation of this interface will be described below.

  For example, when the transmission data is high, the transistors M3 and M2 are turned on and the transistors M1 and M4 are turned off. As a result, the current source current M3, the current signal path 1, the termination resistor RL, the current signal paths 2, M2, and the current route that flows through the ground are formed, and a positive voltage is generated in the RL. On the other hand, when the transmission data is low, the transistors M3 and M2 are turned off and the transistors M1 and M4 are turned on. As a result, the current source current M1, the current signal path 2, the termination resistor RL, the current signal paths 1, M4, and the current route that flows through the ground are formed, and a negative voltage is generated in the termination resistor RL. The differential amplifier detects the voltages when the transmission data is high and low, and converts the voltages into reception data.

  However, the conventional interface system as shown in FIGS. 15 and 16 has a circuit design lacking flexibility from the viewpoint of power consumption. This is because the transmission side defines the output level and is configured to meet the definition, so that the power consumption of the driver is determined when the output level is determined.

For example, in the interface system shown in FIG. 16, when the stop current source is set to 3.5 mA, the amplifier on the LVDS transmission side consumes 6.3 mW when the power supply voltage is 1.8 V. .

  In recent years, with the increase in scale and integration of LSIs, the number of terminals possessed by one IC chip has increased remarkably, so that power consumption at the interface has become a very important technical issue. In particular, in the case of LSIs used in mobile devices and battery-powered devices, power consumption is one of the most important performance indicators, which is a serious problem.

  The power consumption at the interface greatly depends on how the output level is determined. Basically, the output level is preferably set to a level at which normal data transmission is possible even under the worst condition of the transmission path assumed to be connected to the interface and the performance of the receiving side.

  Focusing on the transmission line in determining the output level of the interface, generally, the longer the transmission line, the greater the loss in the transmission line. In addition, if the transmission line is long, an unnecessary capacitance component increases, so that the slew rate is also deteriorated. For this reason, in order to guarantee data transmission on a longer transmission path, it is necessary to increase the output level. From this, it can be understood that the power consumption can be reduced if a good transmission path is assumed and the output level can be determined in conformity with this.

  However, in practice, the same LSI is often used in various applications ranging from a very compact configuration such as a mobile phone to a relatively large device configuration such as a desktop PC. Specifically, if the LSI is used in a mobile phone, the transmission path is assumed to be about several tens of millimeters, and if it is a desktop PC, several tens of centimeters is assumed. Furthermore, in the case of a multi-chip module, about several millimeters is assumed.

  Thus, there are various transmission paths between IC chips, and it is not possible to assume a good transmission path.

  For example, an interface circuit in which a slew rate is automatically set by an external termination resistor without depending on process conditions and other environmental conditions has been proposed (for example, see Patent Document 1). The theme is to keep the slew rate, that is, the output level of the transmission line constant, and it is not intended to reduce the power consumption by setting the output level to a reasonable and lower output level when using the IC chip. .

  If the conventional general design theory is followed, the output level of the interface of the IC chip must be set in accordance with the desktop PC assumed to have the most severe transmission path conditions. However, when the same IC chip is used under the condition of a relatively good transmission path such as a multi-chip module, the specification of the interface is at an over-quality level, and power is wasted. .

  In addition, as described above, when the design method of purchasing the implementation data of each core function from the IP market in the form of hardware macros, software macros, etc. and combining them to produce a multi-function IC chip is adopted A high-performance and high-performance IC chip can be manufactured in a short period of time and at a low cost. However, assuming that it is applied to various purposes, the interface part must be over-spec.

JP 2002-26712 A Mikitaka Hamada "Reasons for using LVDS" (Design Wave Magaign 2002 April, pp. 95-101)

  An object of the present invention is to provide an excellent signal transmission system capable of suitably performing data transmission between IC chips mounted on a printed board.

  It is a further object of the present invention to provide an excellent signal transmission system capable of optimizing the power consumption at the interface between IC chips performing data transmission.

This onset bright aspect, there is provided a signal transmission system which performs data transmission between IC chips mounted on a printed substrate,
A first transmission path for transmitting data between the first IC chip and the second IC chip;
A first variable output section for outputting a signal to be sent from the first IC chip to the first transmission line with a variable output level;
A second reception / reproduction unit that receives and reproduces a signal received from the first IC chip via the first transmission path in the second IC chip;
A second transmission path for transmitting data between the second IC chip and the first IC chip;
A second variable output section for outputting a signal transmitted from the second IC chip to the second transmission line with a variable output level;
A first reception / reproduction unit that receives and reproduces a signal received from the second IC chip via the second transmission path in the first IC chip;
A control unit for controlling the setting of each output level in the first and second variable output units based on the communication state in the first and second transmission paths ,
A test signal supply unit for supplying a test signal to be sent to the second IC chip via the first variable output unit and the first transmission line ;
The test signal sent to the second IC chip via the first transmission line is received and reproduced by the second reception / reproduction unit, and further, the first signal is obtained via the second transmission line. A determination unit that is sent back to the IC chip and inspected after being received and reproduced by the first reception and reproduction unit,
The control unit controls a test signal transmission operation by the test signal supply unit and setting of output levels in the first variable output unit and the second variable output unit based on a determination result in the determination unit. ,
This is a signal transmission system.

Signal transmission system according to the present onset Ming, performs the two-way data transmission between one IC chip and other IC chip, the IC chip is mounted on a printed substrate, electrically with another IC chip After the connection is made, the test signal is transmitted for each transmission line in each direction, and the optimum output level of the interface at the time of original data transmission is determined based on the determination result of the received test signal. it can.

  For example, the test signal supply means and the determination unit are disposed on the first IC chip. And the said control means determines the output level in the said 1st and 2nd variable output part based on the determination result of the said determination part, and also sets the output level of the said 1st variable output part, and The control unit can be configured by a subordinate control unit that sets an output level of the second variable output unit in accordance with an instruction. In such a system configuration, the determination unit and the test signal generation unit can be shared by both IC chips, and the number of circuits can be reduced as compared with the case where they are provided separately.

  In this case, a kind of master-slave (master-slave) relationship is formed between the first and second IC chips, and the test signal is generated only by the first IC chip, and is output from the bidirectional transmission path. The level is also determined only by the first IC chip. First, when determining the output of the first variable output unit, the output level of the second variable output unit is maximized, and the test signal is sent to the first and second transmission lines using the first and second transmission paths. Reciprocate between IC chips. Then, the determination unit can compare the reception reproduction signal returned from the second IC chip with the original signal of the test signal, and determine the optimum output level of the first variable output unit based on the determination result. . Subsequently, when determining the output of the second variable output section, the output level of the first variable output section is maximized, and the test signal is sent to the first and second transmission lines using the first and second transmission paths. Reciprocate between the IC chips. Then, the determination unit can compare the received reproduction signal returned from the second IC chip with the original signal of the test signal, and determine the optimum output level of the second variable output unit based on the determination result. .

  In a signal transmission system that performs bidirectional data transmission between one IC chip and the other IC chip, the first and second transmission paths may be multiplexed into a single bidirectional transmission path. Good.

  In addition, in the case where a plurality of second transmission paths for transmitting data between the second IC chip and the first IC chip are provided, the second IC chip is provided with a variable output unit for each transmission path. You may make it provide the subordinate control part which sets the output level.

  In the signal transmission system according to the present invention, as a specific configuration example of the variable output unit for setting the output level of the transmission line, a method of setting a plurality of output levels using a combination of a plurality of current sources Can be mentioned.

  In such a variable output unit configuration in which the output level can be set by combining a plurality of current sources having different current values, the optimum output level in the transmission line can be searched according to a so-called binary search algorithm.

Further, in the signal transmission system according to the present onset Ming, in the process of determining the optimum value of the output level in the transmission path, and output from the data transmission source IC chip test signal to the transmission path, the this data transmission destination IC chip The communication is inspected by receiving and reproducing on the side and determining the test signal.

  Although used here needs to be known in advance in each IC chip, for example, a test signal can be configured with a pseudo-random code. A pseudo-random code generation circuit can be easily configured by a digital circuit using a CMOS element. The data transmission source IC chip can generate a pseudo random code as a test signal using a certain seed, and the data transmission destination IC chip can similarly generate a comparison signal using the same seed.

  ADVANTAGE OF THE INVENTION According to this invention, the outstanding signal transmission system which can perform the data transmission between IC chips mounted on the printed circuit board suitably can be provided.

  Further, according to the present invention, it is possible to provide an excellent signal transmission system capable of optimizing power consumption at an interface between IC chips performing data transmission.

  According to the signal transmission system of the present invention, after an IC chip is mounted on a printed board and electrically connected to another IC chip, a test signal is transmitted from one IC chip interface to the other IC chip. The optimum output level of the interface at the time of original data transmission can be determined based on the determination result of the received test signal.

  Compared with the conventional design method of setting the output level of the interface while giving a margin based on the prediction of the mounting state, the signal transmission system according to the present invention is more appropriate and more suitable at the stage of using the IC chip. A low output level can be set, resulting in low power consumption.

  Note that the IC chip controller and the like are mounted using a CMOS circuit, so that power consumption is not increased during normal operation.

  In addition, the interface circuit part has a larger chip area than the logic circuit due to the size restrictions of the PAD, etc., so even if the logic circuit is mounted, the chip area is hardly increased and there is a cost disadvantage. It can be ignored.

  Other objects, features, and advantages of the present invention will become apparent from more detailed description based on embodiments of the present invention described later and the accompanying drawings.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 schematically shows the configuration of a signal transmission system 10 according to an embodiment of the present invention. The illustrated signal transmission system 10 can be incorporated into an interface system for performing data transmission between IC chips, for example.

  An interface system that performs data transmission between IC chips includes an output unit 11 that outputs transmission data, a reception / reproduction unit 12 that receives and reproduces data that has passed through a transmission path, and a transmission that connects the output unit and the reception / reproduction unit It is constituted by a path 13. The output unit 11 is configured as a variable output unit that can adjust its output level in accordance with an external instruction signal.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14. The determination unit 16 determines whether the test signal that has passed through the transmission path 13 has been correctly received and reproduced by the reception and reproduction unit 12.

  The control unit 17 determines an optimum output level based on the result of transmission / reception of the test signal via the transmission line 13 and sets this in the variable output unit 11. Therefore, after an IC chip is mounted on a printed circuit board and electrically connected to another IC chip, a test signal is transmitted from one IC chip interface to the other IC chip, and the received test signal The output level of the interface at the time of original data transmission can be determined based on the determination result.

  When optimizing the output level in the variable output unit 11, the control unit 17 controls the selector 15 so that the output of the test signal generation unit 14 is input to the variable output unit 11. Further, the control unit 17 sets the output of the variable output unit 11 to a certain value.

  The test signal generation unit 14 outputs a test signal in accordance with an instruction from the control unit 17. The test signal is input to the reception / playback unit 12 via the variable output unit 11 and the transmission path 13. The reception / reproduction unit 12 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 13.

  The reproduced test signal is input to the determination unit 16. The determination unit 16 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result is returned to the control unit 17, and the control unit 17 determines the optimum output level in the variable output unit 11 based on the determination result.

  Note that the variable output unit 11 may include other signal processing operations such as high frequency emphasis, although not shown. Further, when the signal output from the variable output unit 11 is subjected to a kind of modulation such as multi-leveling, the reception / reproduction unit 12 performs a corresponding demodulation process.

  Further, when determining the output level for the transmission line 13, the test signal may be sent only once, or may be sent multiple times while changing the variable output level.

  Further, the determination result in the determination unit 16 may simply be a signal indicating whether all are correct or may include an error probability.

  Further, the reception / playback unit 12 may perform operations such as clock recovery and timing adjustment.

  The variable output from the variable output unit 11 may be a differential signal or a single-phase signal.

  The transmission line 13 may be a simple wiring or the like in the case of a coaxial line or a strip line generated on a substrate.

  Further, the test signal generated by the test signal generator 14 may be fixed or variable. The test signal generation unit may generate a signal indicating what kind of signal is sent.

  Note that the output level optimization scheme is assumed to be, for example, when the IC chip is powered on, reset, or returned from the power saving mode (sleep mode). Regarding the start condition of the optimization scheme, the control unit 17 may determine the start of the optimization itself, or may receive an instruction from an external system (not shown) such as a CPU (Central Processing Unit).

  According to the signal transmission system shown in FIG. 1, since the output level can be set smaller than when the output level setting with a margin is used based on the prediction, the IC chip has low power consumption. Become.

  Logic circuits such as the control unit 17 and the determination unit 16 can be relatively easily configured using CMOS (Complementary Metal Oxide Semiconductor) elements. If the control unit and the like are mounted with a CMOS circuit, power consumption is not increased during normal operation. In addition, the interface circuit part has a larger chip area than the logic circuit due to the size restrictions of the PAD and other factors. Therefore, even if the logic circuit is mounted, the chip area is hardly increased, resulting in cost disadvantages. Is negligible.

  FIG. 2 shows a configuration example of a signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2.

  An interface system that performs data transmission between IC chips includes an output unit 11 that outputs transmission data, a reception / reproduction unit 12 that receives and reproduces data that has passed through a transmission path, and a transmission that connects the output unit and the reception / reproduction unit It is constituted by a path 13. The output unit 11 is configured as a variable output unit that can adjust its output level in accordance with an external instruction signal. In order to perform an output level autonomous optimization process in the variable output unit 11, a test signal generation unit 14, a selector 15, and a control unit 17 are provided on the data transmission source IC1 side. A determination unit 16 is provided on a certain IC2 side.

  Further, in the system configuration shown in FIG. 2, the determination result of the test signal reception / reproduction processing in the determination unit 16 mounted on the IC 2 side as the data transmission destination is transmitted to the control unit 17 on the IC 1 side as the data transmission source. A dedicated determination result transmission path 18 is provided separately from the data signal (and test signal) transmission path 13.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14. The determination unit 16 determines whether the test signal that has passed through the transmission path 13 has been correctly received and reproduced by the reception and reproduction unit 12.

  The control unit 17 determines an optimum output level based on the result of transmitting / receiving the test signal via the determination result transmission path 18 and sets this in the variable output unit 11. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, a test signal is transmitted from IC1 to IC2, and the original data is transmitted based on the determination result of the received test signal. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 11, the control unit 17 controls the selector 15 so that the output of the test signal generation unit 14 is input to the variable output unit 11. Further, the control unit 17 sets the output of the variable output unit 11 to a certain value.

  The test signal generation unit 14 outputs a test signal in accordance with an instruction from the control unit 17. The test signal is input to the reception / playback unit 12 via the variable output unit 11 and the transmission path 13. The reception / reproduction unit 12 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 13.

  The reproduced test signal is input to the determination unit 16. The determination unit 16 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result is returned to the control unit 17 via the determination result transmission path 18 different from the transmission path 13. And the control part 17 determines the optimal output level in the variable output part 11 based on the determination result.

  Note that the output level optimization scheme is assumed to be, for example, when the IC chip is powered on, reset, or returned from the power saving mode. Regarding the start condition of the optimization scheme, the control unit 17 may determine the start of optimization by itself, or may receive an instruction from a CPU (not shown).

  According to the signal transmission system shown in FIG. 2, the IC chip can be set to a lower output level compared to the case of using the output level setting with a margin based on prediction. Become.

  Since the determination result itself of the test signal on the IC 2 side is generally shorter than the normal data transmission performed via the transmission path 13, it is not necessary to transmit at a high rate. For example, when a transmission line as shown in FIG. 15 that operates only at a low rate and does not require output level control exists between IC1 and IC2, this is also used as the determination result transmission line 18 to determine An additional circuit for transmitting the result is not necessary.

  On the other hand, when a circuit for transmitting the determination result is added to the transmission line, there is a demerit that the performance of the transmission line itself deteriorates due to an increase in parasitic capacitance. For this reason, it is useful to provide the determination result transmission path 18 separately because this disadvantage can be eliminated.

  FIG. 3 shows another configuration example of the signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2.

  An interface system that performs data transmission between IC chips includes an output unit 11 that outputs transmission data, a reception / reproduction unit 12 that receives and reproduces data that has passed through the transmission path, and these output unit 11 and reception / reproduction unit 12. The transmission line 13 is connected. The output unit 11 is configured as a variable output unit that can adjust its output level in accordance with an external instruction signal. In order to perform an output level autonomous optimization process in the variable output unit 11, a test signal generation unit 14, a selector 15, and a control unit 17 are provided on the data transmission source IC1 side. A determination unit 16 is provided on a certain IC2 side.

  Further, in the system configuration shown in FIG. 3, the determination result of the test signal reception / reproduction process in the determination unit 16 mounted on the IC 2 side as the data transmission destination is transmitted via the transmission line 13 for performing normal data transmission. The data is transmitted to the control unit 17 on the IC1 side which is a data transmission source. For this reason, the determination result transmitting unit 21 is disposed on the IC2 side, and the determination result receiving unit 22 is disposed on the IC1 side. The transmission / reception unit for these determination results can be mounted relatively easily using a CMOS element.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14. The determination unit 16 determines whether the test signal that has passed through the transmission path 13 has been correctly received and reproduced by the reception and reproduction unit 12.

  The control unit 17 determines an optimum output level based on the result of transmission / reception of the test signal via the transmission line 13 and sets this in the variable output unit 11. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and electrically connected, a test signal is transmitted from IC1 to IC2, and the original data transmission time is determined based on the determination result of the received test signal. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 11, the control unit 17 controls the selector 15 so that the output of the test signal generation unit 14 is input to the variable output unit 11. Further, the control unit 17 sets the output of the variable output unit 11 to a certain value.

  The test signal generation unit 14 outputs a test signal in accordance with an instruction from the control unit 17. The test signal is input to the reception / playback unit 12 via the variable output unit 11 and the transmission path 13. The reception / reproduction unit 12 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 13.

  The reproduced test signal is input to the determination unit 16. The determination unit 16 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result transmission unit 21 in the IC 2 transmits the determination result of the test signal to the IC 1 via the transmission path 13. On the IC 1 side, when the determination result receiving unit 22 receives the determination result via the transmission path 13, it passes this to the control unit 17. And the control part 17 determines the optimal output level in the variable output part 11 based on the determination result.

  Note that the output level optimization scheme is assumed to be, for example, when the IC chip is powered on, reset, or returned from the power saving mode. Regarding the start condition of the optimization scheme, the control unit 17 may determine the start of optimization by itself, or may receive an instruction from a CPU (not shown).

  According to the signal transmission system shown in FIG. 3, the IC chip can be set to a lower output level compared to the case of using the output level setting with a margin based on the prediction. Become.

  When the dedicated determination result transmission path 18 is provided as shown in FIG. 2, the number of connections between chips increases and the number of terminals increases, which is disadvantageous. On the other hand, when sharing with the existing transmission line 13 as shown in FIG. 3, the timing for sending the determination result needs to be arbitrated with other functions, the control becomes complicated, and the optimization time is required. May take. When the transmission path 13 for data transmission is shared for the transmission of the determination result, the control unit 17 can control the overall operation of the system, so that the optimization proceeds with only the illustrated blocks. Can be advantageous.

  Note that the determination result of the test signal itself has a small amount of information, and the timing at which the determination result is transmitted can be controlled by the control unit 17, so that the determination transmission unit 21 and the determination reception unit 22 are very simple circuits. It is configurable.

  FIG. 4 shows still another configuration example of the signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2.

  An interface system that performs data transmission between IC chips includes an output unit 11 that outputs transmission data, a reception / reproduction unit 12 that receives and reproduces data that has passed through the transmission path, and these output unit 11 and reception / reproduction unit 12. The transmission line 13 is connected. The output unit 11 is configured as a variable output unit that can adjust its output level in accordance with an external instruction signal. In order to perform an output level autonomous optimization process in the variable output unit 11, a test signal generation unit 14, a selector 15, and a control unit 17 are provided on the data transmission source IC1 side. A determination unit 16 is provided on a certain IC2 side.

  On the IC2 side, the same test signal as that of IC1 must be used in order to determine the test signal sent from IC1. Therefore, in the system shown in FIG. 4, the comparison signal generation unit 23 that generates the same signal as the test signal is disposed in the IC 2 that is the data transmission destination.

  In the system configuration shown in FIG. 4, the determination result of the reception / reproduction processing of the test signal in the determination unit 16 mounted on the IC 2 side that is the data transmission destination is transmitted to the control unit 17 on the IC 1 side that is the data transmission source. A dedicated determination result transmission path 18 is provided separately from the data signal (and test signal) transmission path 13.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14. The determination unit 16 determines whether the test signal that has passed through the transmission path 13 has been correctly received and reproduced by the reception and reproduction unit 12.

  The control unit 17 determines an optimum output level based on the result of transmitting / receiving the test signal via the determination result transmission path 18 and sets this in the variable output unit 11. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, a test signal is transmitted from IC1 to IC2, and the original data is transmitted based on the determination result of the received test signal. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 11, the control unit 17 controls the selector 15 so that the output of the test signal generation unit 14 is input to the variable output unit 11. Further, the control unit 17 sets the output of the variable output unit 11 to a certain value.

  The test signal generation unit 14 outputs a test signal in accordance with an instruction from the control unit 17. The test signal is input to the reception / playback unit 12 via the variable output unit 11 and the transmission path 13. The reception / reproduction unit 12 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 13.

  The reproduced test signal is input to the determination unit 16. Further, the comparison signal generation unit 23 generates a comparison signal that is the same as the test signal and supplies the comparison signal to the determination unit 16. The determination unit 16 compares the comparison signal and the reproduction signal and generates a determination result. The determination result is returned to the control unit 17 via the determination result transmission path 18 different from the transmission path 13. And the control part 17 determines the optimal output level in the variable output part 11 based on the determination result.

  Here, when changing the test signal used for the determination of the output level, the control unit 17 sends a signal specifying the type of the test signal transmitted from the test signal generation unit 14, and the comparison signal generation unit 23 outputs the test signal. Produces the same signal as The determination unit 16 can compare the test signal sent via the transmission path 13 with the output of the comparison signal generation unit 23.

  Note that the output level optimization scheme is assumed to be, for example, when the IC chip is powered on, reset, or returned from the power saving mode. Regarding the start condition of the optimization scheme, the control unit 17 may determine the start of optimization by itself, or may receive an instruction from a CPU (not shown).

  According to the signal transmission system shown in FIG. 4, the IC chip can be set to a lower output level compared to the case of using the output level setting with a margin based on prediction. Become.

  FIG. 5 shows still another configuration example of the signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2.

  An interface system that performs data transmission between IC chips includes an output unit 11 that outputs transmission data, a reception / reproduction unit 12 that receives and reproduces data that has passed through the transmission path, and these output unit 11 and reception / reproduction unit 12. The transmission line 13 is connected. The output unit 11 is configured as a variable output unit that can adjust its output level in accordance with an external instruction signal. In order to perform an output level autonomous optimization process in the variable output unit 11, a test signal generation unit 14, a selector 15, and a control unit 17 are provided on the data transmission source IC1 side. A determination unit 16 is provided on a certain IC2 side.

  On the IC2 side, in order to determine the test signal sent from the IC1, the same test signal as that of the IC1 must be used. Therefore, in the IC2 that is the data transmission destination, similarly to the system configuration shown in FIG. In addition, a comparison signal generator 23 for generating the same signal as the test signal is provided.

  Further, in the system configuration shown in FIG. 5, the determination result of the test signal reception / reproduction processing in the determination unit 16 mounted on the IC 2 side as the data transmission destination is transmitted via the transmission line 13 for performing normal data transmission. The data is transmitted to the control unit 17 on the IC1 side which is a data transmission source. For this reason, the determination result transmitting unit 21 is disposed on the IC2 side, and the determination result receiving unit 22 is disposed on the IC1 side. The transmission / reception unit for these determination results can be mounted relatively easily using a CMOS element.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14. The determination unit 16 determines whether the test signal that has passed through the transmission path 13 has been correctly received and reproduced by the reception and reproduction unit 12.

  The control unit 17 determines an optimum output level based on the result of transmitting / receiving the test signal via the determination result transmission path 18 and sets this in the variable output unit 11. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and electrically connected, a test signal is transmitted from IC1 to IC2, and the original data transmission time is determined based on the determination result of the received test signal. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 11, the control unit 17 controls the selector 15 so that the output of the test signal generation unit 14 is input to the variable output unit 11. Further, the control unit 17 sets the output of the variable output unit 11 to a certain value.

  The test signal generation unit 14 outputs a test signal in accordance with an instruction from the control unit 17. The test signal is input to the reception / playback unit 12 via the variable output unit 11 and the transmission path 13. The reception / reproduction unit 12 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 13.

  The reproduced test signal is input to the determination unit 16. Further, the comparison signal generation unit 23 generates a comparison signal that is the same as the test signal and supplies the comparison signal to the determination unit 16. The determination unit 16 compares the comparison signal and the reproduction signal and generates a determination result. The determination result transmission unit 21 in the IC 2 transmits the determination result of the test signal to the IC 1 via the transmission path 13. On the IC 1 side, when the determination result receiving unit 22 receives the determination result via the transmission path 13, it passes this to the control unit 17. And the control part 17 determines the optimal output level in the variable output part 11 based on the determination result.

  Here, when changing the test signal used for the determination of the output level, the control unit 17 sends a signal specifying the type of the test signal transmitted from the test signal generation unit 14, and the comparison signal generation unit 23 outputs the test signal. Produces the same signal as The determination unit 16 can compare the test signal sent via the transmission path 13 with the output of the comparison signal generation unit 23.

  Note that the output level optimization scheme is assumed to be, for example, when the IC chip is powered on, reset, or returned from the power saving mode. Regarding the start condition of the optimization scheme, the control unit 17 may determine the start of optimization by itself, or may receive an instruction from a CPU (not shown).

  According to the signal transmission system shown in FIG. 5, the IC chip can be set to a lower output level compared to the case of using the output level setting with a margin based on prediction. Become.

  Further, according to the signal transmission system shown in FIG. 4 and FIG. 5, since the test signal is variable, the optimization level of the variable output unit 11 can be changed. For example, when highly reliable transmission is required, the reliability of the determination result can be increased by repeatedly sending a certain pattern or trying another pattern.

  FIG. 6 shows a configuration example of a signal transmission system that performs bidirectional data transmission between one chip IC1 and the other chip IC2.

  The interface subsystem itself constituting the forward path for data transmission from IC1 to IC2 includes an output unit 11 that outputs transmission data, a reception / reproduction unit 12 that receives and reproduces data that has passed through the transmission path 13, and these output units 11 And a transmission path 13 that connects the reception / reproduction unit 12. Here, the output part 11 is comprised as a variable output part which can adjust the output level according to the instruction signal from the outside.

  Further, the interface subsystem itself constituting the return path for data transmission from IC2 to IC1 includes an output unit 31 for outputting transmission data, a reception / reproduction unit 32 for receiving and reproducing data passing through the transmission path 33, and these outputs. A transmission path 33 connecting the unit 31 and the reception / playback unit 32 is configured. Here, the output unit 31 is configured as a variable output unit that can adjust its output level in accordance with an instruction signal from the outside.

  In the signal transmission system shown in FIG. 6, in order to perform autonomous optimization processing of the output levels of the variable output units 11 and 31 in the data transmission lines 13 and 33 in each direction, a test signal generation unit is provided on the IC 1 side. 14, a selector 15, a control unit 17, and a determination unit 36 are disposed, and a subordinate control unit 37 and a selector 35 are disposed on the IC 2 side. In the illustrated configuration, a kind of master-slave (master-slave) relationship is formed between the IC1 and the IC2 with respect to the output level optimization processing. That is, the test signal is generated only by the test signal generation unit 14 in one chip IC1, and the determination of the output level is performed only by the determination unit 36 in IC1.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14.

  On the IC 2 side, the reception / reproduction unit 12 receives and reproduces the test signal that has passed through the transmission path 13. The selector 35 selectively switches the input to the variable output unit 31 among the transmission data during normal data transmission and the test signal received and reproduced by the reception and reproduction unit 12.

  The control unit 17 determines the optimum output level in each of the round trip transmission paths 13 and 33 based on the result of transmitting and receiving the test signal via the transmission path 33. The optimum output level is set in the variable output unit 11 in the IC 1, and the optimum output level is notified to the IC 2 via the transmission line 13. On the other hand, on the IC 2 side, the slave control unit 37 having a master-slave relationship with the control unit 17 sets the received optimum output level in the variable control unit 31. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, the test signal is transmitted from IC1 to IC2 and the data is transmitted from IC2 to IC1, and the determination result of the received test signal Based on the above, it is possible to determine the output level of the bidirectional interface during the original data transmission.

  In the system configuration shown in FIG. 6, a kind of master-slave (master-slave) relationship is formed between IC1 and IC2 regarding the optimization process of the output level, and the test signal is generated only by IC1 and transmitted in each direction. The determination of the road output level is also performed only by IC1. For this reason, it is necessary to perform the determination processing of each of the transmission lines 13 and 33 with orthogonality and non-interference.

  For example, when determining the output of the variable output unit 11, the output level of the variable output unit 31 is maximized, and the data transmission quality on the transmission path 33 is ensured to the maximum. Then, the test signal is passed through the variable output unit 11, the transmission path 13, the reception / reproduction unit 12, the variable output unit 31, the transmission path 33, the reception / reproduction unit 32, and the determination unit 36 in this order. The determination unit 36 compares the received reproduction signal returned from the IC 2 with the original signal of the test signal. By this operation, first, the optimum output level of the variable output unit 11 is determined, and the power consumption of the transmission line 13 is optimized.

  Next, in order to determine the output level of the variable output unit 31, the output level of the variable output unit 11 is maximized, and the data transmission quality on the transmission line 13 is ensured to the maximum. Then, the test signal is passed through the variable output unit 11, the transmission path 13, the reception / reproduction unit 12, the variable output unit 31, the transmission path 33, the reception / reproduction unit 32, and the determination unit 36 in this order. The determination unit 36 compares the received reproduction signal returned from the IC 2 with the original signal of the test signal. By this operation, first, the optimum output level of the variable output unit 31 is determined, and this is notified to the IC 2 side via the transmission line 13. The subordinate control unit 37 interprets the control signal generated by the test signal generation unit 14 according to an instruction from the control unit 17 and operates the output level of the variable output unit 31 to reduce the power consumption of the transmission path 33. Optimize.

  According to the bidirectional signal transmission system shown in FIG. 6, since the output level can be set smaller than when the output level setting with a margin is used based on the prediction, the IC chip is low. It becomes power consumption.

  Further, in the system configuration shown in FIG. 6, the determination unit 36 and the test signal generation unit 14 can be shared by both the chips IC1 and IC2, and the number of circuits can be reduced as compared with the case where they are provided separately.

  Further, since the order of optimizing the output levels of the variable output unit 11 and the variable output unit 31 of each IC chip is controlled by the control unit 17 in one IC 1, a special arbitration function between the IC chips is performed. Is not necessary.

  FIG. 7 shows another configuration example of the signal transmission system that performs bidirectional data transmission between one chip IC1 and the other chip IC2.

  The interface subsystem itself constituting the forward path for data transmission from IC1 to IC2 includes an output unit 11 that outputs transmission data, a reception / reproduction unit 12 that receives and reproduces data that has passed through the transmission path 13, and these output units 11 And a transmission path 13 that connects the reception / reproduction unit 12. Here, the output part 11 is comprised as a variable output part which can adjust the output level according to the instruction signal from the outside.

  Further, the interface subsystem itself constituting the return path for data transmission from IC2 to IC1 includes an output unit 31 for outputting transmission data, a reception / reproduction unit 32 for receiving and reproducing data passing through the transmission path 33, and these outputs. And a transmission path 33 connecting the receiver and the receiving / reproducing unit. Here, the output unit 31 is configured as a variable output unit that can adjust its output level in accordance with an instruction signal from the outside.

  In the signal transmission system shown in FIG. 7, in order to perform autonomous optimization processing of the output level of the variable output unit 11 in the data transmission path 13, the test signal generation unit 14, the selector 15, and the control are provided on the IC 1 side. A determination unit 16 is disposed on the IC2 side while the unit 17 is disposed. Similarly, in order to perform autonomous optimization processing of the output level of the variable output unit 31 in the data transmission path 33, a test signal generation unit 34, a selector 35, and a control unit 37 are disposed on the IC2 side, and IC1 A determination unit 36 is disposed on the side. In the configuration shown in the figure, the IC chips are configured symmetrically, and there is no master-slave relationship between the IC1 and the IC2 regarding the optimization processing of the output level, and the optimization processing is mainly performed.

  The test signal generator 14 generates a test signal used for determining the output level in the transmission line 13. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14. On the IC 2 side, the determination unit 16 determines whether the test signal that has passed through the transmission path 13 has been correctly received and reproduced by the reception / reproduction unit 12.

  The control unit 17 determines an optimum output level based on the result of transmission / reception of the test signal via the transmission path 33, and sets this in the variable output unit 11. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and electrically connected, a test signal is transmitted from IC1 to IC2, and the original data transmission time is determined based on the determination result of the received test signal. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 11, the control unit 17 controls the selector 15 so that the output of the test signal generation unit 14 is input to the variable output unit 11. Further, the control unit 17 sets the output of the variable output unit 11 to a certain value. At the start of the optimization process, the control unit 17 uses the test signal generation unit 14 to transmit a signal for starting the optimization to the control unit 37 on the IC 2 side via the transmission path 13. On the other hand, the control unit 37 generates a signal regarding permission or non-permission using the test signal generation unit 34 and returns the signal to the control unit 17 on the IC1 side. Thereby, the control unit 17 detects that optimization of the variable output unit 11 can be started. However, this is an example of an optimization start sequence, and the gist of the present invention is not limited to this.

  The test signal generation unit 14 outputs a test signal in accordance with an instruction from the control unit 17. The test signal is input to the reception / playback unit 12 via the variable output unit 11 and the transmission path 13. The reception / reproduction unit 12 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 13.

  The reproduced test signal is input to the determination unit 16. The determination unit 16 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result is returned to the control unit 17 via the transmission path 33. And the control part 17 determines the optimal output level in the variable output part 11 based on the determination result.

  On the other hand, the test signal generator 34 generates a test signal used to determine the output level in the transmission path 33. The selector 35 selectively switches the input to the variable output unit 31 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 34. On the IC 1 side, the determination unit 36 determines whether the test signal that has passed through the transmission path 33 has been correctly received and reproduced by the reception / reproduction unit 32.

  The control unit 37 determines an optimum output level based on the result of transmitting / receiving the test signal via the transmission path 13 and sets this in the variable output unit 31. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and electrically connected, a test signal is transmitted from IC2 to IC1, and the original data transmission time is determined based on the received test signal determination result. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 31, the control unit 37 controls the selector 35 so that the output of the test signal generation unit 34 is input to the variable output unit 31. The control unit 37 sets the output of the variable output unit 31 to a certain value. At the start of the optimization process, the control unit 37 uses the test signal generation unit 34 to transmit a signal to start optimization to the control unit 17 on the IC 1 side via the transmission path 33. On the other hand, the control unit 17 uses the test signal generation unit 14 to generate a signal regarding permission or non-permission and returns the signal to the control unit 37 on the IC 2 side. Thereby, the control unit 37 detects that optimization of the variable output unit 31 can be started. However, this is an example of an optimization start sequence, and the gist of the present invention is not limited to this.

  The test signal generation unit 34 outputs a test signal in accordance with an instruction from the control unit 37. The test signal is input to the reception / playback unit 32 via the variable output unit 31 and the transmission path 33. The reception reproduction unit 32 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 33.

  The reproduced test signal is input to the determination unit 36. The determination unit 36 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result is returned to the control unit 37 via the transmission path 13. And the control part 37 determines the optimal output level in the variable output part 31 based on the determination result.

  Note that the output level optimization scheme is assumed to be, for example, when the IC chip is powered on, reset, or returned from the power saving mode. Regarding the start condition of the optimization scheme, the control unit 17 or 37 may determine the start of optimization by itself, or may receive an instruction from a CPU or the like (not shown).

  According to the signal transmission system shown in FIG. 7, since the output level can be set smaller than when the output level setting with a margin is used based on the prediction, the IC chip has low power consumption. Become.

  Further, according to the system configuration shown in FIG. 7, it is possible to form exactly the same (that is, symmetrical) circuit on the IC1 side and the IC2 side, and there is an advantage that the design is easy. In the case of the system configuration shown in FIG. 6, since relatively complicated information is transmitted from the control unit 17 to the subordinate control unit 37, it is necessary to define a rule for optimization, and time However, in the case of the system configuration shown in FIG. 7, only relatively simple exchange is required.

  FIG. 8 shows still another configuration example of the signal transmission system that performs bidirectional data transmission between one chip IC1 and the other chip IC2. In the signal transmission system shown in FIG. 6, a pair of independent transmission paths 13 and 33 are arranged for the forward path and the return path. In the system configuration shown in FIG. 8, a single bidirectional bidirectional transmission path is used. 41 is used.

  A transmission path for transmitting data from IC1 to IC2 includes an output section 11 that outputs transmission data, a reception / reproduction section 12 that receives and reproduces data that has passed through the bidirectional transmission path 41, and these output section 11 and reception / reproduction section 12. Is formed by a bidirectional transmission path 41 connecting the Here, the output part 11 is comprised as a variable output part which can adjust the output level according to the instruction signal from the outside.

  Similarly, a transmission path for transmitting data from IC2 to IC1 includes an output section 31 that outputs transmission data, a reception / reproduction section 32 that receives and reproduces data that has passed through the bidirectional transmission path 41 in the opposite direction, and A bidirectional transmission path 41 connecting the output unit 31 and the reception / reproduction unit 32 is configured. Here, the output unit 31 is configured as a variable output unit that can adjust its output level in accordance with an instruction signal from the outside.

  In the signal transmission system shown in FIG. 8, the test signal generator 14 is provided on the IC 1 side in order to perform autonomous optimization processing of the output levels of the variable output units 11 and 31 in each direction of the bidirectional transmission path 41. The selector 15, the control unit 17, and the determination unit 16 are disposed, and the subordinate control unit 37 and the selector 35 are disposed on the IC 2 side. In the illustrated configuration, a kind of master-slave (master-slave) relationship is formed between the IC1 and the IC2 with respect to the output level optimization processing. That is, the test signal is generated only by the test signal generation unit 14 in one chip IC1, and the determination of the output level is performed only by the determination unit 16 in IC1.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14.

  On the IC 2 side, the reception / reproduction unit 12 receives and reproduces the test signal that has passed through the bidirectional transmission path 41. The selector 35 selectively switches the input to the variable output unit 31 among the transmission data during normal data transmission and the test signal received and reproduced by the reception and reproduction unit 12.

  The control unit 17 determines the optimum output level in each round trip in the bidirectional transmission path 41 based on the result of transmitting / receiving the test signal via the bidirectional transmission path 41. Then, the optimum output level is set in the variable output unit 11 in the IC 1, and the optimum output level is notified to the IC 2 via the bidirectional transmission path 41. On the other hand, on the IC 2 side, the slave control unit 37 having a master-slave relationship with the control unit 17 sets the received optimum output level in the variable control unit 31. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, the test signal is transmitted from IC1 to IC2 and the data is transmitted from IC2 to IC1, and the determination result of the received test signal Based on the above, it is possible to determine the output level of the bidirectional interface during the original data transmission.

  In the system configuration shown in FIG. 8, a master-slave relationship is formed between IC1 and IC2 regarding the optimization process of the output level, the test signal is generated only by IC1, and the determination of the output level of the transmission path in both directions is also performed by IC1. Only done in For this reason, it is necessary to perform the determination processing in each direction of the bidirectional transmission path 41 with orthogonality and non-interference.

  For example, when the output of the variable output unit 11 is determined, the output level of the variable output unit 31 is maximized. Then, the test signal is passed through the variable output unit 11, the bidirectional transmission path 41, the reception / reproduction unit 12, the variable output unit 31, the bidirectional transmission path 41, the reception / reproduction unit 32, and the determination unit 36 in this order. The determination unit 16 compares the received reproduction signal returned from the IC 2 with the original signal of the test signal. By this operation, first, the optimum output level of the variable output unit 11 is determined, and the power consumption of the bidirectional transmission path 41 is optimized.

  Next, in order to determine the output level of the variable output unit 31, the output level of the variable output unit 11 is maximized. Then, the test signal is passed through the variable output unit 11, the bidirectional transmission path 41, the reception / reproduction unit 12, the variable output unit 31, the bidirectional transmission path 41, the reception / reproduction unit 32, and the determination unit 16 in this order. The determination unit 16 compares the received reproduction signal returned from the IC 2 with the original signal of the test signal. By this operation, first, the optimum output level of the variable output unit 31 is determined, and this is notified to the IC 2 side via the bidirectional transmission path 41. The subordinate control unit 37 interprets the control signal generated by the test signal generation unit 14 according to an instruction from the control unit 17, and operates the output level of the variable output unit 31, thereby consuming the bidirectional transmission path 41. Optimize power.

  According to the bidirectional signal transmission system shown in FIG. 8, it is possible to set an output level smaller than that in the case of using an output level setting with a margin based on prediction. It becomes power consumption.

  Further, in the system configuration shown in FIG. 8, the determination unit 16 and the test signal generation unit 14 can be shared by both the chips IC1 and IC2, and the number of circuits can be reduced as compared with the case where they are provided separately.

  Further, since the order of optimizing the output levels of the variable output unit 11 and the variable output unit 31 of each IC chip is controlled by the control unit 17 in one IC 1, a special arbitration function between the IC chips is performed. Is not necessary.

FIG. 9 shows still another configuration example of the signal transmission system that performs bidirectional data transmission between one chip IC1 and the other chip IC2. The signal transmission system shown in FIG. 7, the pair of transmission lines 13 and 33 independently in the forward and backward is arranged, in the system configuration shown in FIG. 9, a single bidirectional transmission channel 41 Used.

  A transmission path for transmitting data from IC1 to IC2 includes an output section 11 that outputs transmission data, a reception / reproduction section 12 that receives and reproduces data that has passed through the bidirectional transmission path 41, and these output section 11 and reception / reproduction section 12. Is formed by a bidirectional transmission path 41 connecting the Here, the output part 11 is comprised as a variable output part which can adjust the output level according to the instruction signal from the outside.

  Similarly, a transmission path for transmitting data from IC2 to IC1 includes an output section 31 that outputs transmission data, a reception / reproduction section 32 that receives and reproduces data that has passed through the bidirectional transmission path 41 in the opposite direction, and A bidirectional transmission path 41 connecting the output unit 31 and the reception / reproduction unit 32 is configured. Here, the output unit 31 is configured as a variable output unit that can adjust its output level in accordance with an instruction signal from the outside.

  In the signal transmission system shown in FIG. 9, in order to perform autonomous optimization processing of the output level of the variable output unit 11 in the bidirectional transmission line 41, the test signal generation unit 14, the selector 15, and the A control unit 17 is disposed, and a determination unit 16 is disposed on the IC2 side. Similarly, in order to perform autonomous optimization processing of the output level of the variable output unit 31 in the bidirectional transmission path 41, a test signal generation unit 34, a selector 35, and a control unit 37 are disposed on the IC2 side. A determination unit 36 is disposed on the IC1 side. In the configuration shown in the drawing, each IC chip is configured symmetrically, and there is no master-slave relationship between the IC1 and IC2 regarding the optimization processing of the output level, and the optimization processing is independently or autonomously performed.

  The test signal generator 14 generates a test signal used for determining the output level in the bidirectional transmission path 41. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14. On the IC 2 side, the determination unit 16 determines whether the test signal that has passed through the bidirectional transmission path 41 has been correctly received and reproduced by the reception / reproduction unit 12.

  The control unit 17 determines an optimum output level based on the result of transmitting and receiving the test signal via the bidirectional transmission path 41 and sets this in the variable output unit 11. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, a test signal is transmitted from IC1 to IC2, and the original data is transmitted based on the determination result of the received test signal. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 11, the control unit 17 controls the selector 15 so that the output of the test signal generation unit 14 is input to the variable output unit 11. Further, the control unit 17 sets the output of the variable output unit 11 to a certain value. Further, when starting the optimization process, the control unit 17 uses the test signal generation unit 14 to transmit a signal for starting the optimization to the control unit 37 on the IC 2 side via the bidirectional transmission path 41. On the other hand, the control unit 37 generates a signal regarding permission or non-permission using the test signal generation unit 34 and returns the signal to the control unit 17 on the IC1 side. Thereby, the control unit 17 detects that optimization of the variable output unit 11 can be started. However, this is an example of an optimization start sequence, and the gist of the present invention is not limited to this.

  The test signal generation unit 14 outputs a test signal in accordance with an instruction from the control unit 17. The test signal is input to the reception / playback unit 12 via the variable output unit 11 and the bidirectional transmission path 41. The reception / reproduction unit 12 reproduces the original signal from the test signal on which distortion and noise are superimposed via the bidirectional transmission path 41.

  The reproduced test signal is input to the determination unit 16. The determination unit 16 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result is returned to the control unit 17 via the bidirectional transmission path 41. And the control part 17 determines the optimal output level in the variable output part 11 based on the determination result.

  On the other hand, the test signal generator 34 generates a test signal used to determine the output level in the bidirectional transmission path 41. The selector 35 selectively switches the input to the variable output unit 31 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 34. On the IC1 side, the determination unit 36 determines whether or not the test signal that has passed through the bidirectional transmission path 41 is correctly received and reproduced by the reception and reproduction unit 32.

  The control unit 37 determines an optimum output level based on the result of transmitting / receiving the test signal via the bidirectional transmission path 41, and sets this in the variable output unit 31. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and electrically connected, a test signal is transmitted from IC2 to IC1, and the original data transmission time is determined based on the received test signal determination result. The output level of the interface at can be determined.

  When optimizing the output level in the variable output unit 31, the control unit 37 controls the selector 35 so that the output of the test signal generation unit 34 is input to the variable output unit 31. The control unit 37 sets the output of the variable output unit 31 to a certain value. At the start of the optimization process, the control unit 37 uses the test signal generation unit 34 to transmit a signal for starting the optimization to the control unit 17 on the IC 1 side via the bidirectional transmission path 41. On the other hand, the control unit 17 uses the test signal generation unit 14 to generate a signal regarding permission or non-permission and returns the signal to the control unit 37 on the IC 2 side. Thereby, the control unit 37 detects that optimization of the variable output unit 31 can be started. However, this is an example of an optimization start sequence, and the gist of the present invention is not limited to this.

  The test signal generation unit 34 outputs a test signal in accordance with an instruction from the control unit 37. The test signal is input to the reception / playback unit 32 via the variable output unit 31 and the bidirectional transmission path 41. The reception / reproduction unit 32 reproduces the original signal from the test signal on which distortion and noise are superimposed via the bidirectional transmission path 41.

  The reproduced test signal is input to the determination unit 36. The determination unit 36 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result is returned to the control unit 37 via the bidirectional transmission path 41. And the control part 37 determines the optimal output level in the variable output part 31 based on the determination result.

  Note that the output level optimization scheme is assumed to be, for example, when the IC chip is powered on, reset, or returned from the power saving mode. Regarding the start condition of the optimization scheme, the control unit 17 or 37 may determine the start of optimization by itself, or may receive an instruction from a CPU or the like (not shown).

  According to the signal transmission system shown in FIG. 9, the IC chip can be set to a lower output level compared to the case of using the output level setting with a margin based on prediction. Become.

  Further, according to the system configuration shown in FIG. 9, it is possible to form exactly the same (that is, symmetrical) circuit on the IC1 side and the IC2 side, and there is an advantage that the design is easy. In the case of the system configuration shown in FIG. 8, since relatively complicated information is transmitted from the control unit 17 to the subordinate control unit 37, it is necessary to define a rule for optimization, and time However, in the case of the system configuration shown in FIG. 9, only a relatively simple exchange is required.

  FIG. 10 shows a configuration example of a signal transmission system provided with a plurality of transmission paths in one direction between IC chips. In the example shown in the figure, a transmission path 13 that performs data transmission from one chip IC1 to the other chip IC2 and two transmission paths 33-1 and 33-2 that perform data transmission from IC2 to IC1 are provided. .

  The forward path for data transmission from IC1 to IC2 is an output unit 11 for outputting transmission data, a reception / reproduction unit 12 for receiving and reproducing data that has passed through the transmission path 13, and a transmission connecting these output unit 11 and reception / reproduction unit 12. It is constituted by a path 13. Here, the output part 11 is comprised as a variable output part which can adjust the output level according to the instruction signal from the outside.

  One return path for data transmission from IC2 to IC1 includes an output unit 31-1 for outputting transmission data, a reception / reproduction unit 32-1 for receiving and reproducing data that has passed through the transmission path 33-1, and these outputs. The transmission line 33-1 connecting the unit 31-1 and the reception / reproduction unit 32-1. Here, the output unit 31-1 is configured as a variable output unit that can adjust its output level in accordance with an instruction signal from the outside. Similarly, another return path for performing data transmission from IC2 to IC1 includes an output unit 31-2 that outputs transmission data, a reception / reproduction unit 32-2 that receives and reproduces data that has passed through the transmission path 33-2, The transmission unit 33-2 connects the output unit 31-2 and the reception / reproduction unit 32-2. The output unit 31-2 is configured as a variable output unit that can adjust its output level in accordance with an external instruction signal.

  In the signal transmission system shown in FIG. 10, the output level of the variable output unit 11 in each data transmission line 13 and the output level of the variable output units 31-1 and 31-2 in 33-1 and 33-2 are autonomous. In order to perform respective optimization processes, a test signal generation unit 14, a selector 15, a control unit 17, and a determination unit 36 are provided on the IC1 side, and a dependent control unit 37- for each transmission path is provided on the IC2 side. 1 and 37-2 and selectors 35-1 and 35-2 are arranged. In the illustrated configuration, a kind of master-slave (master-slave) relationship is formed between the IC1 and the IC2 with respect to the output level optimization processing. That is, the test signal is generated only by the test signal generation unit 14 in one chip IC1, and the determination of the output level is performed only by the determination unit 16 in IC1.

  The test signal generation unit 14 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15 selectively switches the input to the variable output unit 11 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14.

  On the IC 2 side, the reception / reproduction unit 12 receives and reproduces the test signal that has passed through the transmission path 13. The selectors 35-1 and 35-2 input each of the transmission data during normal data transmission and the test signal received and reproduced by the reception and reproduction unit 12 to the variable output units 31-1 and 31-2. Are selectively switched.

  Based on the result of transmitting / receiving the test signal via the transmission line 13 and the transmission lines 33-1 and 33-2, the control unit 17 determines the optimum output in each transmission line 13 and the transmission lines 33-1 and 33-2. Determine the level. The optimum output level is set in the variable output unit 11 in the IC 1, and the optimum output level is notified to the IC 2 via the transmission line 13. On the other hand, on the IC2 side, the subordinate control units 37-1 and 37-2, which are in a master-slave relationship with the control unit 17, set the received optimum output levels in the variable control units 31-1 and 31-2, respectively. . Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, the test signal is transmitted from IC1 to IC2 and the data is transmitted from IC2 to IC1, and the determination result of the received test signal Based on the above, it is possible to determine the output level of each interface during the original data transmission.

  In the system configuration shown in FIG. 10, a kind of master-slave (master-slave) relationship is formed between IC1 and IC2 regarding the optimization processing of the output level, and the test signal is generated only by IC1 and transmitted in each direction. The determination of the road output level is also performed only by IC1. For this reason, it is necessary to perform the determination processing of the transmission path 13 and the transmission paths 33-1 and 33-2 with orthogonality and non-interference.

  For example, when determining the output of the variable output unit 11, the output level of the variable output unit 31-1 or 31-2 is maximized, and the data transmission quality on the transmission path 33-1 or 33-2 is maximized. Secure. The test signal is output to the variable output unit 11, the transmission path 13, the reception / reproduction unit 12, the variable output unit 31-1 or 31-2, the transmission path 33-1 or 33-2, and the reception / reproduction unit 32-1 or 32-2. , Through the determination unit 16 in this order. The determination unit 36 compares the received reproduction signal returned from the IC 2 with the original signal of the test signal. By this operation, first, the optimum output level of the variable output unit 11 is determined, and the power consumption of the transmission line 13 is optimized.

  Next, in order to determine the output level of the variable output unit 31-1, the output level of the variable output unit 11 is maximized to ensure the maximum data transmission quality on the transmission line 13. The test signal is passed in the order of the variable output unit 11, the transmission path 13, the reception / reproduction unit 12, the variable output unit 31-1, the transmission path 33-1, the reception / reproduction unit 32-1, and the determination unit 16. The determination unit 16 compares the received reproduction signal returned from the IC 2 with the original signal of the test signal. By this operation, first, the optimum output level of the variable output unit 31-1 is determined, and this is notified to the IC 2 side via the transmission path 13. The subordinate control unit 37-1 interprets the control signal generated by the test signal generation unit 14 according to an instruction from the control unit 17, and operates the output level of the variable output unit 31-1, thereby transmitting the transmission line 33. -1 power consumption is optimized.

  Next, in order to determine the output level of the variable output unit 31-2, the output level of the variable output unit 11 is maximized, and the data transmission quality on the transmission path 13 is ensured to the maximum. Then, the test signal is passed through the variable output unit 11, the transmission path 13, the reception / reproduction unit 12, the variable output unit 31-2, the transmission path 33-2, the reception / reproduction unit 32-2, and the determination unit 16. The determination unit 16 compares the received reproduction signal returned from the IC 2 with the original signal of the test signal. By this operation, first, the optimum output level of the variable output unit 31-2 is determined, and this is notified to the IC2 side via the transmission line 13. The subordinate control unit 37-2 interprets the control signal generated by the test signal generation unit 14 according to an instruction from the control unit 17, and operates the output level of the variable output unit 31-2, thereby transmitting the transmission line 33. -2 to optimize power consumption.

  According to the bidirectional signal transmission system shown in FIG. 10, since the output level can be set smaller than when the output level setting with a margin based on the prediction is used, the IC chip is low. It becomes power consumption.

  Further, in the system configuration shown in FIG. 10, the determination unit 16 and the test signal generation unit 14 can be shared by both the chips IC1 and IC2, and the number of circuits can be reduced as compared with the case where they are provided separately.

  In addition, since the order of optimizing the output levels of the variable output unit 11 and the variable output units 31-1 and 31-2 for each transmission line is controlled by the control unit 17 in one IC1, it is between IC chips. No special mediation function is required.

  FIG. 11 shows a configuration example of a signal transmission system provided with a plurality of transmission paths in one direction between IC chips. In the example shown in the figure, two transmission paths 13-1 and 13-2 for providing a data transmission path from one chip IC1 to the other chip IC2 are provided.

  One interface subsystem that performs data transmission from IC1 to IC2 includes an output unit 11-1 that outputs transmission data, a reception reproduction unit 12-1 that receives and reproduces data that has passed through the transmission path 13-1, and these The transmission line 13-1 connects the output unit 11-1 and the reception / playback unit 12-1. Here, the output unit 11-1 is configured as a variable output unit that can adjust its output level in accordance with an external instruction signal.

  Similarly, the other interface subsystem that performs data transmission from IC1 to IC2 includes an output unit 11-2 that outputs transmission data, and a reception reproduction unit 12- that receives and reproduces data that has passed through the transmission path 13-2. 2 and a transmission path 13-2 connecting these output unit 11-2 and reception / reproduction unit 12-1. Here, the output unit 11-2 is configured as a variable output unit that can adjust the output level in accordance with an instruction signal from the outside.

  In order to perform an autonomous optimization process of the output level in the variable output unit 11-1, a test signal generation unit 14-1, a selector 15-1, and a control unit 17-1 are provided on the side of the data transmission source IC1. In addition, the determination unit 16-1 is provided on the IC2 side as the data transmission destination. Then, the determination result of the test signal reception / reproduction processing in the determination unit 16-1 mounted on the IC2 side that is the data transmission destination is the data transmission source via the transmission path 13-1 for performing normal data transmission. It is transmitted to the control unit 17-1 on the IC1 side. For this reason, the determination result transmission unit 21-1 is disposed on the IC2 side, and the determination result reception unit 22-1 is disposed on the IC1 side.

  The test signal generation unit 14-1 generates a test signal used to determine an output level in the signal transmission system that performs data transmission between IC chips. The selector 15-1 selectively switches the input to the variable output unit 11-1 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14-1. The determination unit 16-1 determines whether or not the test signal that has passed through the transmission line 13-1 has been correctly received and reproduced by the reception and reproduction unit 12-1.

  The control unit 17-1 determines an optimum output level based on the result of transmitting and receiving the test signal via the transmission line 13-1, and sets this in the variable output unit 11-1. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, a test signal is transmitted from IC1 to IC2, and the original data is transmitted based on the determination result of the received test signal. The output level of the interface at can be determined.

  When the output level of the variable output unit 11-1 is optimized, the control unit 17-1 controls the selector 15-1 so that the output of the test signal generation unit 14-1 is input to the variable output unit 11-1. To do. Further, the control unit 17-1 sets the output of the variable output unit 11-1 to a certain value.

  The test signal generation unit 14-1 outputs a test signal in accordance with an instruction from the control unit 17-1. The test signal is input to the reception / playback unit 12-1 via the variable output unit 11-1 and the transmission path 13-1. The reception / reproduction unit 12-1 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission path 13-1.

  The reproduced test signal is input to the determination unit 16-1. The determination unit 16-1 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result transmission unit 21-1 in the IC 2 transmits the determination result of the test signal to the IC 1 via the transmission line 13-1. On the IC1 side, when the determination result receiving unit 22-1 receives the determination result via the transmission path 13-1, it passes this to the control unit 17-1. And the control part 17-1 determines the optimal output level in the variable output part 11-1 based on the determination result.

  Similarly, in order to perform the autonomous optimization process of the output level in the variable output unit 11-2, the test signal generation unit 14-2, the selector 15-2, and the control unit 17- 2 is provided, and the determination unit 16-2 is provided on the IC2 side which is the data transmission destination. Then, the determination result of the test signal reception / reproduction processing in the determination unit 16-2 mounted on the IC2 side which is the data transmission destination is the data transmission source via the transmission line 13-2 for performing normal data transmission. It is transmitted to the control unit 17-2 on the IC1 side. For this reason, the determination result transmission unit 21-2 is disposed on the IC2 side, and the determination result reception unit 22-2 is disposed on the IC1 side.

  The test signal generation unit 14-2 generates a test signal used for determining an output level in the signal transmission system that performs data transmission between IC chips. The selector 15-2 selectively switches the input to the variable output unit 11-2 among the transmission data during normal data transmission and the test signal generated by the test signal generation unit 14-2. The determination unit 16-2 determines whether the test signal that has passed through the transmission path 13-2 has been correctly received and reproduced by the reception and reproduction unit 12-2.

  The control unit 17-2 determines an optimum output level based on the result of transmitting / receiving the test signal via the transmission line 13-2, and sets this in the variable output unit 11-2. Therefore, after both IC1 and IC2 are mounted on the printed circuit board and are electrically connected, a test signal is transmitted from IC1 to IC2, and the original data is transmitted based on the determination result of the received test signal. The output level of the interface at can be determined.

  When the output level of the variable output unit 11-2 is optimized, the control unit 17-2 controls the selector 15-2 so that the output of the test signal generation unit 14-2 is input to the variable output unit 11-2. To do. Further, the control unit 17-2 sets the output of the variable output unit 11-2 to a certain value.

  The test signal generation unit 14-2 outputs a test signal in accordance with an instruction from the control unit 17-2. The test signal is input to the reception / reproduction unit 12-2 via the variable output unit 11-2 and the transmission path 13-2. The reception reproduction unit 12-2 reproduces the original signal from the test signal on which distortion and noise are superimposed via the transmission line 13-2.

  The reproduced test signal is input to the determination unit 16-2. The determination unit 16-2 compares the test signal known in advance with the reproduction signal and generates a determination result. The determination result transmission unit 21-2 in the IC 2 transmits the determination result of the test signal to the IC 1 via the transmission path 13-2. On the IC1 side, when the determination result receiving unit 22-2 receives the determination result via the transmission line 13-2, it passes this to the control unit 17-2. And the control part 17-2 determines the optimal output level in the variable output part 11-2 based on the determination result.

  As described above, the two transmission lines 13-1 and 13-2 are independently optimized. As a result, there is a possibility that one transmission path 13-1 is optimized such that the output level is higher than the other transmission path 13-2, thereby causing a problem. This is because the rise and fall of the signal in the transmission line with the increased output level appears as a peak on the other adjacent transmission line due to crosstalk, but the signal on this transmission line has a low output level, so This is because it is greatly affected by talk.

  For example, it is assumed that the transmission path 13-1 and the transmission path 13-2 respectively flow upper bits and lower bits of 2-bit data. In this case, there is a high possibility that the transmission line 13-1 and the transmission line 13-2 are wired at a relatively short pitch over substantially the same distance. Here, considering the crosstalk between the transmission line 13-1 and the transmission line 13-2, since the output level of the transmission line 13-1 is higher, the transmission line 13-1 to the transmission line 13-2 has a higher output level. Crosstalk is likely to be a problem.

  In the signal transmission system shown in FIG. 11, an arbitration unit 51 is provided in order to solve such a problem of crosstalk. The arbitration unit 51 matches the output level of the other transmission line 13-2 with the output level of the one transmission line 13-1, thereby causing crosstalk between the transmission line 13-1 and the transmission line 13-2. Uneven effects can be avoided. The arbitration unit 51 can be easily mounted as a logic circuit in which CMOS elements are combined.

  As described above, when a plurality of transmission lines are provided in the same direction between the IC chips, the inconvenience when the output levels are uneven among the transmission lines can be eliminated by the arbitration function. In addition to the above, it is also possible to perform arbitration between transmission lines such that the level of a transmission line with a high transmission rate is not lower than that of a transmission line with a low transmission rate.

  As described above, in the signal transmission system according to the present invention, after an IC chip is mounted on a printed circuit board and electrically connected to another IC chip, one IC chip interface is connected to the other. The test signal is transmitted to the IC chip, and the output level of the interface at the time of original data transmission is determined based on the determination result of the received test signal. This makes it possible to set an output level that is reasonable and smaller than the conventional design method of setting the output level of the interface while providing a margin based on the prediction of the mounting state.

  FIG. 12 shows a specific configuration example of the variable output unit for setting the output level in the interface. However, in the illustrated example, an LVDS system that converts a voltage signal into a current signal and transmits it is adopted.

  The LVDS transmission path is composed of a pair of current signal paths. For example, when the transmission data is high, the transistors M3 and M2 are turned on and the transistors M1 and M4 are turned off. As a result, the current source current M3, the current signal path 1, the termination resistor RL, the current signal paths 2, M2, and the current route that flows through the ground are formed, and a positive voltage is generated in the RL. On the other hand, when the transmission data is low, the transistors M3 and M2 are turned off and the transistors M1 and M4 are turned on. As a result, the current source current M1, the current signal path 2, the termination resistor RL, the current signal paths 1, M4, and the current route that flows through the ground are formed, and a negative voltage is generated in the termination resistor RL. The differential amplifier detects the voltages when the transmission data is high and low, and converts the voltages into reception data.

  In the illustrated example, three types of constant current sources G0 (0.5 mA), G1 (1 mA), and G2 (2 mA) having different current values are disposed as current sources. And according to the instruction | indication from the control part 17, by setting the current supply from each current source G0, G1, G2 variably, 0.5mA, 1mA, 1.5mA, 2mA, 2.5mA, 3mA, 3. A maximum of seven output levels can be set, such as 5 mA.

  The current signal is easier to synthesize than the voltage signal. In the case of high-speed transmission such as LVDS, a current output is often used, and it is easy to become familiar with this. In terms of mounting, it is difficult for the current source to control the absolute value of the current, but it is relatively easy to control the current ratio of the arranged current sources. For example, the relative ratio of currents can be easily controlled by the ratio of the gate widths of MOS transistors.

  In such a variable output unit configuration in which the output level can be set by combining a plurality of current sources having different current values, the optimum output level in the transmission line can be searched according to a so-called binary search algorithm.

  In the example shown in FIG. 12, if a binary search is used to obtain a minimum output from seven output levels, it can be realized by three tests. FIG. 13 illustrates these three test results. However, a three-digit binary value (for example, 100) in the same figure represents the on / off states of the current sources G2, G1, and G0 in order from the upper bit. The optimum output level is obtained by superimposing a 0.5 mA margin on the minimum transmittable level.

  In the illustrated example 1, first, the output level is set to 100, that is, 2.0 mA, the communication on the transmission path is inspected, and the determination is passed. Next, the output level is lowered to 010, that is, 1.0 mA, the communication on the transmission line is inspected, and this determination is also passed. Further, the output level is lowered to 001, that is, 0.5 mA, the communication on the transmission line is inspected, and this determination is passed. As a result, it can be seen that 0.5 mA is the minimum transmission possible level of this transmission line, but 010, that is, 1.0 mA with a necessary margin superimposed thereon is determined as the optimum output level.

  Further, in the illustrated example 2, first, the output level is set to 100, that is, 2.0 mA, the communication on the transmission path is inspected, and the determination is passed. Next, the output level is lowered to 010, that is, 1.0 mA, the communication on the transmission line is inspected, and this determination fails. Therefore, the output level is increased to 011, that is, 1.5 mA, the communication on the transmission line is inspected, and this determination is passed. As a result, it can be seen that 0.5 mA is the minimum transmission possible level of this transmission line, but 100 mA, that is, 2.0 mA obtained by superimposing a necessary margin on this, is determined as the optimum output level.

  In the example 3 shown in the figure, the output level is first set to 100, that is, 2.0 mA and the communication on the transmission line is inspected, but the determination fails. Therefore, the output level is increased to 110, that is, 3.0 mA, the communication on the transmission path is inspected, and this determination is passed. Therefore, this time, the output level is lowered to 101, that is, 2.5 mA, the communication on the transmission line is inspected, and this determination is again rejected. As a result, it can be seen that 3.0 mA is the minimum transmission possible level of this transmission line, but 111, that is, 3.5 mA with a necessary margin superimposed thereon is determined as the optimum output level.

  In the three tests shown in the figure, the minimum transmittable level is detected in all cases. However, the optimum output level in the signal transmission system is not necessarily limited to the minimum transmittable level. For example, after optimization, there may be a case where communication becomes impossible due to a change in voltage level or temperature. Therefore, it is necessary to put a necessary margin after detecting the minimum level.

  By using binary search in this way, the minimum transmittable level can be detected efficiently. In addition, by adding a necessary margin to the binary search result, more stable transmission can be realized with appropriate power consumption.

  In each signal transmission system shown in FIGS. 3 to 11, in the process of determining the optimum value of the output level in the transmission path, a test signal is output from the data transmission source IC chip to the transmission path, and this is transmitted to the data transmission destination. Communication is inspected by receiving and reproducing on the IC chip side and determining a test signal.

  Although used here needs to be known in advance in each IC chip, for example, a test signal can be configured with a pseudo-random code. A pseudo-random code generation circuit can be easily configured by a digital circuit using a CMOS element. The data transmission source IC chip can generate a pseudo random code as a test signal using a certain seed, and the data transmission destination IC chip can similarly generate a comparison signal using the same seed.

  The test signal preferably satisfies all frequency components necessary for the transmission path, but it is difficult to realize a completely random signal. On the other hand, the pseudo-random code can be easily generated by a digital circuit and can include various frequency components, so that the condition as a test signal for communication inspection can be substantially satisfied. A pseudo-random code generated at the same rate as the actual transmission rate may be used as the test signal.

  FIG. 14 shows a configuration example of a pseudo random code generation circuit. The illustrated circuit is formed by connecting three stages of D flip-flops in series. That is, it can be configured by a combination of basic digital circuits. Moreover, randomness can further be improved by increasing the number of stages. This is set to the same setting as the actual rate and used for the test signal.

  As can be seen from the figure, the pseudo-random code can be easily mounted on a digital circuit. Further, if necessary, another random signal can be easily generated by changing the initial value or the position of EXOR, which is effective. Since the output is repeated, the length of the test signal can be easily changed as necessary.

  The present invention has been described in detail above with reference to specific embodiments. However, it is obvious that those skilled in the art can make modifications and substitutions of the embodiment without departing from the gist of the present invention.

  In this specification, data transmission between IC chips has been described in detail as to a specific embodiment of the configuration and operational effects of the signal transmission system according to the present invention. However, the gist of the present invention is not necessarily limited thereto. The present invention can be widely applied to optimize the output level in the data transmission path between two physically independent devices.

  Further, in the present specification, the data transmission between IC chips composed of CMOS elements has been described in detail as to a specific embodiment of the configuration and operation effect of the signal transmission system according to the present invention. However, the gist of the present invention is not necessarily limited to this. It is not limited to. The present invention can be similarly applied to an IC chip composed of elements other than CMOS.

  In short, the present invention has been disclosed in the form of exemplification, and the description of the present specification should not be interpreted in a limited manner. In order to determine the gist of the present invention, the description of the scope of claims should be considered.

FIG. 1 is a diagram schematically showing a configuration of a signal transmission system 10 according to an embodiment of the present invention. FIG. 2 is a diagram showing a configuration example of a signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2. FIG. 3 is a diagram showing another configuration example of the signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2. FIG. 4 is a diagram showing still another configuration example of the signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2. FIG. 5 is a diagram showing still another configuration example of the signal transmission system that performs unidirectional data transmission from one chip IC1 to the other chip IC2. FIG. 6 is a diagram showing a configuration example of a signal transmission system that performs bidirectional data transmission between one chip IC1 and the other chip IC2. FIG. 7 is a diagram showing another configuration example of the signal transmission system that performs bidirectional data transmission between one chip IC1 and the other chip IC2. FIG. 8 is a diagram showing still another configuration example of the signal transmission system that performs bidirectional data transmission between one chip IC1 and the other chip IC2. FIG. 9 is a diagram showing still another configuration example of the signal transmission system that performs bidirectional data transmission from one chip IC1 to the other chip IC2. FIG. 10 is a diagram illustrating a configuration example of a signal transmission system including a plurality of transmission paths in one direction between IC chips. FIG. 11 is a diagram illustrating a configuration example of a signal transmission system including a plurality of transmission paths in one direction between IC chips. FIG. 12 is a diagram illustrating a specific configuration example of the variable output unit for setting the output level in the interface. FIG. 13 is a diagram showing three test results for searching for the optimum output level in the transmission line according to the binary search algorithm. FIG. 14 is a diagram illustrating a configuration example of a pseudo random code generation circuit. FIG. 15 is a diagram illustrating a configuration example (prior art) of an interface. FIG. 16 is a diagram illustrating a configuration example of an LVDS interface.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Signal transmission system 11, 31 ... Variable output part 12, 32 ... Reception reproduction | regeneration part 13, 33 ... Transmission path 14, 34 ... Test signal generation part 15, 35 ... Selector 16, 36 ... Determination part 17 ... Control part 18 ... Determination result transmission path 21 ... Determination transmission section 22 ... Determination reception section 23 ... Comparison signal generation section 37 ... Control section / subordinate control section 41 ... Bi-directional transmission path 51 ... Arbitration section

Claims (7)

A signal transmission system for transmitting data between IC chips mounted on a printed circuit board,
A first transmission path for transmitting data between the first IC chip and the second IC chip;
A first variable output section for outputting a signal to be sent from the first IC chip to the first transmission line with a variable output level;
A second reception / reproduction unit that receives and reproduces a signal received from the first IC chip via the first transmission path in the second IC chip;
A second transmission path for transmitting data between the second IC chip and the first IC chip;
A second variable output section for outputting a signal transmitted from the second IC chip to the second transmission line with a variable output level;
A first reception / reproduction unit that receives and reproduces a signal received from the second IC chip via the second transmission path in the first IC chip;
A control unit for controlling the setting of each output level in the first and second variable output units based on the communication state in the first and second transmission paths ,
A test signal supply unit for supplying a test signal to be sent to the second IC chip via the first variable output unit and the first transmission line;
The test signal sent to the second IC chip via the first transmission line is received and reproduced by the second reception / reproduction unit, and further, the first signal is obtained via the second transmission line. A determination unit that is sent back to the IC chip and inspected after being received and reproduced by the first reception and reproduction unit,
The control unit controls a test signal transmission operation by the test signal supply unit and setting of output levels in the first variable output unit and the second variable output unit based on a determination result in the determination unit. ,
A signal transmission system characterized by that. The test signal supply unit and the determination unit are disposed in the first IC chip,
The control unit determines an output level in the first and second variable output units based on a determination result of the determination unit and sets an output level of the first variable output unit, and the control A subordinate control unit that sets an output level of the second variable output unit according to an instruction to the unit,
The signal transmission system according to claim 1 . A plurality of second transmission paths for transmitting data between the second IC chip and the first IC chip;
The second IC chip includes a variable output unit and a subordinate control unit that sets the output level for each transmission line.
The signal transmission system according to claim 2 . The first transmission line and the second transmission line are multiplexed in a single bidirectional transmission line;
The signal transmission system according to claim 1 . The transmission line converts a voltage signal into a current signal and transmits data,
The variable output unit sets a plurality of output levels using a combination of a plurality of current sources.
The signal transmission system according to claim 1 . Set the output level sequentially by combining multiple current sources according to the binary search algorithm, and search for the optimal output level in the transmission line.
The signal transmission system according to claim 5 . The test signal supply unit includes a pseudo random code generation circuit and uses a pseudo random code generated at the same rate as an actual transmission rate as a test signal.
The signal transmission system according to claim 1 .

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