JP4517837B2 - Electro-optical device drive circuit, electro-optical device, and electronic apparatus - Google Patents

Description

  The present invention relates to a technique for reducing display quality due to waveform dullness of a scanning signal.

In an electro-optical device that performs display using an electro-optical change such as liquid crystal, a scanning line is selected in a predetermined order, a selection voltage is applied, and a data signal corresponding to the gradation of a pixel corresponding to the selected scanning line is generated. , And supply via a data line. In such a configuration, each scanning line is driven by the scanning line driving circuit, but since the scanning line has a considerable resistance and parasitic capacitance, the waveform becomes dull as it goes from the arrangement side of the scanning line driving circuit toward the non-arrangement side. Becomes larger.
When this waveform dullness occurs, the effective voltage value applied to the liquid crystal element of the pixel does not become the target value but is displaced, so that the display quality is deteriorated. For this reason, a technique has been proposed in which the scanning line driving circuit is arranged at both ends of the scanning line, and the same scanning line is driven from both ends by both scanning line driving circuits (see, for example, Patent Document 1).
JP-A-11-295696

However, in this technique, since scanning line drive circuits having the same configuration are provided at both ends of the scanning line, a space is required for installation and wiring, and two ICs are required in the case of separate attachment. In the case of a built-in device, the manufacturing process becomes complicated, which becomes a major impediment to cost reduction and miniaturization.
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a drive circuit for an electro-optical device, an electro-optical device, and an electronic device that can suppress waveform dullness of a selection voltage with a simple configuration. To provide equipment.

In order to achieve the above object, a drive circuit for an electro-optical device according to the present invention includes pixels provided corresponding to intersections of a plurality of rows of scanning lines and a plurality of columns of data lines. A driving circuit of an electro-optical device that supplies a corresponding pixel with a data signal corresponding to a gradation of the pixel via a data line, the driving circuit being provided on one end side of the plurality of rows of scanning lines. select row scanning lines in a predetermined order, against to the selected scanning line, the scanning line main for applying alternately at predetermined intervals and a selected voltage of the higher side of the selection voltage and the low-side reference to a predetermined potential a drive circuit, said provided corresponding to the scan lines in a plurality of rows of the other end side of the scanning line, when detecting that the selection voltage by the scanning line main driving circuit is applied, the applied high-side or one and one of lower side of the selection voltage, select the same And having a scanning line supplementary driving circuit for applying select the pressure. According to the present invention, the scanning line auxiliary driving circuit is not only simplified than the scanning line main driving circuit, but also does not require a control signal or the like, so that the waveform dullness of the selection voltage can be suppressed with a simple configuration. It becomes possible.

In the present invention, the scanning line main driving circuit applies a holding voltage to the scanning line when the scanning line is not selected, and the scanning line auxiliary driving circuit is held by the scanning line main driving circuit. The scanning line to which is applied is preferably in a high impedance state .
In addition, in the present invention, the scanning line auxiliary driving circuit includes a logic circuit that detects that a selection voltage is applied to the scanning line by the scanning line main driving circuit, and a selection voltage that is applied by the logic circuit. A configuration including a switching element that is electrically turned on between the supply line of the selection voltage and the scanning line when the detection is detected is also preferable. In this configuration, it is preferable that the logic circuit has one input terminal connected to the scanning line via the switching element and the other input terminal connected to the scanning line via a differentiation circuit.
The present invention can be conceptualized not only as a drive circuit for an electro-optical device but also as an electro-optical device. Furthermore, it can also be conceptualized as an electronic apparatus including the electro-optical device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram illustrating a configuration of an electro-optical device according to an embodiment of the invention.
As shown in this figure, the electro-optical device 10 includes a liquid crystal panel 100, a data line driving circuit 250, a scanning line main driving circuit 350, a scanning line auxiliary driving circuit 360, and a control circuit 400.
Among them, the liquid crystal panel 100 has a plurality of data lines (segment electrodes) 212 arranged in a column (Y
The plurality of scanning lines (common electrodes) 312 extend in the row (X) direction, and the pixels 116 are formed corresponding to the intersections of the data lines 212 and the scanning lines 312. ing. Here, each pixel 116 includes a series connection of a liquid crystal capacitor 118 and a TFD (Thin Film Diode) 220 which is an example of a switching element, and the liquid crystal capacitor 118 functions as a counter electrode as described later. A liquid crystal which is an example of an electro-optical material is sandwiched between the scanning line 312 and the rectangular pixel electrode.
In the present embodiment, for convenience of explanation, the number of scanning lines 312 is set to “320”.
Although the description will be made assuming that the number of columns of the data lines 212 is “240” and the matrix type display device is 320 rows × 240 columns, the present invention is not limited to this.

The scanning line main drive circuit 350 receives the scanning signals Y1, Y2, Y3,.
Are supplied to the scanning lines 312 of the second row, the second row, the third row,..., The 320th row, and the 320 scanning lines 312 are selected one by one for each horizontal scanning period (1H), to selected scanning lines, while applying either a selection voltage ± V _S, with respect to the other scanning line, unselected (held) for applying a voltage V _C.
Specifically, as shown in FIG. 4, the scanning line main drive circuit 350 performs the vertical scanning period (1F).
The start pulse DY supplied first is sequentially taken and shifted at the rising edge of the clock signal CLY in one horizontal scanning period (1H) for one cycle to correspond to each selection of the scanning line 312. Then, the scanning line main drive circuit 350 selects and applies a voltage to the scanning line 312 corresponding to the shift signal that has become the H level in one horizontal scanning period as follows.

That is, the scanning line main drive circuit 350 detects the positive polarity selection voltage if the polarity instruction signal POL is at the H level in the selected horizontal scanning period with respect to the scanning line 312 corresponding to the shift signal at the H level. When + V _S is selected and the non-selection voltage V _C is selected after the lapse of the period, if the polarity instruction signal POL is at L level in the selected one horizontal scanning period, the negative selection voltage −V _S is selected. and, after such period, selects a non-selection voltage V _C.
The non-selection voltage V _C is a voltage reference in the present embodiment. For this reason, the voltage V _C
A (= 0), the high side of the voltage V _C has a positive polarity, low potential side is negative.
Actually, + V _C1 slightly higher than this non-selection voltage V _C and −V _C1 slightly lower than 2
In some cases, a non-selection voltage is used. In this case, the non-selection voltage applied after the selection voltage + V _S is applied is defined as + V _C1, and the non-selection voltage applied after the selection voltage −V _S is applied. Is −V _C1 . However, the present invention is not related to the application method of the application voltage of the non-selection voltage, and for the sake of simplicity, the following description will be made on the case where the non-selection voltage is only one value of V _C. To do.
Further, the polarity instruction signal POL is a signal for designating positive polarity writing when it is at the H level, and for designating negative polarity writing when it is at the L level. As shown in FIG. 1F), the polarity is inverted every horizontal scanning period (1H), and the polarity is inverted even if attention is paid to the same horizontal scanning period in adjacent one vertical scanning period. The reason for polarity inversion is to prevent deterioration due to application of a direct current component to the liquid crystal.
The start pulse DY, the clock signal CLY, and the polarity instruction signal POL are supplied from the control circuit 400 described above. The shift signal is not shown.

On the other hand, gradation data Da is supplied to the data line driving circuit 250 from a host device (not shown). Here, the gradation data Da is data that designates the gradation value (brightness) of the pixel 116 with 6 bits, and the gradation value of the pixel 116 is a decimal value from “0” to “63”. Specify in 64 levels. More specifically, the darkest black display is designated when the 6-bit gradation data Dd is “0” (binary value “000000”), and gradually becomes brighter as the 6-bit decimal value increases. The gradation is specified so that the 6-bit decimal value is “63” (the binary value is “111”).
111 ″), the brightest white display is designated. Further, it is assumed that the liquid crystal panel 100 is in a normally white mode in which white display is performed when no voltage is applied.

Under such a premise, the data line driving circuit 250 determines the gradation data Da that specifies the gradation value of the pixel 116 located on the scanning line 312 selected by the scanning line main driving circuit 350 according to the gradation value. The data signal is converted to a data signal having a pulse width and supplied to the corresponding data line 212. The data line driving circuit 250 executes this supply operation for each of the 240 columns positioned on the selected scanning line 312. Therefore, the data signals supplied to the data lines 212 in the first, second, third,..., 240th columns are respectively X1, X2, X3,.
Indicated as 0.

The relationship between the waveform of the data signal and the gradation data Da will be described with reference to FIG. FIG. 5 shows the voltage waveform of the data signal Xj supplied to the data line 212 in the j-th column (j is an integer satisfying 1 ≦ j ≦ 240) and the floor corresponding to the pixel 116 located on the selected scanning line 312. It is a figure which shows the relationship with the key data Da.
As shown in this figure, when a positive selection voltage + V _S is applied in one horizontal scanning period, the data line driving circuit 250 has a pixel 116 in the jth column located at the selection voltage + V _S.
As the gradation data Da corresponding to 1 specifies that the pixel is dark, the application period of the voltage -V _{D having} a polarity opposite to that of the selection voltage + V _S is lengthened, while the negative polarity selection is performed in one horizontal scanning period. When the voltage −V _S is applied, the application period of the voltage + V _{D having} a polarity opposite to that of the selection voltage −V _S is lengthened as the gradation data Da designates the pixel to be dark.
Note that hatching in FIG. 5 indicates a period (pulse width) in which the data signal becomes an on-voltage that darkens the pixel during the period in which the selection voltage is applied, and both are based on the end of one horizontal scanning period. The pulse width extends forward in time. Also,
In FIG. 5, only representative gradation values are displayed.

Next, the configuration of the pixel 116 will be described. FIG. 2 is a partially cutaway perspective view of the liquid crystal panel 100 for illustrating the structure of the pixel 116.
As shown in this figure, the liquid crystal panel 100 has a structure in which the substrates 200 and 300 face each other while maintaining a certain gap, and the liquid crystal 160 is sandwiched between the gaps. On the opposing surface of the substrate 200, rectangular pixel electrodes 234 made of a transparent conductor such as ITO (Indium Tin Oxide) are arranged in a matrix, and among these, the pixel electrodes 234 arranged in the same column are arranged. One data line 212 is commonly connected to each data line via the TFD 220. Here, when viewed from the substrate side, the TFD 220 is formed of a tantalum simple substance, a tantalum alloy, or the like, and is branched from the data line 212 in a T shape, and the first conductor 222 It is composed of an anodized insulator 224 and a second conductor 226 such as chromium, and has a conductor / insulator / conductor sandwich structure.
Therefore, the TFD 220 has a diode switching characteristic in which the current-voltage characteristic is nonlinear in both positive and negative directions.

On the other hand, on the opposite surface of the substrate 300, scanning lines 312 made of ITO or the like are connected to the data lines 212.
Extends in the orthogonal row direction and is arranged at a position facing the pixel electrode 234. As a result, the scanning line 312 itself functions as a counter electrode of the pixel electrode 234. Therefore, the liquid crystal capacitor 118 in FIG. 1 has the liquid crystal 16 sandwiched between the scanning line 312 and the pixel electrode 234 at the intersection of the data line 212 and the scanning line 312.
0.

In such a configuration, when the scanning line 312 is selected and any one of the selection voltages ± V _S is applied, the scanning line 3 is affected regardless of the data voltage applied to the data line 212.
12 and the TFD 220 corresponding to the intersection of the data line 212 are forcibly turned on (on), and the charge corresponding to the difference between the selected voltage and the data voltage is accumulated in the liquid crystal capacitor 118 connected to the turned on TFD 220. Is done. After the charge accumulation, when the selection of the scanning line 312 is completed and the non-selection voltage V _C is applied, the TFD 220 is turned off, but the charge accumulation in the liquid crystal capacitor 118 is maintained. In the liquid crystal capacitor 118, the liquid crystal 1
Since the orientation state of 60 changes and the amount of light passing through a polarizer (not shown) changes according to the amount of accumulated charge, the data voltage when the selection voltage is applied causes the charge in the liquid crystal capacitor 118 to change. The accumulation amount is controlled for each pixel, and a predetermined gradation display is performed.

Next, the scanning line auxiliary driving circuit 360 which is a characteristic part of the present invention will be described. As shown in FIG. 1, the scanning line auxiliary driving circuit 360 has a one-to-one correspondence with the scanning line 312.
The scanning line main drive circuit 350 is provided on the opposite side across the scanning line 312. That is,
A scanning line main drive circuit 350 is provided on one end side of the scanning line 312, and a scanning line auxiliary drive circuit 360 is provided on the other end side of the scanning line 312.

Since the configuration of the scanning line auxiliary drive circuit 360 is the same in each row, the scanning line auxiliary drive generally corresponding to the scanning line 312 in the i-th row (i is an integer satisfying 1 ≦ i ≦ 320) is generally used here. The circuit 360 will be described with reference to FIG.
As shown in FIG. 3, the scanning line auxiliary driving circuit 360 corresponding to the i-th row includes the differentiation circuit 36.
10, logic circuits 3632 and 3642, a p-channel transistor 3634, and n
The i-th scanning line 312 is connected to the input terminal of the differentiating circuit 3610 and the common drain of the transistors 3634 and 3644, respectively.

The differentiation circuit 3610 includes a capacitor 3612 and a resistor 3614, and the capacitor 3
One end of the 612 is connected to the i-th scanning line 312 is connected the other end of the capacitor 3612 through resistor 3614 to the power supply line 353 of the non-selection voltage _{V C.} Here, for convenience, when the other end of the capacitor 3612 is a node A, the node A is connected to an input end of the logic circuit 3632 and an input end of the logic circuit 3642, respectively.

The logic circuit 3632 obtains the inverted value of the logic level at the node A, and outputs the transistor 3
634 is output to the gate. Here, the threshold of the logic level at the input terminal of the logic circuit 3632 is set to be V _th1 which is slightly higher than the non-selection voltage V _{C and} lower than the positive selection voltage + V _S. (See FIG. 6). In addition, the logic circuit 363
2 operates using a positive selection voltage + V _S and a negative selection voltage −V _S or V _C as power sources.
Therefore, the output signal of the logic circuit 3632 is obtained when the voltage of the scanning line 312 in the i-th row changes to + V _S and the differential waveform voltage of the change, that is, the voltage of the node A becomes equal to or higher than the threshold value V _th1. Therefore, the voltage is −V _S or V _C corresponding to the L level, and otherwise, the voltage is + V _S corresponding to the H level.

On the other hand, the logic circuit 3642 obtains an inverted value of the logic level at the node A and outputs it to the gate of the transistor 3644. Here, the threshold of the logic level at the input terminal of the logic circuit 3642 is slightly lower than the non-selection voltage V _{C and} has a negative selection voltage −V.
It is set to be V _th2 that is higher than _S. In addition, the logic circuit 3642 operates using the positive selection voltage + V _S or V _C and the negative selection voltage −V _S as power sources. Therefore, the output signal of the logic circuit 3642 is obtained when the voltage of the i-th scanning line 312 changes to −V _S and the differential waveform voltage of the change, that is, the voltage of the node A falls below the threshold value V _th2. , H
The voltage corresponds to the level + V _S or V _C , and otherwise, the voltage −V _S corresponds to the L level. Note that the time constant of the differentiation circuit 3610, that is, the product of the capacitance of the capacitor 3612 and the resistance value of the resistor 3614 is set to be shorter than one selection period 1H.

The source of the transistor 3634 is connected to the power supply line 355 of the positive polarity selection voltage + V _S , while the source of the transistor 3644 is the power supply line 357 of the negative polarity selection voltage −V _S.
It is connected to the. Note that the transistors 3634 and 3644 are just examples of switching elements. As described above, the drains of both transistors are commonly connected to the i-th scanning line 312.

By the way, the scanning signal waveform immediately after being output from the scanning line main drive circuit 350 is as shown in FIG. 4, but in reality, it is enlarged on the time axis in FIG. 6 due to the resistance and parasitic capacitance of the scanning line 312. Will slow down as shown. The degree of this slowing increases as the distance from the scanning line main driving circuit 350 increases, that is, toward the other end of the scanning line 312. Therefore, assuming that the scanning line auxiliary driving circuit 360 does not exist, the scanning line main driving circuit Even when pixels close to 350 and distant pixels have the same gradation, a difference occurs in the effective voltage value of the liquid crystal capacitor 118, thereby degrading display quality.

Therefore, the operation of the scanning line auxiliary driving circuit 360 will be described from the viewpoint of how the waveform of the scanning signal is prevented from being blunted.
When the voltage waveform of the i-th scanning line is slowed as shown in FIG.
The voltage waveform at node A, which is the output of 10, is as shown in FIG.
Here, when the scanning signal Yi changes from the non-selection voltage V _C to the positive selection voltage + V _S ,
When the voltage of the node A becomes equal to or higher than the threshold value V _th1, the output signal of the logic circuit 3632 becomes a voltage −V _S or V _C corresponding to the L level. On the other hand, when the voltage of the i-th scanning line 312 changes from the non-selection voltage V _C to the positive selection voltage + V _S , the scanning line voltage does not fall below the threshold V _th2, and thus the logic circuit 3642 Of the output signal maintains the voltage −V _S or V _C corresponding to the L level. Thus, the transistor 3634 is turned on, but the transistor 3634
Since 44 maintains the off, the i-th scanning line 312 through the transistor 3634 is connected to the feed line 355 of the positive selection voltage + _{V S.}
Therefore, the waveform dullness when the scanning signal Yi changes from the non-selection voltage V _C to the positive selection voltage + V _S like the shaping Yi in FIG. 6 is improved.
Note that since the time constant of the differentiating circuit 3610 is set shorter than one selection period 1H, the voltage of the node A falls below the threshold V _th1 before the selection period ends, and the logic circuit 3642
Becomes an H level and the transistor 3634 is turned off. Therefore, the end of the selection period, does not interfere with the change when returning from the positive selection voltage + V _S to the non-selection voltage V _C.

On the other hand, when the scanning signal Yi of the i-th row changes from the non-selection voltage V _C to the negative selection voltage −V _S , when the voltage at the node A falls below the threshold V _th2 , the output signal of the logic circuit 3642 is The voltage corresponds to the H level + V _S or V _C. On the other hand, when the scanning signal Yi changes from the non-selection voltage V _C to the negative selection voltage −V _S , the scanning line voltage never exceeds the threshold value V _th1, so the output signal of the logic circuit 3632 is maintaining a voltage + _{V S} corresponding to the H level.
Accordingly, the transistor 3644 is turned on, but the transistor 3634 is kept off. Therefore, the negative selection voltage − is supplied to the i-th scanning line 312 via the transistor 3644.
It is connected to the V _S power supply line 357.
Therefore, as the shaping Yi in FIG. 6, the scanning signal Yi becomes the waveform blunting when changing from the non-selection voltage V _C to the negative polarity of the selection voltage -V _S is improved. Also in this case, since the time constant of the differentiating circuit 3610 is set shorter than one selection period 1H, the voltage of the node A becomes equal to or higher than the threshold V _th2 before the selection period ends, and the output signal of the logic circuit 3642 Becomes L level and the transistor 3644 is turned off. Therefore, the end of the selection period, does not interfere with the change when returning from negative selection voltage -V _S to the non-selection voltage V _C.

When the scanning signal Yi changes from the selection voltage + V _S or −V _S to the non-selection voltage V _C ,
The output signal of the logic circuit 3632 becomes H level, and the output signal of the logic circuit 3642 becomes L level. Therefore, both the transistors 3634 and 3644 are turned off, and the common drain thereof is in a high impedance state. For this reason, when the scanning signal Yi changes to the selection voltage V _C , the waveform is not shaped at all, but because the TFD 220 is off in the first place,
Since the effective voltage value of the liquid crystal capacitor 118 hardly changes, it is considered that the display quality is not affected.
Here, the i-th scanning line 312 is described without specifying a row. However, since the scanning line auxiliary drive circuit 360 is provided in each row, the same applies to all the scanning lines 312 from the first row to the 320th row. In addition, the waveform dullness of the scanning signal is improved.

As described above, according to the present embodiment, since the scanning line auxiliary driving circuit 360 improves the waveform dullness when the selection voltage + V _S or −V _S is applied to the scanning line 312, the display quality is improved. The decline is prevented in advance.
Further, unlike the scanning line main driving circuit 350, the scanning line auxiliary driving circuit 360 according to the present embodiment does not need to supply the start pulse DY, the clock signal CLY, and the like, so that a shift register or the like is unnecessary. For this reason, since it becomes easy to simplify a structure, it cannot become an inhibiting factor of cost reduction or size reduction.

In the above-described embodiment, the differential circuit composed of the capacitor and the resistor is provided for each row. However, a configuration in which all the circuits are replaced with logic circuits is also possible. FIG. 7 is a diagram illustrating a circuit configuration example of another scanning line auxiliary driving circuit 360.
In FIG. 7, components other than the reference numerals 3633, 3643, 3623, and 3624 have the same functions as those in FIG. 3633 is a NAND circuit and a threshold value V _t
It has _h1 and operates using a positive selection voltage + V _S and a negative selection voltage −V _S (or V _C ) as a power source. Reference numeral 3643 denotes an inverting input logical product circuit which has a threshold value V _th2 and operates with a positive selection voltage + V _S (or V _C ) and a negative selection voltage −V _S as a power source.
One input terminal of each of the two AND circuits 3633 and 3643 is connected to the i-th scanning line 3.
12 is connected. The other input terminal of the logical product circuit 3633 is connected to the control line 3623, while the other input terminal of the logical product circuit 3643 is connected to the control line 3624.
Note that FIG. 7 illustrates only the scanning line auxiliary driving circuit 360 for one row, but the other input terminal of the AND circuit 3633 in the scanning line auxiliary driving circuit 360 for each row is a control line 3623.
Similarly, the AND circuit 3634 in the scanning line auxiliary driving circuit 360 of each row is connected in common.
The other input terminal is connected to the control line 3624 in common.
Further, the control line 3623 has a control signal that becomes a voltage lower than the threshold V _th1 only during the period from the end of each selection period to the start of the next selection period, and becomes a voltage that is equal to or higher than the threshold V _th1 in other periods. while but supplied to the control line 3624, for a period from just before the end of the selection period to the start of the next selection period becomes a threshold value V _th2 or more voltage, in other periods, the voltage below the threshold value V _th2 A control signal is supplied. These control signals are generated by the control circuit 400 in synchronization with the horizontal scanning of the liquid crystal panel 100, for example.
In such a configuration, the selection period starts, and the scanning signal Yi in the i-th row is changed to the non-selection voltage V
When changing from _C to the positive selection voltage + V _S , when the voltage on the scanning signal Yi reaches a voltage equal to or higher than the threshold V _th1 , the AND circuit 3633 outputs an L level and turns on the transistor 3634. In this state, the voltage applied to the control line 3623 immediately before the end of the selection period is the threshold value V.
_{The operation} continues until it falls below _th1 , after which the AND circuit 3633 outputs an H level and turns off the transistor 3634.
Similarly, when the selection period starts and the scanning signal Yi in the i-th row changes from the non-selection voltage V _C to the negative selection voltage −V _S , the voltage on the scanning signal Y i falls below the threshold V _th2 . The AND circuit 3634 outputs an H level, and the transistor 3644 is turned on. This state continues until the voltage applied to the control line 3624 just before the end of the selection period becomes equal to or higher than the threshold value V _th2 ,
Thereafter, the AND circuit 3643 outputs an L level, and the transistor 3644 is turned off. Therefore, the same operation as the circuit configuration shown in FIG. 3 is performed.

Further, in the embodiment, the trailing edge drive that applies the on-voltage to the rear side in time is adopted, but the present invention is not limited to this, and the front edge drive that applies the on-voltage to the front side in time is applied. It may be adopted. Furthermore, a so-called voltage amplitude modulation drive in which the voltage amplitude is increased or decreased instead of a pulse with a constant amplitude may be employed.
In the above-described embodiment, the selection voltage is applied to the selected scanning line 312 over the entire period of one horizontal scanning period (1H). However, one horizontal scanning period is divided into the first half and the second half, A configuration in which a selection voltage is applied during any period, while an on-voltage having a pulse width corresponding to a gradation value is applied as a data signal over a period during which the selection voltage is applied, and an inverted voltage is supplied over the remaining period (so-called 0.5H Select).
Furthermore, in the embodiment, the normally white mode in which white is displayed in the state where no voltage is applied is described. However, a normally black mode in which black is displayed in the state where no voltage is applied may be used. In the normally black mode, the pixel becomes brighter as the pulse width is longer in the selection voltage application period.
Further, the display is not limited to the 64 gradation display, and may be a low gradation display or a higher gradation display. Furthermore, one pixel may be configured by three pixels of R (red), G (green), and B (blue) to perform color display.

The liquid crystal panel 100 is not limited to the transmissive type, and may be a reflective type or a semi-transmissive / semi-reflective type intermediate between the two. Further, in the liquid crystal panel 100, the TFD 220 is connected to the data line 212 side, and the liquid crystal capacitor 118 is connected to the scanning line 312 side.
D220 may be connected to the scanning line 312 side, and the liquid crystal capacitor 118 may be connected to the data line 212 side.
In the embodiment, the active matrix method in which the pixel electrode 234 is driven by the switching element such as the TFD 220 has been described. However, the passive matrix method is the same driving method, and the waveform of the scanning signal is similarly blunted. It is also applicable to a passive matrix method.
On the other hand, the TFD 220 is an example of a switching element, and in addition to an element using a ZnO (zinc oxide) varistor, an MSI (Metal Semi-Insulator), etc., these two elements are connected in series in reverse or in parallel. A connected one or the like can be used as a two-terminal switching element, or a three-terminal switching element such as a TFT (thin film transistor) may be used.
Here, when a three-terminal switching element is used as the switching element, if the data signal is inverted and supplied and the counter electrode is made common to each pixel, it is necessary to reverse the polarity of the scanning signal. This eliminates the need for waveform shaping for both polarities, and a configuration that only shapes one of the polar waveforms is sufficient.

This configuration will be described with reference to FIG. FIG. 8 is a diagram showing a configuration of one pixel of a panel using a three-terminal switching element and a circuit configuration example of the scanning line auxiliary driving circuit 360.
In the figure, the pixel 116 corresponds to the intersection of the i-th scanning line 312 and the j-th data line 212, and has an n-channel thin film transistor 520 and a liquid crystal capacitor 118. Note that the thin film transistor 520 is an example of a three-terminal switching element.
Here, when a three-terminal type such as the thin film transistor 520 is used as the switching element, the liquid crystal capacitor 118 has a configuration in which the liquid crystal is sandwiched between the individual electrode for each pixel and the common counter electrode across each pixel. The thin film transistor 520 has a gate terminal connected to the scanning line 312, a source terminal connected to the data line 212, and a drain terminal connected to the pixel electrode.
Further, in this case, the configuration of the scanning line auxiliary drive circuit 360 is a configuration in which the AND circuit 3643, the transistor 3644, and the control line 3624 are omitted from the circuit configuration of FIG. Is the same. That is, the selection period starts, and the i-th scanning signal Yi
Changes from the non-selection voltage V _C to the positive selection voltage + V _S , when the voltage on the scanning signal Yi reaches a voltage equal to or higher than the threshold V _th1 , the AND circuit 3633 outputs an L level, and the transistor 3634 Turn on. This state continues until the voltage applied to the control line 3623 falls below the threshold V _th1 just before the end of the selection period, after which the AND circuit 3633 outputs an H level and turns off the transistor 3634.

In the embodiment, the TN type is used as the liquid crystal. However, the STN type or a dye (guest) having anisotropy in absorption of visible light in the major axis direction and the minor axis direction of the molecule is fixed. A guest-host type liquid crystal in which dye molecules are aligned in parallel with the liquid crystal molecules may be used by dissolving in a molecular alignment liquid crystal (host). In addition, the liquid crystal molecules are aligned vertically with respect to both substrates when no voltage is applied, while the liquid crystal molecules are aligned horizontally with respect to both substrates when voltage is applied. Alternatively, liquid crystal molecules are aligned horizontally with respect to both substrates when no voltage is applied, while liquid crystal molecules are aligned vertically with respect to both substrates when voltage is applied (homogeneous alignment). It is good also as a structure of. Furthermore, it is not limited to a liquid crystal element, but an element using another electro-optical material, for example, an organic EL element, an inorganic EL element, a field emission (FE) element, an LED, an electrophoretic element, an electrochromic element, or the like. An element or the like may be used.
As described above, various electro-optical elements can be used as long as they are compatible with the driving method of the present invention.

Next, an electronic apparatus having the electro-optical device 10 according to the above-described embodiment as a display device will be described. FIG. 9 is a perspective view showing a configuration of a mobile phone 1200 using the electro-optical device 10 according to the embodiment.
As shown in this figure, the mobile phone 1200 includes the liquid crystal panel 100 described above together with a plurality of operation buttons 1202, an earpiece 1204 and a mouthpiece 1206. In the electro-optical device 10, components other than the liquid crystal panel 100 are built in the telephone, so that they do not appear as appearance.

As an electronic apparatus to which the electro-optical device 10 is applied, in addition to the mobile phone shown in FIG. 7, a digital still camera, a notebook personal computer, a liquid crystal television, a viewfinder type (or monitor direct view type) video recorder. , Car navigation device, pager, electronic notebook,
Examples include calculators, word processors, workstations, videophones, POS terminals, devices with touch panels, and the like. Needless to say, the electro-optical device 10 described above can be applied as a display device of these various electronic devices. In any electronic device, by shaping the waveform dullness of the scanning signal, a high-quality display can be realized with a simple configuration while suppressing a reduction in display quality.

1 is a block diagram illustrating a configuration of an electro-optical device according to an embodiment of the invention. FIG. FIG. 2 is a partially broken perspective view showing a configuration of a pixel in the electro-optical device. FIG. 3 is a diagram illustrating a main configuration of a scanning line auxiliary drive circuit in the same electro-optical device. FIG. 6 is a diagram for explaining an operation of the electro-optical device. FIG. 6 is a diagram for explaining an operation of the electro-optical device. FIG. 6 is a diagram for explaining an operation of the electro-optical device. It is a figure which shows the principal part structure of the other scanning-line auxiliary | assistant drive circuit in the same electro-optical apparatus. It is a figure which shows the principal part structure of the scanning-line auxiliary | assistant drive circuit in another electro-optical apparatus. It is a figure which shows the structure of the mobile telephone using the same electro-optical apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Liquid crystal panel, 116 ... Pixel, 212 ... Data line, 250 ... Data line drive circuit,
312 ... Scanning line, 350 ... Scanning line main drive circuit, 360 ... Scanning line auxiliary drive circuit, 400 ... Control circuit, 3610 ... Differentiation circuit, 3632, 3642 ... Logic circuit, 3634, 3644 ... Transistor, 1200 ... Cell phone

Claims (6)

Comprising pixels provided corresponding to the intersection of a plurality of rows of scanning lines and a plurality of columns of data lines;
A drive circuit for an electro-optical device that supplies a data signal corresponding to a gradation of the pixel to a pixel corresponding to a selected scanning line via the data line,
The multiline provided on one end side of the scanning lines, the plurality of rows of scanning lines selected in a predetermined order, against to the selected scanning line, the high-side selection voltage and the low-side reference to a predetermined potential A scanning line main drive circuit for alternately applying a selection voltage at a predetermined interval ;
When the other end side of the scanning lines of the plurality of rows is provided corresponding to each scanning line and detects that the selection voltage is applied by the scanning line main drive circuit, the applied higher side or lower side is selected. A drive circuit for an electro-optical device, characterized in that either one of the voltages and a scanning line auxiliary drive circuit that selects and applies the same selection voltage. The scanning line main drive circuit applies a holding voltage to the scanning line when the scanning line is not selected.
The electro-optical device driving circuit according to claim 1, wherein the scanning line auxiliary driving circuit is in a high impedance state with respect to the scanning line to which the holding voltage is applied by the scanning line main driving circuit. . The scanning line auxiliary driving circuit includes:
A logic circuit for detecting that a selection voltage is applied to the scanning line by the scanning line main drive circuit;
2. A switching element that is electrically turned on between a supply line of the selection voltage and the scanning line when it is detected that the selection voltage is applied by the logic circuit. A drive circuit for the electro-optical device according to claim 1. It said logic circuit, one input terminal is connected to the scanning line through the switching element, the other input terminal according to claim 3, characterized in that it is connected to the scanning lines via a differentiating circuit Drive circuit for the electro-optical device. A pixel provided corresponding to the intersection of a plurality of rows of scanning lines and a plurality of columns of data lines;
The multiline provided on one end side of the scanning lines, the plurality of rows of scanning lines selected in a predetermined order, against to the selected scanning line, the high-side selection voltage and the low-side reference to a predetermined potential A scanning line main drive circuit for alternately applying a selection voltage at a predetermined interval ;
When the other end side of the scanning lines of the plurality of rows is provided corresponding to each scanning line and detects that the selection voltage is applied by the scanning line main drive circuit, the applied higher side or lower side is selected. A scanning line auxiliary driving circuit that selects and applies the same selection voltage as any one of the voltages;
An electro-optical device, comprising: a data line driving circuit that supplies a data signal corresponding to a gradation of a selected pixel to a pixel corresponding to the selected scanning line via the data line. An electronic apparatus comprising the electro-optical device according to claim 5 .

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