JP4501933B2 - Liquid crystal display - Google Patents

Liquid crystal display Download PDF

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JP4501933B2
JP4501933B2 JP2006349099A JP2006349099A JP4501933B2 JP 4501933 B2 JP4501933 B2 JP 4501933B2 JP 2006349099 A JP2006349099 A JP 2006349099A JP 2006349099 A JP2006349099 A JP 2006349099A JP 4501933 B2 JP4501933 B2 JP 4501933B2
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substrate
liquid crystal
wiring
crystal display
display device
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JP2008158392A (en
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雅明 青田
泰生 瀬川
智英 小野木
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Epson Imaging Devices Corp
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Epson Imaging Devices Corp
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Priority to TW096147590A priority patent/TWI365322B/en
Priority to KR1020070136594A priority patent/KR100975683B1/en
Priority to CN2007103011934A priority patent/CN101211050B/en
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本発明は、液晶表示装置に係り、特に対向する第1基板と第2基板との間に挟持された液晶を駆動する画素電極および共通電極が第1基板に設けられた液晶表示装置に関する。   The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which a pixel electrode and a common electrode for driving liquid crystal sandwiched between a first substrate and a second substrate facing each other are provided on a first substrate.

FFS(Fringe Field Switching)モードの液晶パネルでは、液晶の配向を制御する画素電極と共通電極との両方が素子基板に設けられており、この2つの電極は絶縁膜を介して積層されている。当該電極のうちで上層の電極にはスリットが設けられている。スリットの長辺方向とほぼ平行にラビング処理がなされ、上記電極間の電位がオフ電位の場合、液晶分子は、スリットの長辺方向とほぼ平行に配向する。オフ電位よりも大きい電位を上記電極間に印加した場合、スリットの長辺に対して垂直な方向に電界(横電界)が発生し、液晶分子は電界方向に沿うように基板に平行な面内で回転する(横回転する)。液晶分子の回転角を制御することによって、透過光量が制御される。   In an FFS (Fringe Field Switching) mode liquid crystal panel, both a pixel electrode for controlling the alignment of liquid crystal and a common electrode are provided on an element substrate, and these two electrodes are stacked via an insulating film. Among the electrodes, the upper electrode is provided with a slit. When the rubbing process is performed substantially parallel to the long side direction of the slit and the potential between the electrodes is an off potential, the liquid crystal molecules are aligned substantially parallel to the long side direction of the slit. When a potential larger than the off potential is applied between the electrodes, an electric field (lateral electric field) is generated in a direction perpendicular to the long side of the slit, and the liquid crystal molecules are in a plane parallel to the substrate along the direction of the electric field. Rotate with (rotate horizontally). The amount of transmitted light is controlled by controlling the rotation angle of the liquid crystal molecules.

なお、画素電極および共通電極の両方が素子基板に設けられた構造として、FFSモードの他に、IPS(In-Plane Switching)モードが知られている。   In addition to the FFS mode, an IPS (In-Plane Switching) mode is known as a structure in which both the pixel electrode and the common electrode are provided on the element substrate.

特開平9−105918号公報JP-A-9-105918

液晶パネルについて、小型化、薄型化、狭額縁化が進められ、また、タッチパネル等の機能の付加が進んでいる。これらに伴い、人体等によるパネル外部からの静電気がパネルの不具合を引き起こす場合がある。   Liquid crystal panels have been reduced in size, thickness, and frame size, and functions such as touch panels have been added. As a result, static electricity from the outside of the panel due to the human body or the like may cause malfunction of the panel.

例えば、FFSモード等では、素子基板に対向配置された対向基板に静電気が印加され当該対向基板が帯電した状態になると、当該帯電によって縦方向の電界が発生し、素子基板の上記電極による液晶配向制御を適切に行うことができない場合がある。この場合、例えばノーマリブラックの液晶パネルでは、黒表示が白浮きして(白味を帯びて)コントラストが低下してしまう。また、白浮きの程度が画面全体で不均一のときには表示ムラが観察される。   For example, in the FFS mode or the like, when static electricity is applied to the counter substrate disposed opposite to the element substrate and the counter substrate is charged, a vertical electric field is generated by the charging, and the liquid crystal alignment by the electrodes of the element substrate is performed. There are cases where control cannot be performed properly. In this case, for example, in a normally black liquid crystal panel, the black display is whitened (whited) and the contrast is lowered. Further, display unevenness is observed when the degree of whitening is not uniform across the entire screen.

対策の一つとして、対向基板の外表面全体に透明導電膜を形成し、この透明導電膜を筐体またはFPC(Flexible Printed Circuit)端子へ接続することによって、上記帯電を外部回路の接地電位(GND)へ逃がす手法がある(特許文献1参照)。   As one of the countermeasures, a transparent conductive film is formed on the entire outer surface of the counter substrate, and the transparent conductive film is connected to a housing or an FPC (Flexible Printed Circuit) terminal, so that the above-described charging is connected to the ground potential of the external circuit ( There is a method of escaping to GND) (see Patent Document 1).

しかしながら、上記対策によっても十分な静電気耐圧が得られない場合があることが分かった。   However, it has been found that even with the above measures, sufficient electrostatic withstand voltage may not be obtained.

本発明の目的は、対向する第1基板と第2基板との間に挟持された液晶を駆動する画素電極および共通電極が第1基板に設けられた液晶表示装置について静電気耐圧を向上することである。   An object of the present invention is to improve the electrostatic withstand voltage of a liquid crystal display device in which a pixel electrode and a common electrode for driving a liquid crystal sandwiched between a first substrate and a second substrate facing each other are provided on the first substrate. is there.

本発明に係る液晶表示装置は、対向する第1基板と第2基板との間に挟持された液晶を駆動する画素電極および共通電極が前記第1基板に設けられた液晶表示装置であって、前記第1基板は、前記画素電極および前記共通電極よりなる複数の画素が配置された画素領域の外側に配置された回路配線周辺回路及び所定電位が印加される所定電位用配線を備え、前記第2基板は、前記液晶とは反対側に前記画素電極および前記共通電極に対向して配置され前記所定電位に保持された透光性導電膜を備え、前記透光性導電膜は前記回路配線及び周辺回路よりも前記第2基板の中央側に位置する外縁および前記所定電位用配線へ向かって延伸した引き出し部分を有し、前記引き出し部分を介して前記所定電位用配線に接続され、前記引き出し部分は、前記第2基板の1辺のみに形成され、前記所定電位用配線は、前記第1基板の前記1辺のみに前記回路配線に重ならないで形成されていることを特徴とする。
The liquid crystal display device according to the present invention is a liquid crystal display device in which a pixel electrode and a common electrode for driving liquid crystal sandwiched between a first substrate and a second substrate facing each other are provided on the first substrate, The first substrate includes a circuit wiring disposed outside a pixel region in which a plurality of pixels including the pixel electrode and the common electrode are disposed , a peripheral circuit, and a wiring for a predetermined potential to which a predetermined potential is applied, The second substrate includes a translucent conductive film disposed on the opposite side of the liquid crystal so as to face the pixel electrode and the common electrode and held at the predetermined potential, and the translucent conductive film includes the circuit An outer edge located closer to the center of the second substrate than the wiring and the peripheral circuit, and a leading portion extending toward the wiring for the predetermined potential, and is connected to the wiring for the predetermined potential via the leading portion; Drawer part The second is formed only on one side of the substrate, the predetermined potential wiring is characterized in that it is formed without overlap to the circuit wiring only in the one side of the first substrate.

ここで、前記前記回路配線は電源用配線であることが好ましい。また、前記所定電位用配線は、前記第1基板の1辺の端子部の最も外に位置していることが好ましい。 Here, the circuit wiring is preferably power supply wiring. Further, it is preferable that the predetermined potential wiring is located on the outermost side of the terminal portion on one side of the first substrate.

上記構成により、透光性導電膜に侵入した静電気が第1基板の回路配線に及ぼす影響を低減することができるので、静電気耐性を向上することができる。   With the above structure, the influence of static electricity that has entered the light-transmitting conductive film on the circuit wiring of the first substrate can be reduced, so that static electricity resistance can be improved.

本発明の実施の形態を説明する前に、静電気耐性を種々の評価に基づいて考察したので、これについて図6および図7に示す液晶表示装置の周縁部付近の断面図を参照して説明する。   Before describing the embodiments of the present invention, the electrostatic resistance was considered based on various evaluations. This will be described with reference to cross-sectional views of the periphery of the liquid crystal display device shown in FIGS. .

図6および図7に示すように、FFSモードの従来の液晶表示装置10Zにおいて、第1基板100Zと第2基板200Zとがシール304Zによって貼り合わされ、これらの基板100Z,200Z間に液晶302Zが挟持されている。第1基板100Zの支持基板102Z上には回路配線群104Zが配置されており、回路配線群104Zを覆って絶縁膜114Zが配置されている。なお、図面では回路配線群104Zを模式的に図示している。第2基板200Zの支持基板202Zの外表面上には透光性導電膜208Zが配置されており、この透光性導電膜208Zは上記外表面の全面に、すなわち支持基板202Zの外縁すなわち第2基板200Zの外縁まで広がっている。なお、例えば多数個取り基板の全面に透光性導電膜208Zを成膜し当該基板を分断することにより、透光性導電膜208Zが第2基板200Zの外縁まで形成される。   As shown in FIGS. 6 and 7, in the conventional liquid crystal display device 10Z in the FFS mode, the first substrate 100Z and the second substrate 200Z are bonded together by a seal 304Z, and the liquid crystal 302Z is sandwiched between the substrates 100Z and 200Z. Has been. A circuit wiring group 104Z is disposed on the support substrate 102Z of the first substrate 100Z, and an insulating film 114Z is disposed to cover the circuit wiring group 104Z. In the drawing, the circuit wiring group 104Z is schematically shown. A translucent conductive film 208Z is disposed on the outer surface of the support substrate 202Z of the second substrate 200Z, and the translucent conductive film 208Z is disposed on the entire outer surface, that is, the outer edge of the support substrate 202Z, that is, the second edge. It extends to the outer edge of the substrate 200Z. For example, the translucent conductive film 208Z is formed on the entire surface of the multi-piece substrate and the substrate is divided, so that the translucent conductive film 208Z is formed up to the outer edge of the second substrate 200Z.

透光性導電膜208Zに対して気中放電を行ったところ、図6に示すように透光性導電膜208Zの外縁部から発生する気中放電が観察され、回路配線群104Zおよびこれに繋がる素子に破壊が認められた。これによれば、静電気が透光性導電膜208Zの外縁部から第2基板200Zの外縁部の基板側面上を越え回路配線群104Zへ伝播したものと考えられる。この場合、回路配線群104Zのうちで基板外縁に近い回路配線ほど静電気が伝播しやすいと考えられる。   When air discharge was performed on the light-transmitting conductive film 208Z, air discharge generated from the outer edge of the light-transmitting conductive film 208Z was observed as shown in FIG. 6 and connected to the circuit wiring group 104Z and this. Destruction was observed in the device. According to this, it is considered that static electricity propagated from the outer edge portion of the translucent conductive film 208Z to the circuit wiring group 104Z over the substrate side surface of the outer edge portion of the second substrate 200Z. In this case, it is considered that static electricity is more likely to propagate in the circuit wiring group 104Z that is closer to the outer edge of the substrate.

また、基板外縁から離れた回路配線およびこれに繋がる素子においても破壊が見られた。この破壊は、透光性導電膜208Zへ侵入した静電気によって当該透光性導電膜208Zの電位が上昇し、この電位上昇にカップリングして(容量性結合して)回路配線群104Zの電位が上昇することによって、起こるものと考えられる。すなわち、カップリングによる静電気の伝播によって、起こるものと考えられる(図7参照)。なお、図7にはカップリングの様子をコンデンサの図記号によって模式的に図示している。透光性導電膜208Zとのカップリングは、配線パターンの面積が広いほど、すなわち配線の幅や長さ等が大きいほど生じやすく、例えば低抵抗化のために線幅が広く形成される電源配線との間で生じやすいと考えられる。   In addition, destruction was also observed in the circuit wiring away from the outer edge of the substrate and the elements connected thereto. This breakdown is caused by the potential of the light-transmitting conductive film 208Z rising due to static electricity that has entered the light-transmitting conductive film 208Z, and coupled to this potential increase (capacitively coupled) to the potential of the circuit wiring group 104Z. It is thought to happen by rising. In other words, it is considered to be caused by the propagation of static electricity due to coupling (see FIG. 7). In FIG. 7, the state of the coupling is schematically shown by a graphic symbol of the capacitor. Coupling with the light-transmitting conductive film 208Z is more likely to occur as the area of the wiring pattern is larger, that is, as the width or length of the wiring is larger. For example, a power supply wiring that is formed with a wider line width to reduce resistance It is thought that it is easy to occur between.

また、基板外縁に沿って伸びる回路配線の方が、基板外縁に交差する方向に伸びた回路配線に比べて破壊が起こりやすいことが分かった。   It was also found that the circuit wiring extending along the outer edge of the substrate is more likely to break than the circuit wiring extending in the direction intersecting the outer edge of the substrate.

以下に図面を用いて本発明に係る実施の形態について詳細に説明する。図1に実施の形態に係る液晶表示装置10の模式図を示す。また、図1中の一点鎖線で囲んだ部分2の平面図を図2に示し、図2中の3−3線における断面図を図3に示し、図1中の一点鎖線で囲んだ部分4の平面図を図4に示し、図4中の5−5線における断面図を図5に示す。なお、図面を分かりやすくするため、各図面において他の図面に図示した要素の一部を省略し、平面図において一部の要素にハッチングを施している。   Embodiments according to the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a schematic diagram of a liquid crystal display device 10 according to an embodiment. Further, FIG. 2 shows a plan view of a portion 2 surrounded by an alternate long and short dash line in FIG. 1, FIG. 3 shows a cross-sectional view taken along a line 3-3 in FIG. FIG. 4 is a plan view of FIG. 4, and FIG. 5 is a sectional view taken along line 5-5 in FIG. For easy understanding of the drawings, some elements shown in other drawings are omitted in each drawing, and some elements are hatched in the plan view.

図1に示すように、液晶表示装置10は、液晶パネル12と、液晶パネル12用の筐体14と、FPC16と、外部回路18とを含んで構成されている。液晶パネル12はFPC16を介して外部回路18に接続されている。FPC16に替えて各種の配線体を用いることも可能である。ここでは、液晶パネル12がFFSモードの場合を例示する。なお、液晶パネル12は透過型、反射型、半透過型のいずれであってもよい。   As shown in FIG. 1, the liquid crystal display device 10 includes a liquid crystal panel 12, a casing 14 for the liquid crystal panel 12, an FPC 16, and an external circuit 18. The liquid crystal panel 12 is connected to the external circuit 18 via the FPC 16. Various wiring bodies can be used instead of the FPC 16. Here, a case where the liquid crystal panel 12 is in the FFS mode is illustrated. The liquid crystal panel 12 may be any of a transmissive type, a reflective type, and a transflective type.

液晶パネル12は、第1基板100と、第2基板200と、液晶302と、シール304とを含んで構成されている。基板100,200は、所定のギャップをあけて対向し、周縁部においてシール304によって貼り合わされている。基板100,200とシール304とを含んで構成される容器内に液晶302が挟持されている。   The liquid crystal panel 12 includes a first substrate 100, a second substrate 200, a liquid crystal 302, and a seal 304. The substrates 100 and 200 face each other with a predetermined gap, and are bonded together by a seal 304 at the peripheral edge. A liquid crystal 302 is sandwiched in a container including the substrates 100 and 200 and the seal 304.

第1基板100は、例えばガラス等の透光性基板で構成される支持基板102を含み、支持基板102の内表面側すなわち液晶302側に回路配線104,106と、周辺回路108と、絶縁膜110,112と、共通電極116と、画素電極118とを含んで構成されている。   The first substrate 100 includes a support substrate 102 formed of a light-transmitting substrate such as glass, for example. 110, 112, a common electrode 116, and a pixel electrode 118.

共通電極116および画素電極118は、対を成して液晶302の配向を制御する、すなわち、液晶302を駆動する電極である。共通電極116は複数の画素に共通に設けられ、画素電極118は画素ごとに設けられその画素の表示に応じた電位が供給される。なお、共通電極116を画素ごとに設け共通の電位を供給するように構成することも可能である。つまり、複数の画素電極118と少なくとも1つの共通電極116とによって、複数の画素が構成される。FFSモードの液晶パネル12では、電極116,118の両方が第1基板100に設けられ、電極116,118は絶縁膜112を介して積層されている。ここでは画素電極118が上層すなわち液晶302側に配置されている場合を例示するが、共通電極116を上層に配置することも可能である。上層の画素電極118には不図示のスリットが設けられており、当該スリットを介して電極116,118間に発生する電界によって液晶302の配向が制御される。電極116,118は例えばITO(Indium Tin Oxide)等の透光性導電膜で構成されている。   The common electrode 116 and the pixel electrode 118 are paired to control the orientation of the liquid crystal 302, that is, an electrode that drives the liquid crystal 302. The common electrode 116 is provided in common for a plurality of pixels, and the pixel electrode 118 is provided for each pixel, and a potential corresponding to the display of the pixel is supplied. Note that the common electrode 116 may be provided for each pixel so that a common potential is supplied. That is, a plurality of pixels are configured by the plurality of pixel electrodes 118 and at least one common electrode 116. In the FFS mode liquid crystal panel 12, both electrodes 116 and 118 are provided on the first substrate 100, and the electrodes 116 and 118 are stacked with an insulating film 112 interposed therebetween. Here, the case where the pixel electrode 118 is disposed on the upper layer, that is, the liquid crystal 302 side is illustrated, but the common electrode 116 may be disposed on the upper layer. The upper pixel electrode 118 is provided with a slit (not shown), and the orientation of the liquid crystal 302 is controlled by an electric field generated between the electrodes 116 and 118 through the slit. The electrodes 116 and 118 are made of a light transmitting conductive film such as ITO (Indium Tin Oxide).

図2では画素電極118がマトリクス状に配列された場合、すなわち画素がマトリクス配列した場合を例示しているが、画素を例えばデルタ配列にすることも可能である。なお、最外周に位置する1周分またはそれ以上の画素を直接的には表示に寄与しないダミー画素として用いる場合もある。   Although FIG. 2 illustrates the case where the pixel electrodes 118 are arranged in a matrix, that is, the case where the pixels are arranged in a matrix, the pixels may be arranged in a delta arrangement, for example. Note that one or more pixels located at the outermost periphery may be used as dummy pixels that do not directly contribute to display.

回路配線104,106および周辺回路108は画素領域の外側に配置されている。ここで、画素領域は複数の画素が配置された領域であり、換言すれば画素領域内において複数の画素が配列されている。なお、ダミー画素の領域も画素領域に含まれるものとする。回路配線104,106は、液晶パネル12内に設けられる駆動回路等を構成する配線であり、例えば各種の電源用配線である。回路配線104,106は、ここでは第1基板100の外縁に沿って延伸した配線であり、当該外縁の1辺または複数の辺に沿って延伸している。回路配線104,106の長さは例えば画素領域の外側の領域の幅よりも大きい。周辺回路108は、模式的に図示しているが、例えば画素電極118への電位供給を行うドライバ回路等を含む。なお、周辺回路108と回路配線104,106との接続や周辺回路108と電極116,118との接続等についての詳細は、一般的な各種構成を適用可能であり、ここでは説明を省略する。   The circuit wirings 104 and 106 and the peripheral circuit 108 are arranged outside the pixel region. Here, the pixel area is an area where a plurality of pixels are arranged, in other words, a plurality of pixels are arranged in the pixel area. The dummy pixel region is also included in the pixel region. The circuit wirings 104 and 106 are wirings constituting a driving circuit or the like provided in the liquid crystal panel 12, and are various power supply wirings, for example. Here, the circuit wirings 104 and 106 are wirings that extend along the outer edge of the first substrate 100, and extend along one or more sides of the outer edge. The length of the circuit wirings 104 and 106 is, for example, larger than the width of the area outside the pixel area. Although the peripheral circuit 108 is schematically illustrated, the peripheral circuit 108 includes, for example, a driver circuit that supplies a potential to the pixel electrode 118. Note that details of the connection between the peripheral circuit 108 and the circuit wirings 104 and 106, the connection between the peripheral circuit 108 and the electrodes 116 and 118, and the like can be applied to various general configurations, and the description thereof is omitted here.

図面では、回路配線104の方が回路配線106よりも第1基板100の外縁側に位置し回路配線104,106間に周辺回路108が配置されている場合を例示しているが、この配置形態に限定されるものではない。例えば、第1基板100内であっても、位置によっては、上記要素104,106,108のうちで1つまたは複数が設けられていない箇所が存在しうる。また、2本の回路配線104,106を例示しているが、回路配線の本数はこれに限られるものではなく、回路配線104,106の一方または両方が複数本であってもよい。   In the drawing, the circuit wiring 104 is positioned on the outer edge side of the first substrate 100 with respect to the circuit wiring 106, and the peripheral circuit 108 is disposed between the circuit wirings 104, 106. It is not limited to. For example, even in the first substrate 100, there may be a location where one or more of the elements 104, 106, and 108 are not provided depending on the position. Further, although the two circuit wirings 104 and 106 are illustrated, the number of circuit wirings is not limited to this, and one or both of the circuit wirings 104 and 106 may be plural.

絶縁膜110,112は、例えば酸化シリコン、窒化シリコン等で構成され、支持基板102上に積層されている。なお、説明を分かりやすくするために共通電極116よりも下層すなわち支持基板102側を絶縁膜110とし当該絶縁膜110上に絶縁膜112が積層されている場合を例示しているが、これらの絶縁膜110,112をまとめて絶縁膜114と呼ぶことにする。絶縁膜110,112はそれぞれ単層膜であってもよいし、多層膜であってもよい。   The insulating films 110 and 112 are made of, for example, silicon oxide, silicon nitride, or the like, and are stacked on the support substrate 102. For ease of explanation, the case where the insulating film 110 is formed below the common electrode 116, that is, the supporting substrate 102 side, and the insulating film 112 is stacked on the insulating film 110 is illustrated. The films 110 and 112 are collectively referred to as an insulating film 114. Each of the insulating films 110 and 112 may be a single layer film or a multilayer film.

なお、図3では回路配線104,106および周辺回路108が支持基板102に接触し絶縁膜110に覆われている場合を例示しているが、これらの要素104,106,108の1つまたは複数を、多層膜で構成した絶縁膜114中に埋設して支持基板102に接触しないように構成してもよい。   3 illustrates the case where the circuit wirings 104 and 106 and the peripheral circuit 108 are in contact with the support substrate 102 and covered with the insulating film 110, one or more of these elements 104, 106, and 108 are illustrated. May be embedded in an insulating film 114 formed of a multilayer film so as not to contact the support substrate 102.

第2基板200は、例えばガラス等の透光性基板で構成される支持基板202を含み、支持基板202の内表面側すなわち液晶302側に遮光膜204と、カラーフィルタ206とを含み、支持基板202の外表面側すなわち液晶302とは反対側に透光性導電膜208を含んで構成されている。なお、図2では透光性導電膜208を一点鎖線で図示している。   The second substrate 200 includes a support substrate 202 made of a light-transmitting substrate such as glass, and includes a light shielding film 204 and a color filter 206 on the inner surface side of the support substrate 202, that is, the liquid crystal 302 side. A translucent conductive film 208 is included on the outer surface side of 202, that is, on the side opposite to the liquid crystal 302. In FIG. 2, the translucent conductive film 208 is indicated by a one-dot chain line.

支持基板202は、第1基板100に対向して配置され、電極116,118と回路配線104,106と周辺回路108とに対向する大きさを有している。遮光膜204は、支持基板202上の全面に広がっているとともに画素電極118に対向する位置に開口を有している。なお、ダミー画素に対向する部分には開口は設けられていない。遮光膜204は例えば黒色顔料を含有した樹脂等で構成されている。カラーフィルタ206は、支持基板202上に配置され、遮光膜204の開口部に設けられて電極116,118に対向している。   The support substrate 202 is disposed to face the first substrate 100 and has a size facing the electrodes 116 and 118, the circuit wirings 104 and 106, and the peripheral circuit 108. The light shielding film 204 extends over the entire surface of the support substrate 202 and has an opening at a position facing the pixel electrode 118. Note that no opening is provided in a portion facing the dummy pixel. The light shielding film 204 is made of, for example, a resin containing a black pigment. The color filter 206 is disposed on the support substrate 202, is provided in the opening of the light shielding film 204, and faces the electrodes 116 and 118.

透光性導電膜208は、支持基板202の外表面上に配置され当該基板202を介して電極116,118等に対向している。透光性導電膜208は、任意の所定電位、例えば接地電位に保持され、パネル外部から第2基板200へ侵入する静電気を逃がして第2基板200の帯電を防止する。つまり、透光性導電膜208はシールド膜の役割をする。これにより、第2基板200の帯電による不具合、例えばコントラストの低下や表示ムラを抑制することができる。   The translucent conductive film 208 is disposed on the outer surface of the support substrate 202 and faces the electrodes 116, 118 and the like through the substrate 202. The translucent conductive film 208 is held at an arbitrary predetermined potential, for example, a ground potential, and releases static electricity that enters the second substrate 200 from the outside of the panel to prevent the second substrate 200 from being charged. That is, the translucent conductive film 208 serves as a shield film. Thereby, the malfunction by the charge of the 2nd board | substrate 200, for example, the fall of contrast and display nonuniformity, can be suppressed.

透光性導電膜208は、例えばITO等で構成され、無機材料と有機材料とのいずれで構成してもよいし、スパッタ法、プラズマCVD(Chemical Vapor Deposition)法、スピンコート法、印刷法等の方法によって形成可能である。透光性導電膜208の抵抗率(シート抵抗)は、例えば10Ω/□であり、低いほど好ましい。透光性導電膜208は、本体部分208aと引き出し部分208bとを含んで構成されている(図4参照)。 The translucent conductive film 208 is made of, for example, ITO, and may be made of either an inorganic material or an organic material, such as a sputtering method, a plasma CVD (Chemical Vapor Deposition) method, a spin coating method, a printing method, or the like. It can be formed by this method. The resistivity (sheet resistance) of the translucent conductive film 208 is, for example, 10 5 Ω / □, and the lower the better. The translucent conductive film 208 includes a main body portion 208a and a lead portion 208b (see FIG. 4).

透光性導電膜208の本体部分208aは、共通電極116および画素電極118に対向して配置されている。本体部分208aは、支持基板202の中央部に広がっているが、その外縁は支持基板202の外縁すなわち第2基板200の外縁までは到達していない。また、本体部分208aの外縁は回路配線104,106および周辺回路108よりも基板中央側に位置しており、本体部分208aはこれらの要素104,106,108には対向していない。ここでは、本体部分208aの外縁の全周が第2基板200の外縁よりも基板中央側に位置し回路配線104,106および周辺回路108よりも基板中央側に位置する場合を例示する。本体部分208aは、パターニングされることなく(すき間なく)設けてもよいし、または、静電気に対するシールド効果を奏する限り例えば網目状にパターニングされていてもよい。また、本体部分208aの形状は図示の例示に限られるものではない。   A main body portion 208 a of the translucent conductive film 208 is disposed to face the common electrode 116 and the pixel electrode 118. The main body portion 208 a extends in the center of the support substrate 202, but its outer edge does not reach the outer edge of the support substrate 202, that is, the outer edge of the second substrate 200. The outer edge of the main body portion 208a is located closer to the center of the substrate than the circuit wirings 104 and 106 and the peripheral circuit 108, and the main body portion 208a does not face these elements 104, 106, and 108. Here, a case where the entire circumference of the outer edge of the main body portion 208a is located closer to the center of the board than the outer edge of the second board 200 is located closer to the center of the board than the circuit wirings 104 and 106 and the peripheral circuit 108. The main body portion 208a may be provided without being patterned (with no gaps), or may be patterned, for example, in a mesh pattern as long as it has a shielding effect against static electricity. Further, the shape of the main body portion 208a is not limited to the illustrated example.

ここで、図3には本体部分208aの外縁が共通電極116の外縁および最外周の画素電極118の最外縁に揃っている場合を例示し、図2には本体部分208aが画素電極118の最外縁よりも基板外縁側へ張り出した場合を例示している。なお、上記ダミー画素を設ける場合、ダミー画素の電極116,118に対向する位置まで本体部分208aを設けてもよいし、ダミー画素よりも内側に本体部分208aを設けてもよい。   Here, FIG. 3 illustrates a case where the outer edge of the main body portion 208a is aligned with the outer edge of the common electrode 116 and the outermost edge of the outermost pixel electrode 118, and FIG. The case where it protrudes to the board | substrate outer edge side rather than the outer edge is illustrated. When the dummy pixel is provided, the main body portion 208a may be provided up to a position facing the electrodes 116 and 118 of the dummy pixel, or the main body portion 208a may be provided inside the dummy pixel.

透光性導電膜208の引き出し部分208bは、本体部分208aから、支持基板202の外縁のうちで液晶パネル12の端子部側の外縁へ向けて延伸している。なお、液晶パネル12の端子部は第1基板100のうちで第2基板200に重なっていない部分に設けられ、当該端子部にはFPC16との接続端子等が設けられている。ここで、図5には引き出し部分208bが支持基板202の外縁まで到達している場合を例示し、図4には当該外縁まで到達していない場合を例示している。   The lead-out portion 208b of the translucent conductive film 208 extends from the main body portion 208a toward the outer edge on the terminal portion side of the liquid crystal panel 12 in the outer edge of the support substrate 202. Note that the terminal portion of the liquid crystal panel 12 is provided in a portion of the first substrate 100 that does not overlap the second substrate 200, and the terminal portion is provided with a connection terminal to the FPC 16, and the like. Here, FIG. 5 illustrates a case where the lead-out portion 208b reaches the outer edge of the support substrate 202, and FIG. 4 illustrates a case where the lead-out portion 208b does not reach the outer edge.

透光性導電膜208は、引き出し部分208bを介して所定電位、例えば接地電位に接続される。この接続形態の一例を図4および図5を参照して以下に説明する。   The translucent conductive film 208 is connected to a predetermined potential, for example, a ground potential via the lead portion 208b. An example of this connection form will be described below with reference to FIGS.

第1基板100は、端子部に、上記所定電位への接続用の配線140と、絶縁膜142と、導通部144,146とを含んで構成されている。   The first substrate 100 is configured to include a wiring 140 for connection to the predetermined potential, an insulating film 142, and conductive portions 144 and 146 in the terminal portion.

配線140は、一端部が基板100,200の重なり部分と端子部との境界付近に設けられ、他端部が端子部の端部に設けられている。配線140は他の配線との重なりを避けてカップリングを回避するのが好ましい。図4では、配線140が端子部において最も外側に位置する場合を例示しているが、他の位置に設けてもよい。また、配線140の平面パターンは図示の例示に限られるものではない。図5では、配線140が支持基板202に接触している場合を例示しているが、例えば絶縁膜142中に埋設し支持基板202に接触しないようにしてもよい。配線140は、端子部の他の配線や上記回路配線104,106(図2参照)等と同じ材料で構成する場合にはパターニングによって上記各種配線と同時に形成することができる。かかる同時形成によれば製造工程を増加することなく配線140を形成することができる。   One end of the wiring 140 is provided in the vicinity of the boundary between the overlapping portion of the substrates 100 and 200 and the terminal portion, and the other end is provided at the end of the terminal portion. The wiring 140 preferably avoids coupling with other wirings to avoid coupling. Although FIG. 4 illustrates the case where the wiring 140 is positioned on the outermost side in the terminal portion, it may be provided at another position. Further, the plane pattern of the wiring 140 is not limited to the illustrated example. Although FIG. 5 illustrates the case where the wiring 140 is in contact with the support substrate 202, for example, the wiring 140 may be embedded in the insulating film 142 so as not to contact the support substrate 202. The wiring 140 can be formed simultaneously with the various wirings by patterning in the case where the wiring 140 is made of the same material as the other wirings of the terminal portion and the circuit wirings 104 and 106 (see FIG. 2). According to such simultaneous formation, the wiring 140 can be formed without increasing the number of manufacturing steps.

絶縁膜142は、配線140を覆って支持基板202上に配置されている。絶縁膜142は、例えば上記絶縁膜110,112,114(図3参照)のいずれかを利用して構成可能である。絶縁膜142には、配線140の上記一端部および他端部に至るコンタクトホールが設けられている。   The insulating film 142 is disposed on the support substrate 202 so as to cover the wiring 140. The insulating film 142 can be configured using, for example, any one of the insulating films 110, 112, and 114 (see FIG. 3). The insulating film 142 is provided with contact holes reaching the one end and the other end of the wiring 140.

導通部144は、上記コンタクトホールを介して配線140の上記一端部に接続されコンタクトホール付近の絶縁膜142上へ至っている。導通部146は、上記コンタクトホールを介して配線140の上記他端部に接続されコンタクトホール付近の絶縁膜142上へ至っている。なお、図4では導通部146の図示を省略している。ここでは導通部144,146は、いわゆるパッド電極に相当する。導通部144,146は、カップリングを避けるために、配線140以外の他の配線等との重なりを回避して配置するのが好ましい。導通部144,146は絶縁膜142とともに配線140を覆うことが好ましく、これにより配線140が外部に露出するのが回避され外部環境から保護される。   The conducting portion 144 is connected to the one end portion of the wiring 140 through the contact hole and reaches the insulating film 142 near the contact hole. The conducting portion 146 is connected to the other end portion of the wiring 140 through the contact hole and reaches the insulating film 142 near the contact hole. In addition, illustration of the conduction | electrical_connection part 146 is abbreviate | omitted in FIG. Here, the conducting portions 144 and 146 correspond to so-called pad electrodes. In order to avoid coupling, the conducting portions 144 and 146 are preferably arranged so as to avoid overlapping with other wirings other than the wiring 140. It is preferable that the conductive portions 144 and 146 cover the wiring 140 together with the insulating film 142, thereby preventing the wiring 140 from being exposed to the outside and protecting it from the external environment.

導通部144,146は、例えばITO等で構成され、例えば画素電極118と同時にパターニング形成することによって製造工程を増加することなく形成することができる。 液晶パネル12は基板100,200に対して外付けされた接続体306をさらに含んで構成されている。接続体306は、ここでは、透光性導電膜208の引き出し部分208b上に配置され、第2基板200の側面を伝って第1基板100上へ至り、導通部144上に配置されている。これにより、透光性導電膜208が接続体306および導通部144を介して配線140に接続されている。この場合、透光性導電膜208の引き出し部分208bを配線140へ向けて延伸させることによって、接続体306を短くすることができる。接続体306は導通部144の全体を覆い導通部144が外部に露出するのを回避するのが好ましく、これにより外部環境から保護することができる(図4および図5参照)。また、接続体306は、カップリングを避けるために、配線140以外の他の配線等との重なりを回避して配置するのが好ましい。   The conductive portions 144 and 146 are made of, for example, ITO, and can be formed without increasing the number of manufacturing steps by patterning simultaneously with the pixel electrode 118, for example. The liquid crystal panel 12 further includes a connection body 306 externally attached to the substrates 100 and 200. Here, the connection body 306 is disposed on the lead portion 208 b of the translucent conductive film 208, reaches the first substrate 100 along the side surface of the second substrate 200, and is disposed on the conductive portion 144. Thereby, the translucent conductive film 208 is connected to the wiring 140 through the connection body 306 and the conduction part 144. In this case, the connection body 306 can be shortened by extending the lead-out portion 208 b of the translucent conductive film 208 toward the wiring 140. It is preferable that the connection body 306 covers the entire conductive portion 144 to prevent the conductive portion 144 from being exposed to the outside, thereby protecting the conductive portion 144 from the external environment (see FIGS. 4 and 5). In addition, the connection body 306 is preferably arranged so as to avoid overlapping with other wirings other than the wiring 140 in order to avoid coupling.

接続体306は、例えば銀ペーストやカーボンペースト等の導電性ペーストの塗布および硬化によって形成可能である。導電性ペーストを利用する場合には、塗布および硬化によって接続体306を容易に形成することができる。接続体306は透光性導電膜208よりも抵抗率が低いほど好ましい。また、接続体306は支持基板202の外表面上の他の要素、例えば不図示の偏光板等よりも薄いことが好ましく、これにより接続体306が液晶表示装置10の薄型化を妨げることはない。   The connection body 306 can be formed by applying and curing a conductive paste such as silver paste or carbon paste. When the conductive paste is used, the connection body 306 can be easily formed by application and curing. The connection body 306 preferably has a lower resistivity than the translucent conductive film 208. Further, the connection body 306 is preferably thinner than other elements on the outer surface of the support substrate 202, such as a polarizing plate (not shown), so that the connection body 306 does not hinder the thinning of the liquid crystal display device 10. .

液晶表示装置10は、FPC16と導通部146との間にACF(Anisotropic Conductive Film:異方性導電膜)22を含んで構成され、ACF22によってFPC16の配線16aと配線140とが電気的に接続されている。ACF22は、配線16a,140のためのみに設けてもよいし、端子部の他の配線とFPC16との接続を兼用するものであってもよい。液晶表示装置10では、FPC16の配線16aは所定電位に接続され、これにより当該配線16aとACF22と導通部146と配線140と導通部144と接続体306とを介して透光性導電膜208が所定電位に接続される。図1では上記所定電位が外部回路18内の接地電位の場合を例示している。外部環境からの保護のため、ACF22によって導通部146および配線16aが覆われて外部へ露出するのが回避されているのが好ましい。   The liquid crystal display device 10 includes an ACF (Anisotropic Conductive Film) 22 between the FPC 16 and the conductive portion 146, and the wiring 16 a and the wiring 140 of the FPC 16 are electrically connected by the ACF 22. ing. The ACF 22 may be provided only for the wirings 16 a and 140, or may be used to connect the other wiring of the terminal portion to the FPC 16. In the liquid crystal display device 10, the wiring 16 a of the FPC 16 is connected to a predetermined potential, whereby the translucent conductive film 208 is formed through the wiring 16 a, the ACF 22, the conductive portion 146, the wiring 140, the conductive portion 144, and the connection body 306. Connected to a predetermined potential. FIG. 1 illustrates the case where the predetermined potential is the ground potential in the external circuit 18. In order to protect from the external environment, it is preferable to prevent the conductive portion 146 and the wiring 16a from being covered with the ACF 22 and exposed to the outside.

上記構成によれば、透光性導電膜208の本体部分208aは支持基板202の外縁よりも内側に設けられている。このため、従来の液晶表示装置10Zのように透光性導電膜208Zが支持基板202Zの全面に広がっている場合に比べて、透光性導電膜208の外縁部から支持基板202の側面上を越えて第1基板100の回路配線104等へ至る経路が長くなる。したがって、透光性導電膜208に静電気が侵入した場合であっても、上記経路による静電気の伝播を抑制することができる。これにより、静電気耐性を向上することができる。   According to the above configuration, the main body portion 208 a of the translucent conductive film 208 is provided inside the outer edge of the support substrate 202. For this reason, compared with the case where the translucent conductive film 208Z spreads over the entire surface of the support substrate 202Z as in the conventional liquid crystal display device 10Z, the outer peripheral portion of the translucent conductive film 208 extends over the side surface of the support substrate 202. A route that extends beyond the first substrate 100 to the circuit wiring 104 or the like becomes longer. Accordingly, even when static electricity enters the light-transmitting conductive film 208, propagation of static electricity through the path can be suppressed. Thereby, static electricity tolerance can be improved.

また、透光性導電膜208の本体部分208aは第1基板100の回路配線104,106等に対向していないので、透光性導電膜208と回路配線104,106等とのカップリングが回避されている。このため、透光性導電膜208に静電気が侵入した場合であっても、カップリングによって透光性導電膜208から回路配線104,106等へ静電気が伝播するのを抑制することができる。これにより、静電気耐性を向上することができる。   Further, since the main body portion 208a of the translucent conductive film 208 is not opposed to the circuit wirings 104, 106 and the like of the first substrate 100, coupling between the translucent conductive film 208 and the circuit wirings 104, 106 and the like is avoided. Has been. For this reason, even when static electricity enters the translucent conductive film 208, it is possible to suppress static electricity from being transmitted from the translucent conductive film 208 to the circuit wirings 104, 106, and the like by coupling. Thereby, static electricity tolerance can be improved.

また、基板外縁に沿って伸びる回路配線には静電気が伝播しやすいとの上記評価に鑑みれば、透光性導電膜208によって静電気耐性向上がより確実に図られる。   In view of the above evaluation that static electricity easily propagates to the circuit wiring extending along the outer edge of the substrate, the translucent conductive film 208 can more reliably improve static electricity resistance.

ここで、上記では透光性導電膜208が支持基板202の外表面に接触している場合を例示したが、透光性導電膜208と支持基板202との間に例えば絶縁膜が設けられていてもよく、当該絶縁膜の一例として、偏光板、位相差板、光学補償板、輝度向上フィルム、反射防止フィルム等の光学フィルムが挙げられる。   Here, the case where the translucent conductive film 208 is in contact with the outer surface of the support substrate 202 is illustrated above. However, for example, an insulating film is provided between the translucent conductive film 208 and the support substrate 202. Examples of the insulating film include optical films such as a polarizing plate, a retardation plate, an optical compensation plate, a brightness enhancement film, and an antireflection film.

また、上記では液晶302を駆動する電極116,118が絶縁膜112を介して積層されたFFSモードを例示したが、両電極116,118を同層に(例えば絶縁膜112上に)配置してIPSモードを構成することも可能である。IPSモードの場合、例えば櫛歯形状のパターンの電極116,118が、当該櫛歯形状を互いにかみ合わせた形態で配置される。   In the above description, the FFS mode in which the electrodes 116 and 118 for driving the liquid crystal 302 are stacked via the insulating film 112 is illustrated. However, the electrodes 116 and 118 are disposed in the same layer (for example, on the insulating film 112). It is also possible to configure the IPS mode. In the case of the IPS mode, for example, the electrodes 116 and 118 having a comb-shaped pattern are arranged in a form in which the comb-shaped shapes are engaged with each other.

本発明の実施の形態に係る液晶表示装置の模式図である。1 is a schematic diagram of a liquid crystal display device according to an embodiment of the present invention. 図1中の一点鎖線で囲んだ部分2の平面図である。It is a top view of the part 2 enclosed with the dashed-dotted line in FIG. 図2中の3−3線における断面図である。FIG. 3 is a cross-sectional view taken along line 3-3 in FIG. 2. 図1中の一点鎖線で囲んだ部分4の平面図である。It is a top view of the part 4 enclosed with the dashed-dotted line in FIG. 図4中の5−5線における断面図である。It is sectional drawing in the 5-5 line in FIG. FFSモードの従来の液晶表示装置について静電気の影響を説明する断面図である。It is sectional drawing explaining the influence of static electricity about the conventional liquid crystal display device of a FFS mode. FFSモードの従来の液晶表示装置について静電気の影響を説明する断面図である。It is sectional drawing explaining the influence of static electricity about the conventional liquid crystal display device of a FFS mode.

符号の説明Explanation of symbols

10 液晶表示装置、100 第1基板、104,106 回路配線、116 共通電極、118 画素電極、140 所定電位接続用配線、200 第2基板、208 透光性導電膜、208a 本体部分、208b 引き出し部分、302 液晶。   DESCRIPTION OF SYMBOLS 10 Liquid crystal display device, 100 1st board | substrate, 104,106 circuit wiring, 116 common electrode, 118 pixel electrode, 140 wiring for predetermined electric potential connection, 200 2nd board | substrate, 208 translucent conductive film, 208a main body part, 208b drawer | drawing-out part 302 liquid crystal.

Claims (4)

対向する第1基板と第2基板との間に挟持された液晶を駆動する画素電極および共通電極が前記第1基板に設けられた液晶表示装置であって、
前記第1基板は、前記画素電極および前記共通電極よりなる複数の画素が配置された画素領域の外側に配置された回路配線周辺回路及び所定電位が印加される所定電位用配線を備え、
前記第2基板は、前記液晶とは反対側に前記画素電極および前記共通電極に対向して配置され前記所定電位に保持された透光性導電膜を備え、
前記透光性導電膜は前記回路配線及び周辺回路よりも前記第2基板の中央側に位置する外縁および前記所定電位用配線へ向かって延伸した引き出し部分を有し、前記引き出し部分を介して前記所定電位用配線に接続され、
前記引き出し部分は、前記第2基板の1辺のみに形成され、
前記所定電位用配線は、前記第1基板の前記1辺のみに前記回路配線に重ならないで形成されていることを特徴とする液晶表示装置。
A liquid crystal display device in which a pixel electrode and a common electrode for driving a liquid crystal sandwiched between a first substrate and a second substrate facing each other are provided on the first substrate,
The first substrate includes a circuit wiring disposed outside a pixel region in which a plurality of pixels including the pixel electrode and the common electrode are disposed , a peripheral circuit, and a wiring for a predetermined potential to which a predetermined potential is applied,
The second substrate includes a translucent conductive film disposed on the opposite side of the liquid crystal to face the pixel electrode and the common electrode and held at the predetermined potential,
The transparent conductive film has a lead portion which extends toward the outer edge and the predetermined potential wirings than the circuit wiring and the peripheral circuit positioned on the center side of the second substrate, through the lead portion Connected to the predetermined potential wiring;
The lead-out portion is formed only on one side of the second substrate,
The liquid crystal display device according to claim 1, wherein the predetermined potential wiring is formed on only the one side of the first substrate so as not to overlap the circuit wiring .
請求項1に記載の液晶表示装置であって、
前記回路配線は電源用配線であることを特徴とする液晶表示装置。
The liquid crystal display device according to claim 1,
The liquid crystal display device, wherein the circuit wiring is a power supply wiring.
請求項1に記載の液晶表示装置であって、
前記回路配線は前記第1基板の外縁に沿った回路配線であることを特徴とする液晶表示装置。
The liquid crystal display device according to claim 1,
The liquid crystal display device, wherein the circuit wiring is a circuit wiring along an outer edge of the first substrate.
請求項1に記載の液晶表示装置であって、
前記所定電位用配線は、前記第1基板の1辺の端子部の最も外に位置していることを特徴とする液晶表示装置。
The liquid crystal display device according to claim 1 ,
The liquid crystal display device, wherein the predetermined potential wiring is located on the outermost side of a terminal portion on one side of the first substrate.
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