JP4492820B2 - Transmitter circuit - Google Patents

Description

  The present invention relates to a transmission circuit provided in a communication terminal, and more particularly to a transmission circuit using an HPSK (HyperPhase Shift Keying) modulation scheme.

  In the HPSK modulation system described in 3G TS 25.213 of 3GPP (3rd Generation Partnership Project), which is a standardization project of W-CDMA (Wideband Code Division Multiple Access) standard, transmission data is spread code. After spreading at, amplitude data is obtained by multiplying the spread transmission data by a gain factor for weighting the amplitude in HPSK modulation, and then HPSK modulation of the amplitude data is performed.

  FIG. 7 is a block diagram showing a configuration example of a conventional transmission circuit using the HPSK modulation method.

  In this conventional example, as shown in FIG. 7, a baseband circuit that generates and outputs two types of transmission data, data channel data DPDCH (Dedicated Physical Data Channel) and control channel data DPCCH (Dedicated Physical Control Channel). 110, a data channel data DPDCH output from the baseband circuit 110 and a spread code SCd by multiplying the data channel data DPDCH by spreading the data channel data DPDCH and outputting as spread data d, and the baseband circuit 110 Multiplying the control channel data DPCCH output from the spread code SCc by spreading the control channel data DPCCH and outputting it as spread data c, and spreading data d output from the multiplier 120 to the spread data d Multiply gain factor βd From the multiplier 121 that outputs the amplitude data Iin, the multiplier 123 that outputs the amplitude data Qin by multiplying the spread data c output from the multiplier 122 by the gain factor βc, and the multipliers 121 and 123, respectively. The output amplitude data Iin and Qin are input as IQ channel data, and the input amplitude data Iin and Qin are converted into a scramble code which is one of the CDMA frequency spreading codes output from the baseband circuit 110. Accordingly, the HPSK modulation data 130 that outputs HPSK modulation data Iout and Qout is mapped by mapping to the complex IQ plane, and the high-frequency component of the HPSK modulation data Iout output from the HPSK modulation circuit 130 is removed and output as a digital signal Id. Output from the digital filter 140 and the HPSK modulation circuit 130 A digital filter 142 that removes the high-frequency component of the HPSK modulated data Qout and outputs it as a digital signal Qd; a digital-analog converter 141 that converts the digital signal Id output from the digital filter 140 into an analog signal Ia; A digital / analog converter 143 that converts the digital signal Qd output from the digital filter 142 into an analog signal Qa and outputs the analog signal Qa, and analog signals Ia and Qa output from the digital / analog converters 141 and 143, respectively, are orthogonally modulated and desired. And a quadrature modulator 150 for outputting an HPSK signal having a frequency of.

  The spread code SCd multiplied by the data DPDCH of the data channel by the multiplier 120 and the spread code SCc multiplied by the data DPCCH of the control channel by the multiplier 122 are one of CDMA frequency spreading codes. These codes are different from each transmission channel in order to maintain the orthogonality of each channel, and are output from the baseband circuit 110.

  The gain factor βd multiplied by the spread data d by the multiplier 121 and the gain factor βc multiplied by the spread data c by the multiplier 123 are peculiar to HPSK modulation, and are represented by I (Inphase), Q ( Quadrature) is a value for individually weighting each amplitude, and is output from the baseband circuit 110. The gain factors βd and βc each have a value of 0 to 15 depending on the transmission data rate, and one of the gain factors βd and βc is always “15”. Further, since the control channel data DPCCH is always required, the gain factor βc does not become “0”.

  In addition, the amplitude data Iin and Qin output from the multipliers 121 and 123 respectively represent the values “0” and “1” of the spread data d and c output from the multipliers 120 and 122, respectively, and have positive and negative signs. The amplitude value is converted into a binary code in 2's complement format.

  In the transmission circuit configured as described above, the data channel data DPDCH and the control channel data DPCCH output from the baseband circuit 110 are multiplied by spread codes SCd and SCc, respectively, to obtain spread data d and c. Furthermore, the spread data d and c are subjected to HPSK modulation with their amplitudes weighted by gain factors βd and βc, respectively.

  The HPSK-modulated HPSK modulation data Iout and Qout are respectively removed from the high frequency components, further converted into analog signals, and then subjected to quadrature modulation and output as HPSK signals having a desired frequency.

  However, in the transmission circuit as described above, the value of the gain factor multiplied by the spread data is directly reflected in the amplitude on the complex IQ plane of the HPSK modulation signal. The output power of the device will change. When the output power of the quadrature modulator changes, the S / N ratio does not become constant, and when the output power is low, the S / N ratio becomes small and the adjacent channel leakage power characteristic deteriorates. is there.

  Also, in a system adopting the CDMA system, even if the data rate changes when the communication state in the terminal is the same, such as the distance between the terminal and the base station is constant, at the antenna end of the data DPCCH component of the control channel Although it is required to always keep the power constant, in the conventional transmission circuit as described above, at the antenna end of the data DPCCH component of the control channel depending on the combination of the gain factor and the output power of the quadrature modulator There is a problem that electric power cannot be maintained at a constant value.

  The present invention has been made in view of the problems of the conventional techniques as described above. The output power of the quadrature modulator can be kept constant, and the power of the control channel data component at the antenna end can be maintained. An object of the present invention is to provide a transmission circuit that can be maintained at a constant value.

In order to achieve the above object, the present invention provides:
A baseband circuit for generating and outputting transmission data composed of at least one first channel data and second channel data; spreading means for spreading the transmission data using a different spreading code for each transmission channel; Multiplication means for weighting the amplitudes of the first channel data and the second channel data using two gain factors in a combination determined by the transmission data rate, and the multiplication means weights the amplitude. Digital modulation means for digitally modulating the first channel data and the second channel data, and the first channel data and the second channel data digitally modulated by the digital modulation means. A quadrature modulator that performs quadrature modulation and outputs a transmission signal, and a transmission signal that is output from the quadrature modulator. In at least a to become a transmission circuit and an antenna for radiating a wave,
Amplifying means for amplifying and outputting a transmission signal output from the quadrature modulator with a gain based on a control voltage; a transmission level circuit for determining a transmission power value of the second channel data component;
Using the two gain factors of the combination determined by the transmission data rate, the amplification means is configured so that the transmission power of the second channel data component at the antenna end is constant regardless of the transmission data rate. A first gain offset circuit for adding a first gain correction amount for controlling the gain to the transmission power value determined by the transmission level circuit and outputting the same;
A voltage generation circuit that generates a voltage for controlling the gain of the amplification unit based on the transmission power value output from the first gain offset circuit;
The antenna radiates a transmission signal output from the quadrature modulator and amplified by the amplification means as a radio wave.

  Further, the multiplication means does not change the ratio of the combination of gain factors determined by the transmission data rate, and squares the gain factor for weighting the amplitude of the first channel data and the first factor. The first channel data and the second channel data using a gain factor that makes the sum of the gain factor square for weighting the amplitude of the channel data 2 constant regardless of the transmission data rate. It is characterized by weighting the amplitude with the channel data.

  The baseband circuit has a table in which a gain factor determined by the transmission data rate and a gain factor for weighting the transmission data by the multiplication unit are stored, and the transmission data rate Based on the above, a gain factor corresponding to the transmission data rate is output from the table to the multiplication means.

  Further, the first gain offset circuit calculates transmission power of the first channel data component using two gain factors of a combination determined by the transmission data rate, and the transmission power is calculated using the first gain offset circuit. The gain correction amount is added to the transmission power value determined by the transmission level circuit and output.

Further, the multiplying means uses gain factors used for weighting the amplitudes of the first channel data and the second channel data, respectively, and weighting in the multiplying means causes the orthogonal modulator to A second gain offset circuit for adding a second gain correction amount for correcting an error in the output power generated in addition to the transmission power value output from the first gain offset circuit,
The voltage generation circuit generates a voltage for controlling the gain of the amplification unit based on the transmission power value output from the second gain offset circuit.

  The second gain offset circuit is configured to use one combination of gain factors used for weighting the amplitudes of the first channel data and the second channel data by the multiplying unit. And the weights of the output power of the quadrature modulator and the amplitudes of the first channel data and the second channel data in the multiplication unit when the gain factors of the reference combination are used. The ratio of the output power of the quadrature modulator when using the gain factor used for the calculation is calculated, and the transmission power output from the first gain offset circuit using the ratio as the second gain correction amount It is characterized by adding to the value and outputting.

  The second offset circuit has a table storing a gain factor determined by the transmission data rate and a gain factor for weighting the transmission data by the multiplication means. To do.

  The first channel data may be data channel data of the transmission data, and the second channel data may be control channel data of the transmission data.

  Further, the digital modulation means is phase modulation means for phase-shift modulating amplitude data of the first channel data and the second channel data weighted by the multiplication means. To do.

  In the present invention configured as described above, the transmission data composed of the first channel data and the second channel data generated by the baseband circuit has a different spreading code for each transmission channel in the spreading means. Furthermore, the power of the transmission signal output from the quadrature modulator depends on the transmission data rate without changing the ratio of the two gain factors of the combination determined by the transmission data rate in the multiplication means. Each amplitude is weighted using a gain factor that is constant rather than constant. The first channel data and the second channel data weighted by the multiplication means are digitally modulated by the digital modulation means, and then quadrature modulated by the quadrature modulator and transmitted through the antenna as a transmission signal. Sent.

  In this way, the multiplication means does not change the ratio of the two gain factors of the combination determined by the transmission data rate, and the power of the transmission signal output from the quadrature modulator is constant regardless of the transmission data rate. Since the amplitudes of the first channel data and the second channel data are respectively weighted using such a gain factor, the transmission data rate changes, and the gain factor weights the first channel data. Even when the combination with the gain factor for weighting the second channel data is changed, the output power of the quadrature modulator is maintained at a constant value.

  Further, in the first gain offset circuit, the transmission power of the first channel data component is calculated using two gain factors of the combination determined by the transmission data rate, and this transmission power is used as the first gain correction amount. When adding to the transmission power value of the second channel data and amplifying the transmission signal output from the quadrature modulator with the gain based on the addition result and transmitting the amplified signal via the antenna, the second channel at the antenna end The transmission power of the data component becomes a constant value regardless of the transmission data rate. Here, in a system adopting the CDMA system, when the communication state in the terminal is the same, such as the distance between the terminal and the base station is constant, the data component at the antenna end of the control channel is changed even when the data rate is changed. Although it is required to always keep the power at a constant value, if the first channel data is the data channel data of the transmission data and the second channel data is the control channel data of the transmission data, the antenna end The transmission power of the data component of the control channel at a constant value regardless of the transmission data rate.

  In the second gain offset circuit, one combination of gain factors used for weighting the amplitudes of the first channel data and the second channel data by the multiplication means is used as a reference, and the reference The gain factor used for weighting the output power of the quadrature modulator and the amplitude of the first channel data and the second channel data in the multiplying means when the gain factor of the combination is used. The ratio with the output power of the quadrature modulator when used is calculated, the ratio is added to the transmission power value output from the first gain offset circuit as the second gain correction amount, and the gain based on the addition result When the transmission signal output from the quadrature modulator is amplified and transmitted through the antenna, the first channel data and the second channel are multiplied by the multiplication means. Even when an error occurs in the output power of the quadrature modulator due to a shortage of the number of bits representing the gain factor used to weight the amplitude with the channel data, the error is not corrected when the transmission signal is amplified. It is corrected by a gain correction amount of 2.

  Since the present invention is configured as described above, the following effects can be obtained.

  The transmission means for amplifying the transmission signal output from the quadrature modulator with a gain based on the control voltage and outputting the transmission power value of the second channel data component The gain of the amplifying means is set so that the transmission power of the second channel data component at the antenna end is constant regardless of the transmission data rate, using two gain factors of a combination determined by the circuit and the transmission data rate. A first gain offset circuit for adding a first gain correction amount for control to the transmission power value determined by the transmission level circuit and outputting the same, and a transmission power value output from the first gain offset circuit. And a voltage generation circuit for generating a voltage for controlling the gain of the amplification means, and a transmission output from the quadrature modulator and amplified by the amplification means No. because where the structure is radiated as a radio wave from the antenna can be a constant value regardless of the transmission power of the second channel data component at the antenna end to the transmission data rate.

  According to the second to fourth aspects of the present invention, the S / N (Signal to Noise Ratio) ratio in the quadrature modulator can be made constant, the deterioration of the adjacent channel leakage power can be prevented, and the antenna end The transmission power of the second channel data component in can be set to a constant value regardless of the transmission data rate.

  According to a fifth aspect of the present invention, in the multiplying means, the gain factor for weighting the amplitude of the first channel data without changing the ratio of the combination of gain factors determined by the transmission data rate. The first channel data and the second channel data are gain factors such that the sum of the square and the square of the gain factor for weighting the amplitude of the second channel data is constant regardless of the transmission data rate. Since the transmission data rate is changed, the combination of the gain factor for weighting the first channel data and the gain factor for weighting the second channel data is obtained. Even in the case of a change, the output power of the quadrature modulator can be maintained at a constant value. In S / N (Signal to Noise Ratio) ratio can be made constant, it is possible to prevent deterioration of the adjacent channel leakage power.

  According to another aspect of the present invention, the baseband circuit is provided with a table storing a gain factor determined by a transmission data rate and a gain factor for weighting transmission data by a multiplying unit. Since the gain factor corresponding to the transmission data rate is output from the table to the multiplication unit based on the data rate, it is not necessary to calculate the gain factor for each transmission operation.

  According to the seventh aspect of the present invention, the first gain offset circuit calculates the transmission power of the first channel data component using the two gain factors of the combination determined by the transmission data rate, and this transmission power. Is added to the transmission power value of the second channel data component as the first gain correction amount, and the transmission signal output from the quadrature modulator is amplified with the gain based on the addition result and transmitted via the antenna. Therefore, the same effects as those described in claim 5 or claims 1 to 6 are obtained.

  According to another aspect of the present invention, the gain means used for weighting the amplitudes of the first channel data and the second channel data by the multiplying means are used to make the orthogonality by weighting in the multiplying means. A second gain offset circuit for adding a second gain correction amount for correcting an error in output power generated in the modulator to the transmission power value output from the first gain offset circuit, and outputting the same; Since the voltage generation circuit is configured to generate a voltage for controlling the gain of the amplification unit based on the transmission power value output from the second gain offset circuit, the gain factor weighted by the multiplication unit Even when an error occurs in the output power of the quadrature modulator due to a lack of the number of bits representing the error, the error is corrected by the second gain when the transmission data is amplified. Is corrected, it is possible to correct the power at the antenna end.

  According to the ninth aspect of the present invention, in the second gain offset circuit, one of the gain factors used for respectively weighting the amplitudes of the first channel data and the second channel data by the multiplying unit in the second gain offset circuit. With reference to one combination, the output power of the quadrature modulator when the gain factor of the combination set as the reference is used, and the amplitude of the first channel data and the second channel data are respectively weighted by the multiplying means The ratio with the output power of the quadrature modulator when using the gain factor used for the calculation is calculated, and the ratio is added to the transmission power value output from the first gain offset circuit as the second gain correction amount. The transmission signal output from the quadrature modulator is amplified with the gain based on the addition result and transmitted via the antenna. 8 the same effects as those described.

  According to a tenth aspect of the present invention, the second offset circuit is provided with a table storing a gain factor determined by a transmission data rate and a gain factor for weighting transmission data by a multiplication unit. Therefore, in addition to the same effect as that of the eighth or ninth aspect, it is not necessary to calculate a gain factor for each transmission operation.

  Further, in the case where the first channel data is the data channel data of the transmission data and the second channel data is the data of the control channel of the transmission data, the control at the antenna end is performed. The transmission power of the data component of the channel can be a constant value regardless of the transmission data rate.

  According to the twelfth aspect of the present invention, the effect as described above in the phase modulation method in which the amplitude data of the first channel data and the second channel data weighted by the multiplication means is phase-shift modulated. Can be played.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing an embodiment of a transmission circuit of the present invention.

  In the present embodiment, as shown in FIG. 1, data channel data DPDCH (Dedicated Physical Data Channel) that is first channel data and control channel data DPCCH (Dedicated Physical Control Channel) that is second channel data. Gain factors βc, βd, βsc, βsd, which are values for individually weighting the amplitudes of I (Inphase) and Q (Quadrature) in HPSK modulation as well as generating and outputting various types of transmission data, and terminals A baseband circuit 10 that outputs a TPC (Total Power Control) bit for controlling the transmission power of the data channel, and a data channel data DPDCH output from the baseband circuit 10 is multiplied by a spread code SCd, thereby Multiplier as spreading means for spreading data DPDCH and outputting it as spread data d 0 and a multiplier 22 which is a spreading means for spreading the control channel data DPCCH by spreading the spread code SCc by multiplying the control channel data DPCCH output from the baseband circuit 10 by the spread code SCc; Multiplier 21 that outputs amplitude data Iin by multiplying spread data d output from multiplier 20 by gain factor βsd, and amplitude by multiplying spread data c output from multiplier 22 by gain factor βsc. Multiplier 23 for outputting data Qin and amplitude data Iin and Qin output from multipliers 21 and 23, respectively, are input as IQ channel data, and input amplitude data Iin and Qin are input from baseband circuit 10. Complex I in accordance with a scramble code which is one of the output frequency spread codes of the CDMA system -The HPSK modulation circuit 30 which is a phase modulation means for outputting HPSK modulation data Iout and Qout by mapping on the Q plane, and the high-frequency component of the HPSK modulation data Iout output from the HPSK modulation circuit 30 are removed as a digital signal Id The digital filter 40 to be output, the high-frequency component of the HPSK modulation data Qout output from the HPSK modulation circuit 30 is removed, the digital filter 42 to be output as the digital signal Qd, and the digital signal Id output from the digital filter 40 to the analog signal Ia Output from the digital-analog converter 41 that converts and outputs the digital signal Qd output from the digital filter 42 to the analog signal Qa and outputs from the digital-analog converters 41 and 43, respectively. Anaro Quadrature modulator 50 that quadrature modulates signals Ia and Qa and outputs an HPSK signal of a desired frequency, and an amplification means that amplifies the HPSK signal output from quadrature modulator 50 with a gain based on a control voltage and outputs the amplified signal. The AGC amplifier 6 is composed of a channel filter that removes frequency components other than the desired wave, a frequency conversion circuit, an interstage filter, a driver amplifier, a power amplifier, a duplexer, and the like. The HPSK signal output from the AGC amplifier 6 RF circuit 7 that converts to frequency and amplifies and outputs with a predetermined gain, antenna 8 for radiating the HPSK signal output from RF circuit 7 as a radio wave, and transmission of data DPCCH component of control channel in the terminal CPU 1 for setting power TXLVL, TPC bit output from baseband circuit 10 and C The transmission power value of the data DPCCH component of the control channel in the terminal is determined based on the TXLVL set in the PU 1, and the transmission level circuit 2 that outputs and the gain factors βc and βd output from the baseband circuit 10 Based on the combination, a first gain correction amount βofst1 corresponding to the transmission power of the data DPDCH component of the data channel is determined, and this gain correction amount βofst1 is added to the transmission power value of the control channel data DPCCH output from the transmission level circuit 2. Are added to the spread data d and c based on the combination of the β offset circuit 3a that is the first gain offset circuit that outputs the addition result and the gain factors βsc and βsd output from the baseband circuit 10. By multiplying βsd and βsc, the output power error generated by the quadrature modulator 50 is compensated. Is a second gain offset circuit that determines a second gain correction amount βofst2 to be added, adds the gain correction amount βofst2 to the addition result output from the β offset circuit 3a, and outputs the result as an AGC amplifier control code. A control voltage code for controlling the gain of the AGC amplifier 6 is generated from the AGC amplifier control code output from the offset circuit 3b and the β offset circuit 3b, and is output from the voltage generation circuit 4 and output from the voltage generation circuit 4. And a digital-to-analog converter 5 that converts the control voltage code into a control voltage and outputs the control voltage.

  The spread code SCd multiplied by the data channel data DPDCH by the multiplier 20 and the spread code SCc multiplied by the control channel data DPCCH by the multiplier 22 are one of CDMA frequency spreading codes. These codes are different from each transmission channel in order to maintain the orthogonality of each channel, and are output from the baseband circuit 10.

  Further, in the baseband circuit 10, based on the theoretical values βc and βd of the gain factor, the ratio of the theoretical values βc and βd does not change, and the output power from the quadrature modulator 50 is constant. Gain factors βsc and βsd obtained by processing the levels are calculated, and a table of gain factors βc, βd, βsc, and βsd is provided. The gain factors βc and βsc are set for the control channel, and the gain factors βd and βsd are set for the data channel. The theoretical values βd and βc of the gain factor have values of 0 to 15 depending on the transmission data rate, respectively, and one of the gain factors βd and βc is always “15”. Further, since the control channel data DPCCH is always required, the gain factor βc does not become “0”.

  Further, the TPC bit output from the baseband circuit 10 is transmitted from a base station (not shown) during closed-loop control.

  The amplitude data Iin and Qin output from the multipliers 21 and 23 are the values of “0” and “1” of the spread data d and c output from the multipliers 20 and 22, respectively, and have positive and negative signs. The amplitude value is converted into a binary code in 2's complement format.

  In closed loop control, the transmission level circuit 2 adds the TPC bits output from the baseband circuit 10 to TXLVL set by the CPU 1 and transmits the data DPCCH component of the control channel at the end of the antenna 8 at linear time. Output power value.

  The data transmission operation in the transmission circuit configured as described above will be described below.

  First, in the baseband circuit 10, data channel data DPDCH and control channel data DPCCH are generated and output. Further, the baseband circuit 10 outputs gain factors βc, βd, βsc, βsd that are values for individually weighting the amplitudes of I and Q in HPSK modulation. Here, the gain factors βc and βd each have a value of 0 to 15 determined by the transmission data rate, and one of them is a theoretical value of the gain factor that is always “15”, and the gain The levels of the factors βsc and βsd are set so that the output power of the quadrature modulator 50 is always constant without changing the ratio of the theoretical values βc and βd of the gain factor (βsd: βsc = βd: βc), respectively. The calculation method will be described in detail below.

  The gain factors βsc and βsd can be obtained by the following equations using the theoretical values βc and βd of the gain factors, where βdref and βcref are combinations of power factors in the gain factors.

βsd = βd × √ [(βdref ² + βcref ² ) / (βd ² + βc ² )] βsc = βc × √ [(βdref ² + βcref ² ) / (βd ² + βc ² )] Therefore, βsd ² + βsc ² = βdref ² + βcref ² The left side of the above-described equation corresponds to the square of the absolute value of the vector of transmission data on the complex IQ plane of the HPSK modulation circuit 30, that is, the square of the output power in the quadrature modulator 50. Regardless of the combination of the gain factors βd and βc, the output power of the quadrature modulator 50 can always be kept constant.

  FIG. 2 is a diagram showing an example of a gain factor table set in the baseband circuit 10 shown in FIG.

As shown in FIG. 2, for example, when (βdref, βcref) = (15, 15) and the theoretical values βd and βc of the gain factor are given thereto, the baseband circuit 10 uses the above-described formula. The gain factors βsd and βsc as shown in FIG. 2 are set in the table. The gain factors βsd and βsc are equal to βsd ² + βsc ² without changing the ratio of the theoretical values βc and βd of the gain factors (βsd: βsc = βd: βc) and any combination of the gain factors βsd and βsc. Is normalized to be 450. In this table, the values of βd and βc, and βsd and βsc can be interchanged.

  Further, a TPC bit for determining the transmission power of the terminal is transmitted from the base station in the closed loop, and this TPC bit is output from the baseband circuit 10 and input to the transmission level circuit 2. In general, in the W-CDMA system, when the received power from the terminal is larger than a desired power value at the base station, a request to lower the transmission power at the terminal is sent to the terminal, and the received power from the terminal Is smaller than the desired power value, a request to increase the transmission power in the terminal is sent to the terminal.

  The data channel data DPDCH output from the baseband circuit 10 is input to the multiplier 20, and the multiplier 20 multiplies the data channel data DPDCH by the spread code SCd output from the baseband circuit 10, whereby Data DPDCH of the data channel is spread and output as spread data d.

  The control channel data DPCCH output from the baseband circuit 10 is input to the multiplier 22, and the multiplier 22 multiplies the control channel data DPCCH by the spread code SCc output from the baseband circuit 10. Thus, the control channel data DPCCH is spread and output as spread data c.

  The spread data d output from the multiplier 20 is input to the multiplier 21. The multiplier 21 multiplies the spread data d by the gain factor βsd obtained by the above-described equation, and outputs the result as amplitude data Iin.

  The spread data c output from the multiplier 22 is input to the multiplier 23. In the multiplier 23, the spread data c is multiplied by the gain factor βsc obtained by the above-described equation, and output as amplitude data Qin. .

  The amplitude data Iin and Qin output from the multipliers 21 and 23 are input to the HPSK modulation circuit 30 as IQ channel data, and the HPSK modulation circuit 30 responds to the scramble code output from the baseband circuit 10. The amplitude data Iin and Qin are mapped onto the complex IQ plane, whereby HPSK modulation data Iout and Qout are generated and output.

  FIG. 3 is a diagram for explaining a mapping situation in the HPSK modulation circuit 30 shown in FIG.

For example, when (βsc, βsd) = (15, 15) and the mapping is performed as (Iout, Qout) = (Iin, Qin) by the scramble code output from the baseband circuit 10, the vector The square of length x ² is the output power in the quadrature modulator 50.

  The HPSK modulation data Iout output from the HPSK modulation circuit 30 is input to the digital filter 40, and the high frequency component of the HPSK modulation data Iout is removed by the digital filter 40 and output as a digital signal Id.

  Further, the HPSK modulation data Qout output from the HPSK modulation circuit 30 is input to the digital filter 42, and the high frequency component of the HPSK modulation data Qout is removed by the digital filter 42 and output as a digital signal Qd.

  The digital signal Id output from the digital filter 40 is input to the digital-analog converter 41. In the digital-analog converter 41, the digital signal Id is converted into the analog signal Ia and output.

  The digital signal Qd output from the digital filter 42 is input to the digital-analog converter 43. The digital-analog converter 43 converts the digital signal Qd into the analog signal Qa and outputs the analog signal Qa.

The analog signals Ia and Qa output from the digital-analog converters 41 and 43 are input to the quadrature modulator 50. The quadrature modulator 50 performs quadrature modulation on the analog signals Ia and Qa, thereby obtaining an HPSK signal having a desired frequency. Is generated and output. The value of the power of the HPSK signal output from the quadrature modulator 50 is constant according to the above-described equation βsd ² + βsc ² = βdref ² + βcref ² regardless of any combination of gain factors.

  Further, the CPU 1 sets the power of the data DPCCH component of the control channel to be transmitted by the terminal to the transmission level circuit 2 as the transmission initial power level TXLVL during the open loop control.

  Thereafter, when shifting to closed loop control, a TPC bit for controlling transmission power at the terminal is transmitted from the base station, and this TPC bit is input from the baseband circuit 10 to the transmission level circuit 2.

  In the transmission level circuit 2, when the TPC bit is input, the value of the TPC bit is added to TXLVL and output as the transmission power value of the data DPCCH component of the control channel.

  The transmission power value output from the transmission level circuit 2 is input to the β offset circuit 3a.

In the β offset circuit 3a, the theoretical values βd and βc of the gain factor output from the baseband circuit 10 are input, and the gain correction amount corresponding to the power of the data DPDCH component of the data channel using the gain factors βd and βc. βofst1 is calculated. This gain correction amount βofst1 is obtained by taking the ratio of the total power (βc ² + βd ² ) to the power βc ² of the data DPCCH component of the control channel and converting it to a dB value, and can be expressed by the following equation. Note that βofst1 corresponding to the gain factor can be stored as a table.

βofst1 = 10 log [(βc ² + βd ² ) / βc ² }
The gain correction amount βofst1 calculated using the above equation is added to the transmission power value output from the transmission level circuit 2 and output.

  The processing in the β offset circuit 3a is performed in order to keep the power of the data DPCCH component of the control channel at the end of the antenna 8 constant.

  For example, in the case of (βc, βd) = (15, 15) shown in FIG. 2 and the case of (βc, βd) = (15, 1), they are included in the transmission power at the entire antenna 8 end. Since the ratio of the transmission power of the data DPCCH component of the control channel is different, when the output power in the quadrature modulator 50 is constant as described above, the transmission power of the data DPCCH component of the control channel at the end of the antenna 8 by a combination of gain factors Will be different. Therefore, in the β offset circuit 3a, the power of the data DPDCH component of the data channel is calculated using the theoretical values βd and βc of the gain factor, and the gain correction amount βofst1 corresponding to the power of the data DPDCH component of the data channel is calculated. This is added to the transmission power value output from the transmission level circuit 2, thereby making the power of the data DPCCH component of the control channel at the end of the antenna 8 constant.

  Further, even if the gain factors βsd and βsc multiplied by the spread data d and c by the multipliers 21 and 23 are set values as shown in FIG. 2, the number of bits of the gain factors βsd and βsc is set. If not enough, the value cannot be expressed accurately.

  FIG. 4 is a diagram for explaining the gain factor used in the transmission circuit shown in FIG.

As shown in FIG. 4, when the gain factors βsd and βsc are expressed by 4 bits (referred to as βsd4 and βsc4), the output power βsd4 ² + βsc4 ^{2 of the} quadrature modulator 50 determined by the set values of βsd4 and βsc4 is βd, βc. Different combinations result in different power values.

  Therefore, as shown in the following equation, in the β offset circuit 3b, the output power of the quadrature modulator 50 and the gain factor expressed in 4 bits by the gain factors (βsd4, βsc4) expressed in 4 bits as shown in FIG. A ratio of the output power of the quadrature modulator 50 based on a gain factor (βsdref4, βscref4) serving as a reference is calculated, and a gain correction amount βofst2 obtained by dB conversion is calculated and added to the addition result in the β offset circuit 3a. Are output as AGC amplifier control codes.

βofst2 = −10 log {(βsc4 ² + βsd4 ² ) / (βscref4 ² + βsdref4 ² )}
The AGC amplifier control code output from the β offset circuit 3b is input to the voltage generation circuit 4. In the voltage generation circuit 4, a control voltage code for controlling the gain of the AGC amplifier 6 is determined from the input AGC amplifier control code. Generated and output.

  FIG. 5 is a diagram for explaining the operation of the voltage generation circuit 4 shown in FIG. 1, (a) is a graph showing the characteristics of the AGC amplifier 6 shown in FIG. 1, and (b) is the voltage generation circuit 4. It is a graph which shows the relationship between the input and output of.

  As shown in FIG. 5A, the gain of the AGC amplifier 6 is nonlinear with respect to the input control voltage. Therefore, it is necessary to increase the change in the control voltage required to change the gain in the non-linear part with respect to the linear part.

  On the other hand, the relationship between the AGC amplifier control code output from the β offset circuit 3b and the transmission power value at the end of the antenna 8 needs to be a linear relationship.

  Therefore, as shown in FIG. 5B, in the voltage generation circuit 4, a voltage is generated such that the gain of the AGC amplifier 6 changes linearly with respect to the AGC amplifier control code output from the β offset circuit 3b. ,Output.

  The control voltage code output from the voltage generation circuit 4 is input to the digital / analog converter 5, converted into a control voltage, and supplied to the AGC amplifier 6.

  In the AGC amplifier 6, the HPSK signal output from the quadrature modulator 50 is amplified with a gain controlled based on the control voltage supplied from the digital-analog converter 5 and output.

  Thereafter, the HPSK signal amplified by the AGC amplifier 6 is subjected to high-frequency signal processing by the RF circuit 7 and transmitted via the antenna 8.

  In this embodiment, the gain factors βc and βd are extracted from the table in the baseband circuit 10 and output to the β offset circuit 3a, and the gain factors βsc and βsd are extracted and output to the β offset circuit 3b. However, a table as shown in FIG. 2 may be provided in the β offset circuits 3a and 3b.

  In the present embodiment, the first channel data has been described as the data channel data of the transmission data, and the second channel data has been described as the control channel data of the transmission data. However, the present invention is limited to this combination. It is not a thing.

  In this embodiment, the HPSK modulation circuit 30 that modulates the phase and amplitude of the first channel data and the second channel data is provided, but the digital modulation method is not limited to these modulation methods.

(Other embodiments)
FIG. 6 is a block diagram showing another embodiment of the transmission circuit of the present invention.

  In this embodiment, as shown in FIG. 6, data DPDCH1 and DPDCH2 of a plurality of data channels are input, and the data channel data output from the baseband circuit 11 is different from that shown in FIG. Multiplying DPDCH2 by spread code SCd2 to spread data DPDCH2 of the data channel and outputting it as spread data d2, and multiplying spread data d2 output from multiplier 24 by gain factor βsd A multiplier 25 that outputs the amplitude data Iin2 and a synthesis circuit 26 that synthesizes the amplitude data Iin1 and Iin2 output from the multipliers 21 and 25 and outputs them to the HPSK modulation circuit 30 are newly provided. Is different.

  In the transmission circuit configured as described above, data DPDCH1 and DPDCH2 of the data channel output from the baseband circuit 11 are spread by the spread codes SCd1 and SCd2 in the multipliers 20 and 24, respectively. 25, the gain data is multiplied by the gain factor βsd, and then the two amplitude data are synthesized by the synthesis circuit 26 and input to the HPSK modulation circuit 30. Other operations are the same as those shown in FIG.

  As described above, even when data DPDCH of a plurality of data channels is output from the baseband circuit 11, if the data DPDCH of a plurality of data channels is spread and multiplied by a gain factor, the present invention Can be applied.

  At this time, it is necessary to change the gain correction amount βofst1 in the β offset circuit 3a according to the number of data DPDCH of the data channel.

It is a block diagram which shows one Embodiment of the transmission circuit of this invention. It is a figure which shows an example of the table of the gain factor set in the baseband circuit shown in FIG. It is a figure for demonstrating the mapping condition in the HPSK modulation circuit shown in FIG. It is a figure for demonstrating the gain factor used with the transmission circuit shown in FIG. 2A and 2B are diagrams for explaining the operation of the voltage generation circuit 4 illustrated in FIG. 1, in which FIG. 1A is a graph illustrating characteristics of the AGC amplifier illustrated in FIG. 1, and FIG. It is a graph which shows a relationship. It is a block diagram which shows other embodiment of the transmission circuit of this invention. It is a block diagram which shows one structural example of the transmission circuit using the conventional HPSK modulation system.

Explanation of symbols

1 CPU
2 Transmission level circuit 3a, 3b β offset circuit 4 Voltage generation circuit 5, 41, 43 Digital-analog converter 6 AGC amplifier 7 RF circuit 8 Antenna 10, 11 Baseband circuit 20-25 Multiplier 26 Synthesis circuit 30 HPSK modulation circuit 40 , 42 Digital filter 50 Quadrature modulator

Claims (11)

A baseband circuit for generating and outputting transmission data composed of at least one first channel data and second channel data; spreading means for spreading the transmission data using a different spreading code for each transmission channel; Multiplication means for weighting the amplitudes of the first channel data and the second channel data using two gain factors in a combination determined by the transmission data rate, and the multiplication means weights the amplitude. Digital modulation means for digitally modulating the first channel data and the second channel data, and the first channel data and the second channel data digitally modulated by the digital modulation means. A quadrature modulator that performs quadrature modulation and outputs a transmission signal, and a transmission signal that is output from the quadrature modulator. In at least a to become a transmission circuit and an antenna for radiating a wave,
Amplifying means for amplifying and outputting a transmission signal output from the quadrature modulator with a gain based on a control voltage; a transmission level circuit for determining a transmission power value of the second channel data component;
Using the two gain factors of the combination determined by the transmission data rate, the amplification means is configured so that the transmission power of the second channel data component at the antenna end is constant regardless of the transmission data rate. A first gain offset circuit for adding a first gain correction amount for controlling the gain to the transmission power value determined by the transmission level circuit and outputting the same;
A voltage generation circuit that generates a voltage for controlling the gain of the amplification unit based on the transmission power value output from the first gain offset circuit;
The antenna radiates a transmission signal output from the quadrature modulator and amplified by the amplification means as a radio wave. A baseband circuit for generating and outputting transmission data composed of at least one first channel data and second channel data; spreading means for spreading the transmission data using a different spreading code for each transmission channel; Multiplication means for weighting the amplitudes of the first channel data and the second channel data using two gain factors in a combination determined by a transmission data rate, and the multiplication means weights the amplitude. Digital modulation means for digitally modulating the first channel data and the second channel data, and the first channel data and the second channel data digitally modulated by the digital modulation means. A quadrature modulator that performs quadrature modulation and outputs a transmission signal, and a transmission signal that is output from the quadrature modulator. An antenna for radiating as a wave, and the multiplying means does not change the ratio of the combination of gain factors determined by the transmission data rate and does not change the transmission signal output from the quadrature modulator. In a transmission circuit that weights the amplitudes of the first channel data and the second channel data using a gain factor that makes power constant regardless of the transmission data rate,
Amplifying means for amplifying and outputting the transmission signal output from the quadrature modulator with a gain based on a control voltage;
A transmission level circuit for determining a transmission power value of the second channel data component;
Using the two gain factors of the combination determined by the transmission data rate, the amplification means is configured so that the transmission power of the second channel data component at the antenna end is constant regardless of the transmission data rate. A first gain offset circuit for adding a first gain correction amount for controlling the gain to the transmission power value determined by the transmission level circuit and outputting the same;
A voltage generation circuit that generates a voltage for controlling the gain of the amplification unit based on the transmission power value output from the first gain offset circuit;
The antenna radiates a transmission signal output from the quadrature modulator and amplified by the amplification means as a radio wave. A baseband circuit for generating and outputting transmission data composed of at least one first channel data and second channel data; spreading means for spreading the transmission data using a different spreading code for each transmission channel; Multiplication means for weighting the amplitudes of the first channel data and the second channel data using two gain factors in a combination determined by the transmission data rate, and the multiplication means weights the amplitude. Digital modulation means for digitally modulating the first channel data and the second channel data, and the first channel data and the second channel data digitally modulated by the digital modulation means. A quadrature modulator that performs quadrature modulation and outputs a transmission signal, and a transmission signal that is output from the quadrature modulator. An antenna for radiating as a wave, and the multiplying means does not change the ratio of the combination of gain factors determined by the transmission data rate and does not change the transmission signal output from the quadrature modulator. In a transmission circuit that weights the amplitude of each of the first channel data and the second channel data using a gain factor determined based on power,
Amplifying means for amplifying and outputting a transmission signal output from the quadrature modulator with a gain based on a control voltage;
A transmission level circuit for determining a transmission power value of the second channel data component;
Using the two gain factors of the combination determined by the transmission data rate, the amplification means is configured so that the transmission power of the second channel data component at the antenna end is constant regardless of the transmission data rate. A first gain offset circuit for adding a first gain correction amount for controlling the gain to the transmission power value determined by the transmission level circuit and outputting the same;
A voltage generation circuit that generates a voltage for controlling the gain of the amplification unit based on the transmission power value output from the first gain offset circuit;
The antenna radiates a transmission signal output from the quadrature modulator and amplified by the amplification means as a radio wave. The transmission circuit according to claim 2 or claim 3 ,
The multiplying means does not change the ratio of gain factor combinations determined by the transmission data rate, and the gain factor square for weighting the amplitude of the first channel data and the second The first channel data and the second channel data using a gain factor that makes the sum of the square of the gain factor for weighting the amplitude of the channel data constant regardless of the transmission data rate. A transmission circuit characterized by weighting each of the amplitudes. The transmission circuit according to any one of claims 2 to 4 ,
The baseband circuit has a table storing a gain factor determined by the transmission data rate and a gain factor for weighting the transmission data by the multiplying unit, and is based on the transmission data rate And a gain factor corresponding to the transmission data rate is output to the multiplication means from the table. The transmission circuit according to any one of claims 1 to 5 ,
The first gain offset circuit calculates a transmission power of the first channel data component using two gain factors of a combination determined by the transmission data rate, and the transmission power is calculated as the first gain correction. A transmission circuit characterized by being added to the transmission power value determined by the transmission level circuit as an amount and outputting. The transmission circuit according to any one of claims 1 to 6 ,
Generated in the quadrature modulator by weighting in the multiplying means using gain factors used to weight the amplitudes of the first channel data and the second channel data in the multiplying means, respectively. A second gain offset circuit for adding a second gain correction amount for correcting an error in the output power added to the transmission power value output from the first gain offset circuit,
The transmission circuit, wherein the voltage generation circuit generates a voltage for controlling a gain of the amplification unit based on a transmission power value output from the second gain offset circuit. The transmission circuit according to claim 7 , wherein
The second gain offset circuit is based on one combination of gain factors used for weighting the amplitudes of the first channel data and the second channel data by the multiplication means, In order to weight the output power of the quadrature modulator in the case of using the gain factor of the reference combination and the amplitude of the first channel data and the second channel data by the multiplication unit, respectively. A ratio with the output power of the quadrature modulator when the gain factor used in the above is used is calculated, and the ratio is set to the transmission power value output from the first gain offset circuit as the second gain correction amount. A transmission circuit characterized by adding and outputting. The transmission circuit according to claim 7 or 8 ,
The second offset circuit includes a table in which a gain factor determined by the transmission data rate and a gain factor for weighting the transmission data by the multiplication unit are stored. circuit. The transmission circuit according to any one of claims 1 to 9 ,
The transmission circuit according to claim 1, wherein the first channel data is data of a data channel of the transmission data, and the second channel data is data of a control channel of the transmission data. The transmission circuit according to any one of claims 1 to 10 ,
The digital modulation means is phase modulation means for performing phase shift modulation on amplitude data of the first channel data and the second channel data weighted by the multiplication means. circuit.

Images