JP4483844B2 - Signal transmission method - Google Patents

Description

The present invention relates to a signal transmission method , for example. Specifically, a change in the transmission source identification code is detected, and switching of the transmission signal is detected based on the changed transmission source identification code, so that the reception side identifies the transmission source.

There is SMPTE259M as a serial digital interface (SDI) standard for video signals used in video equipment for business use and broadcasting stations. This standard specifies the handling of 4: 2: 2 component signals or 4f _sc composite digital signals for television receivers with 525 scanning lines / 60 fields and 625 scanning lines / 50 fields. .

FIG. 11 shows a conventional SDI (serial digital interface) format. In FIG. 11, an EAV (end of active video) 131 is provided at the head portion. Subsequent to the EAV 131, an auxiliary signal area 132 is provided. Next to the auxiliary signal area 132, a SAV (start of active video) 133 is provided. Each of the EAV 131 and the SAV 133 is composed of (3FF, 000,000, XYZ) _h words of a hexadecimal signal. The EAV 131, the auxiliary signal area 132, and the SAV 133 are composed of 276 words in the scanning line number 525/60 field method and 288 words in the scanning line number 625/50 field method.

  Following the SAV 133, an effective image signal area 134 is provided. An image signal is transmitted in the effective image signal area 134. Next to the effective image signal area 134, a timing reference signal EAV135 is provided. In the image signal, the luminance signal Y and the color difference signals Cb, Cr digitized into 10 bits are arranged in the order of Cb, Y, Cr, Y. The effective image signal area 134 is composed of 1440 words in both the scanning line number 525 lines / 60 field method and the scanning line number 625 lines / 50 field method. Therefore, the area obtained by adding the effective image signal area 134 to the EAV 131, the auxiliary signal area 132, and the SAV 133 includes 1716 words in the 525 scanning lines / 60 field system, and 1728 words in the 625 scanning lines / 50 field system. Become.

Next to the effective image signal area 134, a timing reference signal EAV135 is added. The EAV 135 is composed of (3FF, 000,000, XYZ) _h words of a hexadecimal signal. The SAV 133 and the EAVs 131 and 135 are inserted in the blanking period in the horizontal direction.

  First, the parallel signal of this SDI format is parallel / serial converted with LSB precedence. Next, channel coding is performed by converting the signal into a scrambled NRZI signal. Then, it is transmitted as a 270 Mbit / sec serial digital video signal.

  In an SDI format signal transmission system, serial digital video signals are transmitted in word synchronization in word units. However, in an SDI format signal transmission system, a plurality of signals may be switched by a signal switching element. This signal switching element switches and outputs the input signal as it is as a serial signal. Before and after the signal switching by the signal switching element, the word synchronization of the signal is discontinuous, and the signal after switching cannot be synchronized, resulting in a transmission error. This error continues until the word synchronization of the signal is restored at the next EAV.

  Therefore, in the SDI format, the signal is switched in the vertical blanking period. This prevents a signal error caused by word discontinuity at the time of signal switching from appearing on the screen of the receiving television receiver.

  Thus, in the conventional SDI format signal transmission system, the signal after switching is not synchronized before and after switching a plurality of signals by the signal switching element, so that the signal after switching cannot be synchronized. In order to avoid a transmission error, there is an inconvenience that the signal must be switched in the vertical blanking period.

The present invention has been made in view of this point, and an object of the present invention is to provide a signal transmission method that detects signal switching on the receiving side and prevents transmission errors due to signal switching.

  In order to solve the above problems, a signal transmission method according to the present invention includes a payload area in which a first digital signal is stored, and a start synchronization code that is arranged before the payload area and indicates the start of the first digital signal. A first timing reference signal storage area to be stored; a second timing reference signal storage area into which an end synchronization code indicating the end of the first digital signal is inserted; a second timing reference signal storage area; An auxiliary signal storage area for storing a second digital signal disposed between the timing reference signal storage area, a line number storage area disposed in a header area provided at the head of the auxiliary signal storage area, and a header A destination address storage area arranged in the area for storing destination identification codes of the first digital signal and the second digital signal; A source address storage area in which the source identification code is stored in the header area, a block type storage area in which the block type of the first digital signal is stored in the header area, and a header area. The same signal as the SDI parallel signal format, which is composed of an error detection code storage area in which an error detection code generated from a line number storage area, a destination address storage area, a source address storage area, and a block type storage area is stored A parallel signal generating step of generating a parallel signal having a format; and a serial transmission step of converting the parallel signal into a serial signal and transmitting the serial signal.

According to the present invention, by looking at only a change in feed Xinyuan identification code, and detects the switching of the transmission signal based on the changed transmission source identification code, it is possible to detect that the source was switched.

  Further, according to the present invention, since the transmission source identification code is provided in the header area of the transmission signal, it is possible to detect the switching of the transmission source identification code only by detecting the header area of the transmission signal. .

Further, according to the present invention is not limited to the construction of specific, only detect the header area of the transmission signal, it is possible to detect the switching of the transmission source identification code.

  FIG. 8 is an SDDI format previously developed by the applicant of the present invention. The SDDI (serial digital data interface) format was originally developed by the applicant of the present invention. Compared to the SDI (serial digital interface) format shown in FIG. 11, not only the digital data in the effective image signal area is transmitted, but SDDI is not only original image information but also compressed and encoded image information and audio. Information or control information is also transmitted.

In FIG. 8, EAV (end of active video) is provided at the head portion. Next to the EAV, an auxiliary signal area is provided. Next to the auxiliary signal area, SAV (start of active video) is provided. SAV and EAV are each composed of (3FF, 000,000, XYZ) _h words of a hexadecimal signal. The EAV, auxiliary signal area, and SAV consist of 276 words in the 525 scanning lines / 60 field system, and 288 words in the 625 scanning lines / 50 field system.

  Following the SAV, a payload area 84 is provided. A compressed image signal is provided in the payload area 84. The image signal is digital data obtained by performing high-efficiency compression coding processing on a video signal. CRCC (cyclic redundancy check code) 0 and CRCC1 are provided at the rear end of the payload area.

  CRCC0 and CRCC1 are as follows. An information frame transmitted through a communication line is added with a surplus term obtained as a result of a certain division and transmitted. A transmission error is checked by matching the surplus term obtained by performing the same calculation on the received signal at the receiving end with the surplus term that has been sent. A generator polynomial is used for this division.

  The payload area 84 and CRCC0, CRCC1, and 86 are both composed of 1440 words in the scanning line number 525/60 field method and the scanning line number 625/50 field method.

  Therefore, the EAV80, auxiliary signal area 81, and SAV82 plus the payload area 84 and CRCC0, CRCC1, 86 are composed of 1716 words in the scanning line number 525/60 field system, and the scanning line number 625 line / 50 field system. It consists of 1728 words.

  Here, in particular, in this example, a header region 83 is provided at the head portion of the auxiliary signal region 81. The header area 83 has a transmission source identification code and consists of 53 words.

Next to the payload area, a timing reference signal EAV85 is added. The EAV85 is composed of (3FF, 000,000, XYZ) _h words of a hexadecimal signal. These SAV82 and EAV80, 85 are inserted in the blanking period in the horizontal direction.

FIG. 9 is a diagram showing an SDDI format header area previously developed by the applicant of the present invention. The first ADF (ancillary data flag) 90 is composed of three words of hexadecimal signals (000, 3FF, 3FF) _h . The ADF 90 is a code indicating the start of the auxiliary signal packet. Data ID 91 indicates the contents of the auxiliary signal. For example, digital audio data, time code, error detection code, and the like.

  The block number 92 detects continuity of data packets. In this example, 8 bits are counted up, and continuity from 0 to 255 can be detected. The data count 93 counts the number of words of user data in the auxiliary signal.

  Line number 0 and line numbers 1 and 94 indicate the number of scanning lines 1 to 525.

  CRCC 0, CRCC 1 and 95 are error detection codes for detecting errors from ADF 90 to data ID 91, block number 92, data count 93 and line number 0 and line numbers 1 and 94.

  The destination address 96 indicates the address of the data destination. The source address 97 indicates the address of the data source. The source address 97 is a transmission source identification code. The source address 97 adds a unique individual code to each device at the time of shipment, for example. In this example, the source address 97 is composed of a data area of 16 words and is constituted by a data number of 128 bits.

  Therefore, at the receiving end, it is possible to know from which device the information is sent by looking at the transmission source identification code. Further, since the transmission source identification code is assigned a unique code to each device, the transmission source identification code also changes when the signal is switched halfway. Therefore, signal switching can be detected by extracting a transmission source identification code at the receiving end and detecting the change.

  A block type 98 indicates the block type of the payload area 84. The CRC flag 99 is a flag indicating whether CRCC0, CRCC1, and 86 provided at the rear end of the payload area 84 are valid. The data start position 100 indicates the starting point of the payload area 84. Reserve 0, reserve 1, reserve 2, reserve 3, 101 are reserved.

  CRCC0, CRCC1, and 102 are error detections that detect errors from the destination address 96 to the source address 97, block type 98, CRC flag 99, data start position 100, reserve 0, reserve 1, reserve 2, reserve 3, 101 It is a sign. The checksum 103 detects a transfer error from the sum of each digit of data from the data ID 91 to CRCC0, CRCC1, and 102.

  FIG. 10 is a block diagram of a video signal output unit in an SDDI format video apparatus previously developed by the applicant of the present invention. In FIG. 10, a signal transmitted from a transmission side (not shown) via a transmission cable is supplied to the BNC connector 110. The received serial signal 116 supplied to the BNC connector 110 is supplied to the serial / parallel conversion circuit 111.

  The serial / parallel conversion circuit 111 equalizes the received serial signal transmitted at 270 [Mbps], regenerates the serial clock, and decodes the channel code by the scrambled NRZI. Further, the serial / parallel conversion circuit 111 detects the timing reference signal (EAV / SAV), reproduces word synchronization, and converts the received serial signal into a 10-bit parallel signal 117.

  One of the 10-bit parallel signals 117 is supplied to the image information decoding circuit 113, the audio information decoding circuit 114, and the control information receiving circuit 115. The image information decoding circuit 113 extracts a compression-coded image signal from the 10-bit parallel signal 117, restores the image signal, and outputs a reproduced image signal 119. The audio information decoding circuit 114 extracts a compressed and encoded audio signal from the 10-bit parallel signal 117, restores the audio signal, and outputs a reproduced audio signal 120. The control information receiving circuit 115 extracts control information from the 10-bit parallel signal 117 and outputs a control signal 130 based on the extracted control information.

  The other of the 10-bit parallel signal 117 is supplied to the header processing circuit 112. The header processing circuit 112 processes the signal in the header area 83 in the SDDI format. The processing of the signal in the header area 83 is output processing of various signals such as a transmission source identification code and a signal switching detection signal 118. The signal in the header area 83 subjected to signal processing by the header processing circuit 112 is supplied to the image information decoding circuit 113, the audio information decoding circuit 114, and the control information receiving circuit 115.

  Here, the signal in the header area 83 subjected to signal processing by the header processing circuit 112 is a transmission source identification code and a signal switching detection signal 118. The transmission source identification code is the source address 97 shown in FIG.

  Examples of the configuration and operation of the header processing circuit shown in FIG. 10 are shown in detail in FIGS. FIG. 1 is a block diagram showing a configuration for detecting signal switching on a line-by-line basis in one embodiment of a transmission source identification apparatus and transmission source identification method according to the present invention. In this example, the transmission source identification code representing the transmission source of the header area 83 added to the transmission signal in the SDDI format is detected on the receiving side in units of lines, and the transmission source is switched when the transmission source identification code changes. Detect that.

In FIG. 1, a 10-bit parallel signal 6 is a signal supplied to the header processing circuit 112 from the serial / parallel conversion circuit 111 shown in FIG. One of the 10-bit parallel signals 6 is supplied to the header detection circuit 1. The header detection circuit 1 detects the hexadecimal signal (000, 3FF, 3FF, 140, 101) _h which is a fixed pattern indicating the start of the header area 83 in the SDDI format, and generates the header detection pulse 7 as the timing generation circuit 2. To supply.

FIG. 3 is a circuit diagram of a header detection circuit according to an embodiment of the transmission source identification device and the transmission source identification method according to the present invention. Inverters 30-1, 30-2, 30-3, 30-4, 30-5, 30-6, 30-7, 30-8, 30-9, 30 are added to the AND circuit 30 of the first 10-bit input. When the binary signal (0000000) ₂ , that is, the hexadecimal signal (000) _h is supplied via -10, the flip-flops 30-11, 30-12, 30-13, 30-14, 30- After passing 15 stages, a detection signal is supplied to the 5-input AND circuit 34.

When the binary signal (1111111111) ₂ , that is, the hexadecimal signal (3FF) _h is supplied to the second-stage 10-bit input AND circuit 31, the flip-flops 31-1, 31-2, and 31-3 are supplied. , 31-4, the detection signal is supplied to the 5-input AND circuit 34 after passing through three and four stages.

A binary signal is supplied to the AND circuit 32 of the third stage 10-bit input through inverters 32-1, 32-2, 32-3, 32-4, 32-5, 32-6, 32-7, 32-8. (0101000000) ₂ , that is, when the hexadecimal signal (140) _h is supplied, the detection signal is supplied to the 5-input AND circuit 34 after passing through two stages of the flip-flops 32-9 and 32-10.

A binary signal is sent to the fourth-stage AND circuit 33 having 10-bit input through inverters 33-1, 33-2, 33-3, 33-4, 33-5, 33-6, 33-7, 33-8. (010000001) ₂ , that is, when the hexadecimal signal (101) _h is supplied, the detection signal is supplied to the 5-input AND circuit 34 after passing through one stage of the flip-flop 33-9.

In this way, the header detection pulse 7 is output from the 5-input AND circuit 34 when the hexadecimal signal (000, 3FF, 3FF, 140, 101) _h which is a fixed pattern indicating the start of the header of the SDDI format is supplied. Is output.

  Returning to FIG. 1, the header detection pulse detected by the header detection circuit is supplied to the timing generation circuit 2. The timing generation circuit 2 is composed of, for example, a counter. The timing generation circuit 2 generates a timing pulse for latching a source identification code latch pulse and various kinds of information in the header of the SDDI format by counting the header detection pulse by the counter.

  The other of the 10-bit parallel signal 6 is supplied to the transmission source identification code extraction circuit 3 and the transmission source identification code latch pulse 8 is supplied to the transmission source identification code extraction circuit 3. The transmission source identification code extraction circuit 3 is constituted by a latch, for example. The transmission source identification code extraction circuit 3 uses the transmission source identification code latch pulse 8 as a clock and latches the data of the 10-bit parallel signal 6 supplied at that time. As a result, the transmission source identification code extraction circuit 3 latches the transmission source identification code 9 of 16 words and 128 bits. The transmission source identification code extraction circuit 3 constitutes transmission source identification code extraction means.

  The latched transmission source identification code 9 is supplied to a device main body (not shown), and is used for discrimination and display of the signal transmission source device. The transmission source identification code 9 is supplied to the previous transmission source identification code holding circuit 4 and also to the transmission source identification code comparison circuit 5. The previous transmission source identification code holding circuit 4 is constituted by a latch, for example. The previous transmission source identification code holding circuit 4 uses the transmission source identification code latch pulse 8 as a clock to latch the previous transmission source identification code 10 one line before the transmission source identification code extraction circuit 3 has latched. The previous transmission source identification code holding circuit 4 constitutes transmission source identification code change detection means.

  The transmission source identification code comparison circuit 5 includes a previous transmission source identification code 10 one line before the transmission source identification code extraction circuit 3 latched, and a transmission source identification code 9 newly latched by the transmission source identification code extraction circuit 3. Compare

  FIG. 4 is a circuit diagram of a transmission source identification code comparison circuit of an embodiment of the transmission source identification device and the transmission source identification method according to the present invention. 4, the 16-word 128-bit transmission source identification code 9 and the previous transmission source identification code 10 are 128 exclusive OR circuits 40-1, 40-2, 40-3,... 40-128, respectively. To be supplied. The outputs of 128 exclusive OR circuits 40-1, 40-2, 40-3,... 40-128 are supplied to a 128-input OR circuit 40.

  As a result, the transmission source identification code comparison circuit 5 determines that the signal has been switched when the transmission source identification code 9 and the previous transmission source identification code 10 do not match, and determines the signal switching detection signal 11. Output. The transmission source identification code comparison circuit 5 constitutes transmission signal switching detection means.

  FIG. 6 is a timing chart showing an operation of detecting a signal switching in line units according to an embodiment of the transmission source identification apparatus and transmission source identification method of the present invention. 6, FIG. 6A is a 10-bit parallel signal, FIG. 6B is a header detection pulse, FIG. 6C is a transmission source identification code latch pulse, FIG. 6D is a transmission source identification code, FIG. 6E is a previous transmission source identification code, and FIG. Each switching detection signal is shown. The operation for detecting signal switching will be described below.

  In FIG. 6A, the 10-bit parallel signal is switched from signal # 1 to signal # 2 at the signal switching portion 61 of the broken line. The hatched portion of the 10-bit parallel signal is a header 60 of the SDDI format. The header 60 is sent for each line. The 10-bit parallel signal is a signal supplied to the header detection circuit 1 and the transmission source identification code extraction circuit 3 as shown in FIG.

  In FIG. 6B, a header detection pulse is obtained by detecting a header 60 in SDDI format. The header detection pulse is a pulse having a predetermined width that rises in line with the head portion of the header 60 in the SDDI format. The header detection pulse is a signal output from the header detection circuit 1 as shown in FIG.

  In FIG. 6C, based on the header detection pulse, a transmission source identification code latch pulse is obtained after a lapse of a predetermined period from the header detection pulse. The transmission source identification code latch pulse is a signal output when the header detection pulse is counted by the timing generation circuit 2 as shown in FIG.

  In FIG. 6D, the transmission source identification code that switches from address # 1 to address # 2 is obtained at the falling edge of the transmission source identification code latch pulse that is detected for the first time after the signal switching at the wavy line signal switching portion 61. Address # 1 and address # 2 are addresses corresponding to the transmission sources of signal # 1 and signal # 2.

  In FIG. 6E, the previous transmission source identification code one line before the transmission source identification code is obtained. The previous transmission source identification code is a signal obtained by latching the transmission source identification code using the transmission source identification code latch pulse as a clock in the previous transmission source identification code holding circuit 4, as shown in FIG.

  In FIG. 6F, a signal switching detection signal is obtained at the falling timing of the transmission source identification code latch pulse detected for the first time after the signal switching at the signal switching portion 61 of the broken line. The signal switching detection signal is a signal having a width of a different period between the transmission source identification code and the previous transmission source identification code. As shown in FIG. 1, the signal switching detection signal is a signal obtained by comparing the transmission source identification code with the previous transmission source identification code in the transmission source identification code comparison circuit 5.

  According to the above example, the transmission source identification code provided in the header of the SDDI format of the received signal is extracted, the transmission source identification code representing the transmission source added to the transmission signal at the time of transmission is extracted, and the transmission source identification By detecting a change in code, detecting that the transmission source identification code representing the transmission source added to the transmission signal at the time of transmission is different, and detecting switching of the transmission signal based on the changed transmission source identification code , It is possible to detect line-by-line that the transmission source has been switched.

  FIG. 2 is a block diagram showing a configuration for detecting signal switching in units of fields in another embodiment of the transmission source identification apparatus and transmission source identification method according to the present invention. In this example, a transmission source identification code indicating the transmission source of the header area added to the transmission signal in the SDDI format is detected on the receiving side in a field unit, and the transmission source is switched when the transmission source identification code changes. To detect.

  As the signal switching position in the SDDI format, line number 6 or line number 319 is defined in advance for the scanning line number 625/50 field method, and line number 10 or line number 273 is defined in the scanning line number 525/60 field method. . Therefore, the source identification codes are compared immediately after this signal switching position.

In this example, the same components as those shown in FIG. 1 are denoted by the same reference numerals, detailed description thereof is omitted, and different portions will be described in detail. In FIG. 2, the 10-bit parallel signal is a signal supplied to the header processing circuit 112 from the serial / parallel conversion circuit 111 shown in FIG. One of the 10-bit parallel signals is supplied to the header detection circuit 1. The header detection circuit 1 detects a hexadecimal signal (000, 3FF, 3FF, 140, 101) _h , which is a fixed pattern indicating the start of an SDDI format header, and supplies a header detection pulse 7 to the timing generation circuit 2 To do.

  The header detection pulse 7 detected by the header detection circuit 1 is supplied to the timing generation circuit 2. The timing generation circuit 2 is composed of, for example, a counter. The timing generation circuit 2 generates a timing pulse for latching various information in the header of the SDDI format such as the line number latch pulse 22 and the transmission source identification code timing pulse 23 when the counter counts the header detection pulse 7.

  The timing generation circuit 2 supplies a line number latch pulse 22 to the line number extraction circuit 20. The 10-bit parallel signal 6 is supplied to the line number extraction circuit 20. The line number extraction circuit 20 latches the 10-bit parallel signal 6 using the line number latch pulse 22 as a clock. As a result, the line number extraction circuit 20 latches the line number signal 24. The line number extraction circuit 20 is configured by a latch, for example.

  The timing generation circuit 2 supplies a transmission source identification code timing pulse 23 to the line mask circuit 21. The line number extraction circuit 20 supplies the line number signal 24 to the line mask circuit 21.

FIG. 5 is a circuit diagram of a line mask circuit of an embodiment of the transmission source identification device and transmission source identification method according to the present invention. The binary signal (0100010011) ₂ , that is, 10 through the inverter 50-1, 50-2, 50-3, 50-4, 50-5, 50-6 to the AND circuit 50 of the first 10-bit input. When the decimal signal (275) ₁₀ is supplied, a detection signal is supplied to the OR circuit 52.

The binary signal is sent to the AND circuit 50 of the second stage 10-bit input through inverters 50-1, 50-2, 50-3, 50-4, 50-5, 50-6, 50-7, 50-8. (00000001100) ₂ , that is, when the decimal signal (012) ₁₀ is supplied, a detection signal is supplied to the OR circuit 52. The OR circuit 52 outputs a detection signal to the AND circuit 53 when any of the detection signals is supplied. The AND circuit 53 outputs the transmission source identification code latch pulse 25 when the detection signal from the OR circuit 52 and the transmission source identification code timing pulse 23 are supplied together.

  By doing so, the line mask circuit 21 can transmit the source identification code timing pulse 23 only when the line number is the next line after the predetermined signal switching position, that is, the line number 12 or the line number 275. And is output as a transmission source identification code latch pulse 25.

  The transmission source identification code latch pulse 25 is supplied to the transmission source identification code extraction circuit 3 and the previous transmission source identification code holding circuit 4. The other of the 10-bit parallel signal 6 is supplied to the transmission source identification code extraction circuit 3 and the transmission source identification code latch pulse 25 is supplied to the transmission source identification code extraction circuit 3. The transmission source identification code extraction circuit 3 is constituted by a latch, for example. The transmission source identification code extraction circuit 3 uses the transmission source identification code latch pulse 25 as a clock and latches the data of the 10-bit parallel signal 6 supplied at that time. As a result, the transmission source identification code extraction circuit 3 latches the transmission source identification code 9 of 16 words and 128 bits.

  The latched transmission source identification code 9 is supplied to a device main body (not shown), and is used for discrimination and display of the signal transmission source device. The transmission source identification code 9 is supplied to the previous transmission source identification code holding circuit 4 and also to the transmission source identification code comparison circuit 5. The previous transmission source identification code holding circuit 4 is constituted by a latch, for example. The previous transmission source identification code holding circuit 4 uses the transmission source identification code latch pulse 25 as a clock to latch the previous transmission source identification code 10 one field before the transmission source identification code extraction circuit 3 has latched.

  The transmission source identification code comparison circuit 5 compares the previous transmission source identification code 10 held by the previous transmission source identification code holding circuit 4 with the transmission source identification code 9 newly latched by the transmission source identification code extraction circuit 3. . As a result, the transmission source identification code comparison circuit 5 determines that the signal has been switched when the transmission source identification code 9 and the previous transmission source identification code 10 do not match, and determines the signal switching detection signal 11. Output.

  FIG. 7 is a timing chart showing an operation of detecting signal switching in units of fields in another embodiment of the transmission source identification apparatus and transmission source identification method according to the present invention. 7A is a 10-bit parallel signal, FIG. 7B is a header detection pulse, FIG. 7C is a line number latch pulse, FIG. 7D is a transmission source identification code timing pulse, FIG. 7E is a line number signal, and FIG. 7F is a transmission source identification. The code latch pulse, FIG. 7G shows the transmission source identification code, FIG. 7H shows the previous transmission source identification code, and FIG. 7I shows the signal switching detection signal. The operation for detecting signal switching will be described below.

  In FIG. 7A, the 10-bit parallel signal is switched from signal # 1 to signal # 2 at the wavy line signal switching portion 71. The shaded portion of the 10-bit parallel signal is an SDDI format header. The header is sent for each line. The 10-bit parallel signal is a signal supplied to the header detection circuit 1, the line number extraction circuit 20, and the transmission source identification code extraction circuit 3, as shown in FIG.

  In FIG. 7B, a header detection pulse is obtained by detecting a header in SDDI format. The header detection pulse is a pulse having a predetermined width that rises in agreement with the head portion of the header in the SDDI format. The header detection pulse is a signal output from the header detection circuit 1 as shown in FIG.

  In FIG. 7C, a line number latch pulse is obtained after a predetermined period of time has elapsed from the header detection pulse based on the header detection pulse. As shown in FIG. 2, the line number latch pulse is a signal output when the header detection pulse is counted by the timing generation circuit 2.

  In FIG. 7D, based on the header detection pulse, a transmission source identification code timing pulse is obtained after a lapse of a predetermined period from the header detection pulse. The transmission source identification code timing pulse is a signal output by counting the header detection pulse by the timing generation circuit 2 as shown in FIG.

  In FIG. 7E, a line number signal is obtained which is equivalent to one line from the fall of the line number latch pulse to the fall of the next line number latch pulse. As shown in FIG. 2, the line number signal is a signal obtained by the line number extraction circuit 20 latching a 10-bit parallel signal using the line number latch pulse as a clock.

  In FIG. 7F, only when the line number is the next line after the specified signal switching positions 71 and 72, that is, the line number 275 or the line number 12, the gate is opened and the transmission source identification code timing pulse is passed. Thus, a transmission source identification code latch pulse is obtained. The transmission source identification code latch pulse is a signal obtained by passing the transmission source identification code timing pulse only when the line number signal is the line number 12 or the line number 275 by the line mask circuit 21 as shown in FIG. It is.

  In FIG. 7G, a transmission source identification code that switches from address # 1 to address # 2 is obtained at the falling edge of the transmission source identification code latch pulse detected for the first time after the signal switching of the signal switching portion 71. Address # 1 and address # 2 are addresses corresponding to the transmission sources of signal # 1 and signal # 2.

  In FIG. 7H, the previous transmission source identification code one field before the transmission source identification code is obtained. The previous transmission source identification code is obtained by latching the transmission source identification code using the transmission source identification code latch pulse as a clock in the previous transmission source identification code holding circuit 4, as shown in FIG. Signal.

  In FIG. 7I, a signal switching detection signal is obtained at the falling timing of the transmission source identification code latch pulse detected for the first time after signal switching. The signal switching detection signal is a signal having a width of a different period between the transmission source identification code and the previous transmission source identification code. The signal switching detection signal is a signal obtained by comparing the transmission source identification code 9 and the previous transmission source identification code 10 in the transmission source identification code comparison circuit 5 as shown in FIG.

  According to the above example, the transmission source identification code provided in the header of the SDDI format of the received signal is extracted, the transmission source identification code representing the transmission source added to the transmission signal at the time of transmission is extracted, and the transmission source identification By detecting a change in code, detecting that the transmission source identification code representing the transmission source added to the transmission signal at the time of transmission is different, and detecting switching of the transmission signal based on the changed transmission source identification code , It is possible to detect that the transmission source has been switched in field units.

  In the above example, since the transmission source identification code 9 is provided in the header area 83 of the SDDI format of the transmission signal, the transmission source identification code 9 can be switched only by detecting the header area 83 of the SDDI format of the transmission signal. Can be detected.

  In the above example, the transmission source identification code extraction circuit 3, the previous transmission source identification code holding circuit 4, and the transmission source identification code comparison circuit 5 include an image information decoding circuit 113, an audio information decoding circuit 114, and a decoding process for receiving signals. Since it is provided in the preceding stage of the control information decoding circuit 115, the image is detected based on the signal switching detection signal 11 in the transmission source identification code extraction circuit 3, the previous transmission source identification code holding circuit 4 and the transmission source identification code comparison circuit 5. In the information decoding circuit 113, the audio information decoding circuit 114, and the control information decoding circuit 115, various controls can be performed on the image information, the audio information, and the control information.

  In the above example, the transmission source identification code change detection means holds the previous transmission source identification code 10 one frame or one field before the transmission source identification code 9 extracted by the transmission source identification code extraction circuit 3. The transmission source identification code holding circuit 4, the transmission signal switching detection means includes the transmission source identification code 9 extracted by the transmission source identification code extraction circuit 3 and the previous transmission source held by the previous transmission source identification code holding circuit 4. The transmission source identification code comparison circuit 5 is configured to compare the identification code 10. According to this, it is possible to detect the switching of the transmission signal by holding the previous transmission source identification code 10 and comparing the transmission source identification code 9 and the previous transmission source identification code 10.

  In the above example, the transmission source identification code 9 is added to the transmission signal at the transmission end of the transmission path, the transmission source identification code 9 is extracted at the reception end of the transmission path, and the transmission source identification code extracted at the reception end. 9 detects a change in transmission signal based on the transmission source identification method that detects a change in transmission number 9 and detects switching of a transmission signal based on the changed transmission source identification code 9. Can do.

  In compression encoding of image information, compression is often performed using the correlation between the preceding and succeeding fields or frames. At this time, the image information is encoded across a plurality of fields. If the image information is switched halfway, the reproduced image is destroyed in the subsequent fields. Therefore, in compression encoding of images, in order to initialize the image reproduction circuit, compression encoding may be completed with a certain period, for example, two frames. In this way, even when the compressed code data is destroyed at the time of circuit activation or for some reason, a normal reproduced image can be obtained again after the code completion period.

  Further, when the image information decoding circuit 113 detects signal switching while receiving the compressed and decoded image information, the reproduced image after the switching detection field is discarded, and the reproduced image of the field immediately before the switching is output. It may be continued. By doing so, it is possible to prevent the output of the destroyed reproduced image and output a freeze image. Then, by outputting a normal reproduction image from the next code completion cycle, it is possible to prevent the reproduction image from being broken due to signal switching.

  In compression coding of audio information, compression is often performed using correlation between previous and subsequent samples. At this time, the audio information is encoded over a plurality of fields. If this audio information is switched halfway, the reproduced audio will be destroyed in the subsequent samples. In the audio compression encoding, the compression code may be completed in a certain cycle, for example, two frames in order to initialize the audio reproduction circuit. In this way, even when the compressed code data is destroyed at the time of circuit activation or for some reason, it is possible to obtain normal reproduced sound after the code completion period.

  In addition, in the audio information decoding circuit 114, when signal switching is detected during reception of compression-encoded audio information, reproduced audio after the switching detection sample may be muted. By doing so, the output of the destroyed reproduced sound is prevented. Then, after the next code completion period, normal reproduced sound is output, so that the failure of the reproduced sound due to signal switching can be prevented.

  In addition, if the data of the control signal is switched halfway, the received control signal becomes incorrect. If the erroneous control signal is used as it is, the system will malfunction. Therefore, when signal switching is detected while receiving control information, the reception control information may be discarded and the previous state may be maintained. By doing so, it is possible to prevent the system from malfunctioning.

  In the above example, the SDDI format system in the synchronization of the scanning line number 525 lines / 60 fields method has been described. However, the SDDI format system in the other synchronization methods such as the scanning lines number of 625 lines / 50 fields method similarly applies. Can be applied.

  In the above example, data transmission using a coaxial cable has been described. However, the present invention can be similarly applied to other transmission systems such as an optical fiber and wireless communication.

  As described above, the transmission source identification code is already defined as a format in the header of the SDDI format. A transmission source identification code addition circuit on the transmission side (not shown) or a transmission source identification code extraction circuit 3 on the reception side are both provided in the transmission / reception system of the SDDI format that has been previously developed by the applicant of the present invention. . Therefore, it is possible to detect signal switching with high reliability by adding a simple comparison circuit on the reception side without adding new information on the transmission side, and without adding a new circuit on the transmission side. Can do.

  Further, when the transmission signal is image information, the image may be frozen based on the signal switching detection signal. By doing so, it is possible to prevent the reproduction image from being broken due to signal switching.

  If the transmission signal is an audio signal, the audio may be muted based on the signal switching detection signal. By doing so, it is possible to prevent the reproduction sound from being broken due to signal switching.

  When the transmission signal is control information, the reception control information may be discarded based on the signal switching detection signal and the previous state may be maintained. By doing so, it is possible to prevent system malfunction due to signal switching.

It is a block diagram which shows the structure which detects signal switching per line of one Example of the transmission source identification apparatus and transmission source identification method of this invention. It is a block diagram which shows the structure which detects signal switching per field of the other Example of the transmission source identification apparatus of this invention, and a transmission source identification method. It is a circuit diagram of the header detection circuit of one Example of the transmission source identification apparatus and transmission source identification method of this invention. It is a circuit diagram of the transmission source identification code comparison circuit of one Example of the transmission source identification apparatus and transmission source identification method of this invention. It is a circuit diagram of the line mask circuit of one Example of the transmission source identification apparatus and transmission source identification method of this invention. It is a timing chart which shows the operation | movement which detects signal switching per line of one Example of the transmission source identification apparatus and transmission source identification method of this invention. It is a timing chart which shows the operation | movement which detects signal switching per field of the other Example of the transmission source identification apparatus and transmission source identification method of this invention. It is a figure which shows the SDDI format which the applicant of this invention developed previously. It is a figure which shows the header area | region of the SDDI format which the applicant of this invention developed previously. It is a block diagram of the video signal output part in the video equipment of the SDDI format which the applicant of this invention developed previously. It is a figure which shows the conventional SDI format.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Header detection circuit, 2 ... Timing generation circuit, 3 ... Transmission source identification code extraction circuit, 4 ... Previous transmission source identification code holding circuit, 5 ... Transmission source identification code comparison circuit, 6 ... 10-bit parallel signal, 7 ... Header Detection pulse, 8 ... transmission source identification code latch pulse, 9 ... transmission source identification code, 10 ... previous transmission source identification code, 11 ... signal switching detection signal, 20 ... line number extraction circuit, 21 ... line mask circuit, 22 ... line Number latch pulse, 23 ... Transmission source identification code timing pulse, 24 ... Line number signal, 25 ... Transmission source identification code latch pulse, 83 ... Header area, 97 ... Source address, 112 ... Header processing circuit, 113 ... Image information decoding circuit , 114 ... voice information decoding circuit, 115 ... control information receiving circuit

Claims (4)

  A payload area in which a first digital signal is stored; a first timing reference signal storage area that is arranged before the payload area and stores a start synchronization code indicating the start of the first digital signal; and Arranged between a second timing reference signal storage area into which an end synchronization code indicating the end of the first digital signal is inserted, and between the second timing reference signal storage area and the first timing reference signal storage area An auxiliary signal storage area in which the second digital signal is stored, a line number storage area arranged in a header area provided at the head of the auxiliary signal storage area, and the first digital signal arranged in the header area A destination address storage area for storing a destination identification code of the digital signal and the second digital signal, and the header A source address storage area in which a transmission source identification code is stored, a block type storage area in which the block type of the first digital signal is stored in the header area, and a header area An SDI parallel comprising an error detection code storage area in which an error detection code generated from the line number storage area, the destination address storage area, the source address storage area, and the block type storage area is stored A parallel signal generation step for generating a parallel signal having the same signal format as the signal format;
  A serial transmission step of converting the parallel signal into a serial signal and transmitting the serial signal;
A signal transmission method comprising:   The signal transmission method according to claim 1, wherein the error detection code is a CRC code.   The signal transmission method according to claim 1, wherein the digital signal stored in the payload area is a signal including a compressed video signal.   The signal transmission method according to claim 1, wherein the SDI parallel signal format conforms to the definition of SMPTE-259M.

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