JP4481266B2 - Reception circuit and transmission system - Google Patents

Description

  The present invention relates to a digital transmission system that transmits a digital data signal, equalizes and reproduces the waveform of the received data signal, and outputs it.

  With the recent increase in the speed of digital transmission systems, signal quality degradation in the transmission line cannot be ignored. In wireless transmission systems, waveform degradation due to fading becomes a problem, in optical transmission systems wavelength dispersion (GVD) and polarization mode dispersion (PMD), and in systems using multimode fiber, waveform degradation due to mode dispersion is a major issue. is there. In particular, since fading and PMD states change with time, static waveform compensation cannot be used, and adaptive equalization technology that optimizes equalization conditions following changes in the state of the transmission line is applied. is necessary.

  Conventionally, an adaptive waveform equalization technique using an electric circuit has been applied as one of small and low-cost solutions. As a typical equalization circuit, an adaptive equalization circuit in which a transversal equalization circuit and a decision feedback equalization circuit are connected in series is widely applied to communication systems (see Non-Patent Document 1). The circuit configuration is shown in FIG.

  The transversal equalization circuit 20 creates a plurality of replicas of the input signal, gives different delays to the replicas, and further superimposes and outputs the signals by weighting each replica. By changing the weight setting of each replica, the transfer function of the equalization circuit can be changed, and various waveform equalization can be realized. An example of the operation of the transversal equalizer 20 is shown in the upper diagram of FIG. From the left side of the upper diagram of FIG. 2, a transmission waveform, a reception waveform with degraded waveform, each replica waveform before superposition, and an equalization waveform after superposition are shown. By shifting the reception waveform on the time axis and performing weighting addition or subtraction, the intersymbol interference portion can be suppressed and shaped into a waveform close to the transmission waveform.

  Also, the decision feedback equalization circuit 30 delays the signal (determination value) identified and reproduced by the identification circuit 31 by 1 bit, weights the input waveform, and subtracts it, so that the code for the bit later in time is encoded. Interference components can be suppressed.

  An operation example is shown in the lower diagram of FIG. If a transversal equalization circuit is used instead of a 1-bit delay in feedback of the determination value to the input signal, a further improvement effect can be obtained. By subtracting the input signal and output signal of the discriminating / reproducing circuit, it is possible to detect the difference (waveform deterioration information) from the transmission waveform of the input signal, and the control circuit can detect the waveform deterioration based on this waveform deterioration information. The weighting coefficient of the equalization circuit is optimized so as to be minimized. Suppression of waveform degradation is realized by controlling so that the weighting coefficient of the adaptive equalization circuit is sequentially optimized against transmission quality degradation factors such as PMD that fluctuate over time.

  FIG. 3 schematically shows a penalty improvement characteristic with respect to PMD of the adaptive equalization circuit. The horizontal axis is a parameter representing the size of PMD in terms of group delay time difference (DGD). The vertical axis is a penalty. By applying the adaptive equalization circuit, the penalty due to PMD can be suppressed, and the size of PMD that can be tolerated in system design with a certain allowable margin can be increased.

M.M. Nakamura, H .; Nosaka, M .; Ida, K .; Kurishima, and M.K. Tokyo, paper TuG4, OFC 2004, “Electrical PMD equalizer ICs for a 40-Gbit / s transmission”, NTT Photonics Laboratories, NTT Corporation H. Bullow, et al. , Paper WE4, ECOC 1998, “Measurement of the Maximum Speed of PMD Fluctuation in Installed Field Fiber”

  It is known that fading in a wireless transmission system and polarization mode dispersion (PMD) in an optical transmission system, which cause waveform deterioration in a transmission path, vary with time. In particular, PMD varies in the order of ms with vibrations of optical fibers (see Non-Patent Document 2).

  The conventional adaptive equalization circuit sequentially optimizes a plurality of weighting coefficients in accordance with the transmission path conditions, so that it cannot follow high-speed fluctuations of less than ms and cannot maintain the waveform equalization conditions. It was.

  The present invention realizes a digital transmission system that performs waveform equalization capable of responding even to a transmission line in which the state of a waveform deterioration factor fluctuates at high speed, suppresses transmission quality deterioration, and enables stable communication. With the goal.

  The present invention is a receiving circuit that receives a digital data signal, and is characterized in that a plurality of waveform equalizing circuits having different waveform equalization conditions and a received signal are distributed to the waveform equalizing circuit. A distribution circuit; a selection circuit for selecting one of the output data signals of the waveform equalization circuit; an identification circuit for identifying and reproducing the data signal selected by the selection circuit; and an output from the waveform equalization circuit And a control circuit for controlling the selection circuit so as to select a signal having the least signal degradation among the data signals.

  In this way, the present invention does not optimize the conditions of each waveform equalization circuit, but selects the optimum signal in the subsequent stage from the output signals of a plurality of waveform equalization circuits with different equalization conditions. Thus, a high-speed response can be realized.

  Alternatively, instead of the identification circuit, a plurality of identification circuits for identifying and reproducing the output signal of the waveform equalization circuit and inputting the output signal to the selection circuit may be provided.

  According to this, the selection circuit only needs to select the signal after the identification reproduction, and the equalization band request to the selection circuit can be relaxed.

  For example, the waveform equalization circuit includes means for inputting waveform deterioration information of a waveform-equalized data signal to the control circuit, and the control circuit is based on the waveform deterioration information input from the waveform equalization circuit. The selection circuit is controlled so as to select the data signal having the smallest waveform deterioration.

  Alternatively, the control circuit includes a plurality of frame processing circuits that perform frame processing on the output data signal of the identification circuit and input to the selection circuit, and the control circuit includes error rate information or error of the data signal input from the frame processing circuit Based on the correction information, the selection circuit can also be controlled to select the data signal with the least signal quality degradation.

  As the frame processing, a frame of Synchronous Digital Hierarchy (SDH), Optical Transport Network (OTN), Ethernet (registered trademark), or the like can be applied. For error rate detection, BIP error detection in SDH or OTN frames may be used, or CRC error detection in Ethernet frames may be used. An error correction (FEC) function of OTN can be used for detecting the number of error corrections.

  A plurality of distribution circuits for distributing the output data signal of the identification circuit, one of which is input to the selection circuit and the other of which is input to the control circuit, wherein the control circuit includes a plurality of the identification circuits; The selection circuit can be controlled so as to select a data signal from a set having the largest number of matched data signals among the set of identification circuits in which a plurality of data signals that are respectively identified and reproduced match each other.

  According to this, the most probable signal can be estimated by performing majority decision on the output signals of a plurality of waveform equalization circuits having different equalization conditions.

  Alternatively, the output data signal of the identification circuit is distributed, one of which is input to the selection circuit and the other of the control circuit is input to a plurality of distribution circuits, and the selection circuit is logically “0” or “1”. A fixed signal generation circuit that inputs a fixed signal of the identification circuit, wherein the identification circuit has a threshold value set higher (or lower) than an optimum value in the operation of one identification circuit, and the control circuit When the identification results of the identification circuits all coincide with each other, the output data signal of the identification circuit is selected, and when the identification results of the plurality of identification circuits partially or completely do not coincide with each other, the logic “0” (or The selection circuit can be controlled to select a fixed signal of “1”).

  As described above, when the discrimination threshold value of the discrimination circuit is set high, the probability that the logic “1” of the data signal is mistaken as “0” becomes high, and the probability that the logic “0” is mistaken as “1” becomes very low and can be ignored. It becomes like this. Therefore, when there is a discrepancy in the identification results among a plurality of identification circuits set with a high identification threshold, the probability that the logic of the data signal is “0” increases, so a fixed signal with a logic “0” is selected. Output. On the other hand, when the identification threshold is set low, the logic is reversed and the same operation is performed. In this way, the most probable data signal can be output to suppress signal quality degradation.

  Further, among the plurality of identification circuits, K identification circuit groups having different identification threshold values, each including N identification circuits having the same identification threshold value, and the output data signal of the waveform equalization circuit And K distribution circuits that are distributed to K pieces and input to one identification circuit of the identification circuit group, and the control circuit includes an identification circuit that does not cause a discrepancy in the identification result in the identification circuit group The selection circuit can be controlled to select an output data signal of the group identification circuit.

  According to this, it is possible to select the optimum identification threshold value by selecting the output data of the group in which the identification result does not match in the identification circuit group having the same identification threshold value.

  Further, it is desirable to perform the data signal selection operation of the selection circuit for each bit or each code. The selection operation for each bit or each code can be realized by performing majority decision of the identification results in the plurality of identification circuits for each bit or each code unit instead of the average parameter for a certain period.

  As the waveform equalization circuit, for example, only a transversal type equalization circuit, only a decision feedback type equalization circuit, or a transversal type equalization circuit and a decision feedback type equalization circuit are used.

  Further, the present invention can be viewed from the viewpoint of a receiving device. That is, the present invention is a receiving device (referred to as a first receiving device) provided with the receiving circuit of the present invention. Or it is a receiver (it is set as a 2nd receiver) provided with the receiver circuit of this invention, and the photoelectric conversion circuit which converts a received optical signal into an electrical signal, and inputs it into the said distribution circuit. Or it is a receiver (it is set as the 3rd receiver) provided with the receiver circuit of this invention, and the radio signal receiving means which receives a radio signal and inputs it into the said distribution circuit.

  In a digital transmission system to which the first receiving device is applied, a digital data signal is transmitted as an electrical signal. In the digital transmission system to which the second receiver is applied, the digital data signal is transmitted as an optical signal, and the received signal light is converted into an electrical signal and processed. The second receiving device includes a photoelectric conversion circuit that converts the received optical signal into an electrical signal and inputs the electrical signal to the distribution circuit. In the digital transmission system to which the third receiving device is applied, the digital data signal is transmitted as a radio signal and the received radio signal is processed. Therefore, the transmitting device transmits the digital data signal as a radio signal. The third receiving device includes a radio signal receiving unit that receives a radio signal and inputs the radio signal to the distribution circuit.

  The present invention can also be viewed from the viewpoint of a digital transmission system. That is, the present invention is a digital transmission system including a transmission device that transmits a digital data signal, a transmission path that transmits the digital data signal, and a first reception device. Alternatively, the present invention is a digital transmission system including a transmission device that transmits an optical signal modulated by a digital data signal, a transmission path that transmits the optical signal, and a second reception device. Alternatively, the present invention is a digital transmission system including a transmission device that transmits a digital data signal as a radio signal and a third reception device.

  In the digital transmission system for transmitting an optical signal according to the present invention, the transmission device may include a polarization scramble circuit that performs polarization scrambling on the output signal light and outputs the result.

  In this way, by performing polarization scrambling of the transmission signal light, the time during which the transmission polarization stays in the worst incident polarization condition for signal quality degradation due to PMD is shortened, and the average of the incident polarization condition is realized. The worst penalty that can be expected in the design can be reduced. However, the waveform deterioration changes at a high speed due to the polarization scrambling, and it is difficult to follow the conventional adaptive equalization circuit. The waveform equalization function of the present invention can follow high-speed fluctuations in waveform deterioration, and can be used in combination with polarization scrambling.

  In the digital transmission system for transmitting an optical signal according to the present invention, a plurality of polarization scrambling circuits for performing polarization scrambling on the signal light transmitted through the transmission line and outputting the light are distributed in the transmission line. be able to.

  In this way, by performing polarization scrambling at a plurality of locations in the transmission line, the connection state of each segment of the transmission line changes, the PMD state of the entire transmission line can be changed at high speed, and the DGD value is large. Can not be continued for a long time. Similar to the transmission polarization scrambling, the DGD value can be averaged, and the worst penalty to be expected in the system design can be reduced. The waveform equalization function of the present invention can follow high-speed fluctuations in waveform deterioration, and can be used in combination with polarization scrambling.

  Also, in the digital transmission system for transmitting an optical signal according to the present invention, the transmission device includes error correction means, and the polarization scrambling circuit sets a polarization scrambling period shorter than an error correction subframe period of the transmission device. can do.

  In this way, by making the polarization scrambling period shorter than the subframe period, which is the error correction processing unit, the worst case of the polarization state can be distributed to each subframe, and the error correction correction capability is degraded. Can be prevented. The waveform degradation function of the present invention can follow the extremely high-speed polarization scrambling, and can be used in combination with the polarization scrambling.

  According to the present invention, it is possible to perform waveform equalization capable of responding to a transmission path in which the state of the waveform deterioration factor fluctuates at high speed, suppress transmission quality deterioration, and perform stable communication.

(First embodiment)
A first embodiment of the present invention will be described with reference to FIG. FIG. 4 is a block diagram of the first embodiment. Here, a receiver configuration in a digital transmission system (hereinafter referred to as an optical transmission system) for transmitting an optical signal is shown. The received signal light is converted into an electric signal by the photoelectric conversion circuit 1 and input to N (N ≧ 2) waveform equalization circuits 3-1 to 3 -N having different waveform equalization conditions by the distribution circuit 2. Each of the waveform equalization circuits 3-1 to 3 -N performs waveform equalization of the electric signal and outputs it, and notifies the control circuit 4 of waveform deterioration information after waveform equalization.

  The N waveform equalized electrical signals are input to the selection circuit 5, and the control circuit 4 controls the selection circuit 5 to select and output the signal with the least waveform deterioration among the data signals. The discriminating circuit 6 discriminates and reproduces the electric signal thus selected and outputs it. One of N parallel paths for waveform equalization may be configured without a waveform equalization circuit. The equalization condition of each waveform equalization circuit 3-1 to 3-N is fixed at a set value, and optimization is not performed during operation.

  FIG. 5 shows penalty improvement characteristics by DGD in the case of three parallels in the first embodiment. The horizontal axis is a parameter representing the size of PMD in terms of group delay time difference (DGD). The vertical axis is a penalty. Since the equalization condition is fixed, in the waveform equalization circuit 3-i (i is any one of 1 to 3) optimized for a condition in which the waveform degradation is large (DGD is large), the waveform degradation is small (DGD is small). Signal quality degradation occurs. By selecting the signal with the smallest waveform degradation from the output signals of the plurality of waveform equalization circuits 3-1 to 3-3, the signal quality can be suppressed in a wide range of the waveform degradation and the allowable DGD can be expanded. it can. Since the waveform equalization conditions are not optimized during operation and are switched by the selection circuit 5 at the subsequent stage, it is possible to respond to high-speed fluctuations in the transmission path state.

  Although an operation example for DGD has been shown, the equalizer circuit can equalize waveform deterioration due to other factors, so each equalizer circuit has factors such as the incident power ratio to the PMD main axis, wavelength dispersion, and polarization-dependent loss. May be optimized for operation.

(Second embodiment)
The configuration of the second embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram of the second embodiment. Here, the configuration of the receiving device in the optical transmission system is shown, and N waveform equalization circuits 3-1 to 3-N are selected instead of the identification circuit 6 at the subsequent stage of the selection circuit 5 in the first embodiment. In this configuration, N identification circuits 6-1 to 6-N are arranged between the circuit 5 and the circuit 5. Since the signal selection is performed after the identification reproduction, the operation band request required for the selection circuit 5 can be relaxed.

(Third embodiment)
The configuration of the third embodiment of the present invention will be described with reference to FIG. FIG. 7 is a block diagram of the third embodiment. Here, a configuration of a receiving device in the optical transmission system is shown, and N framer circuits 7-1 to 7-1 are arranged between the N identification circuits 6-1 to 6-N and the selection circuit 5 in the second embodiment. 7-N is arranged.

  Further, the error rate information detected by the framer circuits 7-1 to 7-N is input to the control circuit 4 instead of the waveform deterioration information from the waveform equalization circuits 3-1 to 3-N. The When the framer circuits 7-1 to 7-N have an error correction function, error correction information may be used instead of the error rate information. The selection circuit 5 selects the output signal from the framer circuit 7-j (j is any one of 1 to N) with the smallest error rate detected by the framer circuits 7-1 to 7-N, thereby the signal quality. Suppress deterioration.

(Fourth embodiment)
The configuration of the fourth embodiment of the present invention will be described with reference to FIG. FIG. 8 is a block diagram of the fourth embodiment. Here, the configuration of the receiving apparatus in the optical transmission system is shown, and N distributions are provided between N (N ≧ 3) identification circuits 6-1 to 6-N and the selection circuit 5 in the second embodiment. In this configuration, the circuits 8-1 to 8-N are arranged. In addition to the waveform deterioration information input from the waveform equalization circuits 3-1 to 3-N, the control circuit 4 receives data signals distributed by the N distribution circuits 8-1 to 8-N. Is done. Among the N data signals that have been identified and reproduced, the data signals are classified into groups having the same identification result, and the data signals in the group having the largest number of matching data signals are selected by the selection circuit 5 and output.

  The most probable data signal is estimated and output by taking a majority decision based on the identification results of the output data signals of the plurality of waveform equalization circuits 3-1 to 3-N having different conditions. Since the majority decision and the signal selection do not depend on the preceding and following bit strings, it can be performed for each bit or each code, and it is possible to cope with a very high-speed transmission state variation close to the bit rate.

  FIG. 9 shows an operation example in the fourth embodiment when N = 3. When the transmission signal is received with the waveform deteriorated, the output waveforms of the waveform equalization circuits 3-1 to 3-3 having different waveform equalization conditions have different degrees of waveform deterioration. As the waveform equalization condition is larger in the output signal of the waveform equalization circuit 3-i (i is any one of 1 to 3), the waveform deterioration is larger. -3 is exceeded and erroneous identification is performed. Here, since a mismatch occurs in the identification results, an identification result having a large number of data signals having the same identification result is selected and output.

(Fifth embodiment)
A fifth embodiment of the present invention will be described with reference to FIG. FIG. 10 is a block diagram of the fifth embodiment. Here, the configuration of a receiving apparatus in an optical transmission system is shown. In addition to the second embodiment, a fixed signal generating circuit 9 that outputs a fixed signal of logic “0” or “1” is arranged, and a selection circuit 5 It is the structure which inputs to. Here, the discrimination threshold of the discrimination circuits 6-1 to 6-3 is set higher or lower than the optimum value in the operation of one discrimination circuit 6-1 to 6-3.

  When the identification results of the plurality of identification circuits 6-1 to 6-N all match, one output data signal is selected from the identification circuits 6-1 to 6-N and output. If some or all of the identification results do not match, a fixed signal of logic “0” or “1” output from the fixed signal generation circuit 9 is selected and output.

  If the identification threshold values of 6-1 to 6-N are set high, the probability that the data signal logic “1” will be mistaken as “0” is high, and the probability that the logic “0” is mistaken as “1” is very low. Can be ignored. Therefore, when the discriminant results are not matched in the plurality of discriminating circuits 6-1 to 6-N having a high discriminating threshold, the probability that the logic of the data signal is “0” is high, and therefore the logic “0” Select and output a fixed signal.

  On the other hand, when the identification threshold is set low, the logic is reversed and the same operation is performed. In this way, the most probable data signal is output to suppress signal quality degradation.

(Sixth embodiment)
A sixth embodiment of the present invention will be described with reference to FIG. FIG. 11 is a block diagram of the sixth embodiment. Here, the configuration of the receiving apparatus in the optical transmission system is shown, and among the identification circuits 6-1 to 6-N in the fourth embodiment, N identification circuits having the same identification threshold value are grouped together. K identification circuit groups having different identification threshold values (in the example of FIG. 11, identification circuits 6-1-1 to 6-1-N, 6-2-1 to 6-2-N,..., 6-K- 1 to 6-KN), and the K output data signals of the waveform equalization circuits 3-1 to 3-K are distributed to K and input to one identification circuit of the identification circuit group. Distribution circuits 10-1 to 10-K are arranged.

  The control circuit 4 controls the selection circuit 5 so as to select the output data signal of the identification circuit in the identification circuit group whose identification results all match in the identification circuit group. By selecting an output data signal of a group in which all the identification results are the same among the identification circuit groups having the same identification threshold value, the optimum identification threshold value can be selected.

(First embodiment of waveform equalization circuit)
A first embodiment of the waveform equalization circuit of the present invention will be described with reference to FIG. FIG. 12 is a block diagram of the first embodiment of the waveform equalization circuit of the present invention. Here, the configuration of the waveform equalization circuit is shown, and the transversal equalization circuit 20 and the decision feedback equalization circuit 30 are connected in series. In the prior art, the waveform deterioration information obtained by subtracting the input signal and the output signal of the identification circuit is input to the control circuit to optimize each weighting coefficient. In the present invention, each weighting coefficient is set. The detected waveform deterioration information is output to the outside.

  The output waveform deterioration information is input to the control circuit 4 that controls the selection circuit of the receiving apparatus.

(Second embodiment of waveform equalization circuit)
A second embodiment of the waveform equalization circuit of the present invention will be described with reference to FIG. FIG. 13 is a block diagram of a second embodiment of the waveform equalization circuit of the present invention. Here, a transversal equalization circuit 32 is arranged instead of a simple delay circuit in the path for feeding back the output of the identification circuit 31 of the decision feedback equalization circuit 30 to the input of the identification circuit 31. With this configuration, the degree of freedom in the feedback waveform is increased, so that more detailed equalization conditions can be set.

(Third embodiment of waveform equalization circuit)
A third embodiment of the waveform equalization circuit of the present invention will be described with reference to FIG. FIG. 14 is a block diagram of a third embodiment of the waveform equalization circuit of the present invention. Here, only the transversal equalization circuit 20 is used.

(Fourth embodiment of waveform equalization circuit)
A fourth embodiment of the waveform equalization circuit of the present invention will be described with reference to FIG. FIG. 15 is a block diagram of a fourth embodiment of the waveform equalization circuit of the present invention. Here, only the decision feedback equalization circuit 30 is used. When the control circuit that controls the selection circuit of the receiving apparatus does not perform control based on the waveform deterioration information detected by the waveform equalization circuit, the circuit that detects the waveform deterioration information and the identification circuit are not necessarily required.

(Seventh embodiment)
A seventh embodiment of the present invention will be described with reference to FIG. FIG. 16 is a block diagram of the seventh embodiment. Here, a system configuration in the optical transmission system is shown, and the transmission device 40 includes a polarization scramble circuit 41 that performs polarization scrambling on the output signal light and outputs the result. By performing polarization scrambling on the transmitted signal light, the time required for the transmitted polarization to remain in the worst incident polarization condition for signal quality degradation due to PMD should be shortened, and the average of the incident polarization condition should be realized. The worst penalty can be reduced.

  The waveform equalization function of the present invention can follow high-speed fluctuations in waveform deterioration, and can be used in combination with polarization scrambling. Further, the transmission device 40 has an error correction function, and the polarization scramble circuit 41 can obtain a further improvement effect by setting the polarization scrambling period shorter than the error correction subframe period of the transmission device 40. By making the polarization scrambling period shorter than the subframe period, which is the error correction processing unit, the worst case of the polarization state can be distributed to each subframe, and the deterioration of the error correction correction capability can be prevented. it can. The waveform equalization function of the present invention can also be applied to such high-speed polarization scrambling.

(Eighth embodiment)
An eighth embodiment of the present invention will be described with reference to FIG. FIG. 17 is a block diagram of the eighth embodiment. Here, a system configuration in an optical transmission system is shown, and a plurality of polarization scrambling circuits 71 to 7 (N−1) that performs polarization scrambling on the signal light transmitted through the transmission paths 51 to 5N and outputs the signal light. Are distributed in the transmission path. By performing polarization scrambling at a plurality of locations in the transmission line, the connection state of each segment of the transmission lines 51 to 5N changes, the PMD state of the entire transmission line can be changed at high speed, and the DGD value is large. It is possible not to continue for a long time. Similar to the transmission polarization scrambling, the DGD value can be averaged, and the worst penalty to be expected in the system design can be reduced. The waveform equalization function of the present invention can follow high-speed fluctuations in waveform deterioration, and can be used in combination with polarization scrambling.

(Ninth embodiment)
In the above-described embodiment, the optical transmission system has been described. However, the same applies to a digital transmission system that transmits an electric signal by replacing PMD in the above-described embodiment with waveform deterioration due to an increase in loss due to an increase in the frequency of the electric signal. Can be explained. Further, by replacing the PMD in the above-described embodiment with deterioration due to fading in wireless transmission, a digital transmission system that transmits wireless signals can be similarly described.

  According to the present invention, a digital transmission system capable of performing waveform equalization capable of responding to a transmission path in which the state of a waveform deterioration factor fluctuates at high speed, suppressing transmission quality deterioration, and performing stable communication. It can contribute to realization.

The figure which shows the structural example of a prior art. The figure which shows the operation example of a prior art. The figure which shows the penalty improvement characteristic of a prior art. The block block diagram of 1st embodiment. The figure which shows the penalty improvement characteristic in 1st embodiment. The block block diagram of 2nd embodiment. The block block diagram of 3rd embodiment. The block block diagram of 4th embodiment. The figure which shows the operation example in 4th embodiment. The block block diagram of 5th embodiment. The block block diagram of 6th embodiment. The block block diagram of 1st embodiment of a waveform equalization circuit. The block block diagram of 2nd embodiment of a waveform equalization circuit. The block block diagram of 3rd embodiment of a waveform equalization circuit. The block block diagram of 4th embodiment of a waveform equalization circuit. The block block diagram of 7th embodiment. The block block diagram of 8th embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Photoelectric conversion circuit 2, 8-1 to 8-N, 8-1-1 to 8-KN, 10-1 to 10-K Distribution circuit 3-1 to 3-N Waveform equalization circuit 4 Control circuit 5 Selection circuit 6, 6-1 to 6-N, 6-1-1 to 6-KN, 31 Identification circuit 7-1 to 7-N Framer circuit 9 Fixed signal generation circuit 20, 32 Transversal type equalization Circuit 30 Decision Feedback Equalizer 40 Transmitter 41, 71-7 (N-1) Polarization Scramble Circuit 50, 51-5N Transmission Line 60 Receiver

Claims (12)

In a receiving circuit for receiving a digital data signal,
A plurality of waveform equalization circuits having different waveform equalization conditions;
A first distribution circuit that distributes a received signal to the waveform equalization circuit;
A plurality of discriminating circuits for discriminating and reproducing the output signals of the plurality of waveform equalization circuits, respectively ;
A selection circuit that selects one of the output data signals of the plurality of identification circuits;
A control circuit for controlling the selection circuit ;
A plurality of second distribution circuits each distributing the output data signals of the plurality of identification circuits, one of which is input to the selection circuit and the other is input to the control circuit;
A fixed signal generation circuit for inputting a fixed signal of logic “0” or “1” to the selection circuit;
With
The identification circuit has its identification threshold set higher or lower than the optimum value in the operation of one of the identification circuits,
The control circuit selects the output data signal of the identification circuit when the identification results of the plurality of identification circuits all match, and when the identification results of the plurality of identification circuits do not match part or all A receiving circuit which controls the selection circuit so as to select a fixed signal of logic "0" or "1" . In a receiving circuit for receiving a digital data signal,
N waveform equalization circuits with different waveform equalization conditions;
A first distribution circuit that distributes a received signal to the N waveform equalization circuits;
K discriminating circuit groups having different discriminating thresholds, each including N discriminating circuits having the same discriminating threshold value, each of which identifies and reproduces the output signals of the N number of waveform equalization circuits.
A selection circuit for selecting one of the output data signals of the N × K identification circuits;
And a control circuit for controlling the pre-Symbol selection circuit,
N × K second distribution circuits for distributing the output data signals of the N × K identification circuits, one of which is input to the selection circuit and the other is input to the control circuit,
N third distribution circuits that distribute the output data signals of the N number of waveform equalization circuits to K pieces respectively and input to one identification circuit in each of the K identification circuit groups;
With
The control circuit controls the selection circuit so as to select an output data signal of an identification circuit of an identification circuit group that does not cause a discrepancy in an identification result among the K identification circuit groups . Receiving circuit according to claim 1 or 2, wherein the data signal selection operation is performed for each bit or each code of the selection circuit. As the waveform equalizer, only transversal equalizer, or, only a decision feedback equalizer, or any of claims 1 using transversal equalizer and decision feedback equalizer 3 A receiving circuit according to claim 1. A receiving circuit according to any one of claims 1 to 4, the receiving device including a photoelectric conversion circuit which converts the received optical signal to an electrical signal inputted to the first distribution circuit. Digital transmission system composed of a transmitting apparatus, a transmission path for transmitting the digital data signal, a receiving apparatus having a receiving circuit according to any one of claims 1 to 4 for transmitting digital data signals. 6. A digital transmission system comprising: a transmitting device that transmits an optical signal modulated by a digital data signal; a transmission path that transmits the optical signal; and a receiving device according to claim 5 . The digital transmission system according to claim 7 , wherein the transmission device includes a polarization scrambling circuit that performs polarization scrambling on the output signal light and outputs the result. The digital transmission system according to claim 7 , wherein a plurality of polarization scrambling circuits that perform polarization scrambling and output the signal light transmitted through the transmission path are distributed in the transmission path. The transmitting device includes error correction means,
The digital transmission system according to claim 7 , wherein the polarization scrambling circuit sets a polarization scrambling period shorter than an error correction subframe period of the transmission device. A receiving circuit according to any one of claims 1 to 4, the receiving apparatus and a radio signal receiving means for receiving the radio signal input to the first dividing circuit. A digital transmission system comprising a transmitting device for transmitting a digital data signal as a radio signal and a receiving device according to claim 11 .

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