JP4416689B2 - Switching regulator and switching regulator output voltage switching method - Google Patents

Description

  The present invention relates to a switching regulator capable of changing an output voltage used for a portable device or the like, and more particularly to a switching regulator that reduces an overshoot generated in the output voltage when raising the output voltage, and an output voltage switching method for the switching regulator. .

  In recent years, energy saving has been demanded from the viewpoint of environmental measures. In devices using batteries such as mobile phones and digital cameras, the importance of reducing the power consumed in the devices is increasing from the viewpoint of extending the battery life. For this reason, non-insulated step-down switching regulators (hereinafter referred to as switching regulators) using inductors that are highly efficient and can be miniaturized are widely used as power supply circuits. However, although the switching regulator is highly efficient at the rated load, the current consumption of the switching regulator itself is relatively large, and therefore the efficiency is significantly reduced when the device is in a light load drive mode such as a standby state or a sleep mode. .

Therefore, in order to improve the efficiency even in the light load drive mode, a method of switching from PWM control to PFM control in the light load drive mode to lower the switching frequency and reduce the power consumed by the switching regulator has been performed. (For example, refer to Patent Document 1).
FIG. 4 is a circuit diagram showing an example of such a switching regulator.
In FIG. 4, the switching regulator 100 includes a PWM control circuit 101 and a PFM control circuit 102, and further includes a switching element 103 driven by the PWM control circuit 101 and a switching element 104 driven by the PFM control circuit 102. Yes.

During normal operation, the PFM control circuit 102 stops operating and the PWM control circuit 101 operates to turn on / off the switching element 103. In the light load drive mode, the PWM control circuit 101 stops operating and the PFM control circuit 102 Is activated to turn on / off the switching element 104.
Since a large current flows through the switching element 103 used in the PWM control, the element size is increased to reduce the on-resistance, but the gate capacity increases because the element size is large.

When the current supplied to the load (hereinafter referred to as the load current) is large, the loss of the switching regulator is mostly due to the on-resistance of the switching element, but when the load current is small, the gate capacity of the switching element is charged. Most of the loss is due to discharge.
For this reason, the switching element 104 used at the time of PFM control has a reduced element size, a large on-resistance but a small gate capacitance, thereby improving the efficiency of the switching regulator.
Japanese Patent Laid-Open No. 2002-300774

  However, when the output voltage of the switching regulator can be changed and the output voltage is changed from a low voltage to a high voltage according to the voltage setting signal, an overshoot voltage is generated in the output voltage as shown in FIG. was there. There is a problem that the overshoot voltage is further increased when the output voltage is changed and at the same time the switching element is changed from a large on-resistance to a small one.

The light load drive mode with a small load current is often in a state in which a load circuit such as a CPU that uses the switching regulator 100 as an operation power supply has stopped operating, a so-called sleep mode or standby state. . In such a light load drive mode, the operating voltage of the load circuit may be a voltage smaller than the operating voltage of the normal drive mode in many cases, and the output current of the switching regulator is lowered to further reduce the load current. Was common.
However, when shifting from the light load drive mode to the normal drive mode, the switching regulator control mode is switched from PFM control to PWM control, and at the same time the output voltage is changed from a low voltage to a high voltage, as described above. In this case, a large overshoot occurs in the output voltage, which may cause a problem in the CPU and other circuits.

  The present invention has been made to solve the above-described problems, and a switching regulator and a switching regulator in which overshoot does not occur even when the output voltage is increased when shifting from the light load drive mode to the normal drive mode. The output voltage switching method is intended to be obtained.

In the switching regulator according to the present invention, the input voltage input to the input terminal is converted into a predetermined constant voltage and output from the output terminal to the load.
A first switching element that performs switching according to a control signal input to the control electrode and performs output control of the input voltage;
A second switching element that controls the output of the input voltage by switching according to a control signal input to the control electrode, the on-resistance of the control electrode being larger than that of the first switching element but having a small capacitance;
A control switching circuit unit that performs PWM control on each of the first and second switching elements or performs PFM control only on the second switching element according to an operation mode;
With
The control switching circuit unit performs the PWM control from the first operation mode in which the PFM control is performed and the output voltage from the output terminal is a predetermined first voltage Vo1, and the output voltage from the output terminal is the first. When shifting to the second operation mode in which the second voltage Vo2 is larger than the first voltage Vo1, the PFM control is performed and the output voltage from the output terminal is increased from the first voltage Vo1 to the second voltage Vo2, and the output The PFM control is switched to the PWM control after the elapse of a predetermined time T1 from the start of the voltage increase.

  In addition, a dummy load that is a pseudo load through which a predetermined current flows is provided, and the control switching circuit unit connects the dummy load to the output terminal for a predetermined time T2 after the predetermined time T1 has elapsed. .

Specifically, the control switching circuit unit is
A PWM control circuit unit for performing PWM control on the first switching element;
A PFM control circuit unit for performing PFM control on the second switching element;
A switching circuit unit that performs output control to the control electrode of the second switching element for each control signal from the PWM control circuit unit and the PFM control circuit unit;
A control circuit unit for controlling operation of the PWM control circuit unit, the PFM control circuit unit, and the switching circuit unit,
With
In the first operation mode, the control circuit unit stops the operation of the PWM control circuit unit and causes the switching circuit unit to exclusively output a control signal from the PFM control circuit unit to the second switching element. In the operation mode, the PWM control circuit unit is operated, and the control signal from the PWM control circuit unit is exclusively output to the second switching element to the switching circuit unit, and the first operation mode is shifted to the second operation mode. In this case, the operation of the PWM control circuit unit is stopped and the output voltage is changed from the first voltage Vo1 in a state where the control signal from the PFM control circuit unit is exclusively output to the second switching element to the switching circuit unit. After a predetermined time T1 has elapsed since the output voltage was raised to the second voltage Vo2 and the output voltage started to rise, the PWM control circuit unit is activated and the switching circuit unit is PWMed And so as to output to the exclusive second switching element control signal from the control circuit unit.

  In addition, a dummy load that is a pseudo load through which a predetermined current flows is provided, and the control circuit unit connects the dummy load to the output terminal for a predetermined time T2 after the predetermined time T1 has elapsed.

  The first operation mode may be an operation mode in which a current flowing through the load is smaller than that in the second operation mode.

  The control switching circuit unit may increase the predetermined time T1 as the voltage difference between the first voltage Vo1 and the second voltage Vo2 increases.

  Each of the first and second switching elements, the PFM control circuit unit, the PWM control circuit unit, the switching circuit unit, and the dummy load is integrated in one IC.

Further, the output voltage switching method of the switching regulator according to the present invention includes a first switching element that performs switching according to a control signal input to the control electrode and performs output control of the input voltage,
A second switching element that controls the output of the input voltage by switching according to a control signal input to the control electrode, the on-resistance of the control electrode being larger than that of the first switching element but having a small capacitance;
With
Depending on the operation mode, PWM control is performed for each of the first and second switching elements, or only PFM control is performed for only the second switching element. In the switching regulator output voltage switching method for converting to a predetermined constant voltage and outputting from the output terminal to the load,
From the first operation mode in which the PFM control is performed and the output voltage from the output terminal is a predetermined first voltage Vo1, the PWM control is performed and the output voltage from the output terminal is greater than the first voltage Vo1. When shifting to the second operation mode in which the voltage 2 is Vo2, the PFM control is performed, the output voltage from the output terminal is increased from the first voltage Vo1 to the second voltage Vo2, and the increase in the output voltage is started. After a predetermined time T1 has elapsed, the PFM control is switched to the PWM control.

  A dummy load, which is a pseudo load through which a predetermined current flows, is provided, and the dummy load is connected to the output terminal for a predetermined time T2 after the predetermined time T1 has elapsed.

  According to the switching regulator and the switching regulator output voltage switching method of the present invention, the PWM control is performed from the first operation mode in which the PFM control is performed and the output voltage from the output terminal is the predetermined first voltage Vo1. When shifting to the second operation mode in which the output voltage from the output terminal becomes the second voltage Vo2 that is larger than the first voltage Vo1, the PFM control is performed, and the output voltage from the output terminal is changed from the first voltage Vo1 to the first voltage Vo1. The voltage is increased to 2 voltage Vo2, and after the predetermined time T1 has elapsed since the output voltage started to increase, that is, after the output voltage reaches the second voltage, the PFM control is switched to the PWM control. Thus, the occurrence of output voltage overshoot can be prevented.

  In addition, since the dummy load is connected to the output terminal after the predetermined time T1 has elapsed, that is, immediately after switching from PFM control to PWM control for a predetermined time T2, the load flows after switching to PWM control. Even when the current does not increase immediately, the PWM control can be performed stably.

  Furthermore, since switching elements suitable for PWM control and PFM control are employed, efficiency can be improved in each control of PWM control and PFM control.

Next, the present invention will be described in detail based on the embodiments shown in the drawings.
First embodiment.
FIG. 1 is a diagram showing a configuration example of a switching regulator in the first embodiment of the present invention.
In FIG. 1, a switching regulator 1 generates a predetermined constant voltage from an input voltage Vdd input from a DC power source BAT to a Vdd terminal that is an input terminal, and outputs it as an output voltage Vo from an output terminal OUT to a load 20.

  The switching regulator 1 includes a first switching element M1 composed of a PMOS transistor that performs a switching operation for performing output control of the input voltage Vdd, a switching element M2 for synchronous rectification composed of an NMOS transistor, and an inductor that constitutes a smoothing circuit. L1 and a capacitor C1, and output voltage detection resistors R1 and R2 that divide the output voltage Vo to generate and output a divided voltage VFB.

  Further, the switching regulator 1 generates a reference voltage Vref having a voltage corresponding to the input voltage setting signal VS and outputs the reference voltage Vref, and compares the divided voltage VFB with the reference voltage Vref. The error amplifying circuit 3 that outputs an output signal Err having a voltage according to the comparison result, and the first switching element M1 and the switching element M2 for synchronous rectification according to the output signal Err of the error amplifying circuit 3 And a PWM control circuit 4 for performing switching control of the first switching element M1 and the switching element M2 for synchronous rectification by performing PWM control.

  Further, the switching regulator 1 controls the output of the input voltage Vdd inputted to the Vdd terminal, the second switching element M3 made of a PMOS transistor having a transistor size smaller than that of the first switching element M1, and the error amplification circuit. 3 generates a triangular wave signal TW having a predetermined frequency by performing PFM control on the second switching element M3 in response to the output signal Err of 3, and outputs the triangular wave signal TW to the PWM control circuit 4 and the PFM control circuit 5, respectively. And an oscillation circuit OSC for output. The second switching element M3 has a higher on-resistance than the first switching element M1, and a gate capacitance smaller than that of the first switching element M1.

  Further, the switching regulator 1 outputs the signal PD output from the PWM control circuit 4 to the gate of the first switching element M1 and the PFM control circuit 4 in response to the switching signal FWS instructing switching of the operation mode. A first switch SW1 that outputs one of the signals Spf to the gate of the second switching element M3 is provided. Further, the switching regulator 1 detects the current flowing through the inductor L1, detects whether the detected current exceeds a predetermined value and becomes an overcurrent, and detects the overcurrent, the PWM control circuit 4 On the other hand, an overcurrent protection circuit 6 for turning off the first switching element M1 and the switching element M2 for synchronous rectification is provided.

  Further, the switching regulator 1 includes a dummy load 7 that is a pseudo load through which a predetermined current flows, a second switch SW2 that controls connection to the output terminal OUT of the dummy load 7, and a voltage setting according to a predetermined sequence. And a control circuit 10 for generating and outputting the signal VS and the switching signals FWS and DLS, respectively. The reference voltage generation circuit 2, the error amplification circuit 3, the PWM control circuit 4, the PFM control circuit 5, the oscillation circuit OSC, the resistors R1 and R2, the first and second switches SW1 and SW2, and the control circuit 10 are controlled. Make the circuit part. Further, the reference voltage generation circuit 2, the error amplification circuit 3, the PWM control circuit 4, the oscillation circuit OSC, and the resistors R1 and R2 are replaced with the PWM control circuit unit, the reference voltage generation circuit 2, the error amplification circuit 3, the PFM control circuit 5, and the oscillation. The circuit OSC and the resistors R1 and R2 form a PFM control circuit unit, the first switch SW1 forms a switching circuit unit, and the control circuit 10 and the second switch SW2 form a control circuit unit.

On the other hand, the PWM control circuit 4 generates and outputs a pulse signal Spw for performing PWM control from the output signal Err of the error amplifier circuit 3 and the triangular wave signal TW from the oscillation circuit OSC, and the PWM circuit 11. The control signal PD for performing switching control of the first switching element M1 and the control signal ND for performing switching control of the synchronous rectification switching element M2 are respectively generated and driven in accordance with the pulse signal Spw from And a drive circuit 12.
In the switching regulator 1, each part except the inductor L1, the capacitor C1, and the control circuit 10 is integrated in one IC, and the IC includes terminals Vdd, LX, ECO, FB, and GND, and Vdd. The terminal is an input terminal of the switching regulator 1, and the GND terminal is connected to the ground voltage.

  A DC power supply BAT is connected between the Vdd terminal and the GND terminal, and an input voltage Vdd is input from the DC power supply BAT to the Vdd terminal. A load 20 is connected between the output terminal OUT and the ground voltage. The first switching element M1 and the second switching element M3 are connected in parallel between the Vdd terminal and the LX terminal, and the synchronous rectification switching element M2 is connected between the LX terminal and the ground voltage. Has been. An inductor L1 is connected between the LX terminal and the output terminal OUT, and a capacitor C1 is connected between the output terminal OUT and the ground voltage. The connecting portion of the inductor L1 and the capacitor C1, that is, the output terminal OUT is connected to the FB terminal, and a series circuit of the resistor R1 and the resistor R2 is connected between the FB terminal and the ground voltage.

  A connection portion between the resistor R1 and the resistor R2 is connected to an inverting input terminal of the error amplifier circuit 3, and a reference voltage Vref is input to a non-inverting input terminal of the error amplifier circuit 3. The output signal Err of the error amplifier circuit 3 is output to the inverting input terminal of the comparator that forms the PFM control circuit 5 and the PWM circuit 11, and the triangular wave signal TW from the oscillation circuit OSC forms the PFM control circuit 5 and the PWM circuit 11. It is output to the non-inverting input terminal of the comparator. The pulse signal Spw from the PWM circuit 11 is output to the drive circuit 12, and the pulse signal Spf output from the PFM control circuit 5 is output to the PFM terminal of the first switch SW1.

  The drive circuit 12 outputs a control signal PD for performing switching control of the first switching element M1 to the gate of the first switching element M1 and the PWM terminal of the first switch SW1, respectively, and the switching element for synchronous rectification A control signal ND for performing switching control of M2 is output to the gate of the switching element M2 for synchronous rectification. The COM terminal of the first switch SW1 is connected to the gate of the second switching element M3, and the overcurrent protection circuit 6 monitors the current flowing through the LX terminal and outputs the monitored result to the drive circuit 12. A switching signal FWS from the control circuit 10 is input to the PFM control circuit 5, the overcurrent protection circuit 6, the PWM circuit 11, the drive circuit 12, and the first switch SW1. Further, the second switch SW2 and the dummy load 7 are connected in series between the FB terminal and the ground voltage, and the switching signal DLS from the control circuit 10 is input to the second switch SW2. The second switch SW2 performs switching according to the switching signal DLS.

  In such a configuration, the switching signal FWS is a signal for switching between the normal drive mode and the light load drive mode that operates with a smaller current consumption than the normal drive mode. The control circuit 10 may output a switching signal FWS so as to switch to the light load drive mode when the current flowing through the load 20 is measured and becomes equal to or less than a predetermined current, or the switching regulator 1 The switching signal FWS may be output when the built-in device shifts to the standby state. The light load drive mode is the first operation mode, and the normal drive mode is the second operation mode.

  First, the case where the switching signal FWS selects the normal drive mode will be described. In this case, the PFM control circuit 5 stops the operation and cuts or minimizes the current consumed by the PFM control circuit 5. At the same time, the PWM circuit 11, the drive circuit 12, and the overcurrent protection circuit 6 operate, and the switching regulator 1 operates as a synchronous rectification switching regulator. Further, the first switch SW1 is switched so that the COM terminal is connected to the PWM terminal, and the control signal PD from the drive circuit 12 is input to the gate of the second switching element M3.

  From this, the first and second switching elements M1 and M3 perform the switching operation, respectively, and when the first and second switching elements M1 and M3 are turned on, current is supplied to the inductor L1. At this time, the synchronous rectification switching element M2 is off. When each of the first and second switching elements M1 and M3 is turned off, the switching element M2 for synchronous rectification is turned on, and the energy stored in the inductor L1 is released through the switching element M2 for synchronous rectification. The current generated at this time is smoothed by the capacitor C1 and output from the output terminal OUT to the load 20.

  The output voltage Vo output from the output terminal OUT is divided by the output voltage detection resistors R1 and R2, and the divided voltage VFB is input to the inverting input terminal of the error amplifier circuit 3. Since the reference voltage Vref is input to the non-inverting input terminal of the error amplifying circuit 3, the voltage difference between the divided voltage VFB and the reference voltage Vref is amplified by the error amplifying circuit 3 and applied to the inverting input terminal of the PWM circuit 11. Is output. The triangular wave signal TW from the oscillation circuit OSC is input to the non-inverting input terminal of the PWM circuit 11, and the PWM circuit 11 outputs a PWM-controlled pulse signal Spw to the drive circuit 12.

  When the output voltage Vo of the switching regulator 1 increases, the voltage of the output signal Err of the error amplifier circuit 3 decreases, and the duty cycle of the pulse signal Spw of the PWM circuit 11 decreases. As a result, the time during which the first and second switching elements M1 and M3 are turned on is shortened, and the output voltage Vo of the switching regulator 1 is controlled to decrease. When the output voltage Vo of the switching regulator 1 decreases, the operation reverse to the above is performed, and as a result, the output voltage Vo of the switching regulator 1 is controlled to be constant.

  The overcurrent protection circuit 6 compares the voltage drop at each of the switching elements M1 and M3 while the first and second switching elements M1 and M3 are on with a predetermined voltage, and the voltage drop is a predetermined voltage. Is exceeded, a predetermined signal is output, and the operation of the drive circuit 12 is stopped. When the drive circuit 12 stops operating, the control signal PD is set to the high level and the control signal ND is set to the low level so that the first and second switching elements M1 and M3 and the switching element M2 for synchronous rectification are respectively set. Turn off. For this reason, supply of the output current from the output terminal OUT is stopped.

  Next, the case where the switching signal FWS selects the light load drive mode will be described. In this case, the PFM control circuit 5 operates, and the PWM circuit 11, the drive circuit 12, and the overcurrent protection circuit 6 stop their operations and cut or minimize the current consumption. The first switch SW1 is switched so that the COM terminal is connected to the PFM terminal, and the PFM-controlled pulse signal Spf from the PFM control circuit 5 is input to the gate of the second switching element M3. The The second switching element M3 performs a switching operation according to the pulse signal Spf from the PFM control circuit 5. At this time, since the drive circuit 12 stops operating, the switching element M2 for synchronous rectification remains off. For this reason, the energy stored in the inductor L1 is released through the diode D1 parasitic between the source and the drain of the synchronous rectification switching element M2.

Here, the operation when shifting from the light load drive mode to the normal drive mode will be described with reference to the timing chart of FIG. 2 and the flowchart of FIG. Note that S1 to S7 in FIG. 2 correspond to steps S1 to S7 in FIG.
First, in step S1, since the light load drive mode is set, the control circuit 10 supplies the reference voltage generation circuit 2 with the voltage value of the reference voltage Vref with the voltage setting signal VS so that the output voltage Vo becomes the constant voltage Vo1. Is set. Further, the control circuit 10 is configured so that the switching regulator 1 performs PFM control by the switching signal FWS, and the second switch SW2 is turned off by the switching signal DLS.

  Next, in step S2, the control circuit 10 sets the voltage so that the output voltage Vo rises from the constant voltage Vo1 to the constant voltage Vo2 with respect to the reference voltage generation circuit 2 prior to releasing the light load drive mode. The voltage value of the reference voltage Vref is set by the setting signal VS. For this reason, as shown in FIG. 2, the output voltage Vo starts to rise from the constant voltage Vo1 to the constant voltage Vo2. Next, in step S3, the control circuit 10 stands by for a predetermined time T1, which is a time until the output voltage Vo reliably rises to the constant voltage Vo2. The predetermined time T1 may be a fixed value, but may be changed according to a difference voltage between the constant voltage Vo1 and the constant voltage Vo2.

  When the predetermined time T1 elapses, the control circuit 10 outputs a switching signal FWS so that the switching regulator 1 switches from PFM control to PWM control in step S4, and changes the operation mode of the switching regulator 1 to PWM control. . At the same time, the control circuit 10 outputs the switching signal DLS so that the second switch SW2 is turned on and becomes conductive. For this reason, the second switch SW2 is turned on, and the dummy load 7 is connected between the output terminal OUT and the ground voltage.

Here, the reason for connecting the dummy load will be described.
When the switching regulator 1 is switched from PFM control to PWM control, the load 20 is not yet in the normal drive mode, and the current flowing through the load 20 is very small because it does not change from the light load drive mode. Even with the same reference voltage Vref, the output voltage Vo slightly changes between PFM control and PWM control. If the output voltage value in the PFM control is slightly larger than the output voltage value in the PWM control, both the first and second switching elements M1 and M3 are turned off immediately after switching to the PWM control. .

  Furthermore, since the current flowing through the load 20 is extremely small as described above, the output voltage Vo does not easily decrease. For this reason, the PWM circuit 11 performs an abnormal operation such as burst oscillation, and the voltage value of the output voltage Vo becomes unstable. In order to avoid such an operation, the control circuit 10 connects the dummy load 7 to the output terminal OUT immediately after shifting to the PWM control, and the output voltage Vo at the PFM control is the same as that at the PWM control. Even when the output voltage Vo is slightly higher than the output voltage Vo, the output voltage Vo immediately decreases to the voltage value Vo2 at which the PWM circuit 11 operates normally.

  Next, in step S5, the control circuit 10 turns on the second switch SW2 for a predetermined time T2 longer than the time until the PWM control is normally performed, so that the dummy load 7 is connected to the output terminal OUT. To do. When the predetermined time T2 elapses, the control circuit 10 outputs a switching signal DLS so that the second switch SW2 is turned off and enters a cut-off state in step S6, and cuts off the connection of the dummy load 7 to the output terminal OUT. Let In this way, the control circuit 10 ends the process of shifting from the light load drive mode to the normal drive mode. As shown in step S7, the switching regulator 1 performs PWM control and the output voltage Vo is the constant voltage Vo2. Switch to.

  As described above, when switching from the light load drive mode to the normal drive mode, the switching regulator of the first embodiment increases the output voltage Vo to the predetermined voltage Vo2 while maintaining the PFM control state. Since switching to PWM control is performed after the output voltage Vo reaches the predetermined voltage Vo2, an output voltage without overshoot can be obtained.

It is the figure which showed the structural example of the switching regulator in the 1st Embodiment of this invention. 5 is a timing chart showing an operation example when shifting from a light load drive mode to a normal drive mode. 3 is a flowchart showing an operation example of the control circuit 10 of FIG. It is the circuit diagram which showed the example of the conventional switching regulator. FIG. 5 is a diagram illustrating a waveform example of an output voltage in FIG. 4.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Switching regulator 2 Reference voltage generation circuit 3 Error amplifier circuit 4 PWM control circuit 5 PFM control circuit 6 Overcurrent protection circuit 7 Dummy load 10 Control circuit 11 PWM circuit 12 Drive circuit 20 Load M1 1st switching element M2 For synchronous rectification Switching element M3 Second switching element OSC Oscillation circuit SW1 First switch SW2 Second switch R1, R2 Output voltage detection resistance L1 Inductor C1 Capacitor D1 Parasitic diode BAT DC power supply

Claims (9)

In the switching regulator that converts the input voltage input to the input terminal to a predetermined constant voltage and outputs it from the output terminal to the load.
A first switching element that performs switching according to a control signal input to the control electrode and performs output control of the input voltage;
A second switching element that controls the output of the input voltage by switching according to a control signal input to the control electrode, the on-resistance of the control electrode being larger than that of the first switching element but having a small capacitance;
A control switching circuit unit that performs PWM control on each of the first and second switching elements or performs PFM control only on the second switching element according to an operation mode;
With
The control switching circuit unit performs the PWM control from the first operation mode in which the PFM control is performed and the output voltage from the output terminal is a predetermined first voltage Vo1, and the output voltage from the output terminal is the first. When shifting to the second operation mode in which the second voltage Vo2 is greater than the first voltage Vo1, the PFM control is performed and the output voltage from the output terminal is increased from the first voltage Vo1 to the second voltage Vo2, and the output A switching regulator, wherein the PFM control is switched to the PWM control after a predetermined time T1 has elapsed since the start of voltage increase.   A dummy load, which is a pseudo load through which a predetermined current flows, is provided, and the control switching circuit unit connects the dummy load to the output terminal for a predetermined time T2 after a predetermined time T1 has elapsed. The switching regulator according to claim 1. The control switching circuit unit is
A PWM control circuit unit for performing PWM control on the first switching element;
A PFM control circuit unit for performing PFM control on the second switching element;
A switching circuit unit that performs output control to the control electrode of the second switching element for each control signal from the PWM control circuit unit and the PFM control circuit unit;
A control circuit unit for controlling operation of the PWM control circuit unit, the PFM control circuit unit, and the switching circuit unit,
With
In the first operation mode, the control circuit unit stops the operation of the PWM control circuit unit and causes the switching circuit unit to exclusively output a control signal from the PFM control circuit unit to the second switching element. In the operation mode, the PWM control circuit unit is operated, and the control signal from the PWM control circuit unit is exclusively output to the second switching element to the switching circuit unit, and the first operation mode is shifted to the second operation mode. In this case, the operation of the PWM control circuit unit is stopped and the output voltage is changed from the first voltage Vo1 in a state where the control signal from the PFM control circuit unit is exclusively output to the second switching element to the switching circuit unit. After a predetermined time T1 has elapsed since the output voltage was raised to the second voltage Vo2 and the output voltage started to rise, the PWM control circuit unit is activated and the switching circuit unit is PWMed The switching regulator of claim 1, wherein the outputting the control signal from the control circuit unit to exclusively second switching element.   A dummy load, which is a pseudo load through which a predetermined current flows, is provided, and the control circuit unit connects the dummy load to the output terminal for a predetermined time T2 after a predetermined time T1 has elapsed. Item 4. A switching regulator according to Item 3.   5. The switching regulator according to claim 1, wherein the first operation mode is an operation mode in which a current flowing through the load is smaller than that in the second operation mode.   6. The switching regulator according to claim 1, wherein the control switching circuit section lengthens the predetermined time T <b> 1 as the voltage difference between the first voltage Vo <b> 1 and the second voltage Vo <b> 2 increases.   5. The switching regulator according to claim 4, wherein the first and second switching elements, the PFM control circuit unit, the PWM control circuit unit, the switching circuit unit, and the dummy load are integrated in one IC. A first switching element that performs switching according to a control signal input to the control electrode and performs output control of the input voltage;
A second switching element that controls the output of the input voltage by switching according to a control signal input to the control electrode, the on-resistance of the control electrode being larger than that of the first switching element but having a small capacitance;
With
Depending on the operation mode, PWM control is performed for each of the first and second switching elements, or only PFM control is performed for only the second switching element. In the switching regulator output voltage switching method for converting to a predetermined constant voltage and outputting from the output terminal to the load,
From the first operation mode in which the PFM control is performed and the output voltage from the output terminal is a predetermined first voltage Vo1, the PWM control is performed and the output voltage from the output terminal is greater than the first voltage Vo1. When shifting to the second operation mode in which the voltage 2 is Vo2, the PFM control is performed, the output voltage from the output terminal is increased from the first voltage Vo1 to the second voltage Vo2, and the increase in the output voltage is started. The switching voltage of the switching regulator is switched from the PFM control to the PWM control after a predetermined time T1 has elapsed. 9. The switching according to claim 8, further comprising a dummy load that is a pseudo load through which a predetermined current flows, and the dummy load is connected to the output terminal for a predetermined time T2 after the predetermined time T1 has elapsed. Regulator output voltage switching method.

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