JP4325713B2 - Load driving device and load driving method - Google Patents

Description

  The present invention relates to a load driving apparatus and a load driving method for independently driving a plurality of loads connected to a power source by a PWM (Pulse Width Modulation) control method.

For example, in the case of driving by supplying independent PWM signals to loads such as two motors, high frequency ripple of the power supply current increases when the load is energized. As a technique for solving such a problem, for example, as disclosed in Patent Documents 1 and 2, the two PWM signals have opposite phases so that the energization periods of the two loads do not overlap each other. Some output in a relationship.
Japanese Patent Laid-Open No. 6-189593 JP 2002-43910 A

However, it is only when the duty ratio of the PWM signal is 50% that the ripple of the power supply current can be suppressed by the conventional technology as described above. For example, if the power supply voltage is 12V, Only a voltage of 6V, which is 1/2 of that, can be applied. Therefore, there is a problem that the drive control range of the load is limited.
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a load driving device and a load driving method capable of extending a drive control range of a load by a PWM signal while suppressing ripples in a power supply current. It is to provide.

According to the load driving device of the first aspect, the control means sets the standard duty ratio of the PWM signal used when driving a plurality of loads to (100 / n)% where n is the number of loads. . When the voltage level of the drive command for the load corresponds to the standard duty ratio, the control means outputs a PWM signal having the standard duty ratio to a plurality of loads with a phase in which the energization periods of the loads do not overlap ( Standard PWM signal output to one load so that the standard PWM signal applied to another load rises at the fall from the energization period of the standard PWM signal output to one load together with the standard PWM signal) The signal is shifted from the standard PWM signal output to other loads . The control means drives a continuous non-energization period and a standard PWM signal when the voltage level of the drive command is less than a standard level , and drives a continuous energization period and a standard PWM signal when the voltage level is less than the standard level. The output is switched at a ratio according to the command voltage level. That is, when it corresponds to less than the standard duty ratio (substandard level), the control means applies the standard PWM signal to be applied to another load when the standard PWM signal output to one load falls from the energization period. So that the standard PWM signal output to one load is shifted from the standard PWM signal output to another load, and the standard PWM signal output to one load is In order that the standard PWM signal applied to the other load rises at the time of falling, the continuous non-energization period output to one load is shifted from the continuous non-energization period output to the other load. Output. In addition, when it corresponds to a value exceeding the standard duty ratio (standard super-level), the control means applies to other loads at the fall of the standard PWM signal output to one load from the energization period. The standard PWM signal output to one load is shifted from the standard PWM signal output to another load so that the standard PWM signal rises, and the energization period of the standard PWM signal output to one load is The continuous energization period output to one load deviates from the continuous energization period output to another load so that the standard PWM signal applied to another load falls at the time of rising from Output as follows. The “continuous energization period” or “continuous non-energization period” means a non-energization or energization period that lasts longer than the on / off period of the standard PWM signal.

That is, the voltage applied to the load during the period of outputting the standard PWM signal is 1 / n of the power supply voltage. Therefore, if the period during which the load is not continuously energized is added to that period, the total applied voltage is If the period during which the load is continuously energized is added, the total applied voltage becomes larger than 1 / n of the power supply voltage. And when outputting a standard PWM signal, since the energization periods of the respective loads do not overlap, the current ripple of the power source is suppressed, and no current ripple occurs during the continuous non-energization period and energization period. Therefore, it is possible to perform PWM control by further expanding the applied voltage range of the load while suppressing the occurrence of current ripple. In addition, since the control means sets the standard duty ratio to (100 / n)%, the standard duty ratio in this case is a ratio equally divided by the number of loads. Therefore, during the output period of the standard PWM signal, The energization period is arranged uniformly, and the load output during the period can be maximized while suppressing the occurrence of current ripple.

According to the load driving device of claim 2, when the standard duty ratio is set to (100 / m)% (m = n), the control means sets the power supply voltage to V (B) and the output level of the drive command. V (IN), where the output period of the standard PWM signal is t1, the continuous non-energization period is t2, and the continuous energization period is t3.
V (IN) = t1 / (t1 + t2) × V (B) / m
When the ratio of the periods t1 and t2 is set so that the output level of the load drive command is higher than the standard level,
V (IN) = (t1 / m + t3) / (t1 + t3) × V (B)
The ratio of the periods t1 and t3 is set so that
That is, if the control cycle is defined as (t1 + t2) or (t1 + t3) and the simultaneous equations with the above equations are solved based on the principle described in claim 1, the ratio between the periods t1 and t2 or the ratio between the periods t1 and t3 is obtained. Can be set.

  According to the load driving device of the third aspect, the output period of the standard PWM signal and the continuous non-energization period are alternately arranged in a predetermined pattern within the control cycle (t1 + t2) according to the ratio of the periods t1 and t2. repeat. Further, the output period of the standard PWM signal and the continuous energization period are alternately repeated in a predetermined pattern within the control cycle (t1 + t3) according to the ratio of the periods t1 and t3. Even in such a configuration, the same effect as in the second aspect can be obtained.

  According to the load driving device of the fourth aspect, the output period of the standard PWM signal and the continuous non-energization period are randomly distributed within the control cycle (t1 + t2) according to the ratio of the periods t1 and t2. Further, the output period of the standard PWM signal and the continuous energization period are randomly distributed within the control cycle (t1 + t3) according to the ratio of the periods t1 and t3. Therefore, the periodicity that appears in the output state between the output period of the standard PWM signal and the continuous non-energization period or the energization period can be relaxed, and the noise generation level can be suppressed.

According to the load driving device of the fifth aspect , when the control means determines the signal output pattern for the plurality of loads according to the drive command, the output period of the standard PWM signal is gradually increased from “0” to the determined period. Start-up control is performed to make it longer. That is, it is assumed that the inrush current increases when the load is energized immediately with the signal output pattern determined as in claims 1 to 3. Therefore, if start-up control is performed as described above, the inrush current can be reduced by gradually increasing the energization current.

According to the load driving device of claim 6 , the control means outputs a signal output cycle determined by the sum of the continuous non-energization period and the output period of the standard PWM signal, or outputs the continuous energization period and the standard PWM signal. The signal output cycle determined by the sum with the period is randomly varied, and control is performed so that the average within the predetermined period becomes the output level corresponding to the drive command.
That is, if the determined signal output pattern is repeated when the output level of the drive command is less than the standard level or the level exceeding the standard level, vibration and noise may be generated according to the periodicity. Therefore, if the signal output cycle is changed randomly, the periodicity of the output pattern can be reduced as much as possible to suppress the occurrence of vibration and noise.

According to the load driving device of the seventh aspect , the control means outputs the standard PWM signal as a trapezoidal wave with a phase in which the rising period and the falling period of the waveform do not overlap. In other words, when the PWM signal is trapezoidal, the rise and fall of the signal waveform becomes gradual, so that the generation of noise can be suppressed. In addition, if the standard PWM signal is output in a phase where the rising and falling periods do not overlap, it is possible to avoid overlapping of the periods when the energization current fluctuates, so ripples occur when trapezoidal PWM signals are used. Can be suppressed.

(First embodiment)
A first embodiment in which the present invention is applied to an apparatus for driving a cooling fan for cooling a radiator of a vehicle engine and a condenser of an air conditioner will be described below with reference to FIGS. A series circuit of a motor (load) 2A and an N-channel MOSFET 3A (Tr1, switching element), a motor 2B and an N-channel MOSFET 3B (Tr2) is connected in parallel between the vehicle battery (power source) 1 and the ground. The drains of the FETs 3A and 3B are connected to the battery 1 through forward diodes 4A and 4B and a π-type filter 5.
The diodes 4A and 4B regenerate the delayed current that flows when the FETs 3A and 3B are switched from on to off to the battery 1 side. Further, the π-type filter 5 composed of the capacitors 6 and 7 and the coil 8 absorbs the regenerative current and smoothes the power source.

  The PWM control signal output from the arithmetic circuit (control means) 9 is output to the gates of the FETs 3A and 3B via the drive circuits 10A and 10B. When the FET 3 is turned on, current flows from the battery 1 through the path of the motor 2, the FET 3, and the ground, and the motor 2 is energized. When the FET 3 is turned off, a delay current is regenerated to the battery 1 side via the diode 4 and the π-type filter 5. At this time, the regenerative current is smoothed by the capacitor 6 of the π-type filter 5. The capacitor 7 on the opposite side is for smoothing the power source of the battery 1.

  The input circuit 11 is an ECU (Electronic Control Unit) that outputs a driving command for the cooling fan-motor 2 (not shown), and outputs the driving command to the arithmetic circuit 9 by a relatively low-speed PWM signal. The arithmetic circuit 9 performs conversion so as to generate a command voltage V (IN) corresponding to the duty ratio of the PWM signal (DUTY / V conversion), and then the command voltage V (IN) and the power supply voltage V ( B) and a drive signal is output to the FETs 3A and 3B.

As will be described in detail later, the drive signal output by the arithmetic circuit 9 is a PWM signal (this is a standard PWM signal) having a duty ratio of 50% and in an opposite phase relationship according to the level of the command voltage V (IN). And a continuous non-energization period (continuous OFF period) and a continuous energization period (continuous ON period).
In the above, what remove | excluded the battery 1, the motor 2, and the input circuit 11 comprises the load drive device 30. FIG.

  Next, the operation of this embodiment will be described with reference to FIGS. FIG. 2 shows the form of the drive signal that the arithmetic circuit 9 outputs according to the level of the command voltage V (IN). When the power supply voltage V (B) of the battery 1 is 12V, the relationship between the drive command (input signal) duty ratio output by the input circuit 11 and the converted command voltage V (IN) is shown in FIG. As shown in FIG.

  The arithmetic circuit 9 compares the command voltage V (IN) with a voltage V (B) / 2 that is ½ of the power supply voltage V (B) of the battery 1. When V (IN) = V (B) / 2, a standard PWM signal is output. Then, with respect to the power supply voltage V (B) = 12V, the applied voltages of the motors 2A and 2B are 6V, respectively.

When V (IN) <V (B) / 2 (substandard level), a combination of a standard PWM signal and a continuous OFF period is output. Assuming that the respective output periods are t1 and t2, the time ratio between the two is determined based on a constant control cycle (t1 + t2) and equation (1).
V (IN) = t1 / (t1 + t2) × V (B) / 2 (1)
That is, since the applied voltage in the period t1 during which the standard PWM signal is output is V (B) / 2, the command voltage is obtained by multiplying the ratio of the period t1 to the control period (t1 + t2) by V (B) / 2. Adjustment is made so as to correspond to V (IN). For example, when V (IN) = V (B) / 4 (corresponding to a duty ratio of 25% in normal PWM control), t1 = t2 may be set.

When V (IN)> V (B) / 2 (standard super level), a combination of a standard PWM signal and a continuous ON period is output. Assuming that the respective output periods are t1 and t3, the time ratio between the two is determined based on a constant control cycle (t1 + t3) and equation (2).
V (IN) = (t1 / 2 + t3) / (t1 + t3) × V (B) (2)
That is, since the applied voltage in the period t3 is V (B), t2 in the equation (1) is replaced with t3, and V (B) / 2 is replaced with V (B).
t3 / (t1 + t3) × V (B)
(2) is added. For example, when V (IN) = V (B) × 3/4 (corresponding to a duty ratio of 75%), t1 = t3 may be set. In accordance with the above principle, the arithmetic circuit 9 generates a drive signal.

  Next, a method in which the arithmetic circuit 9 generates and outputs the drive signal in the above form will be described with reference to FIGS. FIG. 4 is a block diagram showing the processing contents of the arithmetic circuit 9, and FIG. 5 shows the same processing contents in a flowchart. In FIG. 4, the arithmetic circuit 9 generates a PWM signal with a carrier frequency of 20 kHz and a duty ratio of 50% in the PWM signal generation unit 12 and outputs the PWM signal to the drive circuit 11A via the buffers 13 and 14 and an inversion buffer (NOT Output to the drive circuit 11B through the gate 15 and the buffer 16.

  A series circuit of N-channel MOSFETs 17 and 18 and a series circuit of N-channel MOSFETs 19 and 20 are connected between the control power supply Vcc and the ground, and the common connection points are the buffers 14 and 16. Connected to the input terminal. The gate signal generation unit 21 performs arithmetic processing according to the flowchart of FIG. 5 and outputs a gate signal to each gate of the FETs 17 to 20. That is, if the FETs 17 to 20 are all OFF, the PWM signal output from the buffers 13 and 15 is output as it is, and if only the FETs 18 and 20 on the ground side are ON, the low level signal is continuously output. When only the FETs 17 and 19 on the power supply side are turned on, the high level signal continues to be output.

Next, a description will be given with reference to FIG. As a precondition, the control cycle is t1 + t2 = t1 + t3 = 20 ms. First, when the drive command output from the input circuit 11 is DUTY / V converted (step S0, DUTY / V conversion unit 22), the command voltage V (IN) is compared with the voltage V (B) / 2 (step S1). , Comparison unit 23), (1) V (IN) <V (B) / 2, (2) V (IN) = V (B) / 2, (3) V (IN)> V (B) / 2 The process branches according to each case (step S2). In the case of the level less than the standard of (1), t2 is calculated by equation (3) based on the control cycle condition and equation (1) (step S3).
t2 = 20 ms−40 ms × V (IN) / V (B) (3)
Further, t1 = 20 ms-t2 and t3 = 0.

In the case of the standard level (2), since only the standard PWM signal is output, t2 = t3 = 0 (step S4). Further, in the case of the standard super level of (3), t3 is calculated by equation (4) based on the control cycle condition and equation (2) (step S5).
t3 = −20 ms + 40 ms × V (IN) / V (B) (4)
Also, t1 = 20 ms-t3 and t2 = 0.
In addition, the process of step S3-S5 respond | corresponds to the calculating part 24 in FIG.

  After execution of step S3, the process proceeds to step S6, and gate signals V1, V2 are output to the ground-side FETs 18, 20. Since the PWM control cycle is 50 μs, the negative-phase side gate signal V2 is set to high level 25 μs after the positive-phase side gate signal V1 is set to high level.

  On the other hand, after execution of step S5, the process proceeds to step S7, and gate signals V3 and V4 are output to the FETs 17 and 19 on the power supply side. For the gate signals V3 and V4, a high level exceeding the control power supply VCC is applied using a booster circuit or the like. Also in this case, the negative-phase side gate signal V4 is set to the high level 25 μs after the positive-phase side gate signal V3 is set to the high level. Note that the processing in steps S6 and S7 corresponds to the timer unit 25 and the output unit 26 in FIG. The timer unit 25 performs a time counting operation by a “clock” given to the arithmetic circuit 9. As a result of processing as described above, a drive signal is output in the form shown in FIG.

  As described above, according to this embodiment, the standard duty ratio of the PWM signal used when driving the two motors 2A and 2B is set to 50% (m = 2), and the level of the drive command is the standard duty ratio. In this case, a PWM signal with a standard duty ratio is output to the motors 2A and 2B with a phase (reverse phase relationship) in which the energization periods of the motors 2A and 2B do not overlap. Further, when the drive command level is less than the standard level, the continuous OFF period and the standard PWM signal are set according to the level of the drive command. Switch by ratio and output. Specifically, the ratio between the periods t1 and t2 is set according to the expression (1) when the level is less than the standard, and the ratio between the periods t1 and t3 is set according to the expression (2) when the level is higher than the standard. Therefore, it is possible to perform PWM control by further expanding the applied voltage range of the motor 2 while suppressing the occurrence of current ripple in the battery 1.

Since the standard duty ratio is set to 50%, which is 100% divided by the number of motors 2, the energization periods of the motors 2A and 2B are uniformly arranged in the output period of the standard PWM signal. The output of the motors 2A and 2B during the period can be maximized while suppressing the occurrence of current ripple.
It should be noted that when the drive command level is less than the standard level, or when the drive command level is higher than the standard level, the vibration and noise associated with the rotational drive of the motor 2 may be slightly increased as compared with the standard level. . However, when driving a cooling fan arranged in a vehicle, the driving sound of the motor is not so much of a problem, so there is no practical problem.

(Second embodiment)
6 and 7 show a second embodiment of the present invention. The same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof will be omitted. Hereinafter, different parts will be described. The second embodiment shows a case where the number of motors 2 to be driven is expanded to “3”. That is, in the load driving device 31 of the second embodiment, the N-channel MOSFET 3C, the diode 4C, and the driving circuit 10C are disposed in accordance with the addition of the third motor 2C.

An arithmetic circuit (control means) 32 instead of the arithmetic circuit 9 outputs drive signals to the motors 2A, 2B, and 2C in the form shown in FIG. In this case, the standard duty ratio is 33.3% obtained by dividing 100% by the load number “3”, and the arithmetic circuit 32 compares the command voltage V (IN) with the voltage V (B) / 3.
When V (IN) = V (B) / 3, a standard PWM signal is output, but the phase difference of the standard PWM signal given to each motor 2A, 2B, 2C is 120 degrees, and the ON period by the PWM signal is Avoid overlapping each other. At this time, with respect to the power supply voltage V (B) = 12V, the applied voltage of each motor 2A, 2B, 2C is 4V.

When V (IN) <V (B) / 3 (substandard level), a combination of a standard PWM signal and a continuous OFF period is output as in the first embodiment, but each output period t1 , T2 is determined based on the control cycle and the equation (5).
V (IN) = t1 / (t1 + t2) × V (B) / 3 (5)
When V (IN)> V (B) / 3 (standard super level), the combination of the standard PWM signal and the continuous ON period is also output. The output periods t1 and t3 are control cycles. And (6).
V (IN) = (t1 / 3 + t3) / (t1 + t3) × V (B) (6)
As described above, according to the second embodiment, even when the number of the motors 2 that are driven simultaneously is “3”, the same effect as in the first aspect can be obtained.

(Third embodiment)
FIG. 8 shows a third embodiment of the present invention, and shows a drive signal form when the standard duty ratio of the configuration of the first embodiment is 33.3% which is the same as that of the second embodiment. At this time, when V (IN) = V (B) / 3, the phase difference between the standard PWM signals given to the motors 2A and 2B is 120 degrees. Therefore, in the period of 1/3 of the PWM cycle, both the motors 2A and 2B are not energized.

In the case of V (IN) <V (B) / 3 (substandard level) and V (IN)> V (B) / 3 (superstandard level), the same signal as in the second embodiment is used. The form is output according to the two motors 2A and 2B.
As described above, according to the third embodiment, when the number of the motors 2 is “2”, even if the duty ratio of the standard PWM signal is set to 33.3%, substantially the same effect as in the first aspect is obtained. Obtainable.

(Fourth embodiment)
FIG. 9 shows a fourth embodiment of the present invention. In the fourth embodiment, for example, when the output periods t1, t2, and t3 are calculated and determined in steps S3 to S5 in FIG. 5, a drive signal having a form as shown in FIG. 2 is immediately output according to each case. Instead, start-up control is performed to gradually increase the number of output pulses of the standard PWM signal as shown in FIG.
For example, when V (IN) = V (B) / 4, the period t1 is 10 ms, and the number of output pulses of the PWM signal during that period is “200”. At this time, the number of pulses output in the period t1 in each control cycle is increased to 1, 3, 5, 7, 9,..., Or increased to 2, 4, 8, 16, 32,. “200” is reached after a lapse of a predetermined time.

Also in the case of V (IN) = V (B) / 2, for example, by dividing the control cycle by 20 ms, the number of pulses output within that cycle is gradually increased until reaching “400” in the same manner as described above. . Further, in the case of V (IN) = V (B) 3/4, after passing through the pattern in the case of V (IN) = V (B) / 2, the continuous ON period may be gradually lengthened.
By performing the start-up control in this way, the applied voltage when starting the motor 2 can be gradually increased.

  As described above, according to the fourth embodiment, when the signal output pattern for the motor 2 is determined according to the drive command, the output period of the standard PWM signal is gradually increased from “0” to the determined period. Since the control is performed, the inrush current can be reduced by gradually increasing the energization current.

(5th Example)
FIG. 10 shows a fifth embodiment of the present invention. In the fifth embodiment, when the output periods t1, t2, and t3 are calculated and determined in steps S3 to S5 in FIG. 5, control when the command voltage V (IN) is at a level less than the standard or at a level higher than the standard. The periods (t1 + t2) and (t1 + t3) are randomly changed as shown in FIG. However, if an average within a predetermined period is taken, a restriction is imposed so that the control cycle becomes a constant value (for example, 20 ms).

  As described above, according to the fifth embodiment, the signal output cycle determined by the sum of the continuous OFF period and the output period of the standard PWM signal, or the sum of the continuous ON energization period and the output period of the standard PWM signal. The signal output cycle determined by is controlled randomly so that the average over the predetermined period becomes the output level according to the drive command, so the periodicity of the output pattern is reduced as much as possible to reduce vibration and noise. Occurrence can be suppressed.

(Sixth embodiment)
FIG. 11 shows a sixth embodiment of the present invention. In the sixth embodiment, the standard PWM signal is shaped and output in a trapezoidal waveform as shown in FIG. 11, and the falling start timing of the signal (B) coincides with the rising end timing of the signal (A). By providing such a phase relationship, one turn-on period and the other turn-off period are prevented from overlapping. Details of such a technique are disclosed in, for example, Japanese Patent Application Laid-Open No. 2004-72592.

In other words, when the PWM signal is trapezoidal, the rise and fall of the signal waveform becomes gradual, so that the generation of noise can be suppressed. In addition, if the standard PWM signal is output in a phase in which the rising period and the falling period do not overlap, overlapping of periods in which the energization currents can be avoided.
As described above, according to the sixth embodiment, the standard PWM signal is trapezoidal and is output in a phase in which the rising period (turn-on period) and falling period (turn-off period) of the waveform do not overlap. It is possible to suppress the generation of ripples when a trapezoidal PWM signal is used.

(Seventh embodiment)
FIG. 12 shows a seventh embodiment of the present invention. In the seventh embodiment, for example, as in the first embodiment, when V (IN) <V (B) / 2 (substandard level), the output period t1 and t2 of the standard PWM signal and the continuous OFF period, respectively. The time ratio between the two is determined based on a constant control cycle (t1 + t2) and equation (1). Then, the standard PWM signal and the continuous OFF period are set so as to be alternately repeated in a predetermined pattern after satisfying the time ratio between them in the control cycle (t1 + t2).

  Similarly, when V (IN)> V (B) / 2 (standard super level), the time ratio between the standard PWM signal and the continuous ON period is set to be constant for t1 and t3. If determined based on the control cycle (t1 + t3) and the equation (2), the standard PWM signal and the continuous ON period are alternated in a predetermined pattern while satisfying the time ratio between the two in the control cycle (t1 + t3). Set to repeat.

In the case shown in FIG. 12, after outputting two pulses of the standard PWM signal, a pattern in which a continuous OFF period or a continuous ON period is arranged is repeated. For example, in the case of V (IN) <V (B) / 2, if the period for outputting two pulses of the standard PWM signal is Δt1, and the divided period of the continuous OFF period is Δt2, the total sum of Δt1 in the control cycle (t1 + t2) is At t1, the total sum of Δt2 is t2.
Similarly, in the case of V (IN)> V (B) / 2, Δt1 in the control cycle (t1 + t3) is assumed if the period for outputting two pulses of the standard PWM signal is Δt1, and the divided period of the continuous ON period is Δt3. Is t1, and Δt3 is t3.

  This process will be described with reference to the flowchart of FIG. 5 of the first embodiment. For example, when V (IN) <V (B) / 2, after determining the time ratio between t1 and t2 in step S3, This is executed by determining an arrangement pattern of Δt1 and Δt2, that is, a pattern for setting the gate signal V1 to the high level. Similarly, when V (IN)> V (B) / 2, after determining the time ratio between t1 and t3 in step S5, the arrangement pattern of Δt1 and Δt3 (pattern for setting the gate signal V3 to the high level) is obtained. Just decide.

  As described above, according to the seventh embodiment, when the level of the drive command is less than the standard level, the output period of the standard PWM signal and the continuous OFF period are predetermined within the control cycle according to the ratio of the periods t1 and t2. When the drive command level is a standard super level, the output period of the standard PWM signal and the continuous ON period are alternately changed in a predetermined pattern within the control period according to the ratio of the periods t1 and t3. To repeat. Even when configured in this manner, the same effects as those of the first embodiment can be obtained.

(Eighth embodiment)
FIG. 13 shows an eighth embodiment of the present invention. In the eighth embodiment, as in the seventh embodiment, when V (IN) <V (B) / 2 (substandard level), the time ratio between the two is determined for the output periods t1 and t2. The signal and the continuous OFF period are randomly distributed while satisfying the time ratio between them in the control cycle (t1 + t2). Similarly, in the case of V (IN)> V (B) / 2 (standard super level), when the time ratio between the output periods t1 and t3 is determined, the standard PWM signal and the continuous ON period are set to the control period ( Within t1 + t3), the time ratio between the two is satisfied, and the particles are randomly dispersed.

  As shown in FIG. 13, for example, in the case of V (IN) <V (B) / 2, the periods for outputting the pulse of the standard PWM signal are t1a, t1b, t1c, t1d, and the divided periods of the continuous OFF period are t2a, Assuming t2b, t2c, and t2d, the sum of periods t1a to t1d in the control cycle (t1 + t2) is t1, and the sum of t2a to t2d is t2. Similarly, in the case of V (IN)> V (B) / 2, the periods for outputting the pulse of the standard PWM signal are t1a, t1b, t1c, t1d, and the divided periods of the continuous ON period are t3a, t3b, t3c, Assuming t3d, the sum of the periods t1a to t1d in the control cycle (t1 + t3) is t1, and the sum of t3a to t3d is t3.

  In the flowchart of FIG. 5 as well as in the seventh embodiment, this processing is performed in the case where V (IN) <V (B) / 2, and after step S3, any one of t1a to t1d and t2a to t2d After determining the time and the arrangement pattern, it is performed by determining each time and the arrangement pattern of the other group. Similarly, when V (IN)> V (B) / 2, after determining the time ratio between t1 and t3 in step S5, the respective times and arrangement patterns of t1a to t1d and t3a to t3d are determined. However, in this case, even if “random” is said, a condition is added to the selection of a numerical value, so that it is substantially determined in a pseudo “random” manner.

  As described above, according to the eighth embodiment, when the drive command level is less than the standard level, the output period of the standard PWM signal and the continuous OFF period are set within the control cycle according to the ratio of the periods t1 and t2. Disperse randomly. When the level of the drive command is a standard super level, the output period of the standard PWM signal and the continuous ON period are randomly distributed within the control cycle according to the ratio of the periods t1 and t3. Therefore, the periodicity appearing in the output state between the output period of the standard PWM signal and the continuous OFF period or the continuous ON period can be relaxed, and the noise generation level can be suppressed.

The present invention is not limited to the embodiments described above and shown in the drawings, and the following modifications or expansions are possible.
The number of loads may be “4” or more.
The high side drive may be performed without being limited to the low side drive.
The switching element is not limited to a MOSFET, and a power transistor or IGBT may be used.
The load is not limited to the motor 2 and may be a resistor such as a solenoid, a lamp, or a heater.
The carrier frequency of PWM control is not limited to 20 kHz and may be changed as appropriate.

The output pattern of the seventh embodiment is merely an example, and the pattern may be changed as appropriate.
The configurations of the seventh and eighth embodiments may be applied to the configuration of the second embodiment.
The present invention is not limited to a device that drives a vehicle cooling fan, and can be widely applied as long as it uses a PWM signal to drive a plurality of loads.

The figure which is 1st Example of this invention and shows the structure of a load drive device. The figure which shows the form of the drive signal which an arithmetic circuit outputs according to the level of command voltage Diagram showing the relationship between the duty ratio of the drive command and the command voltage Block diagram showing processing contents of arithmetic circuit The flowchart which shows the processing content of FIG. FIG. 1 equivalent view showing a second embodiment of the present invention. 2 equivalent diagram FIG. 2 equivalent view showing a third embodiment of the present invention. The figure which shows the output pattern of the standard PWM signal which shows 4th Example of this invention FIG. 9 equivalent diagram showing a fifth embodiment of the present invention. Waveform diagram of standard PWM signal showing the sixth embodiment of the present invention FIG. 2 equivalent view showing a seventh embodiment of the present invention FIG. 2 equivalent view showing an eighth embodiment of the present invention.

Explanation of symbols

  In the drawings, 1 is a battery (power source), 2 is a motor (load), 3 is a MOSFET (switching element), 9 is an arithmetic circuit (control means), 30 and 31 are load driving devices, and 32 is an arithmetic circuit (control means). Indicates.

Claims (14)

In a load driving device that independently drives a plurality of loads connected to a power source by a PWM (Pulse Width Modulation) control method,
The standard duty ratio of the PWM signal used when driving the plurality of loads is set to (100 / n)% , where n is the number of loads,
A PWM signal having a standard duty ratio applied to one load among the plurality of loads (hereinafter referred to as a standard PWM signal) does not overlap with an energization period of a standard PWM signal applied to another load among the plurality of loads. Output in phase,
The voltage level of the load drive command is
When it corresponds to the standard duty ratio, the standard PWM signal is output to each of the plurality of loads, and when the standard PWM signal output to the one load falls from the energization period, The standard PWM signal output to the one load is shifted from the standard PWM signal output to the other load so that the standard PWM signal applied to the other load rises.
When it corresponds to less than the standard duty ratio (substandard level), a continuous non-energization period and the standard PWM signal are switched and output at a ratio according to the voltage level of the drive command, and the 1 When the standard PWM signal output to the other load falls from the energization period, the standard PWM signal output to the first load is the other so that the standard PWM signal applied to the other load rises. The standard PWM signal that is deviated from the standard PWM signal output to the other load and applied to the other load when the standard PWM signal output to the first load falls from the energization period. So that the continuous non-energization period output to the one load is shifted from the continuous non-energization period output to the other load,
If it corresponds to a value exceeding the standard duty ratio (standard super level), a continuous energization period and the standard PWM signal are switched and output at a ratio according to the voltage level of the drive command , and When the standard PWM signal output to one load falls from the energization period, the standard PWM signal output to the first load is such that the standard PWM signal applied to the other load rises. A standard PWM signal that is deviated from a standard PWM signal output to another load and that is applied to the other load when the standard PWM signal output to the first load rises from the energization period. Japanese that is so falls, with a control means for continuous conduction period which is output to a load of the 1 outputs so as to shift than continuous conduction period to be output to the other load A load driving device. The control means includes
When the standard duty ratio is set to (100 / m)% (m = n),
The power supply voltage is V (B), the output level of the drive command is V (IN), the output period of the standard PWM signal is t1, the continuous non-energization period is t2, and the continuous energization period is t3. Then
When the output level of the load drive command is less than the standard level,
V (IN) = t1 / (t1 + t2) × V (B) / m
The ratio of the periods t1, t2 is set so that
When the output level of the load drive command is the standard super level,
V (IN) = (t1 / m + t3) / (t1 + t3) × V (B)
The load driving device according to claim 1, wherein the ratio between the periods t1 and t3 is set so that The output period of the standard PWM signal and the continuous non-energization period are alternately repeated in a predetermined pattern in a control cycle (t1 + t2) according to the ratio of the periods t1 and t2, and the periods t1 and t3 3. The load driving device according to claim 2, wherein the output period of the standard PWM signal and the continuous energization period are alternately repeated in a predetermined pattern within a control cycle (t1 + t3) according to the ratio. According to the ratio of the periods t1 and t2, the output period of the standard PWM signal and the continuous non-energization period are randomly distributed within the control cycle (t1 + t2), and according to the ratio of the periods t1 and t3. The load driving device according to claim 2, wherein an output period of the standard PWM signal and the continuous energization period are randomly distributed within a control cycle (t1 + t3). When the control means determines a signal output pattern for the plurality of loads according to the drive command, the control means performs start-up control so that the output period of the standard PWM signal is gradually increased from “0” to the determined period. The load driving device according to claim 1, wherein the load driving device is provided. The control means is a signal output cycle determined by the sum of the continuous non-energizing period and the output period of the standard PWM signal, or a signal determined by the sum of the continuous energizing period and the output period of the standard PWM signal. The load according to any one of claims 1 to 5, wherein an output cycle is randomly changed and control is performed so that an average of the output periods within a predetermined period becomes an output level corresponding to the drive command. Drive device. 7. The load driving device according to claim 1, wherein the control means outputs the standard PWM signal in a trapezoidal waveform with a phase in which a rising period and a falling period of the waveform do not overlap. In a method of independently driving a plurality of loads connected to a power source by a PWM (Pulse Width Modulation) control method,
The standard duty ratio of the PWM signal used when driving the plurality of loads is set to (100 / n)%, where n is the number of loads,
A PWM signal having a standard duty ratio applied to one load among the plurality of loads (hereinafter referred to as a standard PWM signal) does not overlap with an energization period of a standard PWM signal applied to another load among the plurality of loads. Output in phase,
The voltage level of the load drive command is
When it corresponds to the standard duty ratio, the standard PWM signal is output to each of the plurality of loads, and when the standard PWM signal output to the one load falls from the energization period, The standard PWM signal output to the one load is shifted from the standard PWM signal output to the other load so that the standard PWM signal applied to the other load rises.
When it corresponds to less than the standard duty ratio (substandard level), a continuous non-energization period and the standard PWM signal are switched and output at a ratio according to the voltage level of the drive command, and the 1 When the standard PWM signal output to the other load falls from the energization period, the standard PWM signal output to the first load is the other so that the standard PWM signal applied to the other load rises. The standard PWM signal that is deviated from the standard PWM signal output to the other load and applied to the other load when the standard PWM signal output to the first load falls from the energization period. So that the continuous non-energization period output to the one load is shifted from the continuous non-energization period output to the other load,
If it corresponds to a value exceeding the standard duty ratio (standard super level), a continuous energization period and the standard PWM signal are switched and output at a ratio according to the voltage level of the drive command, and When the standard PWM signal output to one load falls from the energization period, the standard PWM signal output to the first load is such that the standard PWM signal applied to the other load rises. A standard PWM signal that is deviated from a standard PWM signal output to another load and that is applied to the other load when the standard PWM signal output to the first load rises from the energization period. So that the continuous energization period output to the one load deviates from the continuous energization period output to the other load. Law. When the standard duty ratio is set to (100 / m)% (m = n),
The power supply voltage is V (B), the output level of the drive command is V (IN), the output period of the standard PWM signal is t1, the continuous non-energization period is t2, and the continuous energization period is t3. Then
When the output level of the load drive command is less than the standard level,
V (IN) = t1 / (t1 + t2) × V (B) / m
The ratio of the periods t1, t2 is set so that
When the output level of the load drive command is the standard super level,
V (IN) = (t1 / m + t3) / (t1 + t3) × V (B)
The load driving method according to claim 8, wherein a ratio between the periods t1 and t3 is set so as to satisfy The output period of the standard PWM signal and the continuous non-energization period are alternately repeated in a predetermined pattern in a control cycle (t1 + t2) according to the ratio of the periods t1 and t2, and the periods t1 and t3 10. The load driving method according to claim 9, wherein an output period of the standard PWM signal and the continuous energization period are alternately repeated in a predetermined pattern within a control cycle (t1 + t3) according to the ratio. According to the ratio between the periods t1 and t2, the output period of the standard PWM signal and the continuous non-energization period are randomly distributed within the control cycle (t1 + t2), and according to the ratio between the periods t1 and t3. The load driving method according to claim 10, wherein an output period of the standard PWM signal and the continuous energization period are randomly distributed within a control cycle (t 1 + t 3). When a signal output pattern for the plurality of loads is determined according to the drive command, start-up control is performed so that the output period of the standard PWM signal is gradually increased from “0” to the determined period. The load driving method according to claim 8. A signal output cycle determined by the sum of the continuous non-energization period and the output period of the standard PWM signal, or a signal output cycle determined by the sum of the continuous energization period and the output period of the standard PWM signal is randomly selected. The load driving method according to any one of claims 8 to 12, wherein the load driving method is controlled so that an average of the output values within a predetermined period becomes an output level corresponding to the driving command. The load driving method according to any one of claims 8 to 13, wherein the standard PWM signal is output in a trapezoidal waveform with a phase in which a rising period and a falling period of the waveform do not overlap.

Images