JP4242245B2 - Flash ROM control device - Google Patents

Description

  The present invention relates to a flash ROM control device disposed between a flash ROM such as a NAND flash ROM and a computer system (hereinafter referred to as a PC).

  The NAND flash ROM has a feature that data cannot be overwritten, and when data is rewritten, the changed data must be rewritten after being erased in a unit called a block. In such a block erase type flash ROM, there is a further limit on the guaranteed number of erasures. In general, if erasing is performed from the fourth power of 10 to the fifth power of 10, it becomes a defective block. Therefore, it is conceivable to employ a FAT file system as a method for solving this problem and extending the life of the flash ROM. In this FAT file system, it is possible to prevent rewriting of data in the data area. However, since rewriting of a specific area such as a file management area frequently occurs, the number of times of erasure in this part increases extremely. There is an inconvenience that the life of the entire product is shortened. In addition, since a very long processing time is required for block erasure, if block erasure is executed every time data is changed, there is a problem that the processing speed required for rewriting becomes very slow.

Therefore, a method is proposed in which a flash ROM control device is arranged between the host and the flash ROM, and a logical-to-physical conversion table for converting a logical address and a physical address is provided in this control device, and garbage collection is performed at an appropriate timing. Has been. In this method, when data rewrite to the same logical address occurs by the logical-to-physical conversion table arranged in the flash ROM control device, the physical address can be changed every time it occurs. It is possible to increase the speed and reduce the number of times of erasure, and furthermore, unnecessary data in the flash ROM can be erased at a certain timing by appropriate garbage collection (see, for example, Patent Document 1).
JP 2002-32256 A

  As described above, by providing a logical-to-physical conversion table in the flash ROM control device instead of the FAT file system, data can be written in an empty area when rewriting occurs. However, since garbage collection is used to erase unnecessary data generated thereafter, there is a disadvantage that it takes a long time for the processing. In general, garbage collection erases unnecessary data while searching for it, and includes processing for transferring data between sectors and table update operation. Therefore, these processing for the entire flash ROM can be performed in a short time. It is almost impossible to do. Also, the timing of starting garbage collection is difficult, and if the interval for garbage collection is too long, there is a possibility that empty sectors will be lost and rewriting will not be possible, and if the interval is too short, the overall throughput will be significantly reduced. There is a problem.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a flash ROM control device that can increase the processing speed and extend the product life of a flash ROM by managing the number of rewrites to the same logical address by generation number.

  The flash ROM control device of the present invention manages the number of rewrite occurrences for the same logical address with a generation number. That is, when rewriting to the same logical address occurs, the physical address for the same logical address is changed, and this is reflected in the logical → physical conversion table. The number of changes of the physical address at this time is recorded as a generation number.

  In the present invention, in order to manage this generation number, a physical → logical conversion table is provided in addition to the logical → physical conversion table. This physical-to-logical conversion table stores logical addresses for the same physical address, and is a table for converting physical addresses into logical addresses.

  In the generation number management of the present invention, when the generation number reaches a predetermined maximum value, all physical addresses corresponding to the logical address are extracted by referring to the physical-to-logical conversion table, and the physical address is invalidated. Perform processing. As a result of the invalidation process, when a block having no valid area is found, the block is erased.

  In the present invention, a logical → physical conversion table and a physical → logical conversion table are provided in this way, and the control unit refers to these tables to perform generation number management and find a block with no effective area. Since the process of erasing the block is sometimes performed, it is possible to increase the speed at the time of data writing, and it is necessary to frequently perform the garbage collection process by appropriately performing the block erasure irrespective of the data rewrite timing. As a result, the throughput of the flash ROM can be improved and the life of the flash ROM can be extended.

  By making the initial value of the generation number different for each logical address, it is possible to prevent the generation number for each logical address from reaching the maximum value at the same time. This prevents a temporary significant decrease in throughput and ensures system stability.

  When the generation number reaches the maximum value and all the physical addresses corresponding to the logical address of the generation number are invalidated, generation change processing is performed to return the generation number to the initial value. By doing so, the logical address whose generation number has reached the maximum value can be used again from the initial value.

  According to the present invention, it is not necessary to perform processing such as block erasure before data writing, and sequential writing to an unused area can be performed, so that high-speed writing and long life of the flash ROM can be achieved. Also, by providing a physical-to-logical conversion table and performing generation number management, it is possible to secure a free area by invalidation processing that is not garbage collection, thereby improving the system throughput.

  FIG. 1 is a configuration diagram of a flash ROM control apparatus according to an embodiment of the present invention.

  The flash ROM control device 1 is connected to a host (personal computer) 2 via a host I / F 10 and reads / writes data from / to the flash ROM 3 in response to a request from the host 2.

  The flash ROM control device 1 is connected to one or more flash ROMs 3 via a flash ROM I / F 11. In this flash ROM control device 1, the data bus is shared in the connection line with the flash ROM 3, and all or part of the control signals are separately connected to each flash ROM, thereby connecting to a plurality of flash ROMs. Is possible.

  In addition to the I / F, the flash ROM control device 1 includes a CPU, a ROM, a RAM, a data transfer buffer, a sequencer, and ECC addition / correction elements.

  The flash ROM 3 is composed of a block erase type NAND flash ROM, and erases data in units of blocks. In addition, a sequential access method in which access is made in units of pages is adopted instead of a random access method in which access is made in units of bytes or words.

  The following operations are performed when reading the flash ROM 3.

  As shown in FIG. 2, when a first command is issued, a read command (1) is issued, a page address and a column address are designated, and a read command (2) is issued. Then, the flash ROM enters a BUSY state, and a waiting time occurs here. When the BUSY state is released, page data is prepared in the buffer in the flash ROM, and this data is read by this apparatus.

  When writing to the flash ROM 3, the following operation is performed.

  As shown in FIG. 3, when a first command is issued, a data input command is issued, and then a page address and a column address are designated. Next, the page data to be written is transferred to the flash ROM, and a program command is issued at A in the figure. Then, the flash ROM enters the BUSY state, and a waiting time occurs here. When the writing operation in the flash ROM is completed, the BUSY state is released, and the apparatus issues a read status command at B in the drawing, reads the writing result (status in the drawing), and performs error determination.

  The flash ROM 3 is a block unit which is an erase unit, a cluster unit which is a unit (management unit) smaller than the block unit, a page unit which is a read / write or write unit for each command to the flash ROM, and a request from the host. Control and management are performed in units of sectors which are units of a certain logical address (LBA). The relationship between these units is as follows.

  A page is composed of a single sector or a plurality of sectors.

  A cluster is composed of a single page or a plurality of pages.

  A block is composed of a single cluster or a plurality of clusters.

  The flash ROM 3 is composed of a single block or a plurality of blocks.

  The sector is composed of 512-byte data and a 16-byte redundant part.

  The sector is composed of two ECC units and a redundant part. The ECC unit is a collection of 256-byte data and 4-byte ECC information that can be subjected to random 1-bit error correction for the data. Therefore, random errors of up to 2 bits per sector (in each ECC unit) can be corrected. The redundant part includes management information such as cluster information.

  Usually, since there are a plurality of sectors in a cluster, a plurality of management information is included. Therefore, since the multiplexed management information is acquired, highly reliable management information can be obtained.

  Since the data to be written to the redundant part in the sector is multiplexed as described above, the same data is written many times. In this apparatus, the software overhead is reduced and speeded up by setting the hardware register once and automatically adding it to the flash ROM.

  In this apparatus, ECC information is added at the time of data transfer to the flash ROM, and ECC information is read at the time of data transfer from the flash ROM and error correction is automatically performed to ensure high reliability.

  In the present apparatus, the processing shown in FIG. 5 is performed when transferring the data part and ECC pair to the present apparatus side at the time of data reading. The figure shows a time chart of conventional data transfer and a time chart of data transfer in this apparatus.

  That is, in the conventional method, 512-byte data and the redundant part are stored in a completely separated manner, so that the ECC information for the 512-byte data is obtained after reading the 512-byte data, and then by ECC. Error determination / correction was performed, and then data transfer to the host was performed.

  On the other hand, since this apparatus writes ECC information every 256 bytes, after reading Data 1 and ECC information 1 stored as a pair with the data, error discrimination / correction based on the ECC is performed. And transfer data to the host. When data 1 is being transferred, the next data Data 2 and ECC information 2 are simultaneously read. This makes it possible to read data at high speed.

  In the present apparatus, a logical-to-physical conversion table for converting a logical cluster address (logical address of the present invention) into a physical cluster number (physical address of the present invention) in a flash ROM is provided in the RAM. When there is a read request from the host 2, the physical cluster number is obtained by referring to this table. When there is a write request from the host 2, an unused physical cluster number is obtained by referring to an unused physical cluster number table, which will be described later, and cluster data is written to this physical cluster. Then, each table is updated. In this apparatus, a block erase type flash ROM is used, but a sequence for performing block erase before writing is not necessary. By using the logical-to-physical conversion table, the physical cluster number corresponding to the logical cluster address including the LBA for each sector to be written is determined from the host 2, and writing to this physical cluster number is performed simultaneously. Update the physical conversion table. The physical cluster number to be written is an empty cluster area in the flash ROM.

  This apparatus includes a physical → logical conversion table for performing generation number management (described later) and the like. This physical → logical conversion table is a table for converting a physical address (physical cluster number) of the flash ROM 3 into a logical cluster address (logical address).

  FIG. 6 shows the above table.

  In FIG. 6, a logical-to-physical conversion table T1 converts a logical cluster address into a physical cluster number of the flash ROM 3, and a physical-to-logical conversion table T2 converts the physical cluster number into a logical cluster address.

  This apparatus further includes a block status table (BST) T3. This block status table T3 holds the number of valid clusters (corresponding to the valid area of the present invention), defective block status, and erase status in the block.

  FIG. 7 is a diagram for explaining the stored contents of each table, which is very simplified for easy understanding.

  This apparatus reports a capacity smaller than the physical maximum capacity of the flash ROM in response to an inquiry from the host. In FIG. 7, since the maximum physical cluster number (address) of the flash ROM is 7, a value smaller than this is reported to the host side. In the figure, the host side is informed that the maximum address is 5. That is, 0 to 5 addresses are prepared in the logical-to-physical conversion table T1, and thereby, an address space of 0 to 5 is prepared on the host side. A physical-to-logical conversion table T2 having the same address space as the flash ROM is prepared. As many block status tables T3 as the number of blocks in the flash ROM are prepared. Here, the number of blocks is 4 (0 to 3), and each block is composed of two clusters.

  In FIG. 7, when a command for writing “A” at address 0 is first issued on the host side, the logical → physical conversion table T1 is associated with 0 which is an empty cluster address of the flash ROM, and the generation number is an initial value. Remember that it is 1. As a result, “0: 1” (0 indicates the physical cluster number 0 of the flash ROM and 1 indicates the initial value of the generation number) is stored in the address 0 of the logical → physical conversion table T1. At the same time, the logical cluster address 0 is stored in the address 0 of the physical → logical conversion table T2. Further, data A is written to the physical cluster address 0 of the flash ROM, and “0: 1” is also stored in the redundant portion.

  Next, on the host side, when data “B” is written to address 3 of the host side memory and a write command is issued, data “B” is written to cluster number 1 of the flash ROM, and logical → physical The logical cluster address 3 of the conversion table T1 stores “1: 1” (1 on the left side indicates the physical cluster number 1 of the flash ROM, and the initial value of the 1 generation number on the right side). Further, the logical cluster address 3 is stored in the address 1 of the physical → logical conversion table T2. In addition, in the physical cluster number 1 of the flash ROM, “3: 1” (3 is the logical cluster address and 1 is the initial value of the generation number) is written in the redundant portion together with the data “B”.

  Subsequently, when a write command for rewriting the data at address 0 to “C” is issued on the host side, the data “C” is written to the area of the free physical cluster number 2 in the flash ROM. In addition, the logical cluster address 0 of the logical → physical conversion table T1 is updated to “2: 2” (the first 2 is the physical cluster number and the last 2 is the generation number increased by one). In addition, 0 which is a logical cluster address is stored in address 2 of the physical → logical conversion table T2. Further, “0: 2” (0 is the logical cluster address and 2 is the generation number) is written in the redundant part of the physical cluster number 2 of the flash ROM.

  In the block status table T3, statuses for four blocks 0 to 3 are stored. The status includes the number of valid clusters (other than FFh and FEh), a defective block state (indicating whether or not the block is defective: FEh), and an erased state (whether or not the block is erased and in an unused state: FFh) Is included. Initially, FFh is stored in each address of the block status table T3, and the status is in the erased state (unused state). When data “A” is written to physical cluster number 0 of block 0, “1” (indicating that the number of valid clusters is 1) is stored at address 0. Next, when data “B” is written to physical cluster number 1 of block 0, “1” → “2” (indicating that the number of valid clusters has changed from 1 to 2). Further, when the data “C” is written to the physical cluster number 2 of the block 1, “2” → “1” (indicating that the number of valid clusters is 1) is obtained. In the address 1 of the block status table T3, when the data “C” is written to the physical cluster number 2 of the block 1, “1” is obtained and the fact that the number of valid clusters is 1 is stored. As will be described later, when an invalidation process for invalidating a physical cluster is performed, a block without a valid cluster is also detected at the same time, and an erasure process is performed on the block. Reference is made to the number of valid clusters in T3. If an erasure process is performed on the block at this time, FFh is stored in the area corresponding to the block and the erasure state (unused state) is set. Also, when a block becomes defective, such as when a write error occurs, status FEh, which is a defective block, is stored.

  As shown in FIG. 7, in this apparatus, since the host side is notified in advance of a capacity smaller than the physical maximum capacity of the flash ROM, it is possible to always secure a writable (erased) block. I have to. This empty block is called a logical empty block number.

  Next, generation number management will be described.

  In this apparatus, generation number management means that each time data is updated for a logical cluster address, the number of changes of the physical cluster number for that logical cluster address is assigned as a generation number. Further, it means that all physical cluster numbers corresponding to the logical cluster address are invalidated when the assigned generation number reaches a predetermined maximum value.

  As shown in FIG. 7, the generation number is stored in the logical-to-physical conversion table T1, and is also stored in the corresponding physical cluster number area of the flash ROM. In the invalidation processing performed when the generation number when data is rewritten reaches the maximum value, all physical clusters corresponding to the logical cluster (all physical cluster numbers corresponding to the logical cluster address) (Cluster data) is invalidated and a new minimum generation number is allocated. This process is called a generation change operation.

  The initial value of the generation number may be the same initial value for each logical cluster address, but by appropriately varying this initial value, the generation number of each cluster can simultaneously reach the maximum value. Can be prevented. As a result, a temporary significant decrease in throughput can be prevented, and the stability of the system can be ensured.

  In FIG. 7, when “x” is stored in the redundant part of the flash ROM, it indicates that the physical cluster is invalidated by the invalidation process. Of course, no data is written to the invalid physical cluster, and when all clusters in the block containing the invalid physical cluster become invalid in the future, the block is erased and initialized. Put into a state.

  With the above generation number management, there is no need to erase blocks before writing data, and the blocks to be erased are distributed to enable sequential writing to unused clusters, resulting in higher speed and longer life. Can be realized. That is, in the conventional method, first, the block is erased and then the data writing process is started. However, in this apparatus, it is not necessary to erase the block before the data is written. Therefore, the request from the host can be terminated without any problem, and the throughput of the entire system is remarkably improved. In addition, since the free space is secured by invalidating the physical cluster and erasing when there is no valid cluster, the processing time is distributed over conventional free space secure processing such as garbage collection. And can be performed in a short time.

  In the description with reference to FIG. 7 above, in order to simplify the description, the selection of physical clusters at the time of writing data is selected in order from the smallest cluster number. When the selected physical cluster is invalid (x is stored), the cluster with the next number is selected. However, in practice, in such a method, the physical cluster selected by repeating the invalidation process becomes distorted. In other words, it can be said that the physical cluster number corresponding to the same logical cluster address should be in the same block, but it is invalidated simply by selecting the free physical cluster for writing from the smallest number in order. When the process is repeated, a physical cluster corresponding to the same logical cluster address may be distorted between a plurality of blocks.

  Therefore, in this apparatus, as shown in FIG. 7, an unused physical cluster number table T4 is provided. This table T4 shows a block number with an unused physical cluster and an unused cluster number for the block number. In the example shown in FIG. 7, for the block 1, the physical cluster number 3 indicates an unused physical cluster, and for the block 2, the physical cluster numbers 4 and 5 indicate an unused physical cluster. The table T4 is updated when data writing processing and erasing processing are performed on the flash ROM. By using this table T4 and selecting a physical cluster when data is newly written, it is possible to assign as many physical cluster numbers corresponding to the same logical cluster address as possible to the same block.

  In this apparatus, as described above, the flash ROM management unit is a cluster unit that is smaller than the block unit that is the erase unit and larger than the page unit that is the read or write unit to the flash ROM (of course, (It is larger than the sector unit, which is the unit when a command is issued from the host). In this way, if managed in cluster units, the overhead during rewriting when managed in block units can be prevented from becoming too large, and conversely management complexity when managed in page units can be avoided. it can. That is, a cluster unit is just right for improving the overall throughput.

  In addition, the cluster is more adaptable to the FAT file system used in normal computer systems. That is, in the FAT file system, since it is known that the data area is normally accessed in cluster units, the start sector of the data area is made to coincide with the cluster boundary of the apparatus, and the cluster of the apparatus is set. If the format is performed so that the size matches the cluster size in the file system, the compatibility of the FAT file system and the flash ROM becomes extremely good, and efficient access is possible and speeding up is possible.

  FIG. 8 shows a state where the boundary position and size are matched in this way. That is, the format parameter is adjusted so that the data cluster in the file system is started from the cluster m in the flash ROM. In FIG. 8, since the management area in the figure generally has an access smaller than the cluster size, if the cluster 0 to cluster m-1 are managed at a smaller size in this apparatus, Speeding up can be further promoted.

  FIG. 9 shows the reason why high speed at the time of writing is realized in this apparatus.

  In the conventional method for block management, as shown in the figure, after reading the existing block data from the flash ROM, the block is erased, new block data is written to the block, and writing is waited for. finish.

  In the conventional method of performing block management, it is necessary to erase the block first, so that a long writing time cannot be avoided. In view of this, it is conceivable to use a logical-to-physical conversion table and perform cluster management so that block erasure is not necessary. In this cluster management, the existing cluster data in the flash ROM is first read and updated to new cluster data, and then writing is performed after waiting for completion of writing to invalidate the cluster. Wait for. However, even in this method, a write time for invalidating the existing cluster is required. On the other hand, in this device that performs generation management, write new cluster data, wait for the completion of writing, or read existing cluster data from the flash ROM if necessary, then write new cluster data, It is only necessary to wait for the completion of the writing. By performing this generation management, it is not necessary to invalidate the existing cluster each time data is written, so the writing time is greatly increased.

  Next, an embodiment of the present apparatus will be described.

  FIG. 10 is a block diagram of the first embodiment. In this embodiment, the flash ROM 1 and the flash ROM 2 are connected to the flash ROM control device 1. For the connection, the data bus is shared, and the R / W Strobe signal is connected to each flash ROM. In addition, a Chip Enable signal is connected to each flash ROM as a common control signal. Here, the flash ROM 1 is group 1 and the flash ROM 2 is group 2. Further, as shown in FIG. 11, each group is alternately allocated for each page which is an access unit from the flash ROM control device 1. By allocating as shown in FIG. 11, the access order of the physical cluster 0 is as follows: page 0 of group 1 → page 0 of group 2 → page 1 of group 1 → page 1 of group 2. In FIG. 11, the inverted cluster is information (inverted cluster information) for preventing the data order from being inverted when reading data when transferring data between groups, as will be described in detail later. Refers to the added cluster. This will be described later.

  Therefore, when the physical cluster 0 is an inverted cluster in FIG. 11, the access order is page 0 of group 2 → page 0 of group 1 → page 1 of group 2 → page 1 of group 1.

  In this apparatus, at the time of reading, as shown in the following example, two groups are transferred alternately, thereby performing control to transfer the data of the other flash ROM during the waiting time of one flash ROM.

  (1) Issue a read command to group 1.

  (2) Issue a read command to group 2.

  (3) Transfer group 1 data to the host. After the transfer is completed, the next read command is issued to group 1.

  (4) Transfer group 2 data to the host. After the transfer is completed, the next read command is issued to group 2.

  (5) Return to (3).

  At the time of writing, control is performed to transfer the data of the other flash ROM during the waiting time of one flash ROM by transferring the two groups alternately as in the following example.

  (1) Issue a data input command to group 1, transfer write data, and issue a write command.

  (2) A data input command is issued to group 2, write data is transferred, and a write command is issued.

  (3) Wait for the completion of group 1 writing and perform error determination. If writing is completed normally, a data input command is issued, write data is transferred, and a write command is issued.

  (4) Wait for the completion of group 2 writing and perform error determination. If writing is completed normally, a data input command is issued, write data is transferred, and a write command is issued.

  (5) Return to (3).

  When transferring cluster data at the time of garbage collection, in the conventional method, it is necessary to once read the cluster data into a storage unit such as a RAM and then write it again. In this apparatus, an R / W Strobe signal is sent to both groups at the same time, and one is read and the other is operated by writing, so that reading and writing can be performed simultaneously in one operation. Thereby, it is possible to speed up data transfer between groups. However, as described above, when data is transferred, it is necessary to change the reading order depending on whether the cluster data is an inverted cluster or not. In other words, when transferring data between groups, group 1 → group 2 or group 2 → group 1 is transferred, and the order of the copied cluster data is reversed for each page with respect to the copy source cluster data. End up. Therefore, cluster information indicating an inverted cluster is recorded at the time of transfer, and the other group is selected at the time of group selection at the time of reading.

  When erasing both the group 1 and group 2 blocks, the commands can be issued almost simultaneously, so it is possible to simultaneously erase two blocks within the execution time of one erase command.

  Next, a specific operation of the flash ROM control device 1 will be described with reference to FIG.

  FIG. 12 shows an operation when a read command is issued from the host. The process proceeds from step 100 to step 107. In step 107, a group corresponding to command issue is selected, and a read command with the corresponding page number is issued to the flash ROM. In step 108, the number of data transfer sectors is stored for data transfer. However, when the command for the number of transfer sectors in the cluster is issued, the command is not issued here.

  In step 108, the group corresponding to the data transfer is selected, the sequencer in the apparatus is activated, and the data from the flash ROM is transferred to the host via the host I / F. However, the group corresponding to the data transfer is another group different from the group corresponding to the command issuance. If the command is not issued to the flash ROM, data transfer is not performed. Whether or not a command to the flash ROM has been issued is determined by referring to the number of data transfer sectors stored in step 107.

  In step 112, the page number is incremented and the group number is switched as follows.

  If the group number is 1, it is changed to 2.

  If the group number is 2, change it to 1.

  In step 113, since the transfer within the cluster is once completed, it is determined that the next transfer is from the beginning of the cluster, and the number of offset pages in the cluster, the number of offset sectors in the cluster, and the number of offset sectors in the page are set to 0. Keep it.

  By performing processing for each group in steps 107 to 112, even if one flash ROM is in a busy state, the other flash ROM can be controlled, so that it can be read at high speed.

  FIG. 13 shows the operation when a write command is issued from the host.

  In step 202, it is determined from the number of offset pages in the cluster, the number of offset sectors in the cluster, the number of offset sectors in the page, and the total number of transfer sectors calculated in step 200 whether or not the data to be written will be rewritten in the entire cluster. .

  Steps 204 to 209 are a procedure for saving data to the RAM in the apparatus when rewriting a part in the cluster, or a procedure for creating dummy data, and a procedure for writing the data updated in the RAM into the flash ROM again. Is shown. When the cluster data of the source cluster is stored in the RAM in step 205, a write command is issued to the flash ROM of another page when waiting for completion of reading, and the data updated on the RAM is issued to the command. Writing to the flash ROM of the selected page enables high-speed writing.

  In step 213, it is determined whether the number of valid clusters in the source block is 1. If the number of valid clusters is 1, block erasure processing is performed for the source block, and the block status table and physical → logical conversion table are updated. If the number of valid clusters in the source block is other than 1, the block status table and physical → logical conversion table are updated in step 215.

  FIG. 14 is a flowchart showing the operation of step 211 in FIG. When the cluster data is written from the host I / F to the flash ROM, as shown in step 202 of FIG. 13, the data to be written is data that rewrites the entire cluster.

  In step 302, a value obtained by adding 1 to the generation number of the cluster assigned to the cluster to be written is assigned to the write cluster. However, before that, in step 300, it is determined whether or not the generation number has reached the maximum value. If the generation number reaches the maximum value, generation change processing is performed in step 301.

  The generation change process is a process of erasing or discarding all physical clusters assigned to the logical cluster address to be written. By performing this processing, the initial value of the generation number is assigned to the cluster to be written.

  In step 306, it is confirmed that the group to be written is ready. If not ready, it waits until it becomes ready.

  In step 307, a data input command is sent to the group to be written, and data is transferred from the host I / F to the flash ROM by the sequencer. When the transfer is completed, a program command is issued to the flash ROM. In step 309, the group selected in step 306 is switched. In this embodiment, since there are two flash ROMs, if the group number is 2, the page address issued along with the data input command issued in step 307 is incremented.

  By performing processing for each group in a series of processing in steps 306 to 309, even when one flash ROM is in the Busy state, the other flash ROM can be controlled. For this reason, writing can be speeded up.

  FIG. 15 is a flowchart showing a procedure for writing cluster data from the RAM to the flash ROM. This operation is performed in step 209 in FIG. 13 and is selected when the data to be written is rewritten into a part of the cluster.

  In step 402, a value obtained by adding 1 to the generation number of the cluster assigned to the cluster to be written is assigned to the write cluster. However, before that, in step 400, it is determined whether or not the maximum value is reached. If the maximum value is reached, generation change processing is performed in step 401.

  The generation change process is as described above.

  In step 406, it is confirmed that the group to be written is ready. If not ready, it waits until it becomes ready.

  In step 407, a data input command is sent to the group to be written, and data is transferred from the RAM to the flash ROM by the sequencer. When transfer is completed, a program command is issued to the flash ROM.

  In step 409, the group selected in step 406 is switched. In this embodiment, since there are two flash ROMs, if the group number is 2, the page address issued along with the data input command issued in step 407 is incremented.

  By performing processing for each group in a series of processing in steps 406 to 409, even when one flash ROM is in the Busy state, the other flash ROM can be controlled. For this reason, it is possible to increase the writing speed.

  FIG. 16 is a flowchart showing a procedure for storing data of the source cluster in the RAM. This operation is executed in step 205 in FIG.

  The reason why the data of the source cluster (cluster data) is temporarily stored in the RAM is to update the cluster data after the data is stored in the RAM and write it again into the flash ROM.

  In step 502, a read command with the calculated page address is issued in step 503.

  If data transfer is in progress at step 505, the completion of data transfer is awaited. At this time, if a data transfer error or a data error (an error that cannot be corrected by ECC) occurs, the process proceeds to step 592 and the error ends.

  In step 505, the group a is first selected, the sequencer is activated, and data transfer is performed.

  Since the read command has already been issued in step 503 or the previous step 505, the flash ROM in group a performs data transfer after waiting for the sequencer to become ready.

  In step 506, group b is selected, the sequencer is activated, and data transfer is performed.

  Since the read command has already been issued in step 503 or the previous step 506, the flash ROM in group b performs data transfer after waiting for the sequencer to become ready.

  By performing processing for each group in a series of processing in steps 503 to 508, even when one flash ROM is in the Busy state, the other flash ROM can be controlled. This enables high-speed processing.

  FIG. 17 is a flowchart showing the write error process. This write error process is a process performed in step 219 of FIG.

  In steps 602 to 604, an unused cluster number is acquired. The unused cluster number is acquired from the unused physical cluster number table T4 shown in FIG. The unused cluster number list in step 602 indicates this table T4.

  If an unused cluster number is not found, the apparatus is switched to a read-only mode so that no further writing can be performed and a read-permitted mode is set. If a write request from the host is being processed, a write error is reported to the host.

  In step 607, the content of the valid cluster in the block in which the write error has occurred is copied to a normal unused block using the copy function between the flash ROMs of this apparatus. As already mentioned, this copy is very fast because it takes place directly between the flash ROMs.

  FIG. 18 is a flowchart showing an operation of acquiring a new write cluster number. This operation is executed in step 216 of FIG.

  In step 700, first, an attempt is made to obtain a new write cluster number from the unused physical cluster number table T4 (unused cluster number list). By doing so, it is not necessary to search the block status table T3 each time, so that the processing speed can be increased.

  If an unused cluster number cannot be acquired in steps 700 to 701, an erased block is searched in the block status table T3.

  In steps 702 to 703, if an erased block cannot be searched or there is only an erased block that is less than the standard, a garbage collection process described later is performed.

  In step 706, if an unused cluster is not found in the processing so far, the apparatus is switched to the read-only mode so that no further writing is possible and reading is permitted. In this case, if a write request from the host is being processed, a write error is reported to the host.

  FIG. 19 shows the generation change process.

  The generation change process uses the physical → logical table T2. That is, in step 900, the number of valid clusters in the block or the block status is obtained from the block status table T3. In the block status table T3, the number of valid clusters is stored in the case of a normal block, and the block status is stored in the case of a special block (unused block, defective block, etc.). Next, in step 901, it is determined whether or not the block is a special block. If the block is a special block, the process proceeds to step 901 → 907 to perform processing for the next block.

  If it is determined in step 901 that the block is a normal block, it is determined in step 902 whether there is a valid cluster in the block. If there is a valid cluster, in step 904, the physical cluster number assigned to the designated logical cluster address is searched for the corresponding block by using the physical-to-logical conversion table T2. If the assigned physical cluster number is found, the physical cluster number in the block is stored.

  If there is no valid cluster in the block in step 902, block erasure is performed in step 903.

  After the processing in step 904, the process proceeds to step 905, where it is determined whether one or more corresponding physical clusters have been found. If one or more are found, in step 906, a mark indicating that the physical cluster stored in step 904 is invalid is stored. If no corresponding physical cluster is found in step 905, the process proceeds to step 907.

  The above steps 900 and thereafter are performed for all blocks (step 907).

  When the generation change process described above is performed, there is no cluster assigned to the designated logical cluster address. Therefore, after this process, the initial value of the generation number can be assigned and data can be written to the cluster.

  In this device, invalidation processing as described above is performed in the normal state to secure unused blocks (valid blocks). However, when there are fewer unused blocks, invalidation processing may not be possible. There is sex. Therefore, if the number of valid blocks does not exceed a certain level even after block erasing processing, garbage collection is performed to secure a new unused cluster. Garbage collection is performed by referring to the block status table T3 and targets the block with the smallest number of valid clusters. By doing so, the number of times of transfer of the cluster data can be reduced, and thereby high speed can be expected.

  Garbage collection targets blocks with a small number of valid clusters searched in this way, thereby reducing the time to copy the contents of valid clusters to unused clusters and maximizing the remaining unused clusters. It can be so.

  FIG. 21 is a diagram for explaining an advantage when the target of garbage collection is a block with a small number of effective clusters. As shown in the figure, when the number of valid clusters in a block is small, the number of copies when valid clusters are copied to unused clusters is reduced by making this block the target of garbage collection. And the number of unused clusters that can be secured increases. On the other hand, if the target of garbage collection is a block with a large number of valid clusters, or if garbage collection is performed without considering anything, the number of valid clusters to be copied increases and can be secured. The number of clusters is reduced.

  Therefore, by making the garbage collection processing target a block with a small number of valid clusters, the copy time can be shortened and the number of unused clusters can be secured to the maximum. Therefore, the occurrence frequency of the garbage collection process can also be suppressed.

  FIG. 20 is a flowchart showing the operation of garbage collection.

  In step 801, cluster information of valid clusters in the source block is acquired from the logical → physical conversion table T1 and physical → logical conversion table T2.

  In step 802, a new write cluster number is obtained from the unused physical cluster number table T4 (unused cluster number list). If an unused cluster number is not acquired, the process ends in error.

  In step 805, copying is performed at high speed using the flash ROM copy function of the apparatus. That is, when the sequencer is activated, the group 1 flash ROM is set to the read mode, the group 2 flash ROM is set to the write mode, and the R / W Strobe signal is output to each group 1 flash. The ROM page data is directly transferred to the group 2 flash ROM.

  In steps 803 to 812, only the page of one group of the cluster is copied, and in steps 813 to 814, the group is switched and the process returns to step 803 to copy the page of the other group. As described above, by copying for each group, the contents of the cluster are inverted for each page, but the inter-flash ROM copy of this apparatus can be used. FIG. 22 shows this state.

  FIG. 23 shows a block diagram of the second embodiment of the present invention.

  10 is different from the first embodiment shown in FIG. 10 in that four flash ROMs are connected to the flash ROM control device 1, the flash ROMs 1 and 2 form a group 1, and the flash ROMs 3 and 4 form a group 2. It is the point which constitutes. In order to select the two flash ROMs in the group, two Chip Enable signals are connected to each flash ROM in the group. Thereby, separate control becomes possible. FIG. 24 shows a page allocation method. The access order of the physical cluster 0 is as shown in FIG. The same applies to the physical cluster 1 and the physical cluster 2.

  At the time of reading, the data of the other flash ROM is transferred during the waiting time of one flash ROM by sequentially transferring the four flash ROMs as follows, and the speed can be increased.

  (1) A read command is issued to the flash ROM 1.

  (2) A read command is issued to the flash ROM 2.

  (3) A read command is issued to the flash ROM 3.

  (4) A read command is issued to the flash ROM 4.

  (5) Transfer the data in the flash ROM 1 to the host. After the transfer is completed, the next read command is issued to the flash ROM 1.

  (6) Transfer the data in the flash ROM 2 to the host. After the transfer is completed, the next read command is issued to the flash ROM 2.

  (7) Transfer the data in the flash ROM 3 to the host. After the transfer is completed, the next read command is issued to the flash ROM 3.

  (8) Transfer the data in the flash ROM 4 to the host. After the transfer is completed, the next read command is issued to the flash ROM 4.

(9) Return to (5).
At the time of writing, by sequentially transferring the four flash ROMs as follows, other data is transferred during the waiting time of the flash ROM, and the speed can be increased.

  (1) A data input command is issued to the flash ROM 1, write data is transferred, and a write command is issued.

  (2) A data input command is issued to the flash ROM 2, write data is transferred, and a write command is issued.

  (3) A data input command is issued to the flash ROM 3, write data is transferred, and a write command is issued.

  (4) A data input command is issued to the flash ROM 4, write data is transferred, and a write command is issued.

  (5) Wait for completion of writing in the flash ROM 1 and perform error determination. If writing is completed normally, a data input command is issued, write data is transferred, and a write command is issued.

  (6) Wait for completion of writing in the flash ROM 2 and perform error determination. If writing is completed normally, a data input command is issued, write data is transferred, and a write command is issued.

  (7) Wait for completion of writing in the flash ROM 3 and determine an error. If writing is completed normally, a data input command is issued, write data is transferred, and a write command is issued.

  (8) Wait for completion of writing in the flash ROM 4 and perform error determination. If writing is completed normally, a data input command is issued, write data is transferred, and a write command is issued.

  (9) Return to (5).

  Conventionally, when transferring cluster data during garbage collection, it has been necessary to read the cluster data once into a storage unit such as a RAM. In this apparatus, by simultaneously outputting R / W Strobe signals to both groups, reading and writing can be performed simultaneously in one operation. Thereby, data transfer between groups can be performed at high speed. Even when erasing a block, four commands can be erased in one execution time in order to issue commands almost simultaneously.

  In this apparatus, the ECC information included in the ECC unit is 3-byte ECC information capable of random 2-bit error detection and 1-bit error correction. Therefore, error detection of up to 4 bits per sector (in each ECC unit), and random errors of up to 2 bits can be corrected. In addition to this, higher reliability can be ensured by using an ECC such as a Read-Solomon code that can detect and correct errors in more bits. .

  The present invention can be applied to a large-capacity flash ROM connection compatible electronic device such as a digital camera to which an external storage flash ROM is connected.

1 is a configuration diagram of a flash ROM control device according to an embodiment of the present invention. Timing chart for reading flash ROM Timing chart when writing to flash ROM Diagram showing the relationship between unit areas The figure which shows the data reading method of the conventional device and this device with respect to the read request from the host Table structure Figure showing table storage contents Comparison of data area between FAT file system and flash ROM Diagram showing the reason why the writing method of this device is faster than the conventional device Configuration diagram of first embodiment of the present invention Diagram showing access order to physical cluster Flow chart showing the operation when issuing a read command Flow chart showing operation when write command is issued Flow chart showing a procedure for writing cluster data from the host I / F to the flash ROM Flowchart showing a procedure for writing cluster data from RAM to flash ROM Flow chart showing operation for saving source cluster data to RAM Flow chart showing write error processing Flow chart showing the operation when a new write cluster number is acquired Flow chart showing generation change processing Flow chart showing garbage collection operations Diagram showing the superiority of garbage collection of this device Illustration for explaining flash ROM copy at the time of garbage collection Configuration diagram of the second embodiment of the present invention Diagram showing access order to physical cluster

Claims (8)

In a flash ROM control device connected between a flash ROM whose flash ROM erase unit is a block unit and a host,
A logical to physical conversion table for converting a logical address per predetermined unit smaller than the block unit into a physical address; and
A physical-to-logical conversion table for converting physical addresses below the predetermined unit into logical addresses;
A controller that writes to the unused unit area of the flash ROM at the time of a write request from the host and updates the logical → physical conversion table and physical → logical conversion table,
The control unit, when updating the logical → physical conversion table, stores the number of physical address changes for the same logical address in the logical → physical conversion table as a generation number, and when the generation number reaches a predetermined maximum value, When all physical addresses corresponding to the logical address of the generation number that has reached the maximum value are extracted by referring to the physical-to-logical conversion table and invalidated, and when the invalidation processing is performed, A flash ROM control device, wherein when a block having no effective area is found, a process of erasing the block is performed. A block status table for storing the number of valid areas of each block and the presence or absence of defects;
Wherein the control unit, flash ROM control apparatus according to claim 1, wherein the finding the block that are no longer effective area by referring to the block status table. 2. The flash ROM control device according to claim 1, wherein the generation number has a different initial value for each logical address. 2. The flash ROM control according to claim 1, wherein when the generation number becomes equal to or greater than the maximum value and the invalidation process is performed, the control unit performs a generation change process for returning the generation number to an initial value. apparatus. 2. The flash according to claim 1, wherein the logical-to-physical conversion table is set to be smaller than the physical-to-logical conversion table, and the size of an accessible physical address is made smaller than an actual size to the host. ROM control device. The unit of writing or reading to the flash ROM is a page unit smaller than the block unit,
The flash ROM control device according to claim 1, wherein the predetermined unit is a cluster unit having a size equal to or smaller than the block unit and equal to or larger than the page unit. The read or write unit from the host is a sector unit equal to or less than the page unit, and the sector includes a plurality of data portions and ECC that is an error correction code corresponding to each data portion in the flash ROM,
The sector is stored for each set of a data portion and an ECC corresponding to the data portion in the flash ROM.
The control unit performs a control to transfer another set of data units read up to that time to the host at the same time when reading a set of the data unit and the ECC at the time of reading, thereby speeding up. The flash ROM control device according to claim 6. 2. The flash according to claim 1, wherein the control unit performs a garbage collection process when the number of unused blocks does not exceed a predetermined value even if a block erasing process is performed when the effective area runs out. 3. ROM control device.

Images