JP4191642B2 - Transflective liquid crystal display device and manufacturing method thereof - Google Patents
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Description
本発明は、表示装置の画素電極として１画素内に光を透過する透過画素電極と光を反射する反射画素電極を有する半透過型液晶表示装置、およびその製造方法に関するものである。 The present invention relates to a transflective liquid crystal display device having a transmissive pixel electrode that transmits light and a reflective pixel electrode that reflects light as a pixel electrode of the display device, and a manufacturing method thereof.
従来の一般的な液晶表示装置として、光源をその背面または側面に配設して画像表示を行う透過型液晶表示装置と、基板に反射板を設置し周囲光を反射板表面で反射させることにより画像表示を行う反射型液晶表示装置がある。透過型液晶表示装置は、周囲光が非常に明るい場合には、周囲光に比べて表示光が暗いため表示を観察できず、表示を観察できるようにするためには光源の強度を上げる必要があり、消費電力が増大するという問題がある。他方、反射型液晶表示装置は、周囲光が暗い場合には視認性が極端に低下するという欠点を有する。これらの問題点を解決するために、１画素内に光を透過する透過画素電極と光を反射する反射画素電極を有する液晶表示装置（以下、半透過型液晶表示装置と称す）が提案されている。 As a conventional general liquid crystal display device, a transmissive liquid crystal display device that displays an image by arranging a light source on the back or side of the light source, and a reflector is installed on the substrate to reflect ambient light on the surface of the reflector There is a reflective liquid crystal display device that performs image display. In a transmissive liquid crystal display device, when the ambient light is very bright, the display light is darker than the ambient light, so the display cannot be observed. In order to be able to observe the display, it is necessary to increase the intensity of the light source. There is a problem that power consumption increases. On the other hand, the reflective liquid crystal display device has a drawback that the visibility is extremely lowered when the ambient light is dark. In order to solve these problems, a liquid crystal display device (hereinafter referred to as a transflective liquid crystal display device) having a transmissive pixel electrode that transmits light and a reflective pixel electrode that reflects light in one pixel has been proposed. Yes.
従来の半透過型液晶表示装置においては、１画素内に透過画素電極と反射画素電極を有するＴＦＴアレイ基板として、透明絶縁性基板上に設けられた第一の導電膜からなる複数本のゲート電極を備えたゲート配線、補助容量電極および補助容量配線と、ゲート配線と第一の絶縁膜を介して交差する第二の導電膜からなる複数本のソース電極を備えたソース配線と、ゲート電極上に第一の絶縁膜を介して設けられた半導体層とソース電極およびドレイン電極からなる薄膜トランジスタ（以下、ＴＦＴと称す）と、ＴＦＴとゲート配線およびソース配線の上部に設けられた第二の絶縁膜および有機樹脂膜からなる層間絶縁膜と、層間絶縁膜に設けられたコンタクトホールを介してＴＦＴのドレイン電極と電気的に接続された透過率の高い導電膜からなる透過画素電極と、透過画素電極と共に設けられた透過率の高い導電膜上に形成され、透過率の高い導電膜およびコンタクトホールを介してＴＦＴのドレイン電極と電気的に接続された反射率の高い導電膜からなる反射画素電極とを備えた構造が開示されている（例えば、特許文献１参照）。
上記文献等に開示された従来の半透過型液晶表示装置においては、液晶駆動時の補助容量は、第二の導電膜からなるドレイン電極を第一の導電膜からなる補助容量電極および補助容量配線の形成領域にまで亘って形成し、第一の絶縁膜を介して補助容量電極および補助容量配線に重畳させることにより形成している。また、光を反射して表示を行う反射部と光を透過して表示を行う透過部の光路長を等しくする、すなわち、反射領域の液晶厚を透過領域の液晶厚の約半分にするために、反射画素電極を層間絶縁膜の上に配置し、透過画素電極を層間絶縁膜および第一の絶縁膜を除去した透明絶縁性基板上に直接配置している。 In the conventional transflective liquid crystal display device disclosed in the above-mentioned documents, the auxiliary capacitance when driving the liquid crystal is the drain electrode made of the second conductive film, the auxiliary capacitance electrode made of the first conductive film, and the auxiliary capacitance wiring. And is formed by superimposing on the auxiliary capacitance electrode and the auxiliary capacitance wiring through the first insulating film. In addition, in order to make the optical path lengths of the reflective part that reflects light and display the same as the optical path length of the transmissive part that transmits light and display, that is, the liquid crystal thickness in the reflective area is about half of the liquid crystal thickness in the transmissive area. The reflective pixel electrode is disposed on the interlayer insulating film, and the transmissive pixel electrode is directly disposed on the transparent insulating substrate from which the interlayer insulating film and the first insulating film are removed.
しかし、反射画素電極を層間絶縁膜の上に配置し、透過画素電極を層間絶縁膜等を除去した透明絶縁性基板上に直接配置する構造では、透過画素電極部の層間絶縁膜を除去することにより生じる層間絶縁膜のエッジ部分において、液晶の配向異常が発生して表示品位を低下させる恐れがある。これを防止するために、層間絶縁膜のエッジ部分を反射画素電極で覆う構造が提示されているが、このエッジ部分における反射光は表示に寄与しないため、開口率を低下させる原因となっていた。また、層間絶縁膜として用いられる有機樹脂は材料コストが高いという問題があった。 However, in the structure in which the reflective pixel electrode is disposed on the interlayer insulating film and the transmissive pixel electrode is directly disposed on the transparent insulating substrate from which the interlayer insulating film or the like is removed, the interlayer insulating film in the transmissive pixel electrode portion is removed. At the edge portion of the interlayer insulating film generated by the above, there is a risk that liquid crystal alignment anomalies may occur and display quality may be lowered. In order to prevent this, a structure has been proposed in which the edge portion of the interlayer insulating film is covered with a reflective pixel electrode, but the reflected light at this edge portion does not contribute to the display, which has caused the aperture ratio to decrease. . Further, the organic resin used as the interlayer insulating film has a problem that the material cost is high.
従来の半透過型液晶表示装置では、反射領域の液晶厚を透過領域の液晶厚の約半分にするための構成として、例えば非特許文献１に示すように、対向基板側において反射領域に対応する位置に透明樹脂により凸部を形成する構造が開示されている。本従来構造においては、有機樹脂からなる層間絶縁膜上に透過画素電極と反射画素電極が形成され、対向基板側には、透過領域の液晶厚の約半分の厚みの凸部が透明樹脂により形成されている。本従来構造においても、材料コストが高い有機樹脂を用いていることにより、製造コストを増大させるという問題があった。
また、反射領域の液晶厚を透過領域の液晶厚の約半分にするために、対向基板側の反射領域に対応する位置に透明樹脂により凸部を形成する構成においては、ＴＦＴアレイ基板に層間絶縁膜を用いない構造も考えられるが、この場合、対向基板側に形成する凸部の厚みは、透過領域の液晶厚の約半分の厚みから、ＴＦＴアレイ基板側の反射画素電極と透過画素電極との高低差分を差し引いた厚みとする必要がある。従来構造においては、画素の開口率を向上させるために、反射画素電極は補助容量を形成する補助容量配線とドレイン電極の形成領域に重ねて設けられるため、反射画素電極と透過画素電極の高低差としては、補助容量配線とドレイン電極および反射画素電極の膜厚をあわせた値となり、その値を透過領域の液晶厚の約半分から差し引いた厚みを有する凸部を対向基板側に形成しなければならないが、透明樹脂からなる凸部は薄く形成することが難しいという問題があった。 In addition, in order to make the liquid crystal thickness in the reflective area about half the liquid crystal thickness in the transmissive area, in the configuration in which the convex portion is formed of transparent resin at the position corresponding to the reflective area on the counter substrate side, interlayer insulation is provided on the TFT array substrate. Although a structure without a film is also conceivable, in this case, the thickness of the convex portion formed on the counter substrate side is approximately half the thickness of the liquid crystal in the transmissive region, so that the reflective pixel electrode and transmissive pixel electrode on the TFT array substrate side It is necessary to make the thickness less the difference in height. In the conventional structure, in order to improve the aperture ratio of the pixel, the reflective pixel electrode is provided so as to overlap with the auxiliary capacitor wiring forming the auxiliary capacitor and the drain electrode forming region, so that the height difference between the reflective pixel electrode and the transmissive pixel electrode is increased. As a result, the thickness of the auxiliary capacitor wiring, the drain electrode, and the reflective pixel electrode is a total value, and a convex portion having a thickness obtained by subtracting that value from about half the liquid crystal thickness of the transmissive region must be formed on the counter substrate side. However, there is a problem that it is difficult to form a thin convex portion made of a transparent resin.
また、従来の半透過型液晶表示装置において、液晶駆動時の補助容量を形成するためのドレイン電極は、画素を囲む配線（ソース配線）と同一層に形成されるため、隣接するソース配線との間隙が狭くなり短絡が生じやすくなるという問題があった。 Further, in the conventional transflective liquid crystal display device, the drain electrode for forming the auxiliary capacitance at the time of driving the liquid crystal is formed in the same layer as the wiring (source wiring) surrounding the pixel. There is a problem that the gap becomes narrow and short-circuiting easily occurs.
本発明は、上記のような問題点を解消するためになされたもので、１画素内に光を透過する透過画素電極と光を反射する反射画素電極を有する半透過型液晶表示装置において、材料コストの高い有機樹脂膜を用いず、かつ歩留まりを低下させずに大きな補助容量を得ることを目的とする。 The present invention has been made to solve the above-described problems. In a transflective liquid crystal display device having a transmissive pixel electrode that transmits light and a reflective pixel electrode that reflects light in one pixel, An object is to obtain a large auxiliary capacity without using a high-cost organic resin film and without reducing the yield.
本発明に係わる半透過型液晶表示装置は、１画素内に光を透過する透過画素電極と光を反射する反射画素電極を有するＴＦＴアレイ基板と、対向透明電極を有する対向基板との間に液晶が配置されてなる半透過型液晶表示装置であって、
ＴＦＴアレイ基板は、
透明絶縁性基板上に形成された第一の導電膜からなるゲート電極を有する複数本のゲート配線と補助容量電極および補助容量配線と、
第一の導電膜の上に形成された第一の絶縁膜と、
第一の絶縁膜上に形成された第二の導電膜からなり、ゲート配線と交差する複数本のソース電極を備えたソース配線およびドレイン電極と、
ゲート電極と、ゲート電極上に第一の絶縁膜を介して形成された半導体層と、ソース電極およびドレイン電極からなる薄膜トランジスタと、
薄膜トランジスタおよび第二の導電膜の上に形成された第二の絶縁膜と、
第二の絶縁膜上に形成され、第二の絶縁膜に形成されたコンタクトホールを介してドレイン電極と電気的に接続された透過率の高い導電膜からなる透過画素電極と、
透過画素電極とともに透過率の高い導電膜で形成された透明導電膜部上に形成され、透明導電膜部およびコンタクトホールを介してドレイン電極に電気的に接続された反射率の高い導電膜からなる反射画素電極を備えており、
反射画素電極は、第一の絶縁膜および第二の絶縁膜を介して補助容量電極および補助容量配線に重畳されて補助容量を形成しているものである。
The transflective liquid crystal display device according to the present invention includes a liquid crystal between a TFT array substrate having a transmissive pixel electrode that transmits light within one pixel and a reflective pixel electrode that reflects light, and a counter substrate having a counter transparent electrode. Is a transflective liquid crystal display device comprising:
TFT array substrate
A plurality of gate wirings having a gate electrode made of a first conductive film formed on a transparent insulating substrate, an auxiliary capacitance electrode, and an auxiliary capacitance wiring;
A first insulating film formed on the first conductive film;
A source wiring and a drain electrode comprising a plurality of source electrodes, each comprising a second conductive film formed on the first insulating film and intersecting the gate wiring;
A gate electrode, a semiconductor layer formed on the gate electrode through a first insulating film, a thin film transistor including a source electrode and a drain electrode,
A second insulating film formed on the thin film transistor and the second conductive film;
A transmissive pixel electrode made of a conductive film having a high transmittance formed on the second insulating film and electrically connected to the drain electrode through a contact hole formed in the second insulating film;
It is formed on a transparent conductive film portion formed of a conductive film having a high transmittance together with the transmissive pixel electrode, and is formed of a highly reflective conductive film that is electrically connected to the drain electrode through the transparent conductive film portion and the contact hole. With reflective pixel electrodes,
The reflective pixel electrode forms an auxiliary capacitance by being superimposed on the auxiliary capacitance electrode and the auxiliary capacitance wiring via the first insulating film and the second insulating film.
本発明によれば、液晶駆動時の補助容量は、第一の導電膜からなる補助容量配線に、画素を囲む配線とは絶縁層を介して異なる層に設けられている反射画素電極を重畳することにより形成されており、反射画素電極と配線との短絡を考慮する必要が無いため、反射画素電極の形成面積を大きくして大きな補助容量を得ることができる。また、ＴＦＴアレイ基板に材料コストの高い有機樹脂からなる層間絶縁膜を用いない構成とする場合においても、反射画素電極と透過画素電極との高低差は補助容量配線の膜厚分のみであり、その値を透過領域の液晶厚の約半分から差し引いた厚みを有する凸部を、対向基板側の反射領域に対応する位置に透明樹脂により形成することは可能であり、反射部と透過部の光路長を等しくすることができる。以上ことから、表示品質に優れ、高歩留まりおよび低コストの半透過型液晶表示装置が得られる。 According to the present invention, the auxiliary capacitor at the time of driving the liquid crystal is formed by superimposing the reflective pixel electrode provided in a layer different from the wiring surrounding the pixel on the auxiliary capacitor wiring made of the first conductive film via the insulating layer. Therefore, it is not necessary to consider a short circuit between the reflective pixel electrode and the wiring. Therefore, the formation area of the reflective pixel electrode can be increased to obtain a large auxiliary capacitance. Even when the TFT array substrate is configured not to use an interlayer insulating film made of an organic resin with a high material cost, the height difference between the reflective pixel electrode and the transmissive pixel electrode is only the film thickness of the auxiliary capacitance wiring, A convex portion having a thickness obtained by subtracting that value from about half of the liquid crystal thickness of the transmissive region can be formed of a transparent resin at a position corresponding to the reflective region on the counter substrate side, and the optical path between the reflective portion and the transmissive portion. The lengths can be equal. From the above, a transflective liquid crystal display device with excellent display quality, high yield, and low cost can be obtained.
実施の形態１．
以下に、本発明を実施するための最良の形態である実施の形態１について述べる。図１は、本発明の実施の形態１における半透過型液晶表示装置を構成するＴＦＴアレイ基板の一画素を示す平面図、図２（ａ）〜（ｆ）は、図１と同様に本実施の形態１における半透過型液晶表示装置を構成するＴＦＴアレイ基板の製造プロセスフローを示す断面図である。図中、同一、相当部分には同一符号を付している。
Embodiment 1 FIG.
Embodiment 1 which is the best mode for carrying out the present invention will be described below. FIG. 1 is a plan view showing one pixel of a TFT array substrate constituting the transflective liquid crystal display device according to the first embodiment of the present invention, and FIGS. 2A to 2F are the same as FIG. It is sectional drawing which shows the manufacturing process flow of the TFT array substrate which comprises the transflective liquid crystal display device in the form 1. In the figure, the same and corresponding parts are denoted by the same reference numerals.
なお、図２（ａ）〜（ｆ）では、半透過型液晶表示装置を構成するＴＦＴアレイ基板の主要部分、すなわち図中左から順にゲート端子部、ソース端子部、ゲート／ソース交差部、ＴＦＴ部、画素／ドレインコンタクト部、反射画素電極部、透過画素電極部の断面を連続的に示しているが、各部分の実際の寸法や位置関係を正確に示すものではない。例えば、図２に示すゲート端子部およびソース端子部は表示領域以外の基板端部に形成されており、これらの端子を介して駆動回路から信号が入力されるものである。 2A to 2F, the main part of the TFT array substrate constituting the transflective liquid crystal display device, that is, the gate terminal part, the source terminal part, the gate / source intersection part, the TFT in order from the left in the figure. , The cross section of the pixel / drain contact portion, the reflective pixel electrode portion, and the transmissive pixel electrode portion are shown continuously, but the actual dimensions and positional relationship of each portion are not accurately shown. For example, the gate terminal portion and the source terminal portion shown in FIG. 2 are formed at the end of the substrate other than the display region, and signals are input from the drive circuit through these terminals.
本実施の形態における半透過型液晶表示装置は、図２（ｆ）に示すように、１画素内に光を透過する透過画素電極と光を反射する反射画素電極を有するＴＦＴアレイ基板に、対向透明電極を有する対向基板を対向して配置し、それらの間に液晶を配置したものである。まず、本実施の形態１におけるＴＦＴアレイ基板の構造について、図１および図２（ｅ）を用いて説明する。 As shown in FIG. 2F, the transflective liquid crystal display device in this embodiment is opposed to a TFT array substrate having a transmissive pixel electrode that transmits light and a reflective pixel electrode that reflects light in one pixel. A counter substrate having a transparent electrode is arranged to face each other, and a liquid crystal is arranged between them. First, the structure of the TFT array substrate according to the first embodiment will be described with reference to FIGS. 1 and 2 (e).
ガラス基板等の透明絶縁性基板１上には、第一の導電膜２からなるゲート電極２１を備えたゲート配線２２、ゲート端子２３、補助容量電極および補助容量配線２４が形成されている。ゲート電極２１はＴＦＴ部に、ゲート配線２２はゲート／ソース交差部に、ゲート端子２３はゲート端子部に、補助容量電極および補助容量配線２４は反射画素電極部に、それぞれ形成される。 On a transparent insulating substrate 1 such as a glass substrate, a gate wiring 22 including a gate electrode 21 made of the first conductive film 2, a gate terminal 23, an auxiliary capacitance electrode, and an auxiliary capacitance wiring 24 are formed. The gate electrode 21 is formed in the TFT portion, the gate wiring 22 is formed in the gate / source intersection, the gate terminal 23 is formed in the gate terminal portion, and the auxiliary capacitance electrode and the auxiliary capacitance wiring 24 are formed in the reflective pixel electrode portion.
第一の導電膜２は第一の絶縁膜（ゲート絶縁膜）３により覆われ、さらに、ＴＦＴ部では、ゲート電極２１上に、第一の絶縁膜３を介して半導体層である半導体能動膜４およびオーミックコンタクト膜５が形成されている。このオーミックコンタクト膜５は中央部が除去されて二つの領域に分割され、一方には第二の導電膜６からなるソース電極６１、他方には同様に第二の導電膜６からなるドレイン電極６２が積層されている。これらのゲート電極２１と半導体能動膜４とソース電極６１およびドレイン電極６２によりスイッチング素子であるＴＦＴが構成されている。 The first conductive film 2 is covered with a first insulating film (gate insulating film) 3, and further, in the TFT portion, a semiconductor active film that is a semiconductor layer on the gate electrode 21 via the first insulating film 3. 4 and ohmic contact film 5 are formed. The ohmic contact film 5 is divided into two regions by removing the central portion, one of which is a source electrode 61 made of the second conductive film 6 and the other is a drain electrode 62 made of the second conductive film 6 in the same manner. Are stacked. The gate electrode 21, the semiconductor active film 4, the source electrode 61 and the drain electrode 62 constitute a TFT as a switching element.
図２（ｆ）において、ソース電極６１から左側にソース配線６３およびソース端子６４が延び、またドレイン電極６２から右側に第二の導電膜部分６５が延びている。ソース配線６３はゲート／ソース交差部に、またソース端子６４はソース端子部にそれぞれ形成される。第二の導電膜部分６５は、ゲート電極２１と、補助容量電極および補助容量配線２４との間の第一の絶縁膜３上に延びている。この導電膜部分６５は、画素／ドレインコンタクト部に形成されている。
なお、ゲート配線２２とソース配線６３との交差部には、交差部の耐電圧を向上させるために半導体能動膜４およびオーミックコンタクト膜５を残存させている。
In FIG. 2F, a source wiring 63 and a source terminal 64 extend from the source electrode 61 on the left side, and a second conductive film portion 65 extends on the right side from the drain electrode 62. The source wiring 63 is formed at the gate / source intersection, and the source terminal 64 is formed at the source terminal. The second conductive film portion 65 extends on the first insulating film 3 between the gate electrode 21 and the auxiliary capacitance electrode and auxiliary capacitance wiring 24. The conductive film portion 65 is formed in the pixel / drain contact portion.
The semiconductor active film 4 and the ohmic contact film 5 are left at the intersection between the gate wiring 22 and the source wiring 63 in order to improve the withstand voltage at the intersection.
上記構成要素を覆うように第二の絶縁膜７が形成されている。また、ドレイン電極６１上の第二の絶縁膜７、ゲート端子２３上の第一の絶縁膜３および第二の絶縁膜７、ソース端子６４上の第二の絶縁膜７にはそれぞれコンタクトホール８１、８２、８３が形成されている。コンタクトホール８１は、画素／ドレインコンタクト部に形成され、具体的には、補助容量電極および補助容量配線２４と、ゲート電極２１との間にあって、ドレイン電極６２から延びた第二の導電膜部分６５の上に開口される。コンタクトホール８２、８３は、ゲート端子部およびソース端子部に形成され、それぞれゲート端子２３およびソース端子６４の上に開口する。 A second insulating film 7 is formed so as to cover the above components. Contact holes 81 are formed in the second insulating film 7 on the drain electrode 61, the first and second insulating films 3 and 7 on the gate terminal 23, and the second insulating film 7 on the source terminal 64, respectively. , 82, 83 are formed. The contact hole 81 is formed in the pixel / drain contact portion, specifically, the second conductive film portion 65 extending from the drain electrode 62 between the auxiliary capacitance electrode and auxiliary capacitance wiring 24 and the gate electrode 21. Opened on top. The contact holes 82 and 83 are formed in the gate terminal portion and the source terminal portion, and open on the gate terminal 23 and the source terminal 64, respectively.
透過率の高い導電膜である透明導電性膜９が第二の絶縁膜７上に形成され、この透明導電性膜９は、コンタクトホール８１、８２、８３の底部および側壁部を覆うと共に、ドレイン電極６１とコンタクトホール８１を介して電気的に接続された電極パターン９１、ゲート端子２３とコンタクトホール８２を介して電気的に接続された端子パターン９２、ソース端子６４とコンタクトホール８３を介して電気的に接続された端子パターン９３を第二の絶縁膜７上に形成する。ドレイン電極６１と電気的に接続された電極パターン９１は、透過画素電極９１ａと、透明導電膜部分９１ｂを有する。透明画素電極９１ａは、透明画素電極部に形成され、第一の絶縁膜３と第二の絶縁膜７の上にあって、透明画素電極の機能を果たす。透明導電膜部分９１ｂは、反射画素電極部に形成され、第一の絶縁膜３および第二の絶縁膜７を介して補助容量電極および補助容量配線２４に重なり、補助容量を形成する。透明導電膜部分９１ｂは、下層に補助容量電極および補助容量配線２４等が形成され透過部として用いることのできない。また、端子パターン９２、９３介して駆動回路からゲート配線２２もしくはソース配線６３に信号が入力される。 A transparent conductive film 9, which is a conductive film having a high transmittance, is formed on the second insulating film 7. The transparent conductive film 9 covers the bottoms and side walls of the contact holes 81, 82, 83, and drains. An electrode pattern 91 electrically connected to the electrode 61 via the contact hole 81, a terminal pattern 92 electrically connected to the gate terminal 23 via the contact hole 82, and an electric source via the source terminal 64 and contact hole 83. An electrically connected terminal pattern 93 is formed on the second insulating film 7. The electrode pattern 91 electrically connected to the drain electrode 61 includes a transmissive pixel electrode 91a and a transparent conductive film portion 91b. The transparent pixel electrode 91a is formed in the transparent pixel electrode portion, is on the first insulating film 3 and the second insulating film 7, and functions as a transparent pixel electrode. The transparent conductive film portion 91b is formed in the reflective pixel electrode portion, and overlaps the auxiliary capacitance electrode and the auxiliary capacitance wiring 24 via the first insulating film 3 and the second insulating film 7, thereby forming an auxiliary capacitance. The transparent conductive film portion 91b cannot be used as a transmissive portion because the auxiliary capacitance electrode and the auxiliary capacitance wiring 24 are formed in the lower layer. In addition, a signal is input from the drive circuit to the gate wiring 22 or the source wiring 63 through the terminal patterns 92 and 93.
透明導電膜部９１ｂ上には、反射率の高い導電膜からなる反射画素電極１０が形成されている。このように、反射画素電極１０を、下層に補助容量電極および補助容量配線２４が形成されている領域である透明導電膜部分９１ｂに重ねて形成することは、透過領域として利用できない部分を反射領域として利用できるため、開口率を向上させる上で好ましい。この反射画素電極１０は反射画素電極部に形成され、絶縁膜（第一の絶縁膜３および第二の絶縁膜７）を介して補助容量電極および補助容量配線２４に重畳されるため、液晶駆動時の補助容量が形成されて良好な表示を行うことができる。 A reflective pixel electrode 10 made of a conductive film having a high reflectance is formed on the transparent conductive film portion 91b. As described above, when the reflective pixel electrode 10 is formed so as to overlap the transparent conductive film portion 91b, which is a region where the auxiliary capacitance electrode and the auxiliary capacitance wiring 24 are formed in the lower layer, a portion that cannot be used as a transmissive region is reflected in the reflective region. Therefore, it is preferable for improving the aperture ratio. Since the reflective pixel electrode 10 is formed in the reflective pixel electrode portion and is superimposed on the auxiliary capacitance electrode and the auxiliary capacitance wiring 24 via the insulating films (the first insulating film 3 and the second insulating film 7), the liquid crystal drive The auxiliary capacity of the time is formed and good display can be performed.
また、従来構造の半透過型液晶表示装置では、ドレイン電極を補助容量電極および補助容量配線の形成領域にまで亘って形成し、ドレイン電極と補助容量電極および補助容量配線により補助容量を形成していたため、ドレイン電極は同一層に形成されるソース配線との短絡が生じないようにソース配線と間隔を有して形成する必要があったが、本実施の形態では、補助容量を形成するための反射画素電極１０は、ソース配線６３とは異なる層に形成されるため、ソース配線６３との短絡を考慮することなく反射画素電極１０を形成することができ、大きな補助容量を形成することができる。 Further, in the transflective liquid crystal display device having a conventional structure, the drain electrode is formed over the formation region of the auxiliary capacitance electrode and the auxiliary capacitance wiring, and the auxiliary capacitance is formed by the drain electrode, the auxiliary capacitance electrode, and the auxiliary capacitance wiring. Therefore, the drain electrode has to be formed at a distance from the source wiring so as not to cause a short circuit with the source wiring formed in the same layer. In this embodiment, the drain electrode is used to form an auxiliary capacitor. Since the reflective pixel electrode 10 is formed in a layer different from the source wiring 63, the reflective pixel electrode 10 can be formed without considering a short circuit with the source wiring 63, and a large auxiliary capacitance can be formed. .
反射画素電極１０は透明導電膜部９１ｂおよびコンタクトホール８１を介してドレイン電極６２と電気的に接続され、また、透過画素電極９１ａは連続して形成されている透明導電膜部９１ｂおよびコンタクトホール８１を介してドレイン電極６２と電気的に接続されている。これらの反射画素電極１０と透過画素電極９１ａは、ＴＦＴアレイ基板と対向配置される対向基板に形成された対向透明電極との間に印加された電圧により液晶の配向を制御するものである。 The reflective pixel electrode 10 is electrically connected to the drain electrode 62 through the transparent conductive film portion 91b and the contact hole 81, and the transmissive pixel electrode 91a is formed continuously from the transparent conductive film portion 91b and the contact hole 81. Is electrically connected to the drain electrode 62 via the. The reflective pixel electrode 10 and the transmissive pixel electrode 91a are for controlling the orientation of the liquid crystal by a voltage applied between a counter transparent electrode formed on a counter substrate disposed opposite to the TFT array substrate.
次に、本実施の形態１における半透過型液晶表示装置の製造工程について、図２を用いて説明する。 Next, a manufacturing process of the transflective liquid crystal display device according to the first embodiment will be described with reference to FIG.
まず、ガラス基板等の透明絶縁性基板１を洗浄して表面を浄化した後、この透明絶縁性基板１上にスパッタリング法等により第一の導電膜２を成膜する。第一の導電膜２としては、例えばクロム（Ｃｒ）、モリブデン（Ｍｏ）、タンタル（Ｔａ）、チタン（Ｔｉ）またはこれらを主成分とする合金等が用いられる。本実施の形態では、第一の導電膜２として膜厚４００ｎｍのクロム膜を成膜する。 First, after the transparent insulating substrate 1 such as a glass substrate is cleaned to clean the surface, the first conductive film 2 is formed on the transparent insulating substrate 1 by sputtering or the like. As the first conductive film 2, for example, chromium (Cr), molybdenum (Mo), tantalum (Ta), titanium (Ti), or an alloy containing these as a main component is used. In this embodiment, a chromium film having a thickness of 400 nm is formed as the first conductive film 2.
なお、第一の導電膜２上には、後述の工程でエッチングによりコンタクトホール８２が形成され、コンタクトホール８２内には電気的接続を得るための導電性薄膜（透明導電性膜９）が形成されるため、表面酸化が生じにくい金属薄膜や酸化されても導電性を有する金属薄膜を第一の金属膜２として用いることが好ましい。 A contact hole 82 is formed on the first conductive film 2 by etching in a process described later, and a conductive thin film (transparent conductive film 9) for obtaining electrical connection is formed in the contact hole 82. Therefore, it is preferable to use, as the first metal film 2, a metal thin film that hardly causes surface oxidation or a metal thin film that has conductivity even when oxidized.
次に、第一の写真製版工程にて第一の導電膜２をパターニングし、図２（ａ）に示すように、ゲート端子２３、ゲート配線２２、ゲート電極２１、補助容量電極および補助容量配線２４を形成する。写真製版工程では、基板を洗浄後、感光性レジストを塗布、乾燥したのちに、所定のパターンが形成されたマスクを通して露光し、現像することにより基板上にマスクパターンを転写したレジストを形成し、感光性レジストを加熱硬化させたのちに第一の金属膜のエッチングを行い、その後感光性レジストを剥離する。 Next, the first conductive film 2 is patterned in the first photoengraving step, and as shown in FIG. 2A, the gate terminal 23, the gate wiring 22, the gate electrode 21, the auxiliary capacitance electrode, and the auxiliary capacitance wiring. 24 is formed. In the photoengraving process, after washing the substrate, a photosensitive resist is applied, dried, then exposed through a mask on which a predetermined pattern is formed, and developed to form a resist having a mask pattern transferred onto the substrate, After the photosensitive resist is heated and cured, the first metal film is etched, and then the photosensitive resist is peeled off.
なお、第一の導電膜２のエッチングは、公知のエッチャントを用いてウエットエッチング法で行うことができる。例えば、第一の導電膜２がクロムで構成されている場合には、第二硝酸セリウムアンモニウムおよび硝酸が混合された水溶液が用いられる。また、第一の金属膜２のエッチングにおいては、パターンエッジの段差部における絶縁膜のカバレッジを向上させて他の配線との段差部での短絡を防止するために、パターンエッジ断面が台形状のテーパー形状となるようにテーパーエッチングすることが好ましい。 The etching of the first conductive film 2 can be performed by a wet etching method using a known etchant. For example, when the first conductive film 2 is made of chromium, an aqueous solution in which second ceric ammonium nitrate and nitric acid are mixed is used. Further, in the etching of the first metal film 2, the cross section of the pattern edge is trapezoidal in order to improve the coverage of the insulating film in the step portion of the pattern edge and prevent a short circuit in the step portion with other wiring. It is preferable to perform taper etching so as to obtain a taper shape.
次に、プラズマＣＶＤ法等により第一の絶縁膜３、半導体能動膜４、オーミックコンタクト膜５を連続して成膜する。ゲート絶縁膜となる第一の絶縁膜３としては、ＳｉＮｘ膜、ＳｉＯｙ膜、ＳｉＯｚＮｗ膜のいずれかの単層膜もしくはこれらを積層した多層膜が用いられる（なお、ｘ、ｙ、ｚ、ｗはそれぞれ化学量論組成を表す正数である）。第一の絶縁膜３の膜厚は、薄い場合にはゲート配線２２とソース配線６３の交差部で短絡を生じやすく、厚い場合にはＴＦＴのＯＮ電流が小さくなり表示特性が低下することから、第一の導電膜２の厚さ程度以上で、かつなるべく薄くすることが好ましい。また、絶縁膜はピンホール等の発生による層間ショートを防止するために、複数回に分けて成膜することが好ましい。本実施の形態では、膜厚３００ｎｍのＳｉＮ膜を成膜した後、さらに膜厚１００ｎｍのＳｉＮ膜を成膜することにより、膜厚４００ｎｍのＳｉＮ膜を第一の絶縁膜３として形成する。 Next, the first insulating film 3, the semiconductor active film 4, and the ohmic contact film 5 are successively formed by a plasma CVD method or the like. As the first insulating film 3 to be a gate insulating film, a single layer film of SiNx film, SiOy film, SiOzNw film or a multilayer film in which these are laminated is used (where x, y, z, w are Each is a positive number representing a stoichiometric composition). When the film thickness of the first insulating film 3 is thin, a short circuit is likely to occur at the intersection between the gate wiring 22 and the source wiring 63, and when it is thick, the ON current of the TFT becomes small and the display characteristics deteriorate. It is preferable that the first conductive film 2 is about as thick as possible and as thin as possible. In addition, the insulating film is preferably formed in a plurality of times in order to prevent an interlayer short circuit due to the occurrence of pinholes or the like. In this embodiment, after forming a SiN film having a thickness of 300 nm, a SiN film having a thickness of 100 nm is further formed to form a SiN film having a thickness of 400 nm as the first insulating film 3.
半導体能動膜４としては、アモルファスシリコン（ａ―Ｓｉ）膜、ポリシリコン（ｐ―Ｓｉ）膜等が用いられる。半導体能動膜４の膜厚は、薄い場合には後述するオーミックコンタクト膜５のドライエッチング時に膜の消失が発生し、厚い場合にはＴＦＴのＯＮ電流が小さくなることから、オーミックコンタクト膜５のドライエッチング時におけるエッチング量の制御性と、必要とするＴＦＴのＯＮ電流値を考慮して選択する。本実施の形態では、半導体能動膜４として膜厚１５０ｎｍのａ―Ｓｉ膜を成膜する。 As the semiconductor active film 4, an amorphous silicon (a-Si) film, a polysilicon (p-Si) film, or the like is used. When the semiconductor active film 4 is thin, the film disappears during dry etching of the ohmic contact film 5 to be described later, and when it is thick, the ON current of the TFT becomes small. The selection is made in consideration of the controllability of the etching amount during etching and the required ON current value of the TFT. In the present embodiment, an a-Si film having a thickness of 150 nm is formed as the semiconductor active film 4.
オーミックコンタクト膜５としては、ａ―Ｓｉにリン（Ｐ）を微量にドーピングしたｎ型ａ―Ｓｉ膜、あるいはｎ型ｐ―Ｓｉ膜が用いられる。本実施の形態では、オーミックコンタクト膜５として膜厚３０ｎｍのｎ型ａ―Ｓｉ膜を成膜する。 As the ohmic contact film 5, an n-type a-Si film or an n-type p-Si film obtained by doping a-Si with a small amount of phosphorus (P) is used. In this embodiment, an n-type a-Si film having a thickness of 30 nm is formed as the ohmic contact film 5.
次に、第２の写真製版工程にて、図２（ｂ）に示すように、半導体能動膜４およびオーミックコンタクト膜５を少なくともＴＦＴ部が形成される部分に残存するようにパターニングする。なお、半導体能動膜４およびオーミックコンタクト膜５はＴＦＴ部が形成される部分の他に、ゲート配線２２とソース配線６３が交差する部分にも残存させることにより、交差部での耐電圧が大きくなり好ましい。なお、半導体能動膜４およびオーミックコンタクト膜５のエッチングは、公知のガス組成（例えば、ＳＦ６とＯ２の混合ガスまたはＣＦ４とＯ２の混合ガス）を用いてドライエッチング法で行うことができる。 Next, in the second photolithography process, as shown in FIG. 2B, the semiconductor active film 4 and the ohmic contact film 5 are patterned so as to remain at least in the portion where the TFT portion is formed. The semiconductor active film 4 and the ohmic contact film 5 are left not only at the portion where the TFT portion is formed but also at the portion where the gate wiring 22 and the source wiring 63 intersect, thereby increasing the withstand voltage at the intersection. preferable. The semiconductor active film 4 and the ohmic contact film 5 are etched by a dry etching method using a known gas composition (for example, a mixed gas of SF 6 and O 2 or a mixed gas of CF 4 and O 2 ). it can.
次に、スパッタリング法等により第二の導電膜６を成膜する。第二の導電膜６としては、例えばクロム、モリブデン、タンタル、チタンまたはこれらを主成分とする合金などが用いられる。本実施の形態では、膜厚４００ｎｍのクロム膜を成膜する。なお、第二の導電膜６上には、後述の工程でエッチングによりコンタクトホールが形成され、コンタクトホール内には電気的接続を得るための導電性薄膜（透明導電性膜９）が形成されるため、表面酸化が生じにくい金属薄膜や酸化されても導電性を有する金属薄膜を第二の導電膜６として用いることが好ましい。 Next, the second conductive film 6 is formed by sputtering or the like. As the second conductive film 6, for example, chromium, molybdenum, tantalum, titanium, or an alloy containing these as a main component is used. In this embodiment, a chromium film with a thickness of 400 nm is formed. A contact hole is formed on the second conductive film 6 by etching in a process described later, and a conductive thin film (transparent conductive film 9) for obtaining an electrical connection is formed in the contact hole. Therefore, it is preferable to use as the second conductive film 6 a metal thin film that hardly causes surface oxidation or a metal thin film that has conductivity even when oxidized.
次に、第三の写真製版工程にて第二の導電膜６をパターニングし、ソース端子６４、ソース配線６３、ソース電極６１、ドレイン電極６２および第二の導電膜部分６５を形成する。ソース電極６１は、ソース配線６３とゲート配線２２が交差する部分にまで亘って形成される。なお、第二の導電膜６のエッチングは、公知のエッチャントを用いてウエットエッチング法で行うことができる。 Next, the second conductive film 6 is patterned in a third photoengraving process to form a source terminal 64, a source wiring 63, a source electrode 61, a drain electrode 62, and a second conductive film portion 65. The source electrode 61 is formed over a portion where the source wiring 63 and the gate wiring 22 intersect. The etching of the second conductive film 6 can be performed by a wet etching method using a known etchant.
続いて、ＴＦＴ部のオーミックコンタクト膜５の中央部をエッチング除去し、図２（ｃ）に示すように半導体能動膜４を露出させる。なお、オーミックコンタクト膜５のエッチングは、公知のガス組成（例えば、ＳＦ６とＯ２の混合ガスまたはＣＦ４とＯ２の混合ガス）を用いてドライエッチング法で行うことができる。 Subsequently, the central portion of the ohmic contact film 5 in the TFT portion is removed by etching, and the semiconductor active film 4 is exposed as shown in FIG. The ohmic contact film 5 can be etched by a dry etching method using a known gas composition (for example, a mixed gas of SF 6 and O 2 or a mixed gas of CF 4 and O 2 ).
次に、プラズマＣＶＤ法等により第二の絶縁膜７を成膜する。第二の絶縁膜７としては、第一の絶縁膜３と同様の材質により形成することができ、膜厚は下層パターンのカバレッジを考慮して決めることが好ましい。本実施の形態では、第二の絶縁膜７として膜厚４００ｎｍのＳｉＮ膜を成膜する。 Next, the second insulating film 7 is formed by plasma CVD or the like. The second insulating film 7 can be formed of the same material as the first insulating film 3, and the film thickness is preferably determined in consideration of the coverage of the lower layer pattern. In the present embodiment, a SiN film having a thickness of 400 nm is formed as the second insulating film 7.
次に、第四の写真製版工程にて第二の絶縁膜７および第一の絶縁膜３をパターニングし、図２（ｄ）に示すように、第二の導電膜部分６５上にコンタクトホール８１、ゲート端子２３上にコンタクトホール８２、ソース端子６４上にコンタクトホール８３を形成する。なお、ゲート端子２３上の第一の絶縁膜３および第二の絶縁膜７は、一度にエッチングされてコンタクトホール８２が形成される。第一の絶縁膜３および第二の絶縁膜７のエッチングは、公知のエッチャントを用いてウエットエッチング法、もしくは公知のガス組成を用いてドライエッチング法で行うことができる。また、第二の絶縁膜７および第一の絶縁膜３のエッチングにおいては、コンタクトホール内での導電性薄膜のカバレッジを向上させるために、テーパーエッチングすることが好ましい。 Next, the second insulating film 7 and the first insulating film 3 are patterned in a fourth photoengraving step, and as shown in FIG. 2D, the contact hole 81 is formed on the second conductive film portion 65. A contact hole 82 is formed on the gate terminal 23 and a contact hole 83 is formed on the source terminal 64. The first insulating film 3 and the second insulating film 7 on the gate terminal 23 are etched at a time to form a contact hole 82. Etching of the first insulating film 3 and the second insulating film 7 can be performed by a wet etching method using a known etchant or a dry etching method using a known gas composition. In the etching of the second insulating film 7 and the first insulating film 3, taper etching is preferably performed in order to improve the coverage of the conductive thin film in the contact hole.
なお、この時点においては、図２（ｄ）に示すように、ＴＦＴ部と反射画素電極部の間の画素／ドレインコンタクト部に位置するコンタクトホール８１により第二の導電膜６からなる第二の導電膜部分６５が露出し、コンタクトホール８２により第一の導電膜２からなるゲート端子２３が露出し、コンタクトホール８３により第二の導電膜６からなるソース端子６４が露出している。 At this time, as shown in FIG. 2D, the second conductive film 6 is formed by the contact hole 81 located in the pixel / drain contact portion between the TFT portion and the reflective pixel electrode portion. The conductive film portion 65 is exposed, the gate terminal 23 made of the first conductive film 2 is exposed through the contact hole 82, and the source terminal 64 made of the second conductive film 6 is exposed through the contact hole 83.
次に、スパッタリング法等により透明導電性膜９を成膜する。透明導電性膜９としてはＩＴＯ、ＳｎＯ２などを用いることができ、特に化学的安定性の観点からＩＴＯを用いることが好ましい。なお、ＩＴＯは、結晶化ＩＴＯまたはアモルファスＩＴＯ（ａ−ＩＴＯ）のいずれでもよいが、ａ−ＩＴＯを用いた場合は、パターニング後、結晶化温度１８０℃以上に加熱して結晶化させる必要がある。本実施の形態では、透明導電性膜として膜厚８０ｎｍのａ−ＩＴＯを成膜する。 Next, the transparent conductive film 9 is formed by sputtering or the like. As the transparent conductive film 9, ITO, SnO 2 or the like can be used. In particular, ITO is preferably used from the viewpoint of chemical stability. The ITO may be either crystallized ITO or amorphous ITO (a-ITO). However, when a-ITO is used, it is necessary to crystallize by heating to a crystallization temperature of 180 ° C. or higher after patterning. . In this embodiment, a-ITO with a thickness of 80 nm is formed as the transparent conductive film.
次に、第五の写真製版工程にて透明導電性膜９をパターニングし、図２（ｅ）に示すように、電極パターン９１（透過画素電極９１aと透明導電膜部９１ｂ）、および端子パターン９２、９３を形成する。このとき、コンタクトホール８１、８２、８３の底部および側壁部は透明絶縁性膜９により被覆される。なお、コンタクトホール８１、８２、８３の底部に露出しているゲート端子２３を構成する第一の導電膜２、およびドレイン電極６２、ソース端子６４および第二の導電膜部分６５を構成する第二の導電膜６は、表面酸化が生じにくい金属（クロム）により構成されているため、ドレイン電極６２、ゲート端子２３、ソース端子６４および第二の導電膜部分６５は透明導電性膜９と良好なコンタクト抵抗を得ることができ、ドレイン電極６２はコンタクトホール８１を介して電極パターン９１と、ゲート端子２３はコンタクトホール８２を介して端子パターン９２と、ソース端子６４はコンタクトホール８３を介して端子パターン９３と電気的に接続されている。 Next, the transparent conductive film 9 is patterned in a fifth photoengraving step, and as shown in FIG. 2E, the electrode pattern 91 (the transmissive pixel electrode 91a and the transparent conductive film portion 91b) and the terminal pattern 92 are formed. , 93 are formed. At this time, the bottom and side walls of the contact holes 81, 82, 83 are covered with the transparent insulating film 9. The first conductive film 2 constituting the gate terminal 23 exposed at the bottom of the contact holes 81, 82, 83, and the second electrode constituting the drain electrode 62, the source terminal 64, and the second conductive film portion 65. Since the conductive film 6 is made of a metal (chromium) that hardly causes surface oxidation, the drain electrode 62, the gate terminal 23, the source terminal 64, and the second conductive film portion 65 are as good as the transparent conductive film 9. Contact resistance can be obtained, the drain electrode 62 is connected to the electrode pattern 91 via the contact hole 81, the gate terminal 23 is connected to the terminal pattern 92 via the contact hole 82, and the source terminal 64 is connected to the terminal pattern 83 via the contact hole 83. 93 is electrically connected.
なお、透明導電性膜９のエッチングは、使用する材料によって公知のエッチャントもしくは公知のガス組成を用いて行うことができる。また、透明導電性膜９のエッチングおよび感光性レジストの剥離後、ａ−ＩＴＯを結晶化させるために大気中で１８０℃以上に加熱する。 The transparent conductive film 9 can be etched using a known etchant or a known gas composition depending on the material used. Further, after the transparent conductive film 9 is etched and the photosensitive resist is peeled off, it is heated to 180 ° C. or higher in the atmosphere in order to crystallize a-ITO.
次に、スパッタリング法等により反射画素電極１０を構成する第三の導電膜１０ａ、１０ｂを成膜する。第三の導電膜１０ａ、１０ｂとしては、例えばクロム、モリブデン、タンタル、チタンまたはこれらを主成分とする合金を下層とし、アルミニウム（Ａｌ）、銀（Ａｇ）またはこれらを主成分とする合金を上層とする二層構造を有した薄膜を用いることができる。なお、上層の第三の導電膜１０ｂは、反射画素電極として用いられるため、反射率の高い導電膜により構成する。本実施の形態では、下層の第三の金属膜１０ａとして膜厚１００ｎｍのクロム膜、上層の第三の導電膜１０ｂとして膜厚３００ｎｍのアルミニウムと銅（Ｃｕ）の合金膜を成膜する。 Next, third conductive films 10a and 10b constituting the reflective pixel electrode 10 are formed by sputtering or the like. As the third conductive films 10a and 10b, for example, chromium, molybdenum, tantalum, titanium or an alloy containing these as a main component is used as a lower layer, and aluminum (Al), silver (Ag) or an alloy containing these as a main component is used as an upper layer. A thin film having a two-layer structure can be used. Since the upper third conductive film 10b is used as a reflective pixel electrode, it is composed of a conductive film having high reflectivity. In the present embodiment, a chromium film having a thickness of 100 nm is formed as the lower third metal film 10a, and an alloy film of aluminum and copper (Cu) having a thickness of 300 nm is formed as the upper third conductive film 10b.
次に、第六の写真製版工程にて第三の導電膜１０ａ、１０ｂをパターニングし、図２（ｆ）に示すように、反射画素電極１０を形成する。反射画素電極１０はドレイン電極６２と電気的に接続された透明導電膜部９１ｂ上に形成される。なお、第三の導電膜１０ａ、１０ｂのエッチングは、公知のエッチャントを用いてウエットエッチング法で行うことができる。以上の工程を経て、図２（ｆ）に示すように、１画素内に透過画素電極９１ａと反射画素電極１０とを有するＴＦＴアレイ基板が完成する。 Next, in the sixth photolithography process, the third conductive films 10a and 10b are patterned to form the reflective pixel electrode 10 as shown in FIG. The reflective pixel electrode 10 is formed on the transparent conductive film portion 91 b that is electrically connected to the drain electrode 62. The third conductive films 10a and 10b can be etched by a wet etching method using a known etchant. Through the above steps, as shown in FIG. 2F, a TFT array substrate having a transmissive pixel electrode 91a and a reflective pixel electrode 10 in one pixel is completed.
このようにして形成されたＴＦＴアレイ基板は、その後のパネル組み立て工程において配向膜が塗布され、一定の方向にラビング処理が施される。同様に、他の透明絶縁性基板上にブラックマトリクス、カラーフィルタ、カラーフィルタの保護膜、対向透明電極等が形成された対向基板にも配向膜が塗布されラビング処理が施される。これらのＴＦＴアレイ基板と対向基板とを互いの配向膜が向き合うようにスペーサを介して重ね合わせ、基板周縁部をシール材にて接着し、両基板間に液晶を封止する。このようにして形成された液晶パネルの背面にバックライトユニットに取り付けることにより、本実施の形態１における半透過型液晶表示装置が完成する。 The TFT array substrate thus formed is applied with an alignment film in a subsequent panel assembling process, and is rubbed in a certain direction. Similarly, an alignment film is applied to a counter substrate in which a black matrix, a color filter, a color filter protective film, a counter transparent electrode, and the like are formed on another transparent insulating substrate, and a rubbing process is performed. The TFT array substrate and the counter substrate are overlapped with a spacer so that the alignment films face each other, and the periphery of the substrate is bonded with a sealing material, and the liquid crystal is sealed between the substrates. The transflective liquid crystal display device according to the first embodiment is completed by attaching the backlight unit to the back surface of the liquid crystal panel thus formed.
一般に、半透過型液晶表示装置では、光を反射して表示を行う反射画素電極部と光を透過して表示を行う透過画素電極部における光路長を等しくして光学特性の整合性を向上させるために、反射領域の液晶厚を透過領域の液晶厚の約半分にすることが好ましい。反射領域の液晶厚を透過領域の液晶厚の約半分にするための方法の一つとして、対向基板側の反射領域に対応する位置に透明樹脂により凸部を形成する構成が提示されており、本実施の形態１によるＴＦＴアレイ基板を該構成に適用することにより、反射画素電極部と透過画素電極部の光学特性の整合性が良好な表示品質に優れた半透過型液晶表示装置を形成することができる。 Generally, in a transflective liquid crystal display device, the optical path length is made equal between a reflective pixel electrode portion that reflects light and displays and a transmissive pixel electrode portion that transmits light and displays, thereby improving the consistency of optical characteristics. Therefore, it is preferable that the thickness of the liquid crystal in the reflective region is about half that of the transmissive region. As one of the methods for reducing the liquid crystal thickness of the reflective region to about half of the liquid crystal thickness of the transmissive region, a configuration in which a convex portion is formed with a transparent resin at a position corresponding to the reflective region on the counter substrate side is presented. By applying the TFT array substrate according to the first embodiment to this configuration, a transflective liquid crystal display device with excellent matching of optical characteristics of the reflective pixel electrode portion and the transmissive pixel electrode portion and excellent display quality is formed. be able to.
図３に本実施の形態１によるＴＦＴアレイ基板と反射領域に凸部を有する対向基板からなる半透過型液晶パネルの断面図を示す。対向基板１０１は、透明絶縁性基板１０２上にブラックマトリクス１０３、カラーフイルタ１０４、対向透明電極１０５、および反射領域に対応する位置には透明樹脂による凸部１０６が形成されている。なお、図３においては、ＴＦＴアレイ基板１００および対向基板１０１に塗布される配向膜の記載は省略されている。 FIG. 3 shows a cross-sectional view of a transflective liquid crystal panel comprising a TFT array substrate according to the first embodiment and a counter substrate having a convex portion in the reflection region. In the counter substrate 101, a black matrix 103, a color filter 104, a counter transparent electrode 105, and a convex portion 106 made of a transparent resin are formed at a position corresponding to the reflection region on the transparent insulating substrate 102. In FIG. 3, the description of the alignment film applied to the TFT array substrate 100 and the counter substrate 101 is omitted.
反射領域の液晶厚ｄrを透過領域の液晶厚ｄtの半分にするためには、透明樹脂による凸部１０６の厚みΔｄＣＦは、透過領域の液晶厚ｄtの１／２から反射画素電極１０と透過画素電極９１ａの高低差（ギャップ）ΔｄＴＦＴを差し引いた厚みとすることが必要である。本実施の形態において、反射画素電極１０と透過画素電極９１ａの高低差ΔｄＴＦＴは、反射画素電極１０形成部と透過画素電極９１ａの形成部の層構成より、補助容量配線２４と反射画素電極１０に起因するものであり、その厚みは補助容量配線２４を構成する第一の導電膜２の膜厚４００ｎｍと、反射画素電極１０を構成する第三の導電膜１０ａ、１０ｂの膜厚４００ｎｍを合わせたものである。透過領域の液晶厚ｄtを４μｍとした場合、凸部の厚みΔｄＣＦは、２μｍからΔｄＴＦＴの８００ｎｍを差し引いた１．２μｍとなり、透明樹脂による凸部の形成は可能である。 In order to make the liquid crystal thickness dr in the reflective region half of the liquid crystal thickness dt in the transmissive region, the thickness Δd CF of the convex portion 106 made of transparent resin is transmissive to the reflective pixel electrode 10 from ½ of the liquid crystal thickness dt in the transmissive region. The thickness of the pixel electrode 91a needs to be a thickness obtained by subtracting the height difference (gap) Δd TFT . In the present embodiment, the height difference Δd TFT between the reflective pixel electrode 10 and the transmissive pixel electrode 91a is based on the layer configuration of the reflective pixel electrode 10 formation portion and the transmissive pixel electrode 91a formation portion, so that the auxiliary capacitance wiring 24 and the reflective pixel electrode 10 are. The thickness of the first conductive film 2 constituting the auxiliary capacitance wiring 24 is 400 nm, and the thickness of the third conductive films 10a and 10b constituting the reflective pixel electrode 10 is 400 nm. It is a thing. When the liquid crystal thickness dt in the transmissive region is 4 μm, the thickness Δd CF of the convex portion is 1.2 μm obtained by subtracting 800 nm of the Δd TFT from 2 μm, and the convex portion can be formed with a transparent resin.
なお、上記実施の形態１では、反射領域の液晶厚と透過領域の液晶厚に差を設けて反射画素電極部と透過画素電極部における光学特性の整合性を向上させる方法として、対向基板側の反射領域に対応する位置に透明樹脂により凸部を形成する構造を示したが、本実施の形態１によるＴＦＴアレイ基板を他の光学特性の整合性を向上させ得る方法に適用することは可能である。 In the first embodiment, as a method for improving the consistency of optical characteristics between the reflective pixel electrode portion and the transmissive pixel electrode portion by providing a difference between the liquid crystal thickness of the reflective region and the liquid crystal thickness of the transmissive region, Although a structure is shown in which a convex portion is formed with a transparent resin at a position corresponding to the reflective region, the TFT array substrate according to the first embodiment can be applied to a method that can improve the consistency of other optical characteristics. is there.
以上のように、本実施の形態１では、液晶駆動時の補助容量は、第一の導電膜２からなる補助容量配線２４に、画素を囲む配線（ゲート配線２２、ソース配線６３等）とは絶縁層を介して異なる層に設けられている反射画素電極１０を重畳することにより形成されており、反射画素電極１０と配線との短絡を考慮する必要が無いため、反射画素電極１０の形成面積を大きくでき、大きな補助容量を得ることができる。また、ＴＦＴアレイ基板に材料コストの高い有機樹脂からなる層間絶縁膜を用いない構成とする場合においても、対向基板側の反射領域に対応する位置に透明樹脂による凸部を形成することにより、反射画素電極部と透過画素電極部における光路長を等しくして光学特性の整合性を向上させることができる。以上ことから、表示品質に優れ、高歩留まりおよび低コストの半透過型液晶表示装置が得られる。 As described above, in the first embodiment, the auxiliary capacitance at the time of driving the liquid crystal is the auxiliary capacitance wiring 24 made of the first conductive film 2 and the wiring (gate wiring 22, source wiring 63, etc.) surrounding the pixel. The reflective pixel electrode 10 is formed by superimposing the reflective pixel electrodes 10 provided in different layers via an insulating layer, and there is no need to consider a short circuit between the reflective pixel electrode 10 and the wiring. And a large auxiliary capacity can be obtained. Even when the TFT array substrate does not use an interlayer insulating film made of an organic resin having a high material cost, a reflective portion is formed by forming a convex portion with a transparent resin at a position corresponding to the reflective region on the counter substrate side. The optical path length in the pixel electrode portion and the transmissive pixel electrode portion can be made equal to improve the consistency of optical characteristics. From the above, a transflective liquid crystal display device with excellent display quality, high yield, and low cost can be obtained.
実施の形態２．
図４は、本発明の実施の形態２における半透過型液晶表示装置を構成するＴＦＴアレイ基板を示す断面図である。図中、同一、相当部分には同一符号を付している。
Embodiment 2. FIG.
FIG. 4 is a cross-sectional view showing a TFT array substrate constituting the transflective liquid crystal display device according to Embodiment 2 of the present invention. In the figure, the same and corresponding parts are denoted by the same reference numerals.
本実施の形態２における半透過型液晶表示装置の構造および製造工程については、ＴＦＴアレイ基板に形成される反射画素電極１０が第三の絶縁膜１１により被覆される部分を除いては上記実施の形態一と同様であるので説明を省略する。 The structure and manufacturing process of the transflective liquid crystal display device according to the second embodiment are the same as those described above except that the reflective pixel electrode 10 formed on the TFT array substrate is covered with the third insulating film 11. Since it is the same as that of the first embodiment, the description is omitted.
本実施の形態におけるＴＦＴアレイ基板は、上記実施の形態１と同様に、透明絶縁性基板１上に第一の導電膜２からなるゲート電極２１とゲート配線２２とゲート端子２３と補助容量電極および補助容量配線２４、第一の絶縁膜３、半導体能動膜４、オーミックコンタクト膜５、第二の導電膜６からなるソース電極６１とドレイン電極６２とソース配線６３とソース端子６４、第二の導電膜部分６５、第二の絶縁膜７、ドレイン電極６２上のコンタクトホール８１、ゲート端子２３上のコンタクトホール８２、ソース端子６４上のコンタクトホール８３、透明導電性膜９からなる電極パターン９１（透過画素電極９１ａ、透明導電膜部９１ｂ）と端子パターン９２、９３、および反射画素電極１０が形成されている。さらに、本実施の形態では、図４に示すように、反射画素電極１０上に第三の絶縁膜１１が形成され、反射画素電極１０は第三の絶縁膜１１によりその全面が覆われている。 As in the first embodiment, the TFT array substrate according to the present embodiment includes a gate electrode 21, a gate wiring 22, a gate terminal 23, an auxiliary capacitance electrode, and a first conductive film 2 formed on the transparent insulating substrate 1. The source electrode 61, the drain electrode 62, the source wiring 63, the source terminal 64, and the second conductive layer made of the auxiliary capacitance wiring 24, the first insulating film 3, the semiconductor active film 4, the ohmic contact film 5, and the second conductive film 6. An electrode pattern 91 (transmission) comprising a film portion 65, a second insulating film 7, a contact hole 81 on the drain electrode 62, a contact hole 82 on the gate terminal 23, a contact hole 83 on the source terminal 64, and the transparent conductive film 9. A pixel electrode 91a, a transparent conductive film portion 91b), terminal patterns 92 and 93, and a reflective pixel electrode 10 are formed. Further, in the present embodiment, as shown in FIG. 4, a third insulating film 11 is formed on the reflective pixel electrode 10, and the reflective pixel electrode 10 is entirely covered with the third insulating film 11. .
次に、本実施の形態２における半透過型液晶表示装置の製造工程について説明する。なお、透明導電性膜９からなる電極パターン９１（透過画素電極９１ａ、透明導電膜部９１ｂ）および端子パターン９２、９３を形成する工程までは上記実施の形態１と同様であるので説明を省略する。 Next, a manufacturing process of the transflective liquid crystal display device according to the second embodiment will be described. Note that the steps up to forming the electrode pattern 91 (transparent pixel electrode 91a, transparent conductive film portion 91b) and the terminal patterns 92 and 93 made of the transparent conductive film 9 are the same as those in the first embodiment, and thus the description thereof is omitted. .
上記実施の形態１と同様の工程により、透明絶縁性基板１上には第一の導電膜２からなるゲート電極２１とゲート配線２２とゲート端子２３と補助容量電極および補助容量配線２４、第一の絶縁膜３、半導体能動膜４、オーミックコンタクト膜５、第二の導電膜６からなるソース電極６１とドレイン電極６２とソース配線６３とソース端子６４と第二の導電膜部分６５、第二の絶縁膜７、第二の導電膜６５上のコンタクトホール８１、ゲート端子２３上のコンタクトホール８２、ソース端子６４上のコンタクトホール８３、透明導電性膜９からなる電極パターン９１（透過画素電極９１ａ、透明導電膜部９１ｂ）と端子パターン９２、９３が形成されている。 Through the same steps as in the first embodiment, the gate electrode 21, the gate wiring 22, the gate terminal 23, the auxiliary capacitance electrode and the auxiliary capacitance wiring 24, which are formed of the first conductive film 2, are formed on the transparent insulating substrate 1. Source electrode 61, drain electrode 62, source wiring 63, source terminal 64, second conductive film portion 65, second conductive film portion 65, second active film 6, insulating active film 4, semiconductor active film 4, ohmic contact film 5, second conductive film 6. Electrode pattern 91 (transparent pixel electrode 91a, contact hole 81 on insulating film 7, contact hole 81 on second conductive film 65, contact hole 82 on gate terminal 23, contact hole 83 on source terminal 64, and transparent conductive film 9 A transparent conductive film portion 91b) and terminal patterns 92 and 93 are formed.
次に、スパッタリング法等により反射画素電極１０を構成する第三の導電膜１０ａ、１０ｂを成膜する。第三の導電膜１０ａ、１０ｂとしては、例えばクロム、モリブデン、タンタル、チタンまたはこれらを主成分とする合金を下層とし、アルミニウム（Ａｌ）、銀（Ａｇ）またはこれらを主成分とする合金を上層とする二層構造を有した薄膜を用いることができる。本実施の形態では、下層の第三の金属膜１０ａとして膜厚１００ｎｍのクロム膜、上層の第三の導電膜１０ｂとして膜厚３００ｎｍのアルミニウムと銅（Ｃｕ）の合金膜を成膜する。 Next, third conductive films 10a and 10b constituting the reflective pixel electrode 10 are formed by sputtering or the like. As the third conductive films 10a and 10b, for example, chromium, molybdenum, tantalum, titanium or an alloy containing these as a main component is used as a lower layer, and aluminum (Al), silver (Ag) or an alloy containing these as a main component is used as an upper layer. A thin film having a two-layer structure can be used. In the present embodiment, a chromium film having a thickness of 100 nm is formed as the lower third metal film 10a, and an alloy film of aluminum and copper (Cu) having a thickness of 300 nm is formed as the upper third conductive film 10b.
続けて、プラズマＣＶＤ法等により第三の絶縁膜１１を成膜する。第三の絶縁膜１１としては、第一の絶縁膜３と同様の材質による膜厚１００ｎｍから５００ｎｍの薄膜を用いることができる。本実施の形態では、第三の絶縁膜１１として膜厚１００ｎｍのＳｉＮ膜を成膜する。 Subsequently, a third insulating film 11 is formed by a plasma CVD method or the like. As the third insulating film 11, a thin film having a thickness of 100 nm to 500 nm made of the same material as that of the first insulating film 3 can be used. In the present embodiment, a SiN film having a thickness of 100 nm is formed as the third insulating film 11.
次に、第六の写真製版工程にて第三の絶縁膜１１および第三の導電膜１０ａ、１０ｂをパターニングし、図４に示すように、反射画素電極１０および反射画素電極１０を被覆する第三の絶縁膜１１を形成する。反射画素電極１０はドレイン電極６２と電気的に接続された透明導電膜部９１ｂ上に形成される。なお、この写真製版工程においては、同一レジストパターンを用いて第三の絶縁膜１１および第三の導電膜１０ａ、１０ｂのパターニングを行う。以上の工程を経て、図４に示すように、１画素内に透過画素電極９１ａと反射画素電極１０とを有するＴＦＴアレイ基板が完成する。以降、上記実施の形態１と同様の工程により半透過型液晶表示装置を形成する。 Next, in the sixth photolithography process, the third insulating film 11 and the third conductive films 10a and 10b are patterned to cover the reflective pixel electrode 10 and the reflective pixel electrode 10 as shown in FIG. Three insulating films 11 are formed. The reflective pixel electrode 10 is formed on the transparent conductive film portion 91 b that is electrically connected to the drain electrode 62. In this photolithography process, the third insulating film 11 and the third conductive films 10a and 10b are patterned using the same resist pattern. Through the above steps, a TFT array substrate having a transmissive pixel electrode 91a and a reflective pixel electrode 10 in one pixel is completed as shown in FIG. Thereafter, a transflective liquid crystal display device is formed by the same process as in the first embodiment.
一般に、半透過型液晶表示装置においては、光を反射して表示を行う反射画素電極部と光を透過して表示を行う透過画素電極部との光路長を近づけ光学特性を一致させるために、反射画素電極部の液晶厚を小さくする必要がある。その結果、面間（ＴＦＴアレイ基板の反射画素電極と対向基板の対向透明電極間）でショートが発生し歩留まりが低下するという問題があった。本実施の形態２では、反射画素電極１０上に第三の絶縁膜１１を形成することにより、反射画素電極１０と対向透明電極間のショートの発生を抑制することができる。 In general, in a transflective liquid crystal display device, in order to make optical path lengths close to each other between a reflective pixel electrode unit that reflects light and performs display and a transmissive pixel electrode unit that transmits light and performs display, It is necessary to reduce the liquid crystal thickness of the reflective pixel electrode portion. As a result, there is a problem that a short circuit occurs between the surfaces (between the reflective pixel electrode of the TFT array substrate and the counter transparent electrode of the counter substrate), resulting in a decrease in yield. In the second embodiment, the formation of the third insulating film 11 on the reflective pixel electrode 10 can suppress the occurrence of a short circuit between the reflective pixel electrode 10 and the counter transparent electrode.
以上のように、本実施の形態２においては、上記実施の形態１と同様の効果が得られると共に、反射画素電極１０上に同一写真製版工程により第三の絶縁膜１１を形成することにより、写真製版工程を追加することなく反射画素電極１０と対向透明電極間のショートの発生を抑制することができ、半透過型液晶表示装置の歩留まりを向上させることができる。 As described above, in the second embodiment, the same effect as in the first embodiment is obtained, and the third insulating film 11 is formed on the reflective pixel electrode 10 by the same photolithography process, The occurrence of a short circuit between the reflective pixel electrode 10 and the counter transparent electrode can be suppressed without adding a photoengraving step, and the yield of the transflective liquid crystal display device can be improved.
本発明は、液晶表示装置に利用され、特に低消費電力化が要求される中、小型の携帯情報機器のモニターとして利用することができる。 INDUSTRIAL APPLICABILITY The present invention is used for a liquid crystal display device, and can be used as a monitor for a small portable information device especially when low power consumption is required.
１ 透明絶縁性基板、２ 第一の導電膜、２１ ゲート電極、２２ ゲート配線、
２３ゲート端子、２４ 補助容量配線、３ 第一の絶縁膜（ゲート絶縁膜）、
４ 半導体能動膜、５ オーミックコンタクト膜、６ 第二の導電膜、
６１ ソース電極、６２ ドレイン電極、６３ ソース配線、６４ ソース端子、
６５ 導電膜部分、
７ 第二の絶縁膜、８ａ、８ｂ、８ｃ コンタクトホール、９ 透明導電性膜、
９１ 電極パターン、９１ａ 透過画素電極、９１ｂ 透明導電膜部、
９２、９３ 端子パターン、１０反射画素電極、１０ａ、１０ｂ 第三の導電膜、
１１ 第三の絶縁膜、１００ ＴＦＴアレイ基板、１０１ 対向基板、
１０２ 透明絶縁性基板、１０３ ブラックマトリクス、１０４ カラーフイルタ、１０５ 対向透明電極、１０６ 凸部。
DESCRIPTION OF SYMBOLS 1 Transparent insulating board | substrate, 2 1st electrically conductive film, 21 Gate electrode, 22 Gate wiring,
23 gate terminal, 24 auxiliary capacity wiring, 3 first insulating film (gate insulating film),
4 semiconductor active film, 5 ohmic contact film, 6 second conductive film,
61 source electrode, 62 drain electrode, 63 source wiring, 64 source terminal,
65 conductive film portion,
7 Second insulating film, 8a, 8b, 8c contact hole, 9 transparent conductive film,
91 electrode pattern, 91a transparent pixel electrode, 91b transparent conductive film part,
92, 93 terminal pattern, 10 reflective pixel electrode, 10a, 10b third conductive film,
11 Third insulating film, 100 TFT array substrate, 101 Counter substrate,
102 transparent insulating substrate, 103 black matrix, 104 color filter, 105 counter transparent electrode, 106 convex portion.
Claims (3)
前記ＴＦＴアレイ基板は、
透明絶縁性基板上に形成された第一の導電膜からなる複数本のゲート電極を備えたゲート配線と補助容量電極および補助容量配線、
前記第一の導電膜の上に形成された第一の絶縁膜、
前記第一の絶縁膜上に形成された第二の導電膜からなり、前記ゲート配線と交差する複数本のソース電極を備えたソース配線およびドレイン電極、
前記ゲート電極と、前記ゲート電極上に前記第一の絶縁膜を介して形成された半導体層と前記ソース電極およびドレイン電極からなる薄膜トランジスタ、
前記薄膜トランジスタおよび前記第二の導電膜の上に形成された第二の絶縁膜、
前記第二の絶縁膜上に形成され、前記第二の絶縁膜に形成されたコンタクトホールを介して前記ドレイン電極と電気的に接続された透過率の高い導電膜からなる透過画素電極、
前記透過画素電極とともに前記透過率の高い導電膜で形成された透明導電膜部上に形成され、前記透明導電膜部および前記コンタクトホールを介して前記ドレイン電極に電気的に接続された反射率の高い導電膜からなる反射画素電極を備え、
前記反射画素電極は、前記第一の絶縁膜および前記第二の絶縁膜を介して前記補助容量電極および補助容量配線に重畳されて補助容量を形成していることを特徴とする半透過型液晶表示装置。 In a transflective liquid crystal display device in which a liquid crystal is disposed between a TFT array substrate having a transmissive pixel electrode that transmits light and a reflective pixel electrode that reflects light in one pixel, and a counter substrate having a counter transparent electrode. ,
The TFT array substrate is
A gate wiring having a plurality of gate electrodes made of a first conductive film formed on a transparent insulating substrate, an auxiliary capacitance electrode, and an auxiliary capacitance wiring;
A first insulating film formed on the first conductive film;
A source wiring and a drain electrode comprising a plurality of source electrodes made of a second conductive film formed on the first insulating film and intersecting the gate wiring;
A thin film transistor comprising the gate electrode, a semiconductor layer formed on the gate electrode via the first insulating film, and the source and drain electrodes;
A second insulating film formed on the thin film transistor and the second conductive film;
A transmissive pixel electrode made of a conductive film having a high transmittance formed on the second insulating film and electrically connected to the drain electrode through a contact hole formed in the second insulating film;
Reflectivity formed on the transparent conductive film portion formed of the conductive film having the high transmittance together with the transmissive pixel electrode and electrically connected to the drain electrode through the transparent conductive film portion and the contact hole. It has a reflective pixel electrode made of a high conductive film,
The transflective liquid crystal, wherein the reflective pixel electrode forms an auxiliary capacitance by being superimposed on the auxiliary capacitance electrode and the auxiliary capacitance wiring via the first insulating film and the second insulating film Display device.
前記ＴＦＴアレイ基板の製造方法は、透明絶縁性基板上に第一の導電膜を成膜し、パターニングしてゲート電極とゲート配線と補助容量電極および補助容量配線を形成する工程と、
前記第一の導電膜の上に第一の絶縁膜、半導体能動膜、オーミックコンタクト膜を順次成膜する工程と、
前記半導体能動膜と前記オーミックコンタクト膜をパターニングして前記ゲート電極の上に前記第一の絶縁膜を介して半導体層を形成する工程と、
前記第一の絶縁膜および前記半導体層の上に第二の導電膜を成膜し、パターニングしてソース電極とドレイン電極とソース配線を形成する工程と、
前記第一の絶縁膜および前記第二の導電膜の上に第二の絶縁膜を成膜する工程と、
前記第二の絶縁膜をパターニングして前記ドレイン電極上の前記第二の絶縁膜にコンタクトホールを形成する工程と、
前記第二の絶縁膜上および前記コンタクトホール内に透過率の高い導電膜を成膜し、パターニングして前記ドレイン電極と電気的に接続された透明導電膜部および透過画素電極を形成する工程と、
前記透過率の高い導電膜の上方に反射率の高い導電膜および第三の絶縁膜を成膜し、前記反射率の高い導電膜および前記第三の絶縁膜を同一写真製版工程によりパターニングして、前記透明導電膜部上に前記透明導電膜部および前記コンタクトホールを介して前記ドレイン電極に電気的に接続された反射画素電極および前記反射画素電極を被覆する第三の絶縁膜を形成する工程を備え、
前記反射画素電極は、前記第一の絶縁膜および前記第二の絶縁膜を介して前記補助容量電極および補助容量配線に重畳されて補助容量を形成していることを特徴とする半透過型液晶表示装置の製造方法。 A transflective liquid crystal display device in which a liquid crystal is disposed between a TFT array substrate having a transmissive pixel electrode that transmits light and a reflective pixel electrode that reflects light in one pixel, and a counter substrate having a counter transparent electrode. In the manufacturing method,
The TFT array substrate manufacturing method includes forming a first conductive film on a transparent insulating substrate and patterning to form a gate electrode, a gate wiring, an auxiliary capacitance electrode, and an auxiliary capacitance wiring;
A step of sequentially forming a first insulating film, a semiconductor active film, and an ohmic contact film on the first conductive film;
Patterning the semiconductor active film and the ohmic contact film to form a semiconductor layer on the gate electrode via the first insulating film;
Forming a second conductive film on the first insulating film and the semiconductor layer, and patterning to form a source electrode, a drain electrode, and a source wiring;
Forming a second insulating film on the first insulating film and the second conductive film;
Patterning the second insulating film to form a contact hole in the second insulating film on the drain electrode;
Forming a conductive film having a high transmittance on the second insulating film and in the contact hole, and patterning to form a transparent conductive film portion and a transmissive pixel electrode electrically connected to the drain electrode; ,
A highly reflective conductive film and a third insulating film are formed above the highly transparent conductive film, and the highly reflective conductive film and the third insulating film are patterned by the same photolithography process. And forming a reflective pixel electrode electrically connected to the drain electrode through the transparent conductive film portion and the contact hole on the transparent conductive film portion and a third insulating film covering the reflective pixel electrode With
The transflective liquid crystal , wherein the reflective pixel electrode forms an auxiliary capacitance by being superimposed on the auxiliary capacitance electrode and the auxiliary capacitance wiring via the first insulating film and the second insulating film Manufacturing method of display device.
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