JP4173846B2 - Transceiver - Google Patents

Description

  The present invention relates to a transceiver that transmits and receives information using an electric field induced in an electric field transmission medium that transmits an electric field, and more specifically, is used in data communication using a wearable computer that can be worn on a human body. Related to transceivers.

  Due to the miniaturization and high performance of portable terminals, wearable computers that can be attached to living bodies have been attracting attention. Conventionally, as a data communication between such wearable computers, a method of transmitting and receiving data by connecting a transceiver to a computer and transmitting an electric field induced by the transceiver through a living body as an electric field transmission medium has been proposed. (For example, refer to Patent Document 1).

  As shown in FIG. 9, in the transceiver X100 and transceiver Y100 ′ according to the prior art, data to be transmitted is output and received data is input, and transmission / reception of the transceiver X100 and transceiver Y100 ′ is performed. Terminals 107 and 107 ′ for outputting transmission / reception switching signals to be controlled are provided.

  The transceiver X100 and the transceiver Y100 ′ modulate the transmission data input from the terminals 107 and 107 ′, output the data to the communication medium 108, receive the signal from the communication medium 108, and demodulate the terminals 107 and 107. The received data is output to '.

  Further, the transceiver X100 and the transceiver Y100 ′ include oscillators 104 and 104 ′ for outputting a carrier wave, and modulation circuits 103 and 103 ′ for modulating transmission data with the carrier wave output from the oscillators 104 and 104 ′. Carrier recovery circuits 106 and 106 ′ for extracting a carrier from the received signal, and demodulation circuits 105 and 105 ′ for recovering data based on the carrier recovered by the carrier recovery circuits 106 and 106 ′ and the received signal are provided. ing.

  In the transceiver X100 and the transceiver Y100 ′ referred to in FIG. 9 having such a configuration, a method using synchronous detection for demodulation such as BPSK (Binary Phase Shift Keying) is performed in order to perform communication for transmitting and receiving a signal to be modulated and demodulated. Adopted.

  In this demodulation method, for example, the phase of the carrier wave of the transmission unit 101 of the transceiver X100 and the phase of the recovered carrier wave of the reception unit 102 ′ of the transceiver Y100 ′ may be shifted by 180 °, so the H level and L level of the signal are inverted. Sometimes.

  In electric field communication in which an electric field is induced in an object or human body that is the communication medium 108 and communication is performed by detecting the induced electric field, the electric field is also generated from the ground of the floating circuit of the transceiver X100 or the transceiver Y100 ′. In this case, the H level and the L level of the signal may be inverted.

  Conventionally, the inversion of the H level and the L level of the signal is dealt with by using a DPSK (Diffarential Phase Shift Keying) method using the signal processing referred to in FIG.

  FIG. 10 illustrates a configuration related to DPSK communication via the communication medium 108 by the transmitting unit 101 of the transceiver X100 and the receiving unit 102 ′ of the transceiver Y100 ′ that are necessary for the description. FIG.

  A terminal 107 is connected to the transmission unit 101, and data transmission is received by the reception unit 102 ′ via the communication medium 108 and then transmitted to the terminal 107 ′. The transmission unit 101 includes a modulation circuit 103, an oscillator 104, an XOR 115, and a register 116 therein.

  The receiving unit 102 ′ includes a demodulation circuit 105 ′, a carrier wave recovery circuit 106 ′, a sampling circuit 121, a clock recovery 122, an XOR 123, and a register 124 therein.

In the demodulation by the DPSK method having such a configuration, data is encoded and transmitted, for example, when data is “0”, inverted from H level to L level, or when data is “1”, inverted. . Since this method requires a clock, a clock recovery circuit is provided in the receiver.
JP 2001-352298 A

  In the above-described transceiver according to the prior art, in the method using synchronous detection for demodulation such as BPSK, the phase of the carrier wave on the transmission side and the phase of the reproduced carrier wave on the reception side may be shifted by 180 °. There is a problem that the H level and the L level of the data signal to be inverted are inverted.

  In electric field communication in which an electric field is induced in an object or a human body as a communication medium and communication is performed by detecting the induced electric field, the electric field can be induced from the ground of a circuit floating in the transceiver. Therefore, there is a problem that the H level and L level of the signal are inverted.

  Further, in the communication method using the DPSK method, since a clock is required, a clock recovery circuit is required in the receiving unit, which increases the circuit scale and power consumption.

  The present invention has been made in view of the above-described problems. The object of the present invention is to perform signal processing for correction of inversion between the H level and the L level at the receiving unit without using a clock. An object of the present invention is to provide a transceiver with high reliability, a small circuit scale, and low power consumption.

In order to solve the problem, the present invention according to claim 1 induces an electric field based on information to be transmitted in an electric field transmission medium, and transmits the information using the induced electric field, while the electric field transmission is performed. A transceiver for receiving information by receiving an electric field based on information to be received induced in a medium, wherein the information to be transmitted is modulated into a modulated signal by a carrier wave of a predetermined frequency, and is transmitted. Transmitting means for transmitting only the carrier wave in a predetermined period immediately before outputting the signal, carrier wave reproducing means for extracting and reproducing the carrier wave from the received modulated signal, and demodulating the modulated signal received based on the carrier wave detection hand demodulation Dedan, in order to correct by detecting the phase inversion of the demodulated signal, for generating a sampling signal by detecting the carrier to and outputs a demodulated signal And inversion / non-inversion switching means for switching and inverting the phase when the demodulated signal is phase-inverted, and inverting the switching signal for detecting phase inversion by sampling the demodulated signal and instructing phase switching. Sampling means for outputting to a non-inverting circuit, first delay means for delaying the sampling signal until it is sufficient to determine the phase inversion of the demodulated signal, and phase inversion of the demodulated signal are detected Second delay means for delaying the data output signal longer than the delay time of the first delay means, and a period until completion of the phase inversion determination of the demodulated signal and after completion of reception of the modulated signal Is connected to the initial signal source until completion of the phase inversion determination of the demodulated signal, and after the reception of the modulated signal is completed, A switch for switching to a connection with a non-inverting circuit, and an arithmetic circuit for outputting a data output signal instructing switching of the switch based on the sampling signal and the output signal of the second delay means Correction means .

According to a second aspect of the present invention, in the first aspect, the correction means outputs a noise generated at the end of reception of the modulation signal due to a delay of the output signal from the inversion / non-inversion switching means. And a third delay means for preventing this.

  According to the present invention, it is possible to perform signal processing for correction of inversion between the H level and the L level at the receiving unit without using a clock, and to provide a transceiver with high communication reliability, a small circuit scale, and low power consumption. Can be provided.

<First Embodiment>
FIG. 1 shows a schematic configuration diagram of transceiver A1 and transceiver B1 ′ according to the first embodiment of the present invention. The configuration diagram shown in FIG. 1 shows a transceiver A1 to which a terminal 9 is connected, a communication medium 10 for mediating communication, a transceiver B1 ′, and a terminal 9 ′ connected to the transceiver B1 ′. Yes. The present invention has been described with reference to an example in which communication is performed between the transceiver A1 and the transceiver B1 ′, and data is transmitted from the transceiver A1 and received by the transceiver B1 ′.

  The transceiver A1 and the transceiver B1 'have the same configuration. Although there is no difference in configuration between the two, for convenience of explanation of the present invention, the same components are denoted by the same numbers, and the components included in the transceiver B1 ′ are identified with “′”. ing.

  The terminal 9 sends transmission data and a transmission / reception switching signal to the transceiver A1. The transmission data is arbitrary data transmitted to the communication partner terminal 9 '. The transmission / reception switching signal is a signal for instructing the transceiver A1 to switch between transmission and reception operations.

  Also, the transceiver A1 sends received data to the terminal 9. This reception data is reception data obtained by receiving data transmitted from the communication partner terminal 9 ′ to the terminal 9 via the transceiver B 1 ′ and the transceiver A 1. Note that transmission data, a transmission / reception switching signal, and reception data are also exchanged between the terminal 9 ′ and the transceiver B <b> 1 ′, similarly to the terminal 9 and the transceiver A <b> 1.

  Further, the transceiver A1 includes a transmission unit 2 for transmitting data and a reception unit 3 for receiving data. The transmission unit 2 also includes a modulation circuit 4 for modulating transmission data with a carrier wave output from the oscillator 5 and an oscillator 5 for outputting the carrier wave. Furthermore, the receiving unit 3 determines whether or not inversion of the H level and L level of the demodulated signal has occurred and corrects it, and the carrier reproduced by the carrier reproducing circuit 8 and the received signal. A demodulation circuit 7 that reproduces data originally and a carrier recovery circuit 8 that extracts a carrier wave from the received signal are provided.

  FIG. 2 is a configuration diagram for explaining the configuration of the correction circuit 6 ′ (6) according to the first embodiment of the present invention. In the transceiver A1 and the transceiver B1 ′ according to the first embodiment of the present invention, the receiving units 3, 3 for the purpose of preventing inversion of the H level and the L level at the outputs of the receiving units 3, 3 ′. 'Is provided with correction circuits 6, 6'.

  Since the correction circuit 6 of the transceiver A1 and the correction circuit 6 'of the transceiver B1' are the same, only the correction circuit 6 'included in the transceiver B1' on the receiving side will be described below.

  The correction circuit 6 'shown in FIG. 2 includes an inversion / non-inversion switching circuit 11 for inverting the signal when the H level and L level of the demodulated signal are inverted, and the H level and L level of the demodulated signal. Sampling circuit 12 for determining whether or not inversion has occurred and outputting a switching signal, detector 13 for detecting a reproduced carrier wave and generating a sampling signal, and determining the H level and L level of the demodulated signal And a delay unit 14 for delaying the sampling signal until they can be sufficiently distinguished.

  In the correction circuit 6 ′ having such a configuration, the inversion / non-inversion switching circuit 11 performs a non-inversion operation when the switching signal output from the sampling circuit 12 is L level, and inverts when the switching signal is H level. It is a configuration. Further, when a signal for switching from the transmission / reception switching signal to the transmission is input from the terminal 9 ′ (9), a carrier wave is output from the oscillator 5 ′ (5), and the transmission data is then sent to the modulation circuit 4 ′ (4). Entered.

  After a transmission / reception switching signal is input from the terminal 9 to the transmission unit 2, a carrier wave is output from the oscillator 5 of the transceiver A <b> 1 and input to the reception unit 3 ′ of the transceiver B <b> 1 ′ through the communication medium 10. The carrier recovery circuit 8 ′ in the receiver 3 ′ of the transceiver B 1 ′ generates and outputs a recovered carrier from the received carrier. The demodulating circuit 7 'reads and outputs the phase of the carrier wave from the received carrier wave and the reproduced carrier wave.

  Next, the operation of the correction circuit 6 'will be described using the timing chart shown in FIG.

  FIG. 3 shows a timing chart when a signal transmitted by the transceiver A1 is received by the transceiver B1 'and demodulated. In this timing chart, the demodulating circuit 7 ′ of the receiving unit 3 ′ assumes that the output is L level when the carrier wave output from the oscillator 5 of the transceiver A1 is equal to the phase of the reproduced carrier wave of the transceiver B1 ′. Yes.

  Furthermore, a carrier wave as shown in “Transceiver A Modulator Oscillator” is output from the modulation circuit 4 (oscillator 5) of the transmission unit 2 of the transceiver A1, and only this carrier wave is included in “Transceiver A transmission data”. During the period W when no data is input, the output of the demodulator circuit of the transceiver B1 ′ is constant. Here, the phase difference between the carrier wave and the reproduced carrier wave is 180 °, and the output of “transceiver B demodulator circuit output” from the demodulator circuit 7 ′ is H level as shown in FIG.

  Further, the detector 13 of the correction circuit 6 'shown in FIG. 2 outputs a signal of “correction circuit detector output” shown in FIG. This “correction circuit detector output” signal is input as a sampling signal to the sampling circuit 12 through the delay unit 14. Therefore, a signal that has been delayed for a delay time after the demodulation circuit 7 'starts outputting a signal is sampled and output as a switching signal. In this case, since the switching signal becomes H level, the output signal of the demodulating circuit 7 ′ is inverted by the inversion / non-inversion switching circuit 11, and the output data of the receiver of the transceiver B1 ′ is “inverted / non-inverted” of the data output terminal 15 ′. Inverted output circuit output ", which is the same as" Transceiver A transmission data "of transceiver A1.

  Further, when the output of the demodulating circuit 7 ′ is at the L level during the period W when no data is input to the transmitting unit 2, the output of the sampling circuit 12 is at the L level. Therefore, the inversion / non-inversion switching circuit 11 outputs the signal as non-inverted, and in this case as well, the output data of the receiver 3 'of the transceiver B1' is the same as the "transceiver A transmission data" transmission data of the transceiver A1.

  In the first embodiment of the present invention described above, the level at the location where there is no transmission data at the input of the modulation circuit 4 of the transmission unit 2 is L level. In the inversion switching circuit 11, the circuit configuration is such that when the switching signal is L level, it is non-inverted, and when it is H level, it is an inverted output. In the case where the level at the place where there is no transmission data at the input of the modulation circuit 4 of the transmission unit 2 is H level, the correspondence between the switching signal of the inverting / non-inverting switching circuit 11 and the signal processing is reversed, as described above. The same effect can be obtained.

  In addition, although the signal detected by the detector 13 is a regenerated carrier wave, the received signal may be detected.

  In this way, even if there are a plurality of elements in which the phase of the signal (data) to be transmitted is inverted between the time when the signal is transmitted by the transmitter of one transceiver and the time when the signal is received by the receiver of another transceiver, By performing the signal processing disclosed in the first embodiment of the present invention, the receiving unit can restore and output the correct signal (data). In other words, the signal processing described in the first embodiment of the present invention can realize a transceiver with high communication reliability, a small circuit scale, and low power consumption.

<Second Embodiment>
In the already described first embodiment of the present invention, in the block diagram of the correction circuit 6 ′ referred to in FIG. 2 and the timing chart shown in FIG. When the “output” is initially at the H level, the output of the inversion / non-inversion switching circuit 11 becomes the H level during the delay time of the delay unit 14. Here, if the time W when the data is not input on the transmission side is short, this waveform may be mistaken as received data, and therefore the bit error rate may increase.

  Therefore, in the second embodiment of the present invention, in order to prevent this phenomenon, a switch 20 is provided after the inversion / non-inversion switching circuit 11 in the correction circuit 6 'referred to in FIG.

  The configuration of the correction circuit 6 ′ shown in FIG. 4 is a delay for delaying the sampling signal until the determination of the H level and the L level of the demodulation circuit output signal can be sufficiently distinguished from the configuration already shown in FIG. And an initial signal source 19 for outputting a constant signal after a period until it is determined whether the H level and the L level of the demodulating circuit output signal are inverted or after the reception ends. Yes.

  Further, after determining whether or not the demodulation circuit output signal has been inverted between the H level and the L level, and after the end of reception, the switch 20 that changes the connection, and the demodulation circuit output signal has the H level and the L level inverted. A delay circuit 17 for delaying the data output signal until it is determined whether or not, and an arithmetic circuit for outputting a data output signal for switching the switch 20 based on the output signals of the detector 13 and the delay circuit 17 18 are added.

  With such a configuration, a constant signal can be output to the data output terminal 15 ′ until the sampling circuit 12 determines whether to switch between the H level and the L level.

  Here, the operation of the transceiver according to the second embodiment of the present invention will be described with reference to the timing chart of FIG.

  In the transceiver A1 on the transmission side, a carrier wave is output from the “transceiver A modulation circuit oscillator” as shown in FIG. However, in the “period W in which no data is input” referred to as “transceiver A transmission data”, the output of the demodulation circuit of the transceiver B1 ′ on the receiving side is constant.

  Further, the regenerated carrier wave input to the detector 13 at this time is constant like the “transceiver B regenerated carrier wave” referred to in FIG. Here, it is assumed that the output of the demodulating circuit 7 'is at the H level as in the "sampling timing" period shown in "transceiver B demodulating circuit output".

  In the second embodiment of the present invention, a and b of the switch 20 are connected when the data output is L level, and a and c are connected when the data output is H level. Thereafter, the arithmetic circuit 20 performs a logical product.

  In the second embodiment, the delay time t1 of the delay device 16 is made shorter than the delay time t2 of the delay device 17 so that the sampling circuit 12 starts to output a signal and then the sampling circuit 12 outputs the H level. And the signal until the determination of the L level is interrupted by the switch 20 and is not output.

  Therefore, the “data output signal” from the arithmetic circuit 18 is constant. When the data reception is completed, the output of the demodulation circuit becomes L level and the output of the inversion / non-inversion switching circuit becomes H level as referred to by “inversion / non-inversion switching circuit output”. When the detection of the reproduced carrier wave is completed, the switch 20 is switched, so that the “data output signal” is constant at the L level.

  When the relationship between the connection of the data output signal and the switch 20 and the output of the detector and the delay device are inverted, the arithmetic circuit 20 adjusts the positive logic and the negative logic.

<Third Embodiment>
The transceiver according to the third embodiment of the present invention is a configuration for solving the problem that occurs in the configuration of the second embodiment already described, for example, in which the delay in the detector 13 cannot be ignored.

  As shown in FIG. 6, when a delay that cannot be ignored occurs in the detector 13, the reception of data is completed and the “inverted / noninverted switching output from the inverting / noninverted switching circuit 11 is output. Compared with the switching in which the “circuit output” becomes the H level, the time during which the “data output signal” from the arithmetic circuit 18 is turned off is delayed. Therefore, a signal for switching at the end of data reception (an output signal of the initial signal source) is output from the “data output terminal 15 ′”.

  In order to prevent this, in the configuration example of the correction circuit 6 ′ shown in FIG. 7, compared with the correction circuit 6 ′ already described in FIG. 4, the delay device C 21 is provided between the inverting / non-inverting switching circuit 11 and the switch 20. Is inserted. The delay unit C 21 delays the output signal of the inversion / non-inversion switching circuit 11 so as to prevent noise generated at the time of switching at the end of reception from being output to the data output terminal 15 ′.

  As shown in FIG. 8, the delay time referred to by the “delayer C output” of the delayer C 21 with respect to the “inverted / non-inverted switching circuit output” is made longer than the delay time of the detector 13, thereby The “data output signal” is switched before the level inversion at the time of switching at the end of reception occurs at the output of C 21, and the signal of “data output terminal 15 ′” becomes constant.

1 shows a schematic overall configuration diagram according to a first embodiment of a transceiver of the present invention. FIG. 1 shows a schematic configuration diagram of a correction circuit according to a first embodiment of a transceiver of the present invention. FIG. 2 is a timing chart for explaining the operation according to the first embodiment of the transceiver of the present invention. The schematic block diagram of the correction circuit based on 2nd Embodiment of the transceiver of this invention is shown. 6 shows a timing chart for explaining the operation according to the second embodiment of the transceiver of the present invention. 7 shows a timing chart for explaining the operation according to a third embodiment of a transceiver of the present invention. The schematic block diagram of the correction circuit based on 3rd Embodiment of the transceiver of this invention is shown. 7 shows a timing chart for explaining the operation according to a third embodiment of a transceiver of the present invention. 1 shows a schematic configuration diagram of a conventional transceiver. An explanatory view for explaining operation of transmission and reception of a transceiver by conventional technology is shown.

Explanation of symbols

1 Transceiver A
1 'Transceiver B
2, 2 'transmitter 3, 3' receiver 4, 4 'modulation circuit 5, 5' oscillator 6, 6 'correction circuit 7, 7' demodulation circuit 8, 8 'carrier recovery circuit 9, 9' terminal 10 communication medium DESCRIPTION OF SYMBOLS 11 Inversion / non-inversion switching circuit 12 Sampling circuit 13 Detector 14 Delay device 15, 15 'Data output terminal 16 Delay device 17 Delay device 18 Operation circuit 19 Initial signal source 20 Switch 21 Delay device C

Claims (2)

By inducing an electric field based on information to be transmitted in an electric field transmission medium and transmitting information using the induced electric field, while receiving an electric field based on information to be received induced in the electric field transmission medium. A transceiver for receiving information,
Transmitting means for modulating the information to be transmitted into a modulated signal using a carrier wave of a predetermined frequency, and transmitting only the carrier wave in a predetermined period immediately before outputting the modulated signal;
Carrier recovery means for extracting and reproducing the carrier from the received modulated signal;
A demodulation output stage for demodulating the modulated signal received based on the carrier wave and outputting a demodulated signal;
In order to detect and correct the phase inversion of the demodulated signal, detection means for detecting the carrier wave and generating a sampling signal, and for switching and inverting the phase when the demodulated signal is phase inverted Inverting / non-inverting switching means, sampling means for detecting a phase inversion by sampling the demodulated signal and instructing phase switching to output to the inverting / non-inverting circuit, phase inversion of the demodulated signal First delay means for delaying the sampling signal until it is sufficient to make a decision, and delaying the data output signal longer than the delay time of the first delay means until phase inversion of the demodulated signal is detected Second delay means, a period until completion of phase inversion determination of the demodulated signal, and an initial time for outputting a constant signal after completion of reception of the modulated signal. A signal source connected to the initial signal source until completion of phase inversion determination of the demodulated signal, and a switch for switching to connection to the inversion / non-inversion circuit after completion of reception of the modulation signal; and the sampling signal And a computing circuit for outputting a data output signal for instructing switching of the switch based on the output signal of the second delay means,
A transceiver comprising: The correction means includes
2. A third delay means for preventing output of noise generated at the end of reception of the modulated signal in accordance with a delay of an output signal from the inversion / non-inversion switching means. Transceiver as described in

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